]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * AGPGART driver. | |
3 | * Copyright (C) 2004 Silicon Graphics, Inc. | |
4 | * Copyright (C) 2002-2005 Dave Jones. | |
5 | * Copyright (C) 1999 Jeff Hartmann. | |
6 | * Copyright (C) 1999 Precision Insight, Inc. | |
7 | * Copyright (C) 1999 Xi Graphics, Inc. | |
8 | * | |
9 | * Permission is hereby granted, free of charge, to any person obtaining a | |
10 | * copy of this software and associated documentation files (the "Software"), | |
11 | * to deal in the Software without restriction, including without limitation | |
12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
13 | * and/or sell copies of the Software, and to permit persons to whom the | |
14 | * Software is furnished to do so, subject to the following conditions: | |
15 | * | |
16 | * The above copyright notice and this permission notice shall be included | |
17 | * in all copies or substantial portions of the Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS | |
20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, | |
23 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
24 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE | |
25 | * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
26 | * | |
27 | * TODO: | |
28 | * - Allocate more than order 0 pages to avoid too much linear map splitting. | |
29 | */ | |
1da177e4 LT |
30 | #include <linux/module.h> |
31 | #include <linux/pci.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/pagemap.h> | |
34 | #include <linux/miscdevice.h> | |
35 | #include <linux/pm.h> | |
36 | #include <linux/agp_backend.h> | |
37 | #include <linux/vmalloc.h> | |
38 | #include <linux/dma-mapping.h> | |
39 | #include <linux/mm.h> | |
e8edc6e0 | 40 | #include <linux/sched.h> |
1da177e4 LT |
41 | #include <asm/io.h> |
42 | #include <asm/cacheflush.h> | |
43 | #include <asm/pgtable.h> | |
44 | #include "agp.h" | |
45 | ||
46 | __u32 *agp_gatt_table; | |
47 | int agp_memory_reserved; | |
48 | ||
49 | /* | |
50 | * Needed by the Nforce GART driver for the time being. Would be | |
51 | * nice to do this some other way instead of needing this export. | |
52 | */ | |
53 | EXPORT_SYMBOL_GPL(agp_memory_reserved); | |
54 | ||
1da177e4 LT |
55 | /* |
56 | * Generic routines for handling agp_memory structures - | |
57 | * They use the basic page allocation routines to do the brunt of the work. | |
58 | */ | |
59 | ||
60 | void agp_free_key(int key) | |
61 | { | |
62 | if (key < 0) | |
63 | return; | |
64 | ||
65 | if (key < MAXKEY) | |
66 | clear_bit(key, agp_bridge->key_list); | |
67 | } | |
68 | EXPORT_SYMBOL(agp_free_key); | |
69 | ||
70 | ||
71 | static int agp_get_key(void) | |
72 | { | |
73 | int bit; | |
74 | ||
75 | bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY); | |
76 | if (bit < MAXKEY) { | |
77 | set_bit(bit, agp_bridge->key_list); | |
78 | return bit; | |
79 | } | |
80 | return -1; | |
81 | } | |
82 | ||
a13af4b4 DA |
83 | void agp_flush_chipset(struct agp_bridge_data *bridge) |
84 | { | |
85 | if (bridge->driver->chipset_flush) | |
86 | bridge->driver->chipset_flush(bridge); | |
87 | } | |
88 | EXPORT_SYMBOL(agp_flush_chipset); | |
89 | ||
a030ce44 TH |
90 | /* |
91 | * Use kmalloc if possible for the page list. Otherwise fall back to | |
92 | * vmalloc. This speeds things up and also saves memory for small AGP | |
93 | * regions. | |
94 | */ | |
95 | ||
96 | void agp_alloc_page_array(size_t size, struct agp_memory *mem) | |
97 | { | |
98 | mem->memory = NULL; | |
99 | mem->vmalloc_flag = 0; | |
100 | ||
1c14cfbb | 101 | if (size <= 2*PAGE_SIZE) |
a030ce44 | 102 | mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY); |
a030ce44 TH |
103 | if (mem->memory == NULL) { |
104 | mem->memory = vmalloc(size); | |
105 | mem->vmalloc_flag = 1; | |
106 | } | |
107 | } | |
108 | EXPORT_SYMBOL(agp_alloc_page_array); | |
109 | ||
110 | void agp_free_page_array(struct agp_memory *mem) | |
111 | { | |
112 | if (mem->vmalloc_flag) { | |
113 | vfree(mem->memory); | |
114 | } else { | |
115 | kfree(mem->memory); | |
116 | } | |
117 | } | |
118 | EXPORT_SYMBOL(agp_free_page_array); | |
119 | ||
120 | ||
121 | static struct agp_memory *agp_create_user_memory(unsigned long num_agp_pages) | |
122 | { | |
123 | struct agp_memory *new; | |
124 | unsigned long alloc_size = num_agp_pages*sizeof(struct page *); | |
125 | ||
1c14cfbb | 126 | new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL); |
a030ce44 TH |
127 | if (new == NULL) |
128 | return NULL; | |
129 | ||
a030ce44 TH |
130 | new->key = agp_get_key(); |
131 | ||
132 | if (new->key < 0) { | |
133 | kfree(new); | |
134 | return NULL; | |
135 | } | |
136 | ||
137 | agp_alloc_page_array(alloc_size, new); | |
138 | ||
139 | if (new->memory == NULL) { | |
140 | agp_free_key(new->key); | |
141 | kfree(new); | |
142 | return NULL; | |
143 | } | |
144 | new->num_scratch_pages = 0; | |
145 | return new; | |
146 | } | |
147 | ||
1da177e4 LT |
148 | struct agp_memory *agp_create_memory(int scratch_pages) |
149 | { | |
150 | struct agp_memory *new; | |
151 | ||
0ea27d9f | 152 | new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL); |
1da177e4 LT |
153 | if (new == NULL) |
154 | return NULL; | |
155 | ||
1da177e4 LT |
156 | new->key = agp_get_key(); |
157 | ||
158 | if (new->key < 0) { | |
159 | kfree(new); | |
160 | return NULL; | |
161 | } | |
a030ce44 TH |
162 | |
163 | agp_alloc_page_array(PAGE_SIZE * scratch_pages, new); | |
1da177e4 LT |
164 | |
165 | if (new->memory == NULL) { | |
166 | agp_free_key(new->key); | |
167 | kfree(new); | |
168 | return NULL; | |
169 | } | |
170 | new->num_scratch_pages = scratch_pages; | |
a030ce44 | 171 | new->type = AGP_NORMAL_MEMORY; |
1da177e4 LT |
172 | return new; |
173 | } | |
174 | EXPORT_SYMBOL(agp_create_memory); | |
175 | ||
176 | /** | |
177 | * agp_free_memory - free memory associated with an agp_memory pointer. | |
178 | * | |
179 | * @curr: agp_memory pointer to be freed. | |
180 | * | |
181 | * It is the only function that can be called when the backend is not owned | |
182 | * by the caller. (So it can free memory on client death.) | |
183 | */ | |
184 | void agp_free_memory(struct agp_memory *curr) | |
185 | { | |
186 | size_t i; | |
187 | ||
188 | if (curr == NULL) | |
189 | return; | |
190 | ||
191 | if (curr->is_bound == TRUE) | |
192 | agp_unbind_memory(curr); | |
193 | ||
a030ce44 TH |
194 | if (curr->type >= AGP_USER_TYPES) { |
195 | agp_generic_free_by_type(curr); | |
196 | return; | |
197 | } | |
198 | ||
1da177e4 LT |
199 | if (curr->type != 0) { |
200 | curr->bridge->driver->free_by_type(curr); | |
201 | return; | |
202 | } | |
203 | if (curr->page_count != 0) { | |
204 | for (i = 0; i < curr->page_count; i++) { | |
a2721e99 | 205 | curr->bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[i]), AGP_PAGE_DESTROY_UNMAP); |
1da177e4 | 206 | } |
a2721e99 DA |
207 | for (i = 0; i < curr->page_count; i++) { |
208 | curr->bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[i]), AGP_PAGE_DESTROY_FREE); | |
209 | } | |
1da177e4 LT |
210 | } |
211 | agp_free_key(curr->key); | |
a030ce44 | 212 | agp_free_page_array(curr); |
1da177e4 LT |
213 | kfree(curr); |
214 | } | |
215 | EXPORT_SYMBOL(agp_free_memory); | |
216 | ||
217 | #define ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long)) | |
218 | ||
219 | /** | |
220 | * agp_allocate_memory - allocate a group of pages of a certain type. | |
221 | * | |
222 | * @page_count: size_t argument of the number of pages | |
223 | * @type: u32 argument of the type of memory to be allocated. | |
224 | * | |
225 | * Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which | |
226 | * maps to physical ram. Any other type is device dependent. | |
227 | * | |
228 | * It returns NULL whenever memory is unavailable. | |
229 | */ | |
230 | struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge, | |
231 | size_t page_count, u32 type) | |
232 | { | |
233 | int scratch_pages; | |
234 | struct agp_memory *new; | |
235 | size_t i; | |
236 | ||
237 | if (!bridge) | |
238 | return NULL; | |
239 | ||
240 | if ((atomic_read(&bridge->current_memory_agp) + page_count) > bridge->max_memory_agp) | |
241 | return NULL; | |
242 | ||
a030ce44 TH |
243 | if (type >= AGP_USER_TYPES) { |
244 | new = agp_generic_alloc_user(page_count, type); | |
245 | if (new) | |
246 | new->bridge = bridge; | |
247 | return new; | |
248 | } | |
249 | ||
1da177e4 LT |
250 | if (type != 0) { |
251 | new = bridge->driver->alloc_by_type(page_count, type); | |
252 | if (new) | |
253 | new->bridge = bridge; | |
254 | return new; | |
255 | } | |
256 | ||
257 | scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE; | |
258 | ||
259 | new = agp_create_memory(scratch_pages); | |
260 | ||
261 | if (new == NULL) | |
262 | return NULL; | |
263 | ||
264 | for (i = 0; i < page_count; i++) { | |
265 | void *addr = bridge->driver->agp_alloc_page(bridge); | |
266 | ||
267 | if (addr == NULL) { | |
268 | agp_free_memory(new); | |
269 | return NULL; | |
270 | } | |
07eee78e | 271 | new->memory[i] = virt_to_gart(addr); |
1da177e4 LT |
272 | new->page_count++; |
273 | } | |
88d51967 | 274 | new->bridge = bridge; |
1da177e4 | 275 | |
1da177e4 LT |
276 | return new; |
277 | } | |
278 | EXPORT_SYMBOL(agp_allocate_memory); | |
279 | ||
280 | ||
281 | /* End - Generic routines for handling agp_memory structures */ | |
282 | ||
283 | ||
284 | static int agp_return_size(void) | |
285 | { | |
286 | int current_size; | |
287 | void *temp; | |
288 | ||
289 | temp = agp_bridge->current_size; | |
290 | ||
291 | switch (agp_bridge->driver->size_type) { | |
292 | case U8_APER_SIZE: | |
293 | current_size = A_SIZE_8(temp)->size; | |
294 | break; | |
295 | case U16_APER_SIZE: | |
296 | current_size = A_SIZE_16(temp)->size; | |
297 | break; | |
298 | case U32_APER_SIZE: | |
299 | current_size = A_SIZE_32(temp)->size; | |
300 | break; | |
301 | case LVL2_APER_SIZE: | |
302 | current_size = A_SIZE_LVL2(temp)->size; | |
303 | break; | |
304 | case FIXED_APER_SIZE: | |
305 | current_size = A_SIZE_FIX(temp)->size; | |
306 | break; | |
307 | default: | |
308 | current_size = 0; | |
309 | break; | |
310 | } | |
311 | ||
312 | current_size -= (agp_memory_reserved / (1024*1024)); | |
313 | if (current_size <0) | |
314 | current_size = 0; | |
315 | return current_size; | |
316 | } | |
317 | ||
318 | ||
319 | int agp_num_entries(void) | |
320 | { | |
321 | int num_entries; | |
322 | void *temp; | |
323 | ||
324 | temp = agp_bridge->current_size; | |
325 | ||
326 | switch (agp_bridge->driver->size_type) { | |
327 | case U8_APER_SIZE: | |
328 | num_entries = A_SIZE_8(temp)->num_entries; | |
329 | break; | |
330 | case U16_APER_SIZE: | |
331 | num_entries = A_SIZE_16(temp)->num_entries; | |
332 | break; | |
333 | case U32_APER_SIZE: | |
334 | num_entries = A_SIZE_32(temp)->num_entries; | |
335 | break; | |
336 | case LVL2_APER_SIZE: | |
337 | num_entries = A_SIZE_LVL2(temp)->num_entries; | |
338 | break; | |
339 | case FIXED_APER_SIZE: | |
340 | num_entries = A_SIZE_FIX(temp)->num_entries; | |
341 | break; | |
342 | default: | |
343 | num_entries = 0; | |
344 | break; | |
345 | } | |
346 | ||
347 | num_entries -= agp_memory_reserved>>PAGE_SHIFT; | |
348 | if (num_entries<0) | |
349 | num_entries = 0; | |
350 | return num_entries; | |
351 | } | |
352 | EXPORT_SYMBOL_GPL(agp_num_entries); | |
353 | ||
354 | ||
1da177e4 LT |
355 | /** |
356 | * agp_copy_info - copy bridge state information | |
357 | * | |
6a92a4e0 | 358 | * @info: agp_kern_info pointer. The caller should insure that this pointer is valid. |
1da177e4 LT |
359 | * |
360 | * This function copies information about the agp bridge device and the state of | |
361 | * the agp backend into an agp_kern_info pointer. | |
362 | */ | |
363 | int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info) | |
364 | { | |
365 | memset(info, 0, sizeof(struct agp_kern_info)); | |
366 | if (!bridge) { | |
367 | info->chipset = NOT_SUPPORTED; | |
368 | return -EIO; | |
369 | } | |
370 | ||
371 | info->version.major = bridge->version->major; | |
372 | info->version.minor = bridge->version->minor; | |
373 | info->chipset = SUPPORTED; | |
374 | info->device = bridge->dev; | |
66bb8bf8 | 375 | if (bridge->mode & AGPSTAT_MODE_3_0) |
1da177e4 LT |
376 | info->mode = bridge->mode & ~AGP3_RESERVED_MASK; |
377 | else | |
378 | info->mode = bridge->mode & ~AGP2_RESERVED_MASK; | |
1da177e4 LT |
379 | info->aper_base = bridge->gart_bus_addr; |
380 | info->aper_size = agp_return_size(); | |
381 | info->max_memory = bridge->max_memory_agp; | |
382 | info->current_memory = atomic_read(&bridge->current_memory_agp); | |
383 | info->cant_use_aperture = bridge->driver->cant_use_aperture; | |
384 | info->vm_ops = bridge->vm_ops; | |
385 | info->page_mask = ~0UL; | |
386 | return 0; | |
387 | } | |
388 | EXPORT_SYMBOL(agp_copy_info); | |
389 | ||
390 | /* End - Routine to copy over information structure */ | |
391 | ||
392 | /* | |
393 | * Routines for handling swapping of agp_memory into the GATT - | |
394 | * These routines take agp_memory and insert them into the GATT. | |
395 | * They call device specific routines to actually write to the GATT. | |
396 | */ | |
397 | ||
398 | /** | |
399 | * agp_bind_memory - Bind an agp_memory structure into the GATT. | |
400 | * | |
401 | * @curr: agp_memory pointer | |
402 | * @pg_start: an offset into the graphics aperture translation table | |
403 | * | |
404 | * It returns -EINVAL if the pointer == NULL. | |
405 | * It returns -EBUSY if the area of the table requested is already in use. | |
406 | */ | |
407 | int agp_bind_memory(struct agp_memory *curr, off_t pg_start) | |
408 | { | |
409 | int ret_val; | |
410 | ||
411 | if (curr == NULL) | |
412 | return -EINVAL; | |
413 | ||
414 | if (curr->is_bound == TRUE) { | |
8c8b8385 | 415 | printk(KERN_INFO PFX "memory %p is already bound!\n", curr); |
1da177e4 LT |
416 | return -EINVAL; |
417 | } | |
418 | if (curr->is_flushed == FALSE) { | |
419 | curr->bridge->driver->cache_flush(); | |
420 | curr->is_flushed = TRUE; | |
421 | } | |
422 | ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type); | |
423 | ||
424 | if (ret_val != 0) | |
425 | return ret_val; | |
426 | ||
427 | curr->is_bound = TRUE; | |
428 | curr->pg_start = pg_start; | |
429 | return 0; | |
430 | } | |
431 | EXPORT_SYMBOL(agp_bind_memory); | |
432 | ||
433 | ||
434 | /** | |
435 | * agp_unbind_memory - Removes an agp_memory structure from the GATT | |
436 | * | |
437 | * @curr: agp_memory pointer to be removed from the GATT. | |
438 | * | |
439 | * It returns -EINVAL if this piece of agp_memory is not currently bound to | |
440 | * the graphics aperture translation table or if the agp_memory pointer == NULL | |
441 | */ | |
442 | int agp_unbind_memory(struct agp_memory *curr) | |
443 | { | |
444 | int ret_val; | |
445 | ||
446 | if (curr == NULL) | |
447 | return -EINVAL; | |
448 | ||
449 | if (curr->is_bound != TRUE) { | |
8c8b8385 | 450 | printk(KERN_INFO PFX "memory %p was not bound!\n", curr); |
1da177e4 LT |
451 | return -EINVAL; |
452 | } | |
453 | ||
454 | ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type); | |
455 | ||
456 | if (ret_val != 0) | |
457 | return ret_val; | |
458 | ||
459 | curr->is_bound = FALSE; | |
460 | curr->pg_start = 0; | |
461 | return 0; | |
462 | } | |
463 | EXPORT_SYMBOL(agp_unbind_memory); | |
464 | ||
465 | /* End - Routines for handling swapping of agp_memory into the GATT */ | |
466 | ||
467 | ||
468 | /* Generic Agp routines - Start */ | |
469 | static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat) | |
470 | { | |
471 | u32 tmp; | |
472 | ||
473 | if (*requested_mode & AGP2_RESERVED_MASK) { | |
c4dd4582 DJ |
474 | printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n", |
475 | *requested_mode & AGP2_RESERVED_MASK, *requested_mode); | |
1da177e4 LT |
476 | *requested_mode &= ~AGP2_RESERVED_MASK; |
477 | } | |
478 | ||
28af24bb DJ |
479 | /* |
480 | * Some dumb bridges are programmed to disobey the AGP2 spec. | |
481 | * This is likely a BIOS misprogramming rather than poweron default, or | |
482 | * it would be a lot more common. | |
483 | * https://bugs.freedesktop.org/show_bug.cgi?id=8816 | |
484 | * AGPv2 spec 6.1.9 states: | |
485 | * The RATE field indicates the data transfer rates supported by this | |
486 | * device. A.G.P. devices must report all that apply. | |
487 | * Fix them up as best we can. | |
488 | */ | |
489 | switch (*bridge_agpstat & 7) { | |
490 | case 4: | |
491 | *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X); | |
492 | printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate" | |
493 | "Fixing up support for x2 & x1\n"); | |
494 | break; | |
495 | case 2: | |
496 | *bridge_agpstat |= AGPSTAT2_1X; | |
497 | printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate" | |
498 | "Fixing up support for x1\n"); | |
499 | break; | |
500 | default: | |
501 | break; | |
502 | } | |
503 | ||
1da177e4 LT |
504 | /* Check the speed bits make sense. Only one should be set. */ |
505 | tmp = *requested_mode & 7; | |
506 | switch (tmp) { | |
507 | case 0: | |
8c8b8385 | 508 | printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to x1 mode.\n", current->comm); |
1da177e4 LT |
509 | *requested_mode |= AGPSTAT2_1X; |
510 | break; | |
511 | case 1: | |
512 | case 2: | |
513 | break; | |
514 | case 3: | |
515 | *requested_mode &= ~(AGPSTAT2_1X); /* rate=2 */ | |
516 | break; | |
517 | case 4: | |
518 | break; | |
519 | case 5: | |
520 | case 6: | |
521 | case 7: | |
522 | *requested_mode &= ~(AGPSTAT2_1X|AGPSTAT2_2X); /* rate=4*/ | |
523 | break; | |
524 | } | |
525 | ||
526 | /* disable SBA if it's not supported */ | |
527 | if (!((*bridge_agpstat & AGPSTAT_SBA) && (*vga_agpstat & AGPSTAT_SBA) && (*requested_mode & AGPSTAT_SBA))) | |
528 | *bridge_agpstat &= ~AGPSTAT_SBA; | |
529 | ||
530 | /* Set rate */ | |
531 | if (!((*bridge_agpstat & AGPSTAT2_4X) && (*vga_agpstat & AGPSTAT2_4X) && (*requested_mode & AGPSTAT2_4X))) | |
532 | *bridge_agpstat &= ~AGPSTAT2_4X; | |
533 | ||
534 | if (!((*bridge_agpstat & AGPSTAT2_2X) && (*vga_agpstat & AGPSTAT2_2X) && (*requested_mode & AGPSTAT2_2X))) | |
535 | *bridge_agpstat &= ~AGPSTAT2_2X; | |
536 | ||
537 | if (!((*bridge_agpstat & AGPSTAT2_1X) && (*vga_agpstat & AGPSTAT2_1X) && (*requested_mode & AGPSTAT2_1X))) | |
538 | *bridge_agpstat &= ~AGPSTAT2_1X; | |
539 | ||
540 | /* Now we know what mode it should be, clear out the unwanted bits. */ | |
541 | if (*bridge_agpstat & AGPSTAT2_4X) | |
542 | *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_2X); /* 4X */ | |
543 | ||
544 | if (*bridge_agpstat & AGPSTAT2_2X) | |
545 | *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_4X); /* 2X */ | |
546 | ||
547 | if (*bridge_agpstat & AGPSTAT2_1X) | |
548 | *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); /* 1X */ | |
549 | ||
550 | /* Apply any errata. */ | |
551 | if (agp_bridge->flags & AGP_ERRATA_FASTWRITES) | |
552 | *bridge_agpstat &= ~AGPSTAT_FW; | |
553 | ||
554 | if (agp_bridge->flags & AGP_ERRATA_SBA) | |
555 | *bridge_agpstat &= ~AGPSTAT_SBA; | |
556 | ||
557 | if (agp_bridge->flags & AGP_ERRATA_1X) { | |
558 | *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); | |
559 | *bridge_agpstat |= AGPSTAT2_1X; | |
560 | } | |
561 | ||
562 | /* If we've dropped down to 1X, disable fast writes. */ | |
563 | if (*bridge_agpstat & AGPSTAT2_1X) | |
564 | *bridge_agpstat &= ~AGPSTAT_FW; | |
565 | } | |
566 | ||
567 | /* | |
568 | * requested_mode = Mode requested by (typically) X. | |
569 | * bridge_agpstat = PCI_AGP_STATUS from agp bridge. | |
570 | * vga_agpstat = PCI_AGP_STATUS from graphic card. | |
571 | */ | |
572 | static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat) | |
573 | { | |
574 | u32 origbridge=*bridge_agpstat, origvga=*vga_agpstat; | |
575 | u32 tmp; | |
576 | ||
577 | if (*requested_mode & AGP3_RESERVED_MASK) { | |
c4dd4582 DJ |
578 | printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n", |
579 | *requested_mode & AGP3_RESERVED_MASK, *requested_mode); | |
1da177e4 LT |
580 | *requested_mode &= ~AGP3_RESERVED_MASK; |
581 | } | |
582 | ||
583 | /* Check the speed bits make sense. */ | |
584 | tmp = *requested_mode & 7; | |
585 | if (tmp == 0) { | |
8c8b8385 | 586 | printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to AGP3 x4 mode.\n", current->comm); |
1da177e4 LT |
587 | *requested_mode |= AGPSTAT3_4X; |
588 | } | |
589 | if (tmp >= 3) { | |
8c8b8385 | 590 | printk(KERN_INFO PFX "%s tried to set rate=x%d. Setting to AGP3 x8 mode.\n", current->comm, tmp * 4); |
1da177e4 LT |
591 | *requested_mode = (*requested_mode & ~7) | AGPSTAT3_8X; |
592 | } | |
593 | ||
594 | /* ARQSZ - Set the value to the maximum one. | |
595 | * Don't allow the mode register to override values. */ | |
596 | *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_ARQSZ) | | |
597 | max_t(u32,(*bridge_agpstat & AGPSTAT_ARQSZ),(*vga_agpstat & AGPSTAT_ARQSZ))); | |
598 | ||
599 | /* Calibration cycle. | |
600 | * Don't allow the mode register to override values. */ | |
601 | *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_CAL_MASK) | | |
602 | min_t(u32,(*bridge_agpstat & AGPSTAT_CAL_MASK),(*vga_agpstat & AGPSTAT_CAL_MASK))); | |
603 | ||
604 | /* SBA *must* be supported for AGP v3 */ | |
605 | *bridge_agpstat |= AGPSTAT_SBA; | |
606 | ||
607 | /* | |
608 | * Set speed. | |
609 | * Check for invalid speeds. This can happen when applications | |
610 | * written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware | |
611 | */ | |
612 | if (*requested_mode & AGPSTAT_MODE_3_0) { | |
613 | /* | |
614 | * Caller hasn't a clue what it is doing. Bridge is in 3.0 mode, | |
615 | * have been passed a 3.0 mode, but with 2.x speed bits set. | |
616 | * AGP2.x 4x -> AGP3.0 4x. | |
617 | */ | |
618 | if (*requested_mode & AGPSTAT2_4X) { | |
8c8b8385 | 619 | printk(KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n", |
1da177e4 LT |
620 | current->comm, *requested_mode); |
621 | *requested_mode &= ~AGPSTAT2_4X; | |
622 | *requested_mode |= AGPSTAT3_4X; | |
623 | } | |
624 | } else { | |
625 | /* | |
626 | * The caller doesn't know what they are doing. We are in 3.0 mode, | |
627 | * but have been passed an AGP 2.x mode. | |
628 | * Convert AGP 1x,2x,4x -> AGP 3.0 4x. | |
629 | */ | |
8c8b8385 | 630 | printk(KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n", |
1da177e4 LT |
631 | current->comm, *requested_mode); |
632 | *requested_mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X); | |
633 | *requested_mode |= AGPSTAT3_4X; | |
634 | } | |
635 | ||
636 | if (*requested_mode & AGPSTAT3_8X) { | |
637 | if (!(*bridge_agpstat & AGPSTAT3_8X)) { | |
638 | *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); | |
639 | *bridge_agpstat |= AGPSTAT3_4X; | |
8c8b8385 | 640 | printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm); |
1da177e4 LT |
641 | return; |
642 | } | |
643 | if (!(*vga_agpstat & AGPSTAT3_8X)) { | |
644 | *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); | |
645 | *bridge_agpstat |= AGPSTAT3_4X; | |
8c8b8385 | 646 | printk(KERN_INFO PFX "%s requested AGPx8 but graphic card not capable.\n", current->comm); |
1da177e4 LT |
647 | return; |
648 | } | |
649 | /* All set, bridge & device can do AGP x8*/ | |
650 | *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD); | |
651 | goto done; | |
652 | ||
edf03fb0 DJ |
653 | } else if (*requested_mode & AGPSTAT3_4X) { |
654 | *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); | |
655 | *bridge_agpstat |= AGPSTAT3_4X; | |
656 | goto done; | |
657 | ||
1da177e4 LT |
658 | } else { |
659 | ||
660 | /* | |
edf03fb0 DJ |
661 | * If we didn't specify an AGP mode, we see if both |
662 | * the graphics card, and the bridge can do x8, and use if so. | |
663 | * If not, we fall back to x4 mode. | |
1da177e4 | 664 | */ |
edf03fb0 | 665 | if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) { |
2cc1a413 DJ |
666 | printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode " |
667 | "supported by bridge & card (x8).\n"); | |
edf03fb0 DJ |
668 | *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD); |
669 | *vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD); | |
670 | } else { | |
671 | printk(KERN_INFO PFX "Fell back to AGPx4 mode because"); | |
672 | if (!(*bridge_agpstat & AGPSTAT3_8X)) { | |
2cc1a413 DJ |
673 | printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n", |
674 | *bridge_agpstat, origbridge); | |
edf03fb0 DJ |
675 | *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); |
676 | *bridge_agpstat |= AGPSTAT3_4X; | |
677 | } | |
678 | if (!(*vga_agpstat & AGPSTAT3_8X)) { | |
2cc1a413 DJ |
679 | printk(KERN_INFO PFX "graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n", |
680 | *vga_agpstat, origvga); | |
edf03fb0 DJ |
681 | *vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); |
682 | *vga_agpstat |= AGPSTAT3_4X; | |
683 | } | |
1da177e4 LT |
684 | } |
685 | } | |
686 | ||
687 | done: | |
688 | /* Apply any errata. */ | |
689 | if (agp_bridge->flags & AGP_ERRATA_FASTWRITES) | |
690 | *bridge_agpstat &= ~AGPSTAT_FW; | |
691 | ||
692 | if (agp_bridge->flags & AGP_ERRATA_SBA) | |
693 | *bridge_agpstat &= ~AGPSTAT_SBA; | |
694 | ||
695 | if (agp_bridge->flags & AGP_ERRATA_1X) { | |
696 | *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); | |
697 | *bridge_agpstat |= AGPSTAT2_1X; | |
698 | } | |
699 | } | |
700 | ||
701 | ||
702 | /** | |
703 | * agp_collect_device_status - determine correct agp_cmd from various agp_stat's | |
704 | * @bridge: an agp_bridge_data struct allocated for the AGP host bridge. | |
705 | * @requested_mode: requested agp_stat from userspace (Typically from X) | |
706 | * @bridge_agpstat: current agp_stat from AGP bridge. | |
707 | * | |
708 | * This function will hunt for an AGP graphics card, and try to match | |
709 | * the requested mode to the capabilities of both the bridge and the card. | |
710 | */ | |
711 | u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat) | |
712 | { | |
713 | struct pci_dev *device = NULL; | |
714 | u32 vga_agpstat; | |
715 | u8 cap_ptr; | |
716 | ||
717 | for (;;) { | |
718 | device = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, device); | |
719 | if (!device) { | |
8c8b8385 | 720 | printk(KERN_INFO PFX "Couldn't find an AGP VGA controller.\n"); |
1da177e4 LT |
721 | return 0; |
722 | } | |
723 | cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP); | |
724 | if (cap_ptr) | |
725 | break; | |
726 | } | |
727 | ||
728 | /* | |
729 | * Ok, here we have a AGP device. Disable impossible | |
730 | * settings, and adjust the readqueue to the minimum. | |
731 | */ | |
732 | pci_read_config_dword(device, cap_ptr+PCI_AGP_STATUS, &vga_agpstat); | |
733 | ||
734 | /* adjust RQ depth */ | |
735 | bridge_agpstat = ((bridge_agpstat & ~AGPSTAT_RQ_DEPTH) | | |
736 | min_t(u32, (requested_mode & AGPSTAT_RQ_DEPTH), | |
737 | min_t(u32, (bridge_agpstat & AGPSTAT_RQ_DEPTH), (vga_agpstat & AGPSTAT_RQ_DEPTH)))); | |
738 | ||
739 | /* disable FW if it's not supported */ | |
740 | if (!((bridge_agpstat & AGPSTAT_FW) && | |
741 | (vga_agpstat & AGPSTAT_FW) && | |
742 | (requested_mode & AGPSTAT_FW))) | |
743 | bridge_agpstat &= ~AGPSTAT_FW; | |
744 | ||
745 | /* Check to see if we are operating in 3.0 mode */ | |
66bb8bf8 | 746 | if (agp_bridge->mode & AGPSTAT_MODE_3_0) |
1da177e4 LT |
747 | agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat); |
748 | else | |
749 | agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat); | |
750 | ||
751 | pci_dev_put(device); | |
752 | return bridge_agpstat; | |
753 | } | |
754 | EXPORT_SYMBOL(agp_collect_device_status); | |
755 | ||
756 | ||
757 | void agp_device_command(u32 bridge_agpstat, int agp_v3) | |
758 | { | |
759 | struct pci_dev *device = NULL; | |
760 | int mode; | |
761 | ||
762 | mode = bridge_agpstat & 0x7; | |
763 | if (agp_v3) | |
764 | mode *= 4; | |
765 | ||
766 | for_each_pci_dev(device) { | |
767 | u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP); | |
768 | if (!agp) | |
769 | continue; | |
770 | ||
771 | printk(KERN_INFO PFX "Putting AGP V%d device at %s into %dx mode\n", | |
772 | agp_v3 ? 3 : 2, pci_name(device), mode); | |
773 | pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat); | |
774 | } | |
775 | } | |
776 | EXPORT_SYMBOL(agp_device_command); | |
777 | ||
778 | ||
779 | void get_agp_version(struct agp_bridge_data *bridge) | |
780 | { | |
781 | u32 ncapid; | |
782 | ||
783 | /* Exit early if already set by errata workarounds. */ | |
784 | if (bridge->major_version != 0) | |
785 | return; | |
786 | ||
787 | pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid); | |
788 | bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf; | |
789 | bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf; | |
790 | } | |
791 | EXPORT_SYMBOL(get_agp_version); | |
792 | ||
793 | ||
794 | void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode) | |
795 | { | |
796 | u32 bridge_agpstat, temp; | |
797 | ||
798 | get_agp_version(agp_bridge); | |
799 | ||
800 | printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n", | |
801 | agp_bridge->major_version, | |
802 | agp_bridge->minor_version, | |
803 | pci_name(agp_bridge->dev)); | |
804 | ||
805 | pci_read_config_dword(agp_bridge->dev, | |
806 | agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat); | |
807 | ||
808 | bridge_agpstat = agp_collect_device_status(agp_bridge, requested_mode, bridge_agpstat); | |
809 | if (bridge_agpstat == 0) | |
810 | /* Something bad happened. FIXME: Return error code? */ | |
811 | return; | |
812 | ||
813 | bridge_agpstat |= AGPSTAT_AGP_ENABLE; | |
814 | ||
815 | /* Do AGP version specific frobbing. */ | |
816 | if (bridge->major_version >= 3) { | |
66bb8bf8 | 817 | if (bridge->mode & AGPSTAT_MODE_3_0) { |
1da177e4 LT |
818 | /* If we have 3.5, we can do the isoch stuff. */ |
819 | if (bridge->minor_version >= 5) | |
820 | agp_3_5_enable(bridge); | |
821 | agp_device_command(bridge_agpstat, TRUE); | |
822 | return; | |
823 | } else { | |
824 | /* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/ | |
825 | bridge_agpstat &= ~(7<<10) ; | |
826 | pci_read_config_dword(bridge->dev, | |
827 | bridge->capndx+AGPCTRL, &temp); | |
828 | temp |= (1<<9); | |
829 | pci_write_config_dword(bridge->dev, | |
830 | bridge->capndx+AGPCTRL, temp); | |
831 | ||
8c8b8385 | 832 | printk(KERN_INFO PFX "Device is in legacy mode," |
1da177e4 LT |
833 | " falling back to 2.x\n"); |
834 | } | |
835 | } | |
836 | ||
837 | /* AGP v<3 */ | |
838 | agp_device_command(bridge_agpstat, FALSE); | |
839 | } | |
840 | EXPORT_SYMBOL(agp_generic_enable); | |
841 | ||
842 | ||
843 | int agp_generic_create_gatt_table(struct agp_bridge_data *bridge) | |
844 | { | |
845 | char *table; | |
846 | char *table_end; | |
847 | int size; | |
848 | int page_order; | |
849 | int num_entries; | |
850 | int i; | |
851 | void *temp; | |
852 | struct page *page; | |
853 | ||
854 | /* The generic routines can't handle 2 level gatt's */ | |
855 | if (bridge->driver->size_type == LVL2_APER_SIZE) | |
856 | return -EINVAL; | |
857 | ||
858 | table = NULL; | |
859 | i = bridge->aperture_size_idx; | |
860 | temp = bridge->current_size; | |
861 | size = page_order = num_entries = 0; | |
862 | ||
863 | if (bridge->driver->size_type != FIXED_APER_SIZE) { | |
864 | do { | |
865 | switch (bridge->driver->size_type) { | |
866 | case U8_APER_SIZE: | |
867 | size = A_SIZE_8(temp)->size; | |
868 | page_order = | |
869 | A_SIZE_8(temp)->page_order; | |
870 | num_entries = | |
871 | A_SIZE_8(temp)->num_entries; | |
872 | break; | |
873 | case U16_APER_SIZE: | |
874 | size = A_SIZE_16(temp)->size; | |
875 | page_order = A_SIZE_16(temp)->page_order; | |
876 | num_entries = A_SIZE_16(temp)->num_entries; | |
877 | break; | |
878 | case U32_APER_SIZE: | |
879 | size = A_SIZE_32(temp)->size; | |
880 | page_order = A_SIZE_32(temp)->page_order; | |
881 | num_entries = A_SIZE_32(temp)->num_entries; | |
882 | break; | |
883 | /* This case will never really happen. */ | |
884 | case FIXED_APER_SIZE: | |
885 | case LVL2_APER_SIZE: | |
886 | default: | |
887 | size = page_order = num_entries = 0; | |
888 | break; | |
889 | } | |
890 | ||
07eee78e | 891 | table = alloc_gatt_pages(page_order); |
1da177e4 LT |
892 | |
893 | if (table == NULL) { | |
894 | i++; | |
895 | switch (bridge->driver->size_type) { | |
896 | case U8_APER_SIZE: | |
897 | bridge->current_size = A_IDX8(bridge); | |
898 | break; | |
899 | case U16_APER_SIZE: | |
900 | bridge->current_size = A_IDX16(bridge); | |
901 | break; | |
902 | case U32_APER_SIZE: | |
903 | bridge->current_size = A_IDX32(bridge); | |
904 | break; | |
89197e34 | 905 | /* These cases will never really happen. */ |
1da177e4 LT |
906 | case FIXED_APER_SIZE: |
907 | case LVL2_APER_SIZE: | |
908 | default: | |
1da177e4 LT |
909 | break; |
910 | } | |
911 | temp = bridge->current_size; | |
912 | } else { | |
913 | bridge->aperture_size_idx = i; | |
914 | } | |
915 | } while (!table && (i < bridge->driver->num_aperture_sizes)); | |
916 | } else { | |
917 | size = ((struct aper_size_info_fixed *) temp)->size; | |
918 | page_order = ((struct aper_size_info_fixed *) temp)->page_order; | |
919 | num_entries = ((struct aper_size_info_fixed *) temp)->num_entries; | |
07eee78e | 920 | table = alloc_gatt_pages(page_order); |
1da177e4 LT |
921 | } |
922 | ||
923 | if (table == NULL) | |
924 | return -ENOMEM; | |
925 | ||
926 | table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1); | |
927 | ||
928 | for (page = virt_to_page(table); page <= virt_to_page(table_end); page++) | |
929 | SetPageReserved(page); | |
930 | ||
931 | bridge->gatt_table_real = (u32 *) table; | |
932 | agp_gatt_table = (void *)table; | |
933 | ||
934 | bridge->driver->cache_flush(); | |
07eee78e | 935 | bridge->gatt_table = ioremap_nocache(virt_to_gart(table), |
1da177e4 LT |
936 | (PAGE_SIZE * (1 << page_order))); |
937 | bridge->driver->cache_flush(); | |
938 | ||
939 | if (bridge->gatt_table == NULL) { | |
940 | for (page = virt_to_page(table); page <= virt_to_page(table_end); page++) | |
941 | ClearPageReserved(page); | |
942 | ||
07eee78e | 943 | free_gatt_pages(table, page_order); |
1da177e4 LT |
944 | |
945 | return -ENOMEM; | |
946 | } | |
07eee78e | 947 | bridge->gatt_bus_addr = virt_to_gart(bridge->gatt_table_real); |
1da177e4 LT |
948 | |
949 | /* AK: bogus, should encode addresses > 4GB */ | |
950 | for (i = 0; i < num_entries; i++) { | |
951 | writel(bridge->scratch_page, bridge->gatt_table+i); | |
952 | readl(bridge->gatt_table+i); /* PCI Posting. */ | |
953 | } | |
954 | ||
955 | return 0; | |
956 | } | |
957 | EXPORT_SYMBOL(agp_generic_create_gatt_table); | |
958 | ||
959 | int agp_generic_free_gatt_table(struct agp_bridge_data *bridge) | |
960 | { | |
961 | int page_order; | |
962 | char *table, *table_end; | |
963 | void *temp; | |
964 | struct page *page; | |
965 | ||
966 | temp = bridge->current_size; | |
967 | ||
968 | switch (bridge->driver->size_type) { | |
969 | case U8_APER_SIZE: | |
970 | page_order = A_SIZE_8(temp)->page_order; | |
971 | break; | |
972 | case U16_APER_SIZE: | |
973 | page_order = A_SIZE_16(temp)->page_order; | |
974 | break; | |
975 | case U32_APER_SIZE: | |
976 | page_order = A_SIZE_32(temp)->page_order; | |
977 | break; | |
978 | case FIXED_APER_SIZE: | |
979 | page_order = A_SIZE_FIX(temp)->page_order; | |
980 | break; | |
981 | case LVL2_APER_SIZE: | |
982 | /* The generic routines can't deal with 2 level gatt's */ | |
983 | return -EINVAL; | |
984 | break; | |
985 | default: | |
986 | page_order = 0; | |
987 | break; | |
988 | } | |
989 | ||
990 | /* Do not worry about freeing memory, because if this is | |
991 | * called, then all agp memory is deallocated and removed | |
992 | * from the table. */ | |
993 | ||
994 | iounmap(bridge->gatt_table); | |
995 | table = (char *) bridge->gatt_table_real; | |
996 | table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1); | |
997 | ||
998 | for (page = virt_to_page(table); page <= virt_to_page(table_end); page++) | |
999 | ClearPageReserved(page); | |
1000 | ||
07eee78e | 1001 | free_gatt_pages(bridge->gatt_table_real, page_order); |
1da177e4 LT |
1002 | |
1003 | agp_gatt_table = NULL; | |
1004 | bridge->gatt_table = NULL; | |
1005 | bridge->gatt_table_real = NULL; | |
1006 | bridge->gatt_bus_addr = 0; | |
1007 | ||
1008 | return 0; | |
1009 | } | |
1010 | EXPORT_SYMBOL(agp_generic_free_gatt_table); | |
1011 | ||
1012 | ||
1013 | int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type) | |
1014 | { | |
1015 | int num_entries; | |
1016 | size_t i; | |
1017 | off_t j; | |
1018 | void *temp; | |
1019 | struct agp_bridge_data *bridge; | |
a030ce44 | 1020 | int mask_type; |
1da177e4 LT |
1021 | |
1022 | bridge = mem->bridge; | |
1023 | if (!bridge) | |
1024 | return -EINVAL; | |
1025 | ||
5aa80c72 TH |
1026 | if (mem->page_count == 0) |
1027 | return 0; | |
1028 | ||
1da177e4 LT |
1029 | temp = bridge->current_size; |
1030 | ||
1031 | switch (bridge->driver->size_type) { | |
1032 | case U8_APER_SIZE: | |
1033 | num_entries = A_SIZE_8(temp)->num_entries; | |
1034 | break; | |
1035 | case U16_APER_SIZE: | |
1036 | num_entries = A_SIZE_16(temp)->num_entries; | |
1037 | break; | |
1038 | case U32_APER_SIZE: | |
1039 | num_entries = A_SIZE_32(temp)->num_entries; | |
1040 | break; | |
1041 | case FIXED_APER_SIZE: | |
1042 | num_entries = A_SIZE_FIX(temp)->num_entries; | |
1043 | break; | |
1044 | case LVL2_APER_SIZE: | |
1045 | /* The generic routines can't deal with 2 level gatt's */ | |
1046 | return -EINVAL; | |
1047 | break; | |
1048 | default: | |
1049 | num_entries = 0; | |
1050 | break; | |
1051 | } | |
1052 | ||
1053 | num_entries -= agp_memory_reserved/PAGE_SIZE; | |
1054 | if (num_entries < 0) num_entries = 0; | |
1055 | ||
1c14cfbb | 1056 | if (type != mem->type) |
a030ce44 | 1057 | return -EINVAL; |
a030ce44 TH |
1058 | |
1059 | mask_type = bridge->driver->agp_type_to_mask_type(bridge, type); | |
1060 | if (mask_type != 0) { | |
1da177e4 LT |
1061 | /* The generic routines know nothing of memory types */ |
1062 | return -EINVAL; | |
1063 | } | |
1064 | ||
1065 | /* AK: could wrap */ | |
1066 | if ((pg_start + mem->page_count) > num_entries) | |
1067 | return -EINVAL; | |
1068 | ||
1069 | j = pg_start; | |
1070 | ||
1071 | while (j < (pg_start + mem->page_count)) { | |
1072 | if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j))) | |
1073 | return -EBUSY; | |
1074 | j++; | |
1075 | } | |
1076 | ||
1077 | if (mem->is_flushed == FALSE) { | |
1078 | bridge->driver->cache_flush(); | |
1079 | mem->is_flushed = TRUE; | |
1080 | } | |
1081 | ||
1082 | for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { | |
a030ce44 TH |
1083 | writel(bridge->driver->mask_memory(bridge, mem->memory[i], mask_type), |
1084 | bridge->gatt_table+j); | |
1da177e4 | 1085 | } |
5aa80c72 | 1086 | readl(bridge->gatt_table+j-1); /* PCI Posting. */ |
1da177e4 LT |
1087 | |
1088 | bridge->driver->tlb_flush(mem); | |
1089 | return 0; | |
1090 | } | |
1091 | EXPORT_SYMBOL(agp_generic_insert_memory); | |
1092 | ||
1093 | ||
1094 | int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type) | |
1095 | { | |
1096 | size_t i; | |
1097 | struct agp_bridge_data *bridge; | |
a030ce44 | 1098 | int mask_type; |
1da177e4 LT |
1099 | |
1100 | bridge = mem->bridge; | |
1101 | if (!bridge) | |
1102 | return -EINVAL; | |
1103 | ||
5aa80c72 TH |
1104 | if (mem->page_count == 0) |
1105 | return 0; | |
1106 | ||
a030ce44 TH |
1107 | if (type != mem->type) |
1108 | return -EINVAL; | |
1109 | ||
1110 | mask_type = bridge->driver->agp_type_to_mask_type(bridge, type); | |
1111 | if (mask_type != 0) { | |
1da177e4 LT |
1112 | /* The generic routines know nothing of memory types */ |
1113 | return -EINVAL; | |
1114 | } | |
1115 | ||
1116 | /* AK: bogus, should encode addresses > 4GB */ | |
1117 | for (i = pg_start; i < (mem->page_count + pg_start); i++) { | |
1118 | writel(bridge->scratch_page, bridge->gatt_table+i); | |
1da177e4 | 1119 | } |
5aa80c72 | 1120 | readl(bridge->gatt_table+i-1); /* PCI Posting. */ |
1da177e4 | 1121 | |
1da177e4 LT |
1122 | bridge->driver->tlb_flush(mem); |
1123 | return 0; | |
1124 | } | |
1125 | EXPORT_SYMBOL(agp_generic_remove_memory); | |
1126 | ||
1da177e4 LT |
1127 | struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type) |
1128 | { | |
1129 | return NULL; | |
1130 | } | |
1131 | EXPORT_SYMBOL(agp_generic_alloc_by_type); | |
1132 | ||
1da177e4 LT |
1133 | void agp_generic_free_by_type(struct agp_memory *curr) |
1134 | { | |
a030ce44 | 1135 | agp_free_page_array(curr); |
1da177e4 LT |
1136 | agp_free_key(curr->key); |
1137 | kfree(curr); | |
1138 | } | |
1139 | EXPORT_SYMBOL(agp_generic_free_by_type); | |
1140 | ||
a030ce44 TH |
1141 | struct agp_memory *agp_generic_alloc_user(size_t page_count, int type) |
1142 | { | |
1143 | struct agp_memory *new; | |
1144 | int i; | |
1145 | int pages; | |
1146 | ||
1147 | pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE; | |
1148 | new = agp_create_user_memory(page_count); | |
1149 | if (new == NULL) | |
1150 | return NULL; | |
1151 | ||
1c14cfbb | 1152 | for (i = 0; i < page_count; i++) |
a030ce44 | 1153 | new->memory[i] = 0; |
a030ce44 TH |
1154 | new->page_count = 0; |
1155 | new->type = type; | |
1156 | new->num_scratch_pages = pages; | |
1157 | ||
1158 | return new; | |
1159 | } | |
1160 | EXPORT_SYMBOL(agp_generic_alloc_user); | |
1161 | ||
1da177e4 LT |
1162 | /* |
1163 | * Basic Page Allocation Routines - | |
1164 | * These routines handle page allocation and by default they reserve the allocated | |
1165 | * memory. They also handle incrementing the current_memory_agp value, Which is checked | |
1166 | * against a maximum value. | |
1167 | */ | |
1168 | ||
1169 | void *agp_generic_alloc_page(struct agp_bridge_data *bridge) | |
1170 | { | |
1171 | struct page * page; | |
1172 | ||
66c669ba | 1173 | page = alloc_page(GFP_KERNEL | GFP_DMA32); |
1da177e4 LT |
1174 | if (page == NULL) |
1175 | return NULL; | |
1176 | ||
1177 | map_page_into_agp(page); | |
1178 | ||
1179 | get_page(page); | |
1da177e4 LT |
1180 | atomic_inc(&agp_bridge->current_memory_agp); |
1181 | return page_address(page); | |
1182 | } | |
1183 | EXPORT_SYMBOL(agp_generic_alloc_page); | |
1184 | ||
1185 | ||
a2721e99 | 1186 | void agp_generic_destroy_page(void *addr, int flags) |
1da177e4 LT |
1187 | { |
1188 | struct page *page; | |
1189 | ||
1190 | if (addr == NULL) | |
1191 | return; | |
1192 | ||
1193 | page = virt_to_page(addr); | |
a2721e99 DA |
1194 | if (flags & AGP_PAGE_DESTROY_UNMAP) |
1195 | unmap_page_from_agp(page); | |
1196 | ||
1197 | if (flags & AGP_PAGE_DESTROY_FREE) { | |
1198 | put_page(page); | |
1199 | free_page((unsigned long)addr); | |
1200 | atomic_dec(&agp_bridge->current_memory_agp); | |
1201 | } | |
1da177e4 LT |
1202 | } |
1203 | EXPORT_SYMBOL(agp_generic_destroy_page); | |
1204 | ||
1205 | /* End Basic Page Allocation Routines */ | |
1206 | ||
1207 | ||
1208 | /** | |
1209 | * agp_enable - initialise the agp point-to-point connection. | |
1210 | * | |
1211 | * @mode: agp mode register value to configure with. | |
1212 | */ | |
1213 | void agp_enable(struct agp_bridge_data *bridge, u32 mode) | |
1214 | { | |
1215 | if (!bridge) | |
1216 | return; | |
1217 | bridge->driver->agp_enable(bridge, mode); | |
1218 | } | |
1219 | EXPORT_SYMBOL(agp_enable); | |
1220 | ||
1221 | /* When we remove the global variable agp_bridge from all drivers | |
1222 | * then agp_alloc_bridge and agp_generic_find_bridge need to be updated | |
1223 | */ | |
1224 | ||
1225 | struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev) | |
1226 | { | |
1227 | if (list_empty(&agp_bridges)) | |
1228 | return NULL; | |
1229 | ||
1230 | return agp_bridge; | |
1231 | } | |
1232 | ||
1233 | static void ipi_handler(void *null) | |
1234 | { | |
1235 | flush_agp_cache(); | |
1236 | } | |
1237 | ||
1238 | void global_cache_flush(void) | |
1239 | { | |
1240 | if (on_each_cpu(ipi_handler, NULL, 1, 1) != 0) | |
1241 | panic(PFX "timed out waiting for the other CPUs!\n"); | |
1242 | } | |
1243 | EXPORT_SYMBOL(global_cache_flush); | |
1244 | ||
1245 | unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge, | |
1246 | unsigned long addr, int type) | |
1247 | { | |
1248 | /* memory type is ignored in the generic routine */ | |
1249 | if (bridge->driver->masks) | |
1250 | return addr | bridge->driver->masks[0].mask; | |
1251 | else | |
1252 | return addr; | |
1253 | } | |
1254 | EXPORT_SYMBOL(agp_generic_mask_memory); | |
1255 | ||
a030ce44 TH |
1256 | int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge, |
1257 | int type) | |
1258 | { | |
1259 | if (type >= AGP_USER_TYPES) | |
1260 | return 0; | |
1261 | return type; | |
1262 | } | |
1263 | EXPORT_SYMBOL(agp_generic_type_to_mask_type); | |
1264 | ||
1da177e4 LT |
1265 | /* |
1266 | * These functions are implemented according to the AGPv3 spec, | |
1267 | * which covers implementation details that had previously been | |
1268 | * left open. | |
1269 | */ | |
1270 | ||
1271 | int agp3_generic_fetch_size(void) | |
1272 | { | |
1273 | u16 temp_size; | |
1274 | int i; | |
1275 | struct aper_size_info_16 *values; | |
1276 | ||
1277 | pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size); | |
1278 | values = A_SIZE_16(agp_bridge->driver->aperture_sizes); | |
1279 | ||
1280 | for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { | |
1281 | if (temp_size == values[i].size_value) { | |
1282 | agp_bridge->previous_size = | |
1283 | agp_bridge->current_size = (void *) (values + i); | |
1284 | ||
1285 | agp_bridge->aperture_size_idx = i; | |
1286 | return values[i].size; | |
1287 | } | |
1288 | } | |
1289 | return 0; | |
1290 | } | |
1291 | EXPORT_SYMBOL(agp3_generic_fetch_size); | |
1292 | ||
1293 | void agp3_generic_tlbflush(struct agp_memory *mem) | |
1294 | { | |
1295 | u32 ctrl; | |
1296 | pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl); | |
1297 | pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN); | |
1298 | pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl); | |
1299 | } | |
1300 | EXPORT_SYMBOL(agp3_generic_tlbflush); | |
1301 | ||
1302 | int agp3_generic_configure(void) | |
1303 | { | |
1304 | u32 temp; | |
1305 | struct aper_size_info_16 *current_size; | |
1306 | ||
1307 | current_size = A_SIZE_16(agp_bridge->current_size); | |
1308 | ||
1309 | pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp); | |
1310 | agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); | |
1311 | ||
1312 | /* set aperture size */ | |
1313 | pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value); | |
1314 | /* set gart pointer */ | |
1315 | pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr); | |
1316 | /* enable aperture and GTLB */ | |
1317 | pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp); | |
1318 | pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN); | |
1319 | return 0; | |
1320 | } | |
1321 | EXPORT_SYMBOL(agp3_generic_configure); | |
1322 | ||
1323 | void agp3_generic_cleanup(void) | |
1324 | { | |
1325 | u32 ctrl; | |
1326 | pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl); | |
1327 | pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB); | |
1328 | } | |
1329 | EXPORT_SYMBOL(agp3_generic_cleanup); | |
1330 | ||
e5524f35 | 1331 | const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] = |
1da177e4 LT |
1332 | { |
1333 | {4096, 1048576, 10,0x000}, | |
1334 | {2048, 524288, 9, 0x800}, | |
1335 | {1024, 262144, 8, 0xc00}, | |
1336 | { 512, 131072, 7, 0xe00}, | |
1337 | { 256, 65536, 6, 0xf00}, | |
1338 | { 128, 32768, 5, 0xf20}, | |
1339 | { 64, 16384, 4, 0xf30}, | |
1340 | { 32, 8192, 3, 0xf38}, | |
1341 | { 16, 4096, 2, 0xf3c}, | |
1342 | { 8, 2048, 1, 0xf3e}, | |
1343 | { 4, 1024, 0, 0xf3f} | |
1344 | }; | |
1345 | EXPORT_SYMBOL(agp3_generic_sizes); | |
1346 |