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drm: lindent the drm directory.
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1da177e4 1/**
b5e89ed5 2 * \file ati_pcigart.c
1da177e4
LT
3 * ATI PCI GART support
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
10 *
11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
12 * All Rights Reserved.
13 *
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
20 *
21 * The above copyright notice and this permission notice (including the next
22 * paragraph) shall be included in all copies or substantial portions of the
23 * Software.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
26 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
27 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
28 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
29 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
30 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
31 * DEALINGS IN THE SOFTWARE.
32 */
33
34#include "drmP.h"
35
36#if PAGE_SIZE == 65536
37# define ATI_PCIGART_TABLE_ORDER 0
38# define ATI_PCIGART_TABLE_PAGES (1 << 0)
39#elif PAGE_SIZE == 16384
40# define ATI_PCIGART_TABLE_ORDER 1
41# define ATI_PCIGART_TABLE_PAGES (1 << 1)
42#elif PAGE_SIZE == 8192
43# define ATI_PCIGART_TABLE_ORDER 2
44# define ATI_PCIGART_TABLE_PAGES (1 << 2)
45#elif PAGE_SIZE == 4096
46# define ATI_PCIGART_TABLE_ORDER 3
47# define ATI_PCIGART_TABLE_PAGES (1 << 3)
48#else
49# error - PAGE_SIZE not 64K, 16K, 8K or 4K
50#endif
51
52# define ATI_MAX_PCIGART_PAGES 8192 /**< 32 MB aperture, 4K pages */
53# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
54
b5e89ed5 55static unsigned long drm_ati_alloc_pcigart_table(void)
1da177e4
LT
56{
57 unsigned long address;
58 struct page *page;
59 int i;
b5e89ed5 60 DRM_DEBUG("%s\n", __FUNCTION__);
1da177e4 61
b5e89ed5
DA
62 address = __get_free_pages(GFP_KERNEL, ATI_PCIGART_TABLE_ORDER);
63 if (address == 0UL) {
1da177e4
LT
64 return 0;
65 }
66
b5e89ed5 67 page = virt_to_page(address);
1da177e4 68
b5e89ed5 69 for (i = 0; i < ATI_PCIGART_TABLE_PAGES; i++, page++) {
1da177e4 70 get_page(page);
b5e89ed5 71 SetPageReserved(page);
1da177e4
LT
72 }
73
b5e89ed5 74 DRM_DEBUG("%s: returning 0x%08lx\n", __FUNCTION__, address);
1da177e4
LT
75 return address;
76}
77
b5e89ed5 78static void drm_ati_free_pcigart_table(unsigned long address)
1da177e4
LT
79{
80 struct page *page;
81 int i;
b5e89ed5 82 DRM_DEBUG("%s\n", __FUNCTION__);
1da177e4 83
b5e89ed5 84 page = virt_to_page(address);
1da177e4 85
b5e89ed5 86 for (i = 0; i < ATI_PCIGART_TABLE_PAGES; i++, page++) {
1da177e4 87 __put_page(page);
b5e89ed5 88 ClearPageReserved(page);
1da177e4
LT
89 }
90
b5e89ed5 91 free_pages(address, ATI_PCIGART_TABLE_ORDER);
1da177e4
LT
92}
93
b5e89ed5
DA
94int drm_ati_pcigart_cleanup(drm_device_t * dev,
95 drm_ati_pcigart_info * gart_info)
1da177e4
LT
96{
97 drm_sg_mem_t *entry = dev->sg;
98 unsigned long pages;
99 int i;
100
101 /* we need to support large memory configurations */
b5e89ed5
DA
102 if (!entry) {
103 DRM_ERROR("no scatter/gather memory!\n");
1da177e4
LT
104 return 0;
105 }
106
ea98a92f 107 if (gart_info->bus_addr) {
b5e89ed5 108 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
ea98a92f
DA
109 pci_unmap_single(dev->pdev, gart_info->bus_addr,
110 ATI_PCIGART_TABLE_PAGES * PAGE_SIZE,
111 PCI_DMA_TODEVICE);
112 }
1da177e4 113
b5e89ed5
DA
114 pages = (entry->pages <= ATI_MAX_PCIGART_PAGES)
115 ? entry->pages : ATI_MAX_PCIGART_PAGES;
1da177e4 116
b5e89ed5
DA
117 for (i = 0; i < pages; i++) {
118 if (!entry->busaddr[i])
119 break;
1da177e4
LT
120 pci_unmap_single(dev->pdev, entry->busaddr[i],
121 PAGE_SIZE, PCI_DMA_TODEVICE);
122 }
b5e89ed5
DA
123
124 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
125 gart_info->bus_addr = 0;
1da177e4
LT
126 }
127
b5e89ed5
DA
128 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN
129 && gart_info->addr) {
ea98a92f 130 drm_ati_free_pcigart_table(gart_info->addr);
b5e89ed5 131 gart_info->addr = 0;
1da177e4
LT
132 }
133
134 return 1;
135}
b5e89ed5 136
1da177e4
LT
137EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
138
b5e89ed5 139int drm_ati_pcigart_init(drm_device_t * dev, drm_ati_pcigart_info * gart_info)
1da177e4
LT
140{
141 drm_sg_mem_t *entry = dev->sg;
142 unsigned long address = 0;
143 unsigned long pages;
144 u32 *pci_gart, page_base, bus_address = 0;
145 int i, j, ret = 0;
146
b5e89ed5
DA
147 if (!entry) {
148 DRM_ERROR("no scatter/gather memory!\n");
1da177e4
LT
149 goto done;
150 }
151
b5e89ed5 152 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
ea98a92f 153 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
b5e89ed5 154
ea98a92f 155 address = drm_ati_alloc_pcigart_table();
b5e89ed5
DA
156 if (!address) {
157 DRM_ERROR("cannot allocate PCI GART page!\n");
ea98a92f
DA
158 goto done;
159 }
b5e89ed5
DA
160
161 if (!dev->pdev) {
162 DRM_ERROR("PCI device unknown!\n");
ea98a92f
DA
163 goto done;
164 }
1da177e4 165
ea98a92f 166 bus_address = pci_map_single(dev->pdev, (void *)address,
b5e89ed5
DA
167 ATI_PCIGART_TABLE_PAGES *
168 PAGE_SIZE, PCI_DMA_TODEVICE);
ea98a92f 169 if (bus_address == 0) {
b5e89ed5
DA
170 DRM_ERROR("unable to map PCIGART pages!\n");
171 drm_ati_free_pcigart_table(address);
ea98a92f
DA
172 address = 0;
173 goto done;
174 }
b5e89ed5 175 } else {
ea98a92f
DA
176 address = gart_info->addr;
177 bus_address = gart_info->bus_addr;
b5e89ed5
DA
178 DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n",
179 bus_address, address);
1da177e4
LT
180 }
181
b5e89ed5 182 pci_gart = (u32 *) address;
1da177e4 183
b5e89ed5
DA
184 pages = (entry->pages <= ATI_MAX_PCIGART_PAGES)
185 ? entry->pages : ATI_MAX_PCIGART_PAGES;
1da177e4 186
b5e89ed5 187 memset(pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32));
1da177e4 188
b5e89ed5 189 for (i = 0; i < pages; i++) {
1da177e4
LT
190 /* we need to support large memory configurations */
191 entry->busaddr[i] = pci_map_single(dev->pdev,
b5e89ed5
DA
192 page_address(entry->
193 pagelist[i]),
194 PAGE_SIZE, PCI_DMA_TODEVICE);
1da177e4 195 if (entry->busaddr[i] == 0) {
b5e89ed5 196 DRM_ERROR("unable to map PCIGART pages!\n");
ea98a92f 197 drm_ati_pcigart_cleanup(dev, gart_info);
1da177e4
LT
198 address = 0;
199 bus_address = 0;
200 goto done;
201 }
202 page_base = (u32) entry->busaddr[i];
203
204 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
ea98a92f 205 if (gart_info->is_pcie)
b5e89ed5 206 *pci_gart = (cpu_to_le32(page_base) >> 8) | 0xc;
ea98a92f 207 else
b5e89ed5 208 *pci_gart++ = cpu_to_le32(page_base);
1da177e4
LT
209 page_base += ATI_PCIGART_PAGE_SIZE;
210 }
211 }
212
213 ret = 1;
214
215#if defined(__i386__) || defined(__x86_64__)
216 wbinvd();
217#else
218 mb();
219#endif
220
b5e89ed5 221 done:
ea98a92f 222 gart_info->addr = address;
b5e89ed5 223 gart_info->bus_addr = bus_address;
1da177e4
LT
224 return ret;
225}
b5e89ed5 226
1da177e4 227EXPORT_SYMBOL(drm_ati_pcigart_init);