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1da177e4 LT |
1 | /** |
2 | * \file drm_os_linux.h | |
3 | * OS abstraction macros. | |
4 | */ | |
5 | ||
6 | ||
7 | #include <linux/interrupt.h> /* For task queue support */ | |
8 | #include <linux/delay.h> | |
9 | ||
10 | /** File pointer type */ | |
11 | #define DRMFILE struct file * | |
12 | /** Ioctl arguments */ | |
13 | #define DRM_IOCTL_ARGS struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data | |
14 | #define DRM_ERR(d) -(d) | |
15 | /** Current process ID */ | |
16 | #define DRM_CURRENTPID current->pid | |
17 | #define DRM_UDELAY(d) udelay(d) | |
18 | /** Read a byte from a MMIO region */ | |
19 | #define DRM_READ8(map, offset) readb(((void __iomem *)(map)->handle) + (offset)) | |
20 | /** Read a word from a MMIO region */ | |
21 | #define DRM_READ16(map, offset) readw(((void __iomem *)(map)->handle) + (offset)) | |
22 | /** Read a dword from a MMIO region */ | |
23 | #define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset)) | |
24 | /** Write a byte into a MMIO region */ | |
25 | #define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset)) | |
26 | /** Write a word into a MMIO region */ | |
27 | #define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset)) | |
28 | /** Write a dword into a MMIO region */ | |
29 | #define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset)) | |
30 | /** Read memory barrier */ | |
31 | #define DRM_READMEMORYBARRIER() rmb() | |
32 | /** Write memory barrier */ | |
33 | #define DRM_WRITEMEMORYBARRIER() wmb() | |
34 | /** Read/write memory barrier */ | |
35 | #define DRM_MEMORYBARRIER() mb() | |
36 | /** DRM device local declaration */ | |
37 | #define DRM_DEVICE drm_file_t *priv = filp->private_data; \ | |
38 | drm_device_t *dev = priv->head->dev | |
39 | ||
40 | /** IRQ handler arguments and return type and values */ | |
41 | #define DRM_IRQ_ARGS int irq, void *arg, struct pt_regs *regs | |
42 | ||
43 | /** AGP types */ | |
44 | #if __OS_HAS_AGP | |
45 | #define DRM_AGP_MEM struct agp_memory | |
46 | #define DRM_AGP_KERN struct agp_kern_info | |
47 | #else | |
48 | /* define some dummy types for non AGP supporting kernels */ | |
49 | struct no_agp_kern { | |
50 | unsigned long aper_base; | |
51 | unsigned long aper_size; | |
52 | }; | |
53 | #define DRM_AGP_MEM int | |
54 | #define DRM_AGP_KERN struct no_agp_kern | |
55 | #endif | |
56 | ||
57 | #if !(__OS_HAS_MTRR) | |
58 | static __inline__ int mtrr_add (unsigned long base, unsigned long size, | |
59 | unsigned int type, char increment) | |
60 | { | |
61 | return -ENODEV; | |
62 | } | |
63 | ||
64 | static __inline__ int mtrr_del (int reg, unsigned long base, | |
65 | unsigned long size) | |
66 | { | |
67 | return -ENODEV; | |
68 | } | |
69 | #define MTRR_TYPE_WRCOMB 1 | |
70 | ||
71 | #endif | |
72 | ||
73 | /** Task queue handler arguments */ | |
74 | #define DRM_TASKQUEUE_ARGS void *arg | |
75 | ||
76 | /** For data going into the kernel through the ioctl argument */ | |
77 | #define DRM_COPY_FROM_USER_IOCTL(arg1, arg2, arg3) \ | |
78 | if ( copy_from_user(&arg1, arg2, arg3) ) \ | |
79 | return -EFAULT | |
80 | /** For data going from the kernel through the ioctl argument */ | |
81 | #define DRM_COPY_TO_USER_IOCTL(arg1, arg2, arg3) \ | |
82 | if ( copy_to_user(arg1, &arg2, arg3) ) \ | |
83 | return -EFAULT | |
84 | /** Other copying of data to kernel space */ | |
85 | #define DRM_COPY_FROM_USER(arg1, arg2, arg3) \ | |
86 | copy_from_user(arg1, arg2, arg3) | |
87 | /** Other copying of data from kernel space */ | |
88 | #define DRM_COPY_TO_USER(arg1, arg2, arg3) \ | |
89 | copy_to_user(arg1, arg2, arg3) | |
90 | /* Macros for copyfrom user, but checking readability only once */ | |
91 | #define DRM_VERIFYAREA_READ( uaddr, size ) \ | |
92 | (access_ok( VERIFY_READ, uaddr, size ) ? 0 : -EFAULT) | |
93 | #define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \ | |
94 | __copy_from_user(arg1, arg2, arg3) | |
95 | #define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \ | |
96 | __copy_to_user(arg1, arg2, arg3) | |
97 | #define DRM_GET_USER_UNCHECKED(val, uaddr) \ | |
98 | __get_user(val, uaddr) | |
99 | ||
100 | #define DRM_GET_PRIV_WITH_RETURN(_priv, _filp) _priv = _filp->private_data | |
101 | ||
102 | /** | |
103 | * Get the pointer to the SAREA. | |
104 | * | |
105 | * Searches the SAREA on the mapping lists and points drm_device::sarea to it. | |
106 | */ | |
107 | #define DRM_GETSAREA() \ | |
108 | do { \ | |
109 | drm_map_list_t *entry; \ | |
110 | list_for_each_entry( entry, &dev->maplist->head, head ) { \ | |
111 | if ( entry->map && \ | |
112 | entry->map->type == _DRM_SHM && \ | |
113 | (entry->map->flags & _DRM_CONTAINS_LOCK) ) { \ | |
114 | dev_priv->sarea = entry->map; \ | |
115 | break; \ | |
116 | } \ | |
117 | } \ | |
118 | } while (0) | |
119 | ||
120 | #define DRM_HZ HZ | |
121 | ||
122 | #define DRM_WAIT_ON( ret, queue, timeout, condition ) \ | |
123 | do { \ | |
124 | DECLARE_WAITQUEUE(entry, current); \ | |
125 | unsigned long end = jiffies + (timeout); \ | |
126 | add_wait_queue(&(queue), &entry); \ | |
127 | \ | |
128 | for (;;) { \ | |
129 | __set_current_state(TASK_INTERRUPTIBLE); \ | |
130 | if (condition) \ | |
131 | break; \ | |
132 | if (time_after_eq(jiffies, end)) { \ | |
133 | ret = -EBUSY; \ | |
134 | break; \ | |
135 | } \ | |
136 | schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \ | |
137 | if (signal_pending(current)) { \ | |
138 | ret = -EINTR; \ | |
139 | break; \ | |
140 | } \ | |
141 | } \ | |
142 | __set_current_state(TASK_RUNNING); \ | |
143 | remove_wait_queue(&(queue), &entry); \ | |
144 | } while (0) | |
145 | ||
146 | ||
147 | #define DRM_WAKEUP( queue ) wake_up_interruptible( queue ) | |
148 | #define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue ) | |
149 |