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22f579c6 DA |
1 | /* via_irq.c |
2 | * | |
3 | * Copyright 2004 BEAM Ltd. | |
4 | * Copyright 2002 Tungsten Graphics, Inc. | |
5 | * Copyright 2005 Thomas Hellstrom. | |
6 | * All Rights Reserved. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a | |
9 | * copy of this software and associated documentation files (the "Software"), | |
10 | * to deal in the Software without restriction, including without limitation | |
11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
12 | * and/or sell copies of the Software, and to permit persons to whom the | |
13 | * Software is furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice (including the next | |
16 | * paragraph) shall be included in all copies or substantial portions of the | |
17 | * Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
23 | * DAMAGES OR | |
24 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
25 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
26 | * DEALINGS IN THE SOFTWARE. | |
27 | * | |
28 | * Authors: | |
29 | * Terry Barnaby <terry1@beam.ltd.uk> | |
30 | * Keith Whitwell <keith@tungstengraphics.com> | |
31 | * Thomas Hellstrom <unichrome@shipmail.org> | |
32 | * | |
33 | * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank | |
34 | * interrupt, as well as an infrastructure to handle other interrupts of the chip. | |
35 | * The refresh rate is also calculated for video playback sync purposes. | |
36 | */ | |
37 | ||
38 | #include "drmP.h" | |
39 | #include "drm.h" | |
40 | #include "via_drm.h" | |
41 | #include "via_drv.h" | |
42 | ||
43 | #define VIA_REG_INTERRUPT 0x200 | |
44 | ||
45 | /* VIA_REG_INTERRUPT */ | |
46 | #define VIA_IRQ_GLOBAL (1 << 31) | |
47 | #define VIA_IRQ_VBLANK_ENABLE (1 << 19) | |
48 | #define VIA_IRQ_VBLANK_PENDING (1 << 3) | |
49 | #define VIA_IRQ_HQV0_ENABLE (1 << 11) | |
50 | #define VIA_IRQ_HQV1_ENABLE (1 << 25) | |
51 | #define VIA_IRQ_HQV0_PENDING (1 << 9) | |
52 | #define VIA_IRQ_HQV1_PENDING (1 << 10) | |
92514243 DA |
53 | #define VIA_IRQ_DMA0_DD_ENABLE (1 << 20) |
54 | #define VIA_IRQ_DMA0_TD_ENABLE (1 << 21) | |
55 | #define VIA_IRQ_DMA1_DD_ENABLE (1 << 22) | |
56 | #define VIA_IRQ_DMA1_TD_ENABLE (1 << 23) | |
57 | #define VIA_IRQ_DMA0_DD_PENDING (1 << 4) | |
58 | #define VIA_IRQ_DMA0_TD_PENDING (1 << 5) | |
59 | #define VIA_IRQ_DMA1_DD_PENDING (1 << 6) | |
60 | #define VIA_IRQ_DMA1_TD_PENDING (1 << 7) | |
61 | ||
22f579c6 DA |
62 | |
63 | /* | |
64 | * Device-specific IRQs go here. This type might need to be extended with | |
65 | * the register if there are multiple IRQ control registers. | |
b5e89ed5 | 66 | * Currently we activate the HQV interrupts of Unichrome Pro group A. |
22f579c6 DA |
67 | */ |
68 | ||
69 | static maskarray_t via_pro_group_a_irqs[] = { | |
b5e89ed5 DA |
70 | {VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010, |
71 | 0x00000000}, | |
72 | {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010, | |
92514243 DA |
73 | 0x00000000}, |
74 | {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, | |
75 | VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, | |
76 | {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1, | |
77 | VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, | |
b5e89ed5 DA |
78 | }; |
79 | static int via_num_pro_group_a = | |
80 | sizeof(via_pro_group_a_irqs) / sizeof(maskarray_t); | |
92514243 | 81 | static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3}; |
b5e89ed5 | 82 | |
92514243 DA |
83 | static maskarray_t via_unichrome_irqs[] = { |
84 | {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, | |
85 | VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, | |
86 | {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1, | |
87 | VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008} | |
88 | }; | |
b5e89ed5 | 89 | static int via_num_unichrome = sizeof(via_unichrome_irqs) / sizeof(maskarray_t); |
92514243 | 90 | static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1}; |
b5e89ed5 DA |
91 | |
92 | static unsigned time_diff(struct timeval *now, struct timeval *then) | |
22f579c6 | 93 | { |
b5e89ed5 | 94 | return (now->tv_usec >= then->tv_usec) ? |
af6061af DA |
95 | now->tv_usec - then->tv_usec : |
96 | 1000000 - (then->tv_usec - now->tv_usec); | |
22f579c6 DA |
97 | } |
98 | ||
99 | irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS) | |
100 | { | |
84b1fd10 | 101 | struct drm_device *dev = (struct drm_device *) arg; |
22f579c6 DA |
102 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; |
103 | u32 status; | |
104 | int handled = 0; | |
105 | struct timeval cur_vblank; | |
106 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | |
107 | int i; | |
108 | ||
109 | status = VIA_READ(VIA_REG_INTERRUPT); | |
110 | if (status & VIA_IRQ_VBLANK_PENDING) { | |
af6061af DA |
111 | atomic_inc(&dev->vbl_received); |
112 | if (!(atomic_read(&dev->vbl_received) & 0x0F)) { | |
22f579c6 | 113 | do_gettimeofday(&cur_vblank); |
b5e89ed5 DA |
114 | if (dev_priv->last_vblank_valid) { |
115 | dev_priv->usec_per_vblank = | |
116 | time_diff(&cur_vblank, | |
117 | &dev_priv->last_vblank) >> 4; | |
22f579c6 DA |
118 | } |
119 | dev_priv->last_vblank = cur_vblank; | |
120 | dev_priv->last_vblank_valid = 1; | |
b5e89ed5 | 121 | } |
af6061af | 122 | if (!(atomic_read(&dev->vbl_received) & 0xFF)) { |
22f579c6 | 123 | DRM_DEBUG("US per vblank is: %u\n", |
b5e89ed5 | 124 | dev_priv->usec_per_vblank); |
22f579c6 | 125 | } |
af6061af DA |
126 | DRM_WAKEUP(&dev->vbl_queue); |
127 | drm_vbl_send_signals(dev); | |
22f579c6 DA |
128 | handled = 1; |
129 | } | |
22f579c6 | 130 | |
b5e89ed5 | 131 | for (i = 0; i < dev_priv->num_irqs; ++i) { |
22f579c6 | 132 | if (status & cur_irq->pending_mask) { |
b5e89ed5 DA |
133 | atomic_inc(&cur_irq->irq_received); |
134 | DRM_WAKEUP(&cur_irq->irq_queue); | |
22f579c6 | 135 | handled = 1; |
92514243 DA |
136 | if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) { |
137 | via_dmablit_handler(dev, 0, 1); | |
138 | } else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) { | |
139 | via_dmablit_handler(dev, 1, 1); | |
140 | } | |
22f579c6 DA |
141 | } |
142 | cur_irq++; | |
143 | } | |
b5e89ed5 | 144 | |
22f579c6 DA |
145 | /* Acknowlege interrupts */ |
146 | VIA_WRITE(VIA_REG_INTERRUPT, status); | |
147 | ||
22f579c6 DA |
148 | if (handled) |
149 | return IRQ_HANDLED; | |
150 | else | |
151 | return IRQ_NONE; | |
152 | } | |
153 | ||
154 | static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) | |
155 | { | |
156 | u32 status; | |
157 | ||
158 | if (dev_priv) { | |
159 | /* Acknowlege interrupts */ | |
160 | status = VIA_READ(VIA_REG_INTERRUPT); | |
b5e89ed5 | 161 | VIA_WRITE(VIA_REG_INTERRUPT, status | |
22f579c6 DA |
162 | dev_priv->irq_pending_mask); |
163 | } | |
164 | } | |
165 | ||
af6061af | 166 | int via_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence) |
22f579c6 | 167 | { |
af6061af DA |
168 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; |
169 | unsigned int cur_vblank; | |
170 | int ret = 0; | |
22f579c6 | 171 | |
af6061af DA |
172 | DRM_DEBUG("\n"); |
173 | if (!dev_priv) { | |
174 | DRM_ERROR("called with no initialization\n"); | |
22f579c6 DA |
175 | return -EINVAL; |
176 | } | |
177 | ||
af6061af | 178 | viadrv_acknowledge_irqs(dev_priv); |
22f579c6 | 179 | |
af6061af DA |
180 | /* Assume that the user has missed the current sequence number |
181 | * by about a day rather than she wants to wait for years | |
182 | * using vertical blanks... | |
183 | */ | |
22f579c6 | 184 | |
af6061af DA |
185 | DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, |
186 | (((cur_vblank = atomic_read(&dev->vbl_received)) - | |
187 | *sequence) <= (1 << 23))); | |
b5e89ed5 | 188 | |
af6061af DA |
189 | *sequence = cur_vblank; |
190 | return ret; | |
22f579c6 DA |
191 | } |
192 | ||
ce60fe02 | 193 | static int |
84b1fd10 | 194 | via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequence, |
22f579c6 DA |
195 | unsigned int *sequence) |
196 | { | |
197 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
198 | unsigned int cur_irq_sequence; | |
d253258c | 199 | drm_via_irq_t *cur_irq; |
22f579c6 | 200 | int ret = 0; |
86678dfd | 201 | maskarray_t *masks; |
92514243 | 202 | int real_irq; |
22f579c6 | 203 | |
3e684eae | 204 | DRM_DEBUG("\n"); |
22f579c6 DA |
205 | |
206 | if (!dev_priv) { | |
3e684eae | 207 | DRM_ERROR("called with no initialization\n"); |
20caafa6 | 208 | return -EINVAL; |
22f579c6 DA |
209 | } |
210 | ||
92514243 | 211 | if (irq >= drm_via_irq_num) { |
3e684eae | 212 | DRM_ERROR("Trying to wait on unknown irq %d\n", irq); |
20caafa6 | 213 | return -EINVAL; |
22f579c6 | 214 | } |
b5e89ed5 | 215 | |
92514243 DA |
216 | real_irq = dev_priv->irq_map[irq]; |
217 | ||
218 | if (real_irq < 0) { | |
3e684eae MN |
219 | DRM_ERROR("Video IRQ %d not available on this hardware.\n", |
220 | irq); | |
20caafa6 | 221 | return -EINVAL; |
92514243 | 222 | } |
86678dfd DA |
223 | |
224 | masks = dev_priv->irq_masks; | |
d253258c | 225 | cur_irq = dev_priv->via_irqs + real_irq; |
22f579c6 | 226 | |
92514243 | 227 | if (masks[real_irq][2] && !force_sequence) { |
22f579c6 | 228 | DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, |
b5e89ed5 DA |
229 | ((VIA_READ(masks[irq][2]) & masks[irq][3]) == |
230 | masks[irq][4])); | |
22f579c6 DA |
231 | cur_irq_sequence = atomic_read(&cur_irq->irq_received); |
232 | } else { | |
233 | DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, | |
b5e89ed5 DA |
234 | (((cur_irq_sequence = |
235 | atomic_read(&cur_irq->irq_received)) - | |
236 | *sequence) <= (1 << 23))); | |
22f579c6 DA |
237 | } |
238 | *sequence = cur_irq_sequence; | |
239 | return ret; | |
240 | } | |
241 | ||
22f579c6 DA |
242 | /* |
243 | * drm_dma.h hooks | |
244 | */ | |
245 | ||
84b1fd10 | 246 | void via_driver_irq_preinstall(struct drm_device * dev) |
22f579c6 DA |
247 | { |
248 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
249 | u32 status; | |
d253258c | 250 | drm_via_irq_t *cur_irq; |
22f579c6 DA |
251 | int i; |
252 | ||
3e684eae | 253 | DRM_DEBUG("dev_priv: %p\n", dev_priv); |
22f579c6 | 254 | if (dev_priv) { |
d253258c | 255 | cur_irq = dev_priv->via_irqs; |
22f579c6 DA |
256 | |
257 | dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; | |
258 | dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING; | |
259 | ||
689692e7 TH |
260 | if (dev_priv->chipset == VIA_PRO_GROUP_A || |
261 | dev_priv->chipset == VIA_DX9_0) { | |
262 | dev_priv->irq_masks = via_pro_group_a_irqs; | |
263 | dev_priv->num_irqs = via_num_pro_group_a; | |
264 | dev_priv->irq_map = via_irqmap_pro_group_a; | |
265 | } else { | |
266 | dev_priv->irq_masks = via_unichrome_irqs; | |
267 | dev_priv->num_irqs = via_num_unichrome; | |
268 | dev_priv->irq_map = via_irqmap_unichrome; | |
269 | } | |
b5e89ed5 DA |
270 | |
271 | for (i = 0; i < dev_priv->num_irqs; ++i) { | |
22f579c6 | 272 | atomic_set(&cur_irq->irq_received, 0); |
b5e89ed5 | 273 | cur_irq->enable_mask = dev_priv->irq_masks[i][0]; |
22f579c6 | 274 | cur_irq->pending_mask = dev_priv->irq_masks[i][1]; |
b5e89ed5 | 275 | DRM_INIT_WAITQUEUE(&cur_irq->irq_queue); |
22f579c6 DA |
276 | dev_priv->irq_enable_mask |= cur_irq->enable_mask; |
277 | dev_priv->irq_pending_mask |= cur_irq->pending_mask; | |
278 | cur_irq++; | |
b5e89ed5 | 279 | |
22f579c6 DA |
280 | DRM_DEBUG("Initializing IRQ %d\n", i); |
281 | } | |
b5e89ed5 DA |
282 | |
283 | dev_priv->last_vblank_valid = 0; | |
22f579c6 | 284 | |
92514243 | 285 | /* Clear VSync interrupt regs */ |
22f579c6 | 286 | status = VIA_READ(VIA_REG_INTERRUPT); |
b5e89ed5 | 287 | VIA_WRITE(VIA_REG_INTERRUPT, status & |
22f579c6 | 288 | ~(dev_priv->irq_enable_mask)); |
b5e89ed5 | 289 | |
22f579c6 DA |
290 | /* Clear bits if they're already high */ |
291 | viadrv_acknowledge_irqs(dev_priv); | |
292 | } | |
293 | } | |
294 | ||
af6061af | 295 | void via_driver_irq_postinstall(struct drm_device * dev) |
22f579c6 DA |
296 | { |
297 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
298 | u32 status; | |
299 | ||
af6061af DA |
300 | DRM_DEBUG("\n"); |
301 | if (dev_priv) { | |
302 | status = VIA_READ(VIA_REG_INTERRUPT); | |
303 | VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL | |
304 | | dev_priv->irq_enable_mask); | |
22f579c6 | 305 | |
af6061af | 306 | /* Some magic, oh for some data sheets ! */ |
22f579c6 | 307 | |
af6061af DA |
308 | VIA_WRITE8(0x83d4, 0x11); |
309 | VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); | |
b5e89ed5 | 310 | |
af6061af | 311 | } |
22f579c6 DA |
312 | } |
313 | ||
84b1fd10 | 314 | void via_driver_irq_uninstall(struct drm_device * dev) |
22f579c6 DA |
315 | { |
316 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
317 | u32 status; | |
318 | ||
3e684eae | 319 | DRM_DEBUG("\n"); |
22f579c6 DA |
320 | if (dev_priv) { |
321 | ||
322 | /* Some more magic, oh for some data sheets ! */ | |
323 | ||
324 | VIA_WRITE8(0x83d4, 0x11); | |
325 | VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); | |
326 | ||
327 | status = VIA_READ(VIA_REG_INTERRUPT); | |
b5e89ed5 | 328 | VIA_WRITE(VIA_REG_INTERRUPT, status & |
22f579c6 DA |
329 | ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); |
330 | } | |
331 | } | |
332 | ||
c153f45f | 333 | int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv) |
22f579c6 | 334 | { |
c153f45f | 335 | drm_via_irqwait_t *irqwait = data; |
22f579c6 DA |
336 | struct timeval now; |
337 | int ret = 0; | |
338 | drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; | |
339 | drm_via_irq_t *cur_irq = dev_priv->via_irqs; | |
340 | int force_sequence; | |
341 | ||
342 | if (!dev->irq) | |
20caafa6 | 343 | return -EINVAL; |
22f579c6 | 344 | |
c153f45f | 345 | if (irqwait->request.irq >= dev_priv->num_irqs) { |
3e684eae | 346 | DRM_ERROR("Trying to wait on unknown irq %d\n", |
c153f45f | 347 | irqwait->request.irq); |
20caafa6 | 348 | return -EINVAL; |
22f579c6 DA |
349 | } |
350 | ||
c153f45f | 351 | cur_irq += irqwait->request.irq; |
22f579c6 | 352 | |
c153f45f | 353 | switch (irqwait->request.type & ~VIA_IRQ_FLAGS_MASK) { |
22f579c6 | 354 | case VIA_IRQ_RELATIVE: |
c153f45f EA |
355 | irqwait->request.sequence += atomic_read(&cur_irq->irq_received); |
356 | irqwait->request.type &= ~_DRM_VBLANK_RELATIVE; | |
22f579c6 DA |
357 | case VIA_IRQ_ABSOLUTE: |
358 | break; | |
359 | default: | |
20caafa6 | 360 | return -EINVAL; |
22f579c6 DA |
361 | } |
362 | ||
c153f45f | 363 | if (irqwait->request.type & VIA_IRQ_SIGNAL) { |
3e684eae | 364 | DRM_ERROR("Signals on Via IRQs not implemented yet.\n"); |
20caafa6 | 365 | return -EINVAL; |
22f579c6 DA |
366 | } |
367 | ||
c153f45f | 368 | force_sequence = (irqwait->request.type & VIA_IRQ_FORCE_SEQUENCE); |
22f579c6 | 369 | |
c153f45f EA |
370 | ret = via_driver_irq_wait(dev, irqwait->request.irq, force_sequence, |
371 | &irqwait->request.sequence); | |
22f579c6 | 372 | do_gettimeofday(&now); |
c153f45f EA |
373 | irqwait->reply.tval_sec = now.tv_sec; |
374 | irqwait->reply.tval_usec = now.tv_usec; | |
22f579c6 DA |
375 | |
376 | return ret; | |
377 | } |