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1da177e4 LT |
1 | /* |
2 | * Intel & MS High Precision Event Timer Implementation. | |
3 | * | |
4 | * Copyright (C) 2003 Intel Corporation | |
5 | * Venki Pallipadi | |
6 | * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. | |
7 | * Bob Picco <robert.picco@hp.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/types.h> | |
18 | #include <linux/miscdevice.h> | |
19 | #include <linux/major.h> | |
20 | #include <linux/ioport.h> | |
21 | #include <linux/fcntl.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/poll.h> | |
f23f6e08 | 24 | #include <linux/mm.h> |
1da177e4 LT |
25 | #include <linux/proc_fs.h> |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/sysctl.h> | |
28 | #include <linux/wait.h> | |
29 | #include <linux/bcd.h> | |
30 | #include <linux/seq_file.h> | |
31 | #include <linux/bitops.h> | |
54066a57 | 32 | #include <linux/compat.h> |
0aa366f3 | 33 | #include <linux/clocksource.h> |
0ca01763 | 34 | #include <linux/uaccess.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
0ca01763 | 36 | #include <linux/io.h> |
1da177e4 LT |
37 | |
38 | #include <asm/current.h> | |
1da177e4 | 39 | #include <asm/system.h> |
1da177e4 LT |
40 | #include <asm/irq.h> |
41 | #include <asm/div64.h> | |
42 | ||
43 | #include <linux/acpi.h> | |
44 | #include <acpi/acpi_bus.h> | |
45 | #include <linux/hpet.h> | |
46 | ||
47 | /* | |
48 | * The High Precision Event Timer driver. | |
49 | * This driver is closely modelled after the rtc.c driver. | |
e45f2c07 | 50 | * http://www.intel.com/hardwaredesign/hpetspec_1.pdf |
1da177e4 LT |
51 | */ |
52 | #define HPET_USER_FREQ (64) | |
53 | #define HPET_DRIFT (500) | |
54 | ||
757c4724 RD |
55 | #define HPET_RANGE_SIZE 1024 /* from HPET spec */ |
56 | ||
64a76f66 DB |
57 | |
58 | /* WARNING -- don't get confused. These macros are never used | |
59 | * to write the (single) counter, and rarely to read it. | |
60 | * They're badly named; to fix, someday. | |
61 | */ | |
0aa366f3 TL |
62 | #if BITS_PER_LONG == 64 |
63 | #define write_counter(V, MC) writeq(V, MC) | |
64 | #define read_counter(MC) readq(MC) | |
65 | #else | |
66 | #define write_counter(V, MC) writel(V, MC) | |
67 | #define read_counter(MC) readl(MC) | |
68 | #endif | |
69 | ||
54066a57 | 70 | static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */ |
642d30bb | 71 | static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; |
1da177e4 | 72 | |
3dffec45 ÇO |
73 | /* This clocksource driver currently only works on ia64 */ |
74 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
75 | static void __iomem *hpet_mctr; |
76 | ||
8e19608e | 77 | static cycle_t read_hpet(struct clocksource *cs) |
0aa366f3 TL |
78 | { |
79 | return (cycle_t)read_counter((void __iomem *)hpet_mctr); | |
80 | } | |
81 | ||
82 | static struct clocksource clocksource_hpet = { | |
0ca01763 JSR |
83 | .name = "hpet", |
84 | .rating = 250, | |
85 | .read = read_hpet, | |
86 | .mask = CLOCKSOURCE_MASK(64), | |
0ca01763 | 87 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
0aa366f3 TL |
88 | }; |
89 | static struct clocksource *hpet_clocksource; | |
3dffec45 | 90 | #endif |
0aa366f3 | 91 | |
1da177e4 LT |
92 | /* A lock for concurrent access by app and isr hpet activity. */ |
93 | static DEFINE_SPINLOCK(hpet_lock); | |
1da177e4 LT |
94 | |
95 | #define HPET_DEV_NAME (7) | |
96 | ||
97 | struct hpet_dev { | |
98 | struct hpets *hd_hpets; | |
99 | struct hpet __iomem *hd_hpet; | |
100 | struct hpet_timer __iomem *hd_timer; | |
101 | unsigned long hd_ireqfreq; | |
102 | unsigned long hd_irqdata; | |
103 | wait_queue_head_t hd_waitqueue; | |
104 | struct fasync_struct *hd_async_queue; | |
1da177e4 LT |
105 | unsigned int hd_flags; |
106 | unsigned int hd_irq; | |
107 | unsigned int hd_hdwirq; | |
108 | char hd_name[HPET_DEV_NAME]; | |
109 | }; | |
110 | ||
111 | struct hpets { | |
112 | struct hpets *hp_next; | |
113 | struct hpet __iomem *hp_hpet; | |
114 | unsigned long hp_hpet_phys; | |
0aa366f3 | 115 | struct clocksource *hp_clocksource; |
ba3f213f | 116 | unsigned long long hp_tick_freq; |
1da177e4 LT |
117 | unsigned long hp_delta; |
118 | unsigned int hp_ntimer; | |
119 | unsigned int hp_which; | |
120 | struct hpet_dev hp_dev[1]; | |
121 | }; | |
122 | ||
123 | static struct hpets *hpets; | |
124 | ||
125 | #define HPET_OPEN 0x0001 | |
126 | #define HPET_IE 0x0002 /* interrupt enabled */ | |
127 | #define HPET_PERIODIC 0x0004 | |
0d290861 | 128 | #define HPET_SHARED_IRQ 0x0008 |
1da177e4 | 129 | |
1da177e4 LT |
130 | |
131 | #ifndef readq | |
887c27f3 | 132 | static inline unsigned long long readq(void __iomem *addr) |
1da177e4 LT |
133 | { |
134 | return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); | |
135 | } | |
136 | #endif | |
137 | ||
138 | #ifndef writeq | |
887c27f3 | 139 | static inline void writeq(unsigned long long v, void __iomem *addr) |
1da177e4 LT |
140 | { |
141 | writel(v & 0xffffffff, addr); | |
142 | writel(v >> 32, addr + 4); | |
143 | } | |
144 | #endif | |
145 | ||
7d12e780 | 146 | static irqreturn_t hpet_interrupt(int irq, void *data) |
1da177e4 LT |
147 | { |
148 | struct hpet_dev *devp; | |
149 | unsigned long isr; | |
150 | ||
151 | devp = data; | |
0d290861 CL |
152 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
153 | ||
154 | if ((devp->hd_flags & HPET_SHARED_IRQ) && | |
155 | !(isr & readl(&devp->hd_hpet->hpet_isr))) | |
156 | return IRQ_NONE; | |
1da177e4 LT |
157 | |
158 | spin_lock(&hpet_lock); | |
159 | devp->hd_irqdata++; | |
160 | ||
161 | /* | |
162 | * For non-periodic timers, increment the accumulator. | |
163 | * This has the effect of treating non-periodic like periodic. | |
164 | */ | |
165 | if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { | |
166 | unsigned long m, t; | |
167 | ||
168 | t = devp->hd_ireqfreq; | |
ae21cf92 NC |
169 | m = read_counter(&devp->hd_timer->hpet_compare); |
170 | write_counter(t + m, &devp->hd_timer->hpet_compare); | |
1da177e4 LT |
171 | } |
172 | ||
0d290861 CL |
173 | if (devp->hd_flags & HPET_SHARED_IRQ) |
174 | writel(isr, &devp->hd_hpet->hpet_isr); | |
1da177e4 LT |
175 | spin_unlock(&hpet_lock); |
176 | ||
1da177e4 LT |
177 | wake_up_interruptible(&devp->hd_waitqueue); |
178 | ||
179 | kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); | |
180 | ||
181 | return IRQ_HANDLED; | |
182 | } | |
183 | ||
70ef6d59 KH |
184 | static void hpet_timer_set_irq(struct hpet_dev *devp) |
185 | { | |
186 | unsigned long v; | |
187 | int irq, gsi; | |
188 | struct hpet_timer __iomem *timer; | |
189 | ||
190 | spin_lock_irq(&hpet_lock); | |
191 | if (devp->hd_hdwirq) { | |
192 | spin_unlock_irq(&hpet_lock); | |
193 | return; | |
194 | } | |
195 | ||
196 | timer = devp->hd_timer; | |
197 | ||
198 | /* we prefer level triggered mode */ | |
199 | v = readl(&timer->hpet_config); | |
200 | if (!(v & Tn_INT_TYPE_CNF_MASK)) { | |
201 | v |= Tn_INT_TYPE_CNF_MASK; | |
202 | writel(v, &timer->hpet_config); | |
203 | } | |
204 | spin_unlock_irq(&hpet_lock); | |
205 | ||
206 | v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> | |
207 | Tn_INT_ROUTE_CAP_SHIFT; | |
208 | ||
209 | /* | |
210 | * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by | |
211 | * legacy device. In IO APIC mode, we skip all the legacy IRQS. | |
212 | */ | |
213 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) | |
214 | v &= ~0xf3df; | |
215 | else | |
216 | v &= ~0xffff; | |
217 | ||
e5d61511 | 218 | for_each_set_bit(irq, &v, HPET_MAX_IRQ) { |
1f45f562 | 219 | if (irq >= nr_irqs) { |
70ef6d59 KH |
220 | irq = HPET_MAX_IRQ; |
221 | break; | |
222 | } | |
223 | ||
a2f809b0 | 224 | gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, |
70ef6d59 KH |
225 | ACPI_ACTIVE_LOW); |
226 | if (gsi > 0) | |
227 | break; | |
228 | ||
229 | /* FIXME: Setup interrupt source table */ | |
230 | } | |
231 | ||
232 | if (irq < HPET_MAX_IRQ) { | |
233 | spin_lock_irq(&hpet_lock); | |
234 | v = readl(&timer->hpet_config); | |
235 | v |= irq << Tn_INT_ROUTE_CNF_SHIFT; | |
236 | writel(v, &timer->hpet_config); | |
237 | devp->hd_hdwirq = gsi; | |
238 | spin_unlock_irq(&hpet_lock); | |
239 | } | |
240 | return; | |
241 | } | |
242 | ||
1da177e4 LT |
243 | static int hpet_open(struct inode *inode, struct file *file) |
244 | { | |
245 | struct hpet_dev *devp; | |
246 | struct hpets *hpetp; | |
247 | int i; | |
248 | ||
249 | if (file->f_mode & FMODE_WRITE) | |
250 | return -EINVAL; | |
251 | ||
54066a57 | 252 | mutex_lock(&hpet_mutex); |
1da177e4 LT |
253 | spin_lock_irq(&hpet_lock); |
254 | ||
255 | for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) | |
256 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
64a76f66 | 257 | if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) |
1da177e4 LT |
258 | continue; |
259 | else { | |
260 | devp = &hpetp->hp_dev[i]; | |
261 | break; | |
262 | } | |
263 | ||
264 | if (!devp) { | |
265 | spin_unlock_irq(&hpet_lock); | |
54066a57 | 266 | mutex_unlock(&hpet_mutex); |
1da177e4 LT |
267 | return -EBUSY; |
268 | } | |
269 | ||
270 | file->private_data = devp; | |
271 | devp->hd_irqdata = 0; | |
272 | devp->hd_flags |= HPET_OPEN; | |
273 | spin_unlock_irq(&hpet_lock); | |
54066a57 | 274 | mutex_unlock(&hpet_mutex); |
1da177e4 | 275 | |
70ef6d59 KH |
276 | hpet_timer_set_irq(devp); |
277 | ||
1da177e4 LT |
278 | return 0; |
279 | } | |
280 | ||
281 | static ssize_t | |
282 | hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) | |
283 | { | |
284 | DECLARE_WAITQUEUE(wait, current); | |
285 | unsigned long data; | |
286 | ssize_t retval; | |
287 | struct hpet_dev *devp; | |
288 | ||
289 | devp = file->private_data; | |
290 | if (!devp->hd_ireqfreq) | |
291 | return -EIO; | |
292 | ||
293 | if (count < sizeof(unsigned long)) | |
294 | return -EINVAL; | |
295 | ||
296 | add_wait_queue(&devp->hd_waitqueue, &wait); | |
297 | ||
298 | for ( ; ; ) { | |
299 | set_current_state(TASK_INTERRUPTIBLE); | |
300 | ||
301 | spin_lock_irq(&hpet_lock); | |
302 | data = devp->hd_irqdata; | |
303 | devp->hd_irqdata = 0; | |
304 | spin_unlock_irq(&hpet_lock); | |
305 | ||
306 | if (data) | |
307 | break; | |
308 | else if (file->f_flags & O_NONBLOCK) { | |
309 | retval = -EAGAIN; | |
310 | goto out; | |
311 | } else if (signal_pending(current)) { | |
312 | retval = -ERESTARTSYS; | |
313 | goto out; | |
314 | } | |
315 | schedule(); | |
316 | } | |
317 | ||
318 | retval = put_user(data, (unsigned long __user *)buf); | |
319 | if (!retval) | |
320 | retval = sizeof(unsigned long); | |
321 | out: | |
322 | __set_current_state(TASK_RUNNING); | |
323 | remove_wait_queue(&devp->hd_waitqueue, &wait); | |
324 | ||
325 | return retval; | |
326 | } | |
327 | ||
328 | static unsigned int hpet_poll(struct file *file, poll_table * wait) | |
329 | { | |
330 | unsigned long v; | |
331 | struct hpet_dev *devp; | |
332 | ||
333 | devp = file->private_data; | |
334 | ||
335 | if (!devp->hd_ireqfreq) | |
336 | return 0; | |
337 | ||
338 | poll_wait(file, &devp->hd_waitqueue, wait); | |
339 | ||
340 | spin_lock_irq(&hpet_lock); | |
341 | v = devp->hd_irqdata; | |
342 | spin_unlock_irq(&hpet_lock); | |
343 | ||
344 | if (v != 0) | |
345 | return POLLIN | POLLRDNORM; | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | static int hpet_mmap(struct file *file, struct vm_area_struct *vma) | |
351 | { | |
352 | #ifdef CONFIG_HPET_MMAP | |
353 | struct hpet_dev *devp; | |
354 | unsigned long addr; | |
355 | ||
356 | if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff) | |
357 | return -EINVAL; | |
358 | ||
359 | devp = file->private_data; | |
360 | addr = devp->hd_hpets->hp_hpet_phys; | |
361 | ||
362 | if (addr & (PAGE_SIZE - 1)) | |
363 | return -ENOSYS; | |
364 | ||
365 | vma->vm_flags |= VM_IO; | |
366 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
1da177e4 LT |
367 | |
368 | if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT, | |
369 | PAGE_SIZE, vma->vm_page_prot)) { | |
3e6716e7 | 370 | printk(KERN_ERR "%s: io_remap_pfn_range failed\n", |
bf9d8929 | 371 | __func__); |
1da177e4 LT |
372 | return -EAGAIN; |
373 | } | |
374 | ||
375 | return 0; | |
376 | #else | |
377 | return -ENOSYS; | |
378 | #endif | |
379 | } | |
380 | ||
381 | static int hpet_fasync(int fd, struct file *file, int on) | |
382 | { | |
383 | struct hpet_dev *devp; | |
384 | ||
385 | devp = file->private_data; | |
386 | ||
387 | if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) | |
388 | return 0; | |
389 | else | |
390 | return -EIO; | |
391 | } | |
392 | ||
393 | static int hpet_release(struct inode *inode, struct file *file) | |
394 | { | |
395 | struct hpet_dev *devp; | |
396 | struct hpet_timer __iomem *timer; | |
397 | int irq = 0; | |
398 | ||
399 | devp = file->private_data; | |
400 | timer = devp->hd_timer; | |
401 | ||
402 | spin_lock_irq(&hpet_lock); | |
403 | ||
404 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
405 | &timer->hpet_config); | |
406 | ||
407 | irq = devp->hd_irq; | |
408 | devp->hd_irq = 0; | |
409 | ||
410 | devp->hd_ireqfreq = 0; | |
411 | ||
412 | if (devp->hd_flags & HPET_PERIODIC | |
413 | && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
414 | unsigned long v; | |
415 | ||
416 | v = readq(&timer->hpet_config); | |
417 | v ^= Tn_TYPE_CNF_MASK; | |
418 | writeq(v, &timer->hpet_config); | |
419 | } | |
420 | ||
421 | devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); | |
422 | spin_unlock_irq(&hpet_lock); | |
423 | ||
424 | if (irq) | |
425 | free_irq(irq, devp); | |
426 | ||
1da177e4 LT |
427 | file->private_data = NULL; |
428 | return 0; | |
429 | } | |
430 | ||
1da177e4 LT |
431 | static int hpet_ioctl_ieon(struct hpet_dev *devp) |
432 | { | |
433 | struct hpet_timer __iomem *timer; | |
434 | struct hpet __iomem *hpet; | |
435 | struct hpets *hpetp; | |
436 | int irq; | |
437 | unsigned long g, v, t, m; | |
438 | unsigned long flags, isr; | |
439 | ||
440 | timer = devp->hd_timer; | |
441 | hpet = devp->hd_hpet; | |
442 | hpetp = devp->hd_hpets; | |
443 | ||
9090e6db CL |
444 | if (!devp->hd_ireqfreq) |
445 | return -EIO; | |
446 | ||
1da177e4 LT |
447 | spin_lock_irq(&hpet_lock); |
448 | ||
449 | if (devp->hd_flags & HPET_IE) { | |
450 | spin_unlock_irq(&hpet_lock); | |
451 | return -EBUSY; | |
452 | } | |
453 | ||
454 | devp->hd_flags |= HPET_IE; | |
0d290861 CL |
455 | |
456 | if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) | |
457 | devp->hd_flags |= HPET_SHARED_IRQ; | |
1da177e4 LT |
458 | spin_unlock_irq(&hpet_lock); |
459 | ||
1da177e4 LT |
460 | irq = devp->hd_hdwirq; |
461 | ||
462 | if (irq) { | |
0d290861 | 463 | unsigned long irq_flags; |
1da177e4 | 464 | |
96e9694d CL |
465 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
466 | /* | |
467 | * To prevent the interrupt handler from seeing an | |
468 | * unwanted interrupt status bit, program the timer | |
469 | * so that it will not fire in the near future ... | |
470 | */ | |
471 | writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, | |
472 | &timer->hpet_config); | |
473 | write_counter(read_counter(&hpet->hpet_mc), | |
474 | &timer->hpet_compare); | |
475 | /* ... and clear any left-over status. */ | |
476 | isr = 1 << (devp - devp->hd_hpets->hp_dev); | |
477 | writel(isr, &hpet->hpet_isr); | |
478 | } | |
479 | ||
0d290861 CL |
480 | sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); |
481 | irq_flags = devp->hd_flags & HPET_SHARED_IRQ | |
0f2ed4c6 | 482 | ? IRQF_SHARED : IRQF_DISABLED; |
0d290861 CL |
483 | if (request_irq(irq, hpet_interrupt, irq_flags, |
484 | devp->hd_name, (void *)devp)) { | |
1da177e4 LT |
485 | printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); |
486 | irq = 0; | |
487 | } | |
488 | } | |
489 | ||
490 | if (irq == 0) { | |
491 | spin_lock_irq(&hpet_lock); | |
492 | devp->hd_flags ^= HPET_IE; | |
493 | spin_unlock_irq(&hpet_lock); | |
494 | return -EIO; | |
495 | } | |
496 | ||
497 | devp->hd_irq = irq; | |
498 | t = devp->hd_ireqfreq; | |
499 | v = readq(&timer->hpet_config); | |
64a76f66 DB |
500 | |
501 | /* 64-bit comparators are not yet supported through the ioctls, | |
502 | * so force this into 32-bit mode if it supports both modes | |
503 | */ | |
504 | g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; | |
1da177e4 LT |
505 | |
506 | if (devp->hd_flags & HPET_PERIODIC) { | |
1da177e4 | 507 | g |= Tn_TYPE_CNF_MASK; |
ae21cf92 | 508 | v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; |
1da177e4 LT |
509 | writeq(v, &timer->hpet_config); |
510 | local_irq_save(flags); | |
64a76f66 | 511 | |
ae21cf92 NC |
512 | /* |
513 | * NOTE: First we modify the hidden accumulator | |
64a76f66 DB |
514 | * register supported by periodic-capable comparators. |
515 | * We never want to modify the (single) counter; that | |
ae21cf92 NC |
516 | * would affect all the comparators. The value written |
517 | * is the counter value when the first interrupt is due. | |
64a76f66 | 518 | */ |
1da177e4 LT |
519 | m = read_counter(&hpet->hpet_mc); |
520 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
ae21cf92 NC |
521 | /* |
522 | * Then we modify the comparator, indicating the period | |
523 | * for subsequent interrupt. | |
524 | */ | |
525 | write_counter(t, &timer->hpet_compare); | |
1da177e4 LT |
526 | } else { |
527 | local_irq_save(flags); | |
528 | m = read_counter(&hpet->hpet_mc); | |
529 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
530 | } | |
531 | ||
0d290861 | 532 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
3d5640d1 | 533 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
0d290861 CL |
534 | writel(isr, &hpet->hpet_isr); |
535 | } | |
1da177e4 LT |
536 | writeq(g, &timer->hpet_config); |
537 | local_irq_restore(flags); | |
538 | ||
539 | return 0; | |
540 | } | |
541 | ||
ba3f213f CL |
542 | /* converts Hz to number of timer ticks */ |
543 | static inline unsigned long hpet_time_div(struct hpets *hpets, | |
544 | unsigned long dis) | |
1da177e4 | 545 | { |
ba3f213f | 546 | unsigned long long m; |
1da177e4 | 547 | |
ba3f213f | 548 | m = hpets->hp_tick_freq + (dis >> 1); |
1da177e4 | 549 | do_div(m, dis); |
1da177e4 LT |
550 | return (unsigned long)m; |
551 | } | |
552 | ||
553 | static int | |
54066a57 AB |
554 | hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, |
555 | struct hpet_info *info) | |
1da177e4 LT |
556 | { |
557 | struct hpet_timer __iomem *timer; | |
558 | struct hpet __iomem *hpet; | |
559 | struct hpets *hpetp; | |
560 | int err; | |
561 | unsigned long v; | |
562 | ||
563 | switch (cmd) { | |
564 | case HPET_IE_OFF: | |
565 | case HPET_INFO: | |
566 | case HPET_EPI: | |
567 | case HPET_DPI: | |
568 | case HPET_IRQFREQ: | |
569 | timer = devp->hd_timer; | |
570 | hpet = devp->hd_hpet; | |
571 | hpetp = devp->hd_hpets; | |
572 | break; | |
573 | case HPET_IE_ON: | |
574 | return hpet_ioctl_ieon(devp); | |
575 | default: | |
576 | return -EINVAL; | |
577 | } | |
578 | ||
579 | err = 0; | |
580 | ||
581 | switch (cmd) { | |
582 | case HPET_IE_OFF: | |
583 | if ((devp->hd_flags & HPET_IE) == 0) | |
584 | break; | |
585 | v = readq(&timer->hpet_config); | |
586 | v &= ~Tn_INT_ENB_CNF_MASK; | |
587 | writeq(v, &timer->hpet_config); | |
588 | if (devp->hd_irq) { | |
589 | free_irq(devp->hd_irq, devp); | |
590 | devp->hd_irq = 0; | |
591 | } | |
592 | devp->hd_flags ^= HPET_IE; | |
593 | break; | |
594 | case HPET_INFO: | |
595 | { | |
dae512ed | 596 | memset(info, 0, sizeof(*info)); |
af95eade | 597 | if (devp->hd_ireqfreq) |
54066a57 | 598 | info->hi_ireqfreq = |
af95eade | 599 | hpet_time_div(hpetp, devp->hd_ireqfreq); |
54066a57 | 600 | info->hi_flags = |
1da177e4 | 601 | readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; |
54066a57 AB |
602 | info->hi_hpet = hpetp->hp_which; |
603 | info->hi_timer = devp - hpetp->hp_dev; | |
1da177e4 LT |
604 | break; |
605 | } | |
606 | case HPET_EPI: | |
607 | v = readq(&timer->hpet_config); | |
608 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
609 | err = -ENXIO; | |
610 | break; | |
611 | } | |
612 | devp->hd_flags |= HPET_PERIODIC; | |
613 | break; | |
614 | case HPET_DPI: | |
615 | v = readq(&timer->hpet_config); | |
616 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
617 | err = -ENXIO; | |
618 | break; | |
619 | } | |
620 | if (devp->hd_flags & HPET_PERIODIC && | |
621 | readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
622 | v = readq(&timer->hpet_config); | |
623 | v ^= Tn_TYPE_CNF_MASK; | |
624 | writeq(v, &timer->hpet_config); | |
625 | } | |
626 | devp->hd_flags &= ~HPET_PERIODIC; | |
627 | break; | |
628 | case HPET_IRQFREQ: | |
54066a57 | 629 | if ((arg > hpet_max_freq) && |
1da177e4 LT |
630 | !capable(CAP_SYS_RESOURCE)) { |
631 | err = -EACCES; | |
632 | break; | |
633 | } | |
634 | ||
189e2dd1 | 635 | if (!arg) { |
1da177e4 LT |
636 | err = -EINVAL; |
637 | break; | |
638 | } | |
639 | ||
ba3f213f | 640 | devp->hd_ireqfreq = hpet_time_div(hpetp, arg); |
1da177e4 LT |
641 | } |
642 | ||
643 | return err; | |
644 | } | |
645 | ||
54066a57 AB |
646 | static long |
647 | hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
648 | { | |
649 | struct hpet_info info; | |
650 | int err; | |
651 | ||
652 | mutex_lock(&hpet_mutex); | |
653 | err = hpet_ioctl_common(file->private_data, cmd, arg, &info); | |
654 | mutex_unlock(&hpet_mutex); | |
655 | ||
656 | if ((cmd == HPET_INFO) && !err && | |
657 | (copy_to_user((void __user *)arg, &info, sizeof(info)))) | |
658 | err = -EFAULT; | |
659 | ||
660 | return err; | |
661 | } | |
662 | ||
663 | #ifdef CONFIG_COMPAT | |
664 | struct compat_hpet_info { | |
665 | compat_ulong_t hi_ireqfreq; /* Hz */ | |
666 | compat_ulong_t hi_flags; /* information */ | |
667 | unsigned short hi_hpet; | |
668 | unsigned short hi_timer; | |
669 | }; | |
670 | ||
671 | static long | |
672 | hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
673 | { | |
674 | struct hpet_info info; | |
675 | int err; | |
676 | ||
677 | mutex_lock(&hpet_mutex); | |
678 | err = hpet_ioctl_common(file->private_data, cmd, arg, &info); | |
679 | mutex_unlock(&hpet_mutex); | |
680 | ||
681 | if ((cmd == HPET_INFO) && !err) { | |
682 | struct compat_hpet_info __user *u = compat_ptr(arg); | |
683 | if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) || | |
684 | put_user(info.hi_flags, &u->hi_flags) || | |
685 | put_user(info.hi_hpet, &u->hi_hpet) || | |
686 | put_user(info.hi_timer, &u->hi_timer)) | |
687 | err = -EFAULT; | |
688 | } | |
689 | ||
690 | return err; | |
691 | } | |
692 | #endif | |
693 | ||
62322d25 | 694 | static const struct file_operations hpet_fops = { |
1da177e4 LT |
695 | .owner = THIS_MODULE, |
696 | .llseek = no_llseek, | |
697 | .read = hpet_read, | |
698 | .poll = hpet_poll, | |
55929332 | 699 | .unlocked_ioctl = hpet_ioctl, |
54066a57 AB |
700 | #ifdef CONFIG_COMPAT |
701 | .compat_ioctl = hpet_compat_ioctl, | |
702 | #endif | |
1da177e4 LT |
703 | .open = hpet_open, |
704 | .release = hpet_release, | |
705 | .fasync = hpet_fasync, | |
706 | .mmap = hpet_mmap, | |
707 | }; | |
708 | ||
3e6716e7 RD |
709 | static int hpet_is_known(struct hpet_data *hdp) |
710 | { | |
711 | struct hpets *hpetp; | |
712 | ||
713 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
714 | if (hpetp->hp_hpet_phys == hdp->hd_phys_address) | |
715 | return 1; | |
716 | ||
717 | return 0; | |
718 | } | |
719 | ||
1da177e4 LT |
720 | static ctl_table hpet_table[] = { |
721 | { | |
1da177e4 LT |
722 | .procname = "max-user-freq", |
723 | .data = &hpet_max_freq, | |
724 | .maxlen = sizeof(int), | |
725 | .mode = 0644, | |
6d456111 | 726 | .proc_handler = proc_dointvec, |
1da177e4 | 727 | }, |
894d2491 | 728 | {} |
1da177e4 LT |
729 | }; |
730 | ||
731 | static ctl_table hpet_root[] = { | |
732 | { | |
1da177e4 LT |
733 | .procname = "hpet", |
734 | .maxlen = 0, | |
735 | .mode = 0555, | |
736 | .child = hpet_table, | |
737 | }, | |
894d2491 | 738 | {} |
1da177e4 LT |
739 | }; |
740 | ||
741 | static ctl_table dev_root[] = { | |
742 | { | |
1da177e4 LT |
743 | .procname = "dev", |
744 | .maxlen = 0, | |
745 | .mode = 0555, | |
746 | .child = hpet_root, | |
747 | }, | |
894d2491 | 748 | {} |
1da177e4 LT |
749 | }; |
750 | ||
751 | static struct ctl_table_header *sysctl_header; | |
752 | ||
1da177e4 LT |
753 | /* |
754 | * Adjustment for when arming the timer with | |
755 | * initial conditions. That is, main counter | |
756 | * ticks expired before interrupts are enabled. | |
757 | */ | |
758 | #define TICK_CALIBRATE (1000UL) | |
759 | ||
303d379c | 760 | static unsigned long __hpet_calibrate(struct hpets *hpetp) |
1da177e4 LT |
761 | { |
762 | struct hpet_timer __iomem *timer = NULL; | |
763 | unsigned long t, m, count, i, flags, start; | |
764 | struct hpet_dev *devp; | |
765 | int j; | |
766 | struct hpet __iomem *hpet; | |
767 | ||
768 | for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) | |
769 | if ((devp->hd_flags & HPET_OPEN) == 0) { | |
770 | timer = devp->hd_timer; | |
771 | break; | |
772 | } | |
773 | ||
774 | if (!timer) | |
775 | return 0; | |
776 | ||
3d5640d1 | 777 | hpet = hpetp->hp_hpet; |
1da177e4 LT |
778 | t = read_counter(&timer->hpet_compare); |
779 | ||
780 | i = 0; | |
ba3f213f | 781 | count = hpet_time_div(hpetp, TICK_CALIBRATE); |
1da177e4 LT |
782 | |
783 | local_irq_save(flags); | |
784 | ||
785 | start = read_counter(&hpet->hpet_mc); | |
786 | ||
787 | do { | |
788 | m = read_counter(&hpet->hpet_mc); | |
789 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
790 | } while (i++, (m - start) < count); | |
791 | ||
792 | local_irq_restore(flags); | |
793 | ||
794 | return (m - start) / i; | |
795 | } | |
796 | ||
303d379c YG |
797 | static unsigned long hpet_calibrate(struct hpets *hpetp) |
798 | { | |
799 | unsigned long ret = -1; | |
800 | unsigned long tmp; | |
801 | ||
802 | /* | |
803 | * Try to calibrate until return value becomes stable small value. | |
804 | * If SMI interruption occurs in calibration loop, the return value | |
805 | * will be big. This avoids its impact. | |
806 | */ | |
807 | for ( ; ; ) { | |
808 | tmp = __hpet_calibrate(hpetp); | |
809 | if (ret <= tmp) | |
810 | break; | |
811 | ret = tmp; | |
812 | } | |
813 | ||
814 | return ret; | |
815 | } | |
816 | ||
1da177e4 LT |
817 | int hpet_alloc(struct hpet_data *hdp) |
818 | { | |
5761d64b | 819 | u64 cap, mcfg; |
1da177e4 | 820 | struct hpet_dev *devp; |
5761d64b | 821 | u32 i, ntimer; |
1da177e4 LT |
822 | struct hpets *hpetp; |
823 | size_t siz; | |
824 | struct hpet __iomem *hpet; | |
0ca01763 | 825 | static struct hpets *last; |
5761d64b | 826 | unsigned long period; |
ba3f213f | 827 | unsigned long long temp; |
f92a789d | 828 | u32 remainder; |
1da177e4 LT |
829 | |
830 | /* | |
831 | * hpet_alloc can be called by platform dependent code. | |
3e6716e7 RD |
832 | * If platform dependent code has allocated the hpet that |
833 | * ACPI has also reported, then we catch it here. | |
1da177e4 | 834 | */ |
3e6716e7 RD |
835 | if (hpet_is_known(hdp)) { |
836 | printk(KERN_DEBUG "%s: duplicate HPET ignored\n", | |
bf9d8929 | 837 | __func__); |
3e6716e7 RD |
838 | return 0; |
839 | } | |
1da177e4 LT |
840 | |
841 | siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * | |
842 | sizeof(struct hpet_dev)); | |
843 | ||
3e6716e7 | 844 | hpetp = kzalloc(siz, GFP_KERNEL); |
1da177e4 LT |
845 | |
846 | if (!hpetp) | |
847 | return -ENOMEM; | |
848 | ||
1da177e4 LT |
849 | hpetp->hp_which = hpet_nhpet++; |
850 | hpetp->hp_hpet = hdp->hd_address; | |
851 | hpetp->hp_hpet_phys = hdp->hd_phys_address; | |
852 | ||
853 | hpetp->hp_ntimer = hdp->hd_nirqs; | |
e3f37a54 | 854 | |
5761d64b TG |
855 | for (i = 0; i < hdp->hd_nirqs; i++) |
856 | hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; | |
37a47db8 | 857 | |
5761d64b | 858 | hpet = hpetp->hp_hpet; |
e3f37a54 | 859 | |
1da177e4 LT |
860 | cap = readq(&hpet->hpet_cap); |
861 | ||
862 | ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; | |
863 | ||
864 | if (hpetp->hp_ntimer != ntimer) { | |
865 | printk(KERN_WARNING "hpet: number irqs doesn't agree" | |
866 | " with number of timers\n"); | |
867 | kfree(hpetp); | |
868 | return -ENODEV; | |
869 | } | |
870 | ||
871 | if (last) | |
872 | last->hp_next = hpetp; | |
873 | else | |
874 | hpets = hpetp; | |
875 | ||
876 | last = hpetp; | |
877 | ||
ba3f213f CL |
878 | period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> |
879 | HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ | |
880 | temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ | |
881 | temp += period >> 1; /* round */ | |
882 | do_div(temp, period); | |
883 | hpetp->hp_tick_freq = temp; /* ticks per second */ | |
1da177e4 | 884 | |
3034d11c AK |
885 | printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", |
886 | hpetp->hp_which, hdp->hd_phys_address, | |
1da177e4 LT |
887 | hpetp->hp_ntimer > 1 ? "s" : ""); |
888 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
5761d64b | 889 | printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); |
1da177e4 LT |
890 | printk("\n"); |
891 | ||
f92a789d DB |
892 | temp = hpetp->hp_tick_freq; |
893 | remainder = do_div(temp, 1000000); | |
64a76f66 DB |
894 | printk(KERN_INFO |
895 | "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", | |
896 | hpetp->hp_which, hpetp->hp_ntimer, | |
897 | cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, | |
f92a789d | 898 | (unsigned) temp, remainder); |
1da177e4 LT |
899 | |
900 | mcfg = readq(&hpet->hpet_config); | |
901 | if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { | |
902 | write_counter(0L, &hpet->hpet_mc); | |
903 | mcfg |= HPET_ENABLE_CNF_MASK; | |
904 | writeq(mcfg, &hpet->hpet_config); | |
905 | } | |
906 | ||
642d30bb | 907 | for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { |
1da177e4 LT |
908 | struct hpet_timer __iomem *timer; |
909 | ||
910 | timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; | |
1da177e4 LT |
911 | |
912 | devp->hd_hpets = hpetp; | |
913 | devp->hd_hpet = hpet; | |
914 | devp->hd_timer = timer; | |
915 | ||
916 | /* | |
917 | * If the timer was reserved by platform code, | |
918 | * then make timer unavailable for opens. | |
919 | */ | |
920 | if (hdp->hd_state & (1 << i)) { | |
921 | devp->hd_flags = HPET_OPEN; | |
922 | continue; | |
923 | } | |
924 | ||
925 | init_waitqueue_head(&devp->hd_waitqueue); | |
926 | } | |
927 | ||
928 | hpetp->hp_delta = hpet_calibrate(hpetp); | |
0aa366f3 | 929 | |
3b2b64fd LT |
930 | /* This clocksource driver currently only works on ia64 */ |
931 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
932 | if (!hpet_clocksource) { |
933 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; | |
574c44fa | 934 | clocksource_hpet.archdata.fsys_mmio = hpet_mctr; |
d60c3041 | 935 | clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq); |
0aa366f3 TL |
936 | hpetp->hp_clocksource = &clocksource_hpet; |
937 | hpet_clocksource = &clocksource_hpet; | |
938 | } | |
3b2b64fd | 939 | #endif |
1da177e4 LT |
940 | |
941 | return 0; | |
942 | } | |
943 | ||
944 | static acpi_status hpet_resources(struct acpi_resource *res, void *data) | |
945 | { | |
946 | struct hpet_data *hdp; | |
947 | acpi_status status; | |
948 | struct acpi_resource_address64 addr; | |
1da177e4 LT |
949 | |
950 | hdp = data; | |
951 | ||
952 | status = acpi_resource_to_address64(res, &addr); | |
953 | ||
954 | if (ACPI_SUCCESS(status)) { | |
50eca3eb | 955 | hdp->hd_phys_address = addr.minimum; |
9224a867 | 956 | hdp->hd_address = ioremap(addr.minimum, addr.address_length); |
1da177e4 | 957 | |
3e6716e7 | 958 | if (hpet_is_known(hdp)) { |
3e6716e7 | 959 | iounmap(hdp->hd_address); |
78e1ca49 | 960 | return AE_ALREADY_EXISTS; |
3e6716e7 | 961 | } |
50eca3eb BM |
962 | } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
963 | struct acpi_resource_fixed_memory32 *fixmem32; | |
757c4724 RD |
964 | |
965 | fixmem32 = &res->data.fixed_memory32; | |
966 | if (!fixmem32) | |
78e1ca49 | 967 | return AE_NO_MEMORY; |
757c4724 | 968 | |
50eca3eb BM |
969 | hdp->hd_phys_address = fixmem32->address; |
970 | hdp->hd_address = ioremap(fixmem32->address, | |
757c4724 RD |
971 | HPET_RANGE_SIZE); |
972 | ||
3e6716e7 | 973 | if (hpet_is_known(hdp)) { |
3e6716e7 | 974 | iounmap(hdp->hd_address); |
78e1ca49 | 975 | return AE_ALREADY_EXISTS; |
3e6716e7 | 976 | } |
50eca3eb BM |
977 | } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { |
978 | struct acpi_resource_extended_irq *irqp; | |
be5efffb | 979 | int i, irq; |
1da177e4 LT |
980 | |
981 | irqp = &res->data.extended_irq; | |
982 | ||
be5efffb | 983 | for (i = 0; i < irqp->interrupt_count; i++) { |
a2f809b0 | 984 | irq = acpi_register_gsi(NULL, irqp->interrupts[i], |
be5efffb BH |
985 | irqp->triggering, irqp->polarity); |
986 | if (irq < 0) | |
987 | return AE_ERROR; | |
988 | ||
989 | hdp->hd_irq[hdp->hd_nirqs] = irq; | |
990 | hdp->hd_nirqs++; | |
1da177e4 LT |
991 | } |
992 | } | |
993 | ||
994 | return AE_OK; | |
995 | } | |
996 | ||
997 | static int hpet_acpi_add(struct acpi_device *device) | |
998 | { | |
999 | acpi_status result; | |
1000 | struct hpet_data data; | |
1001 | ||
1002 | memset(&data, 0, sizeof(data)); | |
1003 | ||
1004 | result = | |
1005 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, | |
1006 | hpet_resources, &data); | |
1007 | ||
1008 | if (ACPI_FAILURE(result)) | |
1009 | return -ENODEV; | |
1010 | ||
1011 | if (!data.hd_address || !data.hd_nirqs) { | |
a56d5318 JS |
1012 | if (data.hd_address) |
1013 | iounmap(data.hd_address); | |
bf9d8929 | 1014 | printk("%s: no address or irqs in _CRS\n", __func__); |
1da177e4 LT |
1015 | return -ENODEV; |
1016 | } | |
1017 | ||
1018 | return hpet_alloc(&data); | |
1019 | } | |
1020 | ||
1021 | static int hpet_acpi_remove(struct acpi_device *device, int type) | |
1022 | { | |
0aa366f3 | 1023 | /* XXX need to unregister clocksource, dealloc mem, etc */ |
1da177e4 LT |
1024 | return -EINVAL; |
1025 | } | |
1026 | ||
1ba90e3a TR |
1027 | static const struct acpi_device_id hpet_device_ids[] = { |
1028 | {"PNP0103", 0}, | |
1029 | {"", 0}, | |
1030 | }; | |
1031 | MODULE_DEVICE_TABLE(acpi, hpet_device_ids); | |
1032 | ||
1da177e4 LT |
1033 | static struct acpi_driver hpet_acpi_driver = { |
1034 | .name = "hpet", | |
1ba90e3a | 1035 | .ids = hpet_device_ids, |
1da177e4 LT |
1036 | .ops = { |
1037 | .add = hpet_acpi_add, | |
1038 | .remove = hpet_acpi_remove, | |
1039 | }, | |
1040 | }; | |
1041 | ||
1042 | static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; | |
1043 | ||
1044 | static int __init hpet_init(void) | |
1045 | { | |
1046 | int result; | |
1047 | ||
1048 | result = misc_register(&hpet_misc); | |
1049 | if (result < 0) | |
1050 | return -ENODEV; | |
1051 | ||
0b4d4147 | 1052 | sysctl_header = register_sysctl_table(dev_root); |
1da177e4 LT |
1053 | |
1054 | result = acpi_bus_register_driver(&hpet_acpi_driver); | |
1055 | if (result < 0) { | |
1056 | if (sysctl_header) | |
1057 | unregister_sysctl_table(sysctl_header); | |
1058 | misc_deregister(&hpet_misc); | |
1059 | return result; | |
1060 | } | |
1061 | ||
1062 | return 0; | |
1063 | } | |
1064 | ||
1065 | static void __exit hpet_exit(void) | |
1066 | { | |
1067 | acpi_bus_unregister_driver(&hpet_acpi_driver); | |
1068 | ||
1069 | if (sysctl_header) | |
1070 | unregister_sysctl_table(sysctl_header); | |
1071 | misc_deregister(&hpet_misc); | |
1072 | ||
1073 | return; | |
1074 | } | |
1075 | ||
1076 | module_init(hpet_init); | |
1077 | module_exit(hpet_exit); | |
1078 | MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); | |
1079 | MODULE_LICENSE("GPL"); |