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1da177e4 LT |
1 | /* |
2 | * Intel & MS High Precision Event Timer Implementation. | |
3 | * | |
4 | * Copyright (C) 2003 Intel Corporation | |
5 | * Venki Pallipadi | |
6 | * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. | |
7 | * Bob Picco <robert.picco@hp.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
48b81880 | 17 | #include <linux/smp_lock.h> |
1da177e4 LT |
18 | #include <linux/types.h> |
19 | #include <linux/miscdevice.h> | |
20 | #include <linux/major.h> | |
21 | #include <linux/ioport.h> | |
22 | #include <linux/fcntl.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/poll.h> | |
f23f6e08 | 25 | #include <linux/mm.h> |
1da177e4 LT |
26 | #include <linux/proc_fs.h> |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/sysctl.h> | |
29 | #include <linux/wait.h> | |
30 | #include <linux/bcd.h> | |
31 | #include <linux/seq_file.h> | |
32 | #include <linux/bitops.h> | |
0aa366f3 | 33 | #include <linux/clocksource.h> |
1da177e4 LT |
34 | |
35 | #include <asm/current.h> | |
36 | #include <asm/uaccess.h> | |
37 | #include <asm/system.h> | |
38 | #include <asm/io.h> | |
39 | #include <asm/irq.h> | |
40 | #include <asm/div64.h> | |
41 | ||
42 | #include <linux/acpi.h> | |
43 | #include <acpi/acpi_bus.h> | |
44 | #include <linux/hpet.h> | |
45 | ||
46 | /* | |
47 | * The High Precision Event Timer driver. | |
48 | * This driver is closely modelled after the rtc.c driver. | |
96803820 | 49 | * http://www.intel.com/hardwaredesign/hpetspec.htm |
1da177e4 LT |
50 | */ |
51 | #define HPET_USER_FREQ (64) | |
52 | #define HPET_DRIFT (500) | |
53 | ||
757c4724 RD |
54 | #define HPET_RANGE_SIZE 1024 /* from HPET spec */ |
55 | ||
0aa366f3 TL |
56 | #if BITS_PER_LONG == 64 |
57 | #define write_counter(V, MC) writeq(V, MC) | |
58 | #define read_counter(MC) readq(MC) | |
59 | #else | |
60 | #define write_counter(V, MC) writel(V, MC) | |
61 | #define read_counter(MC) readl(MC) | |
62 | #endif | |
63 | ||
642d30bb | 64 | static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; |
1da177e4 | 65 | |
3dffec45 ÇO |
66 | /* This clocksource driver currently only works on ia64 */ |
67 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
68 | static void __iomem *hpet_mctr; |
69 | ||
70 | static cycle_t read_hpet(void) | |
71 | { | |
72 | return (cycle_t)read_counter((void __iomem *)hpet_mctr); | |
73 | } | |
74 | ||
75 | static struct clocksource clocksource_hpet = { | |
76 | .name = "hpet", | |
77 | .rating = 250, | |
78 | .read = read_hpet, | |
712aaa1c | 79 | .mask = CLOCKSOURCE_MASK(64), |
0aa366f3 TL |
80 | .mult = 0, /*to be caluclated*/ |
81 | .shift = 10, | |
82 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
83 | }; | |
84 | static struct clocksource *hpet_clocksource; | |
3dffec45 | 85 | #endif |
0aa366f3 | 86 | |
1da177e4 LT |
87 | /* A lock for concurrent access by app and isr hpet activity. */ |
88 | static DEFINE_SPINLOCK(hpet_lock); | |
89 | /* A lock for concurrent intermodule access to hpet and isr hpet activity. */ | |
90 | static DEFINE_SPINLOCK(hpet_task_lock); | |
91 | ||
92 | #define HPET_DEV_NAME (7) | |
93 | ||
94 | struct hpet_dev { | |
95 | struct hpets *hd_hpets; | |
96 | struct hpet __iomem *hd_hpet; | |
97 | struct hpet_timer __iomem *hd_timer; | |
98 | unsigned long hd_ireqfreq; | |
99 | unsigned long hd_irqdata; | |
100 | wait_queue_head_t hd_waitqueue; | |
101 | struct fasync_struct *hd_async_queue; | |
102 | struct hpet_task *hd_task; | |
103 | unsigned int hd_flags; | |
104 | unsigned int hd_irq; | |
105 | unsigned int hd_hdwirq; | |
106 | char hd_name[HPET_DEV_NAME]; | |
107 | }; | |
108 | ||
109 | struct hpets { | |
110 | struct hpets *hp_next; | |
111 | struct hpet __iomem *hp_hpet; | |
112 | unsigned long hp_hpet_phys; | |
0aa366f3 | 113 | struct clocksource *hp_clocksource; |
ba3f213f | 114 | unsigned long long hp_tick_freq; |
1da177e4 LT |
115 | unsigned long hp_delta; |
116 | unsigned int hp_ntimer; | |
117 | unsigned int hp_which; | |
118 | struct hpet_dev hp_dev[1]; | |
119 | }; | |
120 | ||
121 | static struct hpets *hpets; | |
122 | ||
123 | #define HPET_OPEN 0x0001 | |
124 | #define HPET_IE 0x0002 /* interrupt enabled */ | |
125 | #define HPET_PERIODIC 0x0004 | |
0d290861 | 126 | #define HPET_SHARED_IRQ 0x0008 |
1da177e4 | 127 | |
1da177e4 LT |
128 | |
129 | #ifndef readq | |
887c27f3 | 130 | static inline unsigned long long readq(void __iomem *addr) |
1da177e4 LT |
131 | { |
132 | return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); | |
133 | } | |
134 | #endif | |
135 | ||
136 | #ifndef writeq | |
887c27f3 | 137 | static inline void writeq(unsigned long long v, void __iomem *addr) |
1da177e4 LT |
138 | { |
139 | writel(v & 0xffffffff, addr); | |
140 | writel(v >> 32, addr + 4); | |
141 | } | |
142 | #endif | |
143 | ||
7d12e780 | 144 | static irqreturn_t hpet_interrupt(int irq, void *data) |
1da177e4 LT |
145 | { |
146 | struct hpet_dev *devp; | |
147 | unsigned long isr; | |
148 | ||
149 | devp = data; | |
0d290861 CL |
150 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
151 | ||
152 | if ((devp->hd_flags & HPET_SHARED_IRQ) && | |
153 | !(isr & readl(&devp->hd_hpet->hpet_isr))) | |
154 | return IRQ_NONE; | |
1da177e4 LT |
155 | |
156 | spin_lock(&hpet_lock); | |
157 | devp->hd_irqdata++; | |
158 | ||
159 | /* | |
160 | * For non-periodic timers, increment the accumulator. | |
161 | * This has the effect of treating non-periodic like periodic. | |
162 | */ | |
163 | if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { | |
164 | unsigned long m, t; | |
165 | ||
166 | t = devp->hd_ireqfreq; | |
167 | m = read_counter(&devp->hd_hpet->hpet_mc); | |
168 | write_counter(t + m + devp->hd_hpets->hp_delta, | |
169 | &devp->hd_timer->hpet_compare); | |
170 | } | |
171 | ||
0d290861 CL |
172 | if (devp->hd_flags & HPET_SHARED_IRQ) |
173 | writel(isr, &devp->hd_hpet->hpet_isr); | |
1da177e4 LT |
174 | spin_unlock(&hpet_lock); |
175 | ||
176 | spin_lock(&hpet_task_lock); | |
177 | if (devp->hd_task) | |
178 | devp->hd_task->ht_func(devp->hd_task->ht_data); | |
179 | spin_unlock(&hpet_task_lock); | |
180 | ||
181 | wake_up_interruptible(&devp->hd_waitqueue); | |
182 | ||
183 | kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); | |
184 | ||
185 | return IRQ_HANDLED; | |
186 | } | |
187 | ||
70ef6d59 KH |
188 | static void hpet_timer_set_irq(struct hpet_dev *devp) |
189 | { | |
190 | unsigned long v; | |
191 | int irq, gsi; | |
192 | struct hpet_timer __iomem *timer; | |
193 | ||
194 | spin_lock_irq(&hpet_lock); | |
195 | if (devp->hd_hdwirq) { | |
196 | spin_unlock_irq(&hpet_lock); | |
197 | return; | |
198 | } | |
199 | ||
200 | timer = devp->hd_timer; | |
201 | ||
202 | /* we prefer level triggered mode */ | |
203 | v = readl(&timer->hpet_config); | |
204 | if (!(v & Tn_INT_TYPE_CNF_MASK)) { | |
205 | v |= Tn_INT_TYPE_CNF_MASK; | |
206 | writel(v, &timer->hpet_config); | |
207 | } | |
208 | spin_unlock_irq(&hpet_lock); | |
209 | ||
210 | v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> | |
211 | Tn_INT_ROUTE_CAP_SHIFT; | |
212 | ||
213 | /* | |
214 | * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by | |
215 | * legacy device. In IO APIC mode, we skip all the legacy IRQS. | |
216 | */ | |
217 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) | |
218 | v &= ~0xf3df; | |
219 | else | |
220 | v &= ~0xffff; | |
221 | ||
222 | for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ; | |
223 | irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) { | |
224 | ||
225 | if (irq >= NR_IRQS) { | |
226 | irq = HPET_MAX_IRQ; | |
227 | break; | |
228 | } | |
229 | ||
230 | gsi = acpi_register_gsi(irq, ACPI_LEVEL_SENSITIVE, | |
231 | ACPI_ACTIVE_LOW); | |
232 | if (gsi > 0) | |
233 | break; | |
234 | ||
235 | /* FIXME: Setup interrupt source table */ | |
236 | } | |
237 | ||
238 | if (irq < HPET_MAX_IRQ) { | |
239 | spin_lock_irq(&hpet_lock); | |
240 | v = readl(&timer->hpet_config); | |
241 | v |= irq << Tn_INT_ROUTE_CNF_SHIFT; | |
242 | writel(v, &timer->hpet_config); | |
243 | devp->hd_hdwirq = gsi; | |
244 | spin_unlock_irq(&hpet_lock); | |
245 | } | |
246 | return; | |
247 | } | |
248 | ||
1da177e4 LT |
249 | static int hpet_open(struct inode *inode, struct file *file) |
250 | { | |
251 | struct hpet_dev *devp; | |
252 | struct hpets *hpetp; | |
253 | int i; | |
254 | ||
255 | if (file->f_mode & FMODE_WRITE) | |
256 | return -EINVAL; | |
257 | ||
48b81880 | 258 | lock_kernel(); |
1da177e4 LT |
259 | spin_lock_irq(&hpet_lock); |
260 | ||
261 | for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) | |
262 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
263 | if (hpetp->hp_dev[i].hd_flags & HPET_OPEN | |
264 | || hpetp->hp_dev[i].hd_task) | |
265 | continue; | |
266 | else { | |
267 | devp = &hpetp->hp_dev[i]; | |
268 | break; | |
269 | } | |
270 | ||
271 | if (!devp) { | |
272 | spin_unlock_irq(&hpet_lock); | |
48b81880 | 273 | unlock_kernel(); |
1da177e4 LT |
274 | return -EBUSY; |
275 | } | |
276 | ||
277 | file->private_data = devp; | |
278 | devp->hd_irqdata = 0; | |
279 | devp->hd_flags |= HPET_OPEN; | |
280 | spin_unlock_irq(&hpet_lock); | |
48b81880 | 281 | unlock_kernel(); |
1da177e4 | 282 | |
70ef6d59 KH |
283 | hpet_timer_set_irq(devp); |
284 | ||
1da177e4 LT |
285 | return 0; |
286 | } | |
287 | ||
288 | static ssize_t | |
289 | hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) | |
290 | { | |
291 | DECLARE_WAITQUEUE(wait, current); | |
292 | unsigned long data; | |
293 | ssize_t retval; | |
294 | struct hpet_dev *devp; | |
295 | ||
296 | devp = file->private_data; | |
297 | if (!devp->hd_ireqfreq) | |
298 | return -EIO; | |
299 | ||
300 | if (count < sizeof(unsigned long)) | |
301 | return -EINVAL; | |
302 | ||
303 | add_wait_queue(&devp->hd_waitqueue, &wait); | |
304 | ||
305 | for ( ; ; ) { | |
306 | set_current_state(TASK_INTERRUPTIBLE); | |
307 | ||
308 | spin_lock_irq(&hpet_lock); | |
309 | data = devp->hd_irqdata; | |
310 | devp->hd_irqdata = 0; | |
311 | spin_unlock_irq(&hpet_lock); | |
312 | ||
313 | if (data) | |
314 | break; | |
315 | else if (file->f_flags & O_NONBLOCK) { | |
316 | retval = -EAGAIN; | |
317 | goto out; | |
318 | } else if (signal_pending(current)) { | |
319 | retval = -ERESTARTSYS; | |
320 | goto out; | |
321 | } | |
322 | schedule(); | |
323 | } | |
324 | ||
325 | retval = put_user(data, (unsigned long __user *)buf); | |
326 | if (!retval) | |
327 | retval = sizeof(unsigned long); | |
328 | out: | |
329 | __set_current_state(TASK_RUNNING); | |
330 | remove_wait_queue(&devp->hd_waitqueue, &wait); | |
331 | ||
332 | return retval; | |
333 | } | |
334 | ||
335 | static unsigned int hpet_poll(struct file *file, poll_table * wait) | |
336 | { | |
337 | unsigned long v; | |
338 | struct hpet_dev *devp; | |
339 | ||
340 | devp = file->private_data; | |
341 | ||
342 | if (!devp->hd_ireqfreq) | |
343 | return 0; | |
344 | ||
345 | poll_wait(file, &devp->hd_waitqueue, wait); | |
346 | ||
347 | spin_lock_irq(&hpet_lock); | |
348 | v = devp->hd_irqdata; | |
349 | spin_unlock_irq(&hpet_lock); | |
350 | ||
351 | if (v != 0) | |
352 | return POLLIN | POLLRDNORM; | |
353 | ||
354 | return 0; | |
355 | } | |
356 | ||
357 | static int hpet_mmap(struct file *file, struct vm_area_struct *vma) | |
358 | { | |
359 | #ifdef CONFIG_HPET_MMAP | |
360 | struct hpet_dev *devp; | |
361 | unsigned long addr; | |
362 | ||
363 | if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff) | |
364 | return -EINVAL; | |
365 | ||
366 | devp = file->private_data; | |
367 | addr = devp->hd_hpets->hp_hpet_phys; | |
368 | ||
369 | if (addr & (PAGE_SIZE - 1)) | |
370 | return -ENOSYS; | |
371 | ||
372 | vma->vm_flags |= VM_IO; | |
373 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
1da177e4 LT |
374 | |
375 | if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT, | |
376 | PAGE_SIZE, vma->vm_page_prot)) { | |
3e6716e7 | 377 | printk(KERN_ERR "%s: io_remap_pfn_range failed\n", |
bf9d8929 | 378 | __func__); |
1da177e4 LT |
379 | return -EAGAIN; |
380 | } | |
381 | ||
382 | return 0; | |
383 | #else | |
384 | return -ENOSYS; | |
385 | #endif | |
386 | } | |
387 | ||
388 | static int hpet_fasync(int fd, struct file *file, int on) | |
389 | { | |
390 | struct hpet_dev *devp; | |
391 | ||
392 | devp = file->private_data; | |
393 | ||
394 | if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) | |
395 | return 0; | |
396 | else | |
397 | return -EIO; | |
398 | } | |
399 | ||
400 | static int hpet_release(struct inode *inode, struct file *file) | |
401 | { | |
402 | struct hpet_dev *devp; | |
403 | struct hpet_timer __iomem *timer; | |
404 | int irq = 0; | |
405 | ||
406 | devp = file->private_data; | |
407 | timer = devp->hd_timer; | |
408 | ||
409 | spin_lock_irq(&hpet_lock); | |
410 | ||
411 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
412 | &timer->hpet_config); | |
413 | ||
414 | irq = devp->hd_irq; | |
415 | devp->hd_irq = 0; | |
416 | ||
417 | devp->hd_ireqfreq = 0; | |
418 | ||
419 | if (devp->hd_flags & HPET_PERIODIC | |
420 | && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
421 | unsigned long v; | |
422 | ||
423 | v = readq(&timer->hpet_config); | |
424 | v ^= Tn_TYPE_CNF_MASK; | |
425 | writeq(v, &timer->hpet_config); | |
426 | } | |
427 | ||
428 | devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); | |
429 | spin_unlock_irq(&hpet_lock); | |
430 | ||
431 | if (irq) | |
432 | free_irq(irq, devp); | |
433 | ||
434 | if (file->f_flags & FASYNC) | |
435 | hpet_fasync(-1, file, 0); | |
436 | ||
437 | file->private_data = NULL; | |
438 | return 0; | |
439 | } | |
440 | ||
441 | static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int); | |
442 | ||
443 | static int | |
444 | hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |
445 | unsigned long arg) | |
446 | { | |
447 | struct hpet_dev *devp; | |
448 | ||
449 | devp = file->private_data; | |
450 | return hpet_ioctl_common(devp, cmd, arg, 0); | |
451 | } | |
452 | ||
453 | static int hpet_ioctl_ieon(struct hpet_dev *devp) | |
454 | { | |
455 | struct hpet_timer __iomem *timer; | |
456 | struct hpet __iomem *hpet; | |
457 | struct hpets *hpetp; | |
458 | int irq; | |
459 | unsigned long g, v, t, m; | |
460 | unsigned long flags, isr; | |
461 | ||
462 | timer = devp->hd_timer; | |
463 | hpet = devp->hd_hpet; | |
464 | hpetp = devp->hd_hpets; | |
465 | ||
9090e6db CL |
466 | if (!devp->hd_ireqfreq) |
467 | return -EIO; | |
468 | ||
1da177e4 LT |
469 | spin_lock_irq(&hpet_lock); |
470 | ||
471 | if (devp->hd_flags & HPET_IE) { | |
472 | spin_unlock_irq(&hpet_lock); | |
473 | return -EBUSY; | |
474 | } | |
475 | ||
476 | devp->hd_flags |= HPET_IE; | |
0d290861 CL |
477 | |
478 | if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) | |
479 | devp->hd_flags |= HPET_SHARED_IRQ; | |
1da177e4 LT |
480 | spin_unlock_irq(&hpet_lock); |
481 | ||
1da177e4 LT |
482 | irq = devp->hd_hdwirq; |
483 | ||
484 | if (irq) { | |
0d290861 | 485 | unsigned long irq_flags; |
1da177e4 | 486 | |
0d290861 CL |
487 | sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); |
488 | irq_flags = devp->hd_flags & HPET_SHARED_IRQ | |
0f2ed4c6 | 489 | ? IRQF_SHARED : IRQF_DISABLED; |
0d290861 CL |
490 | if (request_irq(irq, hpet_interrupt, irq_flags, |
491 | devp->hd_name, (void *)devp)) { | |
1da177e4 LT |
492 | printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); |
493 | irq = 0; | |
494 | } | |
495 | } | |
496 | ||
497 | if (irq == 0) { | |
498 | spin_lock_irq(&hpet_lock); | |
499 | devp->hd_flags ^= HPET_IE; | |
500 | spin_unlock_irq(&hpet_lock); | |
501 | return -EIO; | |
502 | } | |
503 | ||
504 | devp->hd_irq = irq; | |
505 | t = devp->hd_ireqfreq; | |
506 | v = readq(&timer->hpet_config); | |
507 | g = v | Tn_INT_ENB_CNF_MASK; | |
508 | ||
509 | if (devp->hd_flags & HPET_PERIODIC) { | |
510 | write_counter(t, &timer->hpet_compare); | |
511 | g |= Tn_TYPE_CNF_MASK; | |
512 | v |= Tn_TYPE_CNF_MASK; | |
513 | writeq(v, &timer->hpet_config); | |
514 | v |= Tn_VAL_SET_CNF_MASK; | |
515 | writeq(v, &timer->hpet_config); | |
516 | local_irq_save(flags); | |
517 | m = read_counter(&hpet->hpet_mc); | |
518 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
519 | } else { | |
520 | local_irq_save(flags); | |
521 | m = read_counter(&hpet->hpet_mc); | |
522 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
523 | } | |
524 | ||
0d290861 | 525 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
3d5640d1 | 526 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
0d290861 CL |
527 | writel(isr, &hpet->hpet_isr); |
528 | } | |
1da177e4 LT |
529 | writeq(g, &timer->hpet_config); |
530 | local_irq_restore(flags); | |
531 | ||
532 | return 0; | |
533 | } | |
534 | ||
ba3f213f CL |
535 | /* converts Hz to number of timer ticks */ |
536 | static inline unsigned long hpet_time_div(struct hpets *hpets, | |
537 | unsigned long dis) | |
1da177e4 | 538 | { |
ba3f213f | 539 | unsigned long long m; |
1da177e4 | 540 | |
ba3f213f | 541 | m = hpets->hp_tick_freq + (dis >> 1); |
1da177e4 | 542 | do_div(m, dis); |
1da177e4 LT |
543 | return (unsigned long)m; |
544 | } | |
545 | ||
546 | static int | |
547 | hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel) | |
548 | { | |
549 | struct hpet_timer __iomem *timer; | |
550 | struct hpet __iomem *hpet; | |
551 | struct hpets *hpetp; | |
552 | int err; | |
553 | unsigned long v; | |
554 | ||
555 | switch (cmd) { | |
556 | case HPET_IE_OFF: | |
557 | case HPET_INFO: | |
558 | case HPET_EPI: | |
559 | case HPET_DPI: | |
560 | case HPET_IRQFREQ: | |
561 | timer = devp->hd_timer; | |
562 | hpet = devp->hd_hpet; | |
563 | hpetp = devp->hd_hpets; | |
564 | break; | |
565 | case HPET_IE_ON: | |
566 | return hpet_ioctl_ieon(devp); | |
567 | default: | |
568 | return -EINVAL; | |
569 | } | |
570 | ||
571 | err = 0; | |
572 | ||
573 | switch (cmd) { | |
574 | case HPET_IE_OFF: | |
575 | if ((devp->hd_flags & HPET_IE) == 0) | |
576 | break; | |
577 | v = readq(&timer->hpet_config); | |
578 | v &= ~Tn_INT_ENB_CNF_MASK; | |
579 | writeq(v, &timer->hpet_config); | |
580 | if (devp->hd_irq) { | |
581 | free_irq(devp->hd_irq, devp); | |
582 | devp->hd_irq = 0; | |
583 | } | |
584 | devp->hd_flags ^= HPET_IE; | |
585 | break; | |
586 | case HPET_INFO: | |
587 | { | |
588 | struct hpet_info info; | |
589 | ||
af95eade CL |
590 | if (devp->hd_ireqfreq) |
591 | info.hi_ireqfreq = | |
592 | hpet_time_div(hpetp, devp->hd_ireqfreq); | |
593 | else | |
594 | info.hi_ireqfreq = 0; | |
1da177e4 LT |
595 | info.hi_flags = |
596 | readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; | |
c860ed9f CL |
597 | info.hi_hpet = hpetp->hp_which; |
598 | info.hi_timer = devp - hpetp->hp_dev; | |
8e8505be CL |
599 | if (kernel) |
600 | memcpy((void *)arg, &info, sizeof(info)); | |
601 | else | |
602 | if (copy_to_user((void __user *)arg, &info, | |
603 | sizeof(info))) | |
604 | err = -EFAULT; | |
1da177e4 LT |
605 | break; |
606 | } | |
607 | case HPET_EPI: | |
608 | v = readq(&timer->hpet_config); | |
609 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
610 | err = -ENXIO; | |
611 | break; | |
612 | } | |
613 | devp->hd_flags |= HPET_PERIODIC; | |
614 | break; | |
615 | case HPET_DPI: | |
616 | v = readq(&timer->hpet_config); | |
617 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
618 | err = -ENXIO; | |
619 | break; | |
620 | } | |
621 | if (devp->hd_flags & HPET_PERIODIC && | |
622 | readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
623 | v = readq(&timer->hpet_config); | |
624 | v ^= Tn_TYPE_CNF_MASK; | |
625 | writeq(v, &timer->hpet_config); | |
626 | } | |
627 | devp->hd_flags &= ~HPET_PERIODIC; | |
628 | break; | |
629 | case HPET_IRQFREQ: | |
630 | if (!kernel && (arg > hpet_max_freq) && | |
631 | !capable(CAP_SYS_RESOURCE)) { | |
632 | err = -EACCES; | |
633 | break; | |
634 | } | |
635 | ||
189e2dd1 | 636 | if (!arg) { |
1da177e4 LT |
637 | err = -EINVAL; |
638 | break; | |
639 | } | |
640 | ||
ba3f213f | 641 | devp->hd_ireqfreq = hpet_time_div(hpetp, arg); |
1da177e4 LT |
642 | } |
643 | ||
644 | return err; | |
645 | } | |
646 | ||
62322d25 | 647 | static const struct file_operations hpet_fops = { |
1da177e4 LT |
648 | .owner = THIS_MODULE, |
649 | .llseek = no_llseek, | |
650 | .read = hpet_read, | |
651 | .poll = hpet_poll, | |
652 | .ioctl = hpet_ioctl, | |
653 | .open = hpet_open, | |
654 | .release = hpet_release, | |
655 | .fasync = hpet_fasync, | |
656 | .mmap = hpet_mmap, | |
657 | }; | |
658 | ||
3e6716e7 RD |
659 | static int hpet_is_known(struct hpet_data *hdp) |
660 | { | |
661 | struct hpets *hpetp; | |
662 | ||
663 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
664 | if (hpetp->hp_hpet_phys == hdp->hd_phys_address) | |
665 | return 1; | |
666 | ||
667 | return 0; | |
668 | } | |
669 | ||
1da177e4 LT |
670 | static inline int hpet_tpcheck(struct hpet_task *tp) |
671 | { | |
672 | struct hpet_dev *devp; | |
673 | struct hpets *hpetp; | |
674 | ||
675 | devp = tp->ht_opaque; | |
676 | ||
677 | if (!devp) | |
678 | return -ENXIO; | |
679 | ||
680 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
681 | if (devp >= hpetp->hp_dev | |
682 | && devp < (hpetp->hp_dev + hpetp->hp_ntimer) | |
683 | && devp->hd_hpet == hpetp->hp_hpet) | |
684 | return 0; | |
685 | ||
686 | return -ENXIO; | |
687 | } | |
688 | ||
372572e9 | 689 | #if 0 |
1da177e4 LT |
690 | int hpet_unregister(struct hpet_task *tp) |
691 | { | |
692 | struct hpet_dev *devp; | |
693 | struct hpet_timer __iomem *timer; | |
694 | int err; | |
695 | ||
696 | if ((err = hpet_tpcheck(tp))) | |
697 | return err; | |
698 | ||
699 | spin_lock_irq(&hpet_task_lock); | |
700 | spin_lock(&hpet_lock); | |
701 | ||
702 | devp = tp->ht_opaque; | |
703 | if (devp->hd_task != tp) { | |
704 | spin_unlock(&hpet_lock); | |
705 | spin_unlock_irq(&hpet_task_lock); | |
706 | return -ENXIO; | |
707 | } | |
708 | ||
709 | timer = devp->hd_timer; | |
710 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
711 | &timer->hpet_config); | |
712 | devp->hd_flags &= ~(HPET_IE | HPET_PERIODIC); | |
713 | devp->hd_task = NULL; | |
714 | spin_unlock(&hpet_lock); | |
715 | spin_unlock_irq(&hpet_task_lock); | |
716 | ||
717 | return 0; | |
718 | } | |
372572e9 | 719 | #endif /* 0 */ |
1da177e4 | 720 | |
1da177e4 LT |
721 | static ctl_table hpet_table[] = { |
722 | { | |
22943364 | 723 | .ctl_name = CTL_UNNUMBERED, |
1da177e4 LT |
724 | .procname = "max-user-freq", |
725 | .data = &hpet_max_freq, | |
726 | .maxlen = sizeof(int), | |
727 | .mode = 0644, | |
728 | .proc_handler = &proc_dointvec, | |
729 | }, | |
730 | {.ctl_name = 0} | |
731 | }; | |
732 | ||
733 | static ctl_table hpet_root[] = { | |
734 | { | |
22943364 | 735 | .ctl_name = CTL_UNNUMBERED, |
1da177e4 LT |
736 | .procname = "hpet", |
737 | .maxlen = 0, | |
738 | .mode = 0555, | |
739 | .child = hpet_table, | |
740 | }, | |
741 | {.ctl_name = 0} | |
742 | }; | |
743 | ||
744 | static ctl_table dev_root[] = { | |
745 | { | |
746 | .ctl_name = CTL_DEV, | |
747 | .procname = "dev", | |
748 | .maxlen = 0, | |
749 | .mode = 0555, | |
750 | .child = hpet_root, | |
751 | }, | |
752 | {.ctl_name = 0} | |
753 | }; | |
754 | ||
755 | static struct ctl_table_header *sysctl_header; | |
756 | ||
1da177e4 LT |
757 | /* |
758 | * Adjustment for when arming the timer with | |
759 | * initial conditions. That is, main counter | |
760 | * ticks expired before interrupts are enabled. | |
761 | */ | |
762 | #define TICK_CALIBRATE (1000UL) | |
763 | ||
764 | static unsigned long hpet_calibrate(struct hpets *hpetp) | |
765 | { | |
766 | struct hpet_timer __iomem *timer = NULL; | |
767 | unsigned long t, m, count, i, flags, start; | |
768 | struct hpet_dev *devp; | |
769 | int j; | |
770 | struct hpet __iomem *hpet; | |
771 | ||
772 | for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) | |
773 | if ((devp->hd_flags & HPET_OPEN) == 0) { | |
774 | timer = devp->hd_timer; | |
775 | break; | |
776 | } | |
777 | ||
778 | if (!timer) | |
779 | return 0; | |
780 | ||
3d5640d1 | 781 | hpet = hpetp->hp_hpet; |
1da177e4 LT |
782 | t = read_counter(&timer->hpet_compare); |
783 | ||
784 | i = 0; | |
ba3f213f | 785 | count = hpet_time_div(hpetp, TICK_CALIBRATE); |
1da177e4 LT |
786 | |
787 | local_irq_save(flags); | |
788 | ||
789 | start = read_counter(&hpet->hpet_mc); | |
790 | ||
791 | do { | |
792 | m = read_counter(&hpet->hpet_mc); | |
793 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
794 | } while (i++, (m - start) < count); | |
795 | ||
796 | local_irq_restore(flags); | |
797 | ||
798 | return (m - start) / i; | |
799 | } | |
800 | ||
801 | int hpet_alloc(struct hpet_data *hdp) | |
802 | { | |
5761d64b | 803 | u64 cap, mcfg; |
1da177e4 | 804 | struct hpet_dev *devp; |
5761d64b | 805 | u32 i, ntimer; |
1da177e4 LT |
806 | struct hpets *hpetp; |
807 | size_t siz; | |
808 | struct hpet __iomem *hpet; | |
3e6716e7 | 809 | static struct hpets *last = NULL; |
5761d64b | 810 | unsigned long period; |
ba3f213f | 811 | unsigned long long temp; |
1da177e4 LT |
812 | |
813 | /* | |
814 | * hpet_alloc can be called by platform dependent code. | |
3e6716e7 RD |
815 | * If platform dependent code has allocated the hpet that |
816 | * ACPI has also reported, then we catch it here. | |
1da177e4 | 817 | */ |
3e6716e7 RD |
818 | if (hpet_is_known(hdp)) { |
819 | printk(KERN_DEBUG "%s: duplicate HPET ignored\n", | |
bf9d8929 | 820 | __func__); |
3e6716e7 RD |
821 | return 0; |
822 | } | |
1da177e4 LT |
823 | |
824 | siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * | |
825 | sizeof(struct hpet_dev)); | |
826 | ||
3e6716e7 | 827 | hpetp = kzalloc(siz, GFP_KERNEL); |
1da177e4 LT |
828 | |
829 | if (!hpetp) | |
830 | return -ENOMEM; | |
831 | ||
1da177e4 LT |
832 | hpetp->hp_which = hpet_nhpet++; |
833 | hpetp->hp_hpet = hdp->hd_address; | |
834 | hpetp->hp_hpet_phys = hdp->hd_phys_address; | |
835 | ||
836 | hpetp->hp_ntimer = hdp->hd_nirqs; | |
e3f37a54 | 837 | |
5761d64b TG |
838 | for (i = 0; i < hdp->hd_nirqs; i++) |
839 | hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; | |
37a47db8 | 840 | |
5761d64b | 841 | hpet = hpetp->hp_hpet; |
e3f37a54 | 842 | |
1da177e4 LT |
843 | cap = readq(&hpet->hpet_cap); |
844 | ||
845 | ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; | |
846 | ||
847 | if (hpetp->hp_ntimer != ntimer) { | |
848 | printk(KERN_WARNING "hpet: number irqs doesn't agree" | |
849 | " with number of timers\n"); | |
850 | kfree(hpetp); | |
851 | return -ENODEV; | |
852 | } | |
853 | ||
854 | if (last) | |
855 | last->hp_next = hpetp; | |
856 | else | |
857 | hpets = hpetp; | |
858 | ||
859 | last = hpetp; | |
860 | ||
ba3f213f CL |
861 | period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> |
862 | HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ | |
863 | temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ | |
864 | temp += period >> 1; /* round */ | |
865 | do_div(temp, period); | |
866 | hpetp->hp_tick_freq = temp; /* ticks per second */ | |
1da177e4 | 867 | |
3034d11c AK |
868 | printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", |
869 | hpetp->hp_which, hdp->hd_phys_address, | |
1da177e4 LT |
870 | hpetp->hp_ntimer > 1 ? "s" : ""); |
871 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
5761d64b | 872 | printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); |
1da177e4 LT |
873 | printk("\n"); |
874 | ||
318db8f0 CL |
875 | printk(KERN_INFO "hpet%u: %u %d-bit timers, %Lu Hz\n", |
876 | hpetp->hp_which, hpetp->hp_ntimer, | |
877 | cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, hpetp->hp_tick_freq); | |
1da177e4 LT |
878 | |
879 | mcfg = readq(&hpet->hpet_config); | |
880 | if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { | |
881 | write_counter(0L, &hpet->hpet_mc); | |
882 | mcfg |= HPET_ENABLE_CNF_MASK; | |
883 | writeq(mcfg, &hpet->hpet_config); | |
884 | } | |
885 | ||
642d30bb | 886 | for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { |
1da177e4 LT |
887 | struct hpet_timer __iomem *timer; |
888 | ||
889 | timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; | |
1da177e4 LT |
890 | |
891 | devp->hd_hpets = hpetp; | |
892 | devp->hd_hpet = hpet; | |
893 | devp->hd_timer = timer; | |
894 | ||
895 | /* | |
896 | * If the timer was reserved by platform code, | |
897 | * then make timer unavailable for opens. | |
898 | */ | |
899 | if (hdp->hd_state & (1 << i)) { | |
900 | devp->hd_flags = HPET_OPEN; | |
901 | continue; | |
902 | } | |
903 | ||
904 | init_waitqueue_head(&devp->hd_waitqueue); | |
905 | } | |
906 | ||
907 | hpetp->hp_delta = hpet_calibrate(hpetp); | |
0aa366f3 | 908 | |
3b2b64fd LT |
909 | /* This clocksource driver currently only works on ia64 */ |
910 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
911 | if (!hpet_clocksource) { |
912 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; | |
913 | CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); | |
914 | clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, | |
915 | clocksource_hpet.shift); | |
916 | clocksource_register(&clocksource_hpet); | |
917 | hpetp->hp_clocksource = &clocksource_hpet; | |
918 | hpet_clocksource = &clocksource_hpet; | |
919 | } | |
3b2b64fd | 920 | #endif |
1da177e4 LT |
921 | |
922 | return 0; | |
923 | } | |
924 | ||
925 | static acpi_status hpet_resources(struct acpi_resource *res, void *data) | |
926 | { | |
927 | struct hpet_data *hdp; | |
928 | acpi_status status; | |
929 | struct acpi_resource_address64 addr; | |
1da177e4 LT |
930 | |
931 | hdp = data; | |
932 | ||
933 | status = acpi_resource_to_address64(res, &addr); | |
934 | ||
935 | if (ACPI_SUCCESS(status)) { | |
50eca3eb | 936 | hdp->hd_phys_address = addr.minimum; |
9224a867 | 937 | hdp->hd_address = ioremap(addr.minimum, addr.address_length); |
1da177e4 | 938 | |
3e6716e7 RD |
939 | if (hpet_is_known(hdp)) { |
940 | printk(KERN_DEBUG "%s: 0x%lx is busy\n", | |
bf9d8929 | 941 | __func__, hdp->hd_phys_address); |
3e6716e7 | 942 | iounmap(hdp->hd_address); |
78e1ca49 | 943 | return AE_ALREADY_EXISTS; |
3e6716e7 | 944 | } |
50eca3eb BM |
945 | } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
946 | struct acpi_resource_fixed_memory32 *fixmem32; | |
757c4724 RD |
947 | |
948 | fixmem32 = &res->data.fixed_memory32; | |
949 | if (!fixmem32) | |
78e1ca49 | 950 | return AE_NO_MEMORY; |
757c4724 | 951 | |
50eca3eb BM |
952 | hdp->hd_phys_address = fixmem32->address; |
953 | hdp->hd_address = ioremap(fixmem32->address, | |
757c4724 RD |
954 | HPET_RANGE_SIZE); |
955 | ||
3e6716e7 RD |
956 | if (hpet_is_known(hdp)) { |
957 | printk(KERN_DEBUG "%s: 0x%lx is busy\n", | |
bf9d8929 | 958 | __func__, hdp->hd_phys_address); |
3e6716e7 | 959 | iounmap(hdp->hd_address); |
78e1ca49 | 960 | return AE_ALREADY_EXISTS; |
3e6716e7 | 961 | } |
50eca3eb BM |
962 | } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { |
963 | struct acpi_resource_extended_irq *irqp; | |
be5efffb | 964 | int i, irq; |
1da177e4 LT |
965 | |
966 | irqp = &res->data.extended_irq; | |
967 | ||
be5efffb BH |
968 | for (i = 0; i < irqp->interrupt_count; i++) { |
969 | irq = acpi_register_gsi(irqp->interrupts[i], | |
970 | irqp->triggering, irqp->polarity); | |
971 | if (irq < 0) | |
972 | return AE_ERROR; | |
973 | ||
974 | hdp->hd_irq[hdp->hd_nirqs] = irq; | |
975 | hdp->hd_nirqs++; | |
1da177e4 LT |
976 | } |
977 | } | |
978 | ||
979 | return AE_OK; | |
980 | } | |
981 | ||
982 | static int hpet_acpi_add(struct acpi_device *device) | |
983 | { | |
984 | acpi_status result; | |
985 | struct hpet_data data; | |
986 | ||
987 | memset(&data, 0, sizeof(data)); | |
988 | ||
989 | result = | |
990 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, | |
991 | hpet_resources, &data); | |
992 | ||
993 | if (ACPI_FAILURE(result)) | |
994 | return -ENODEV; | |
995 | ||
996 | if (!data.hd_address || !data.hd_nirqs) { | |
bf9d8929 | 997 | printk("%s: no address or irqs in _CRS\n", __func__); |
1da177e4 LT |
998 | return -ENODEV; |
999 | } | |
1000 | ||
1001 | return hpet_alloc(&data); | |
1002 | } | |
1003 | ||
1004 | static int hpet_acpi_remove(struct acpi_device *device, int type) | |
1005 | { | |
0aa366f3 | 1006 | /* XXX need to unregister clocksource, dealloc mem, etc */ |
1da177e4 LT |
1007 | return -EINVAL; |
1008 | } | |
1009 | ||
1ba90e3a TR |
1010 | static const struct acpi_device_id hpet_device_ids[] = { |
1011 | {"PNP0103", 0}, | |
1012 | {"", 0}, | |
1013 | }; | |
1014 | MODULE_DEVICE_TABLE(acpi, hpet_device_ids); | |
1015 | ||
1da177e4 LT |
1016 | static struct acpi_driver hpet_acpi_driver = { |
1017 | .name = "hpet", | |
1ba90e3a | 1018 | .ids = hpet_device_ids, |
1da177e4 LT |
1019 | .ops = { |
1020 | .add = hpet_acpi_add, | |
1021 | .remove = hpet_acpi_remove, | |
1022 | }, | |
1023 | }; | |
1024 | ||
1025 | static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; | |
1026 | ||
1027 | static int __init hpet_init(void) | |
1028 | { | |
1029 | int result; | |
1030 | ||
1031 | result = misc_register(&hpet_misc); | |
1032 | if (result < 0) | |
1033 | return -ENODEV; | |
1034 | ||
0b4d4147 | 1035 | sysctl_header = register_sysctl_table(dev_root); |
1da177e4 LT |
1036 | |
1037 | result = acpi_bus_register_driver(&hpet_acpi_driver); | |
1038 | if (result < 0) { | |
1039 | if (sysctl_header) | |
1040 | unregister_sysctl_table(sysctl_header); | |
1041 | misc_deregister(&hpet_misc); | |
1042 | return result; | |
1043 | } | |
1044 | ||
1045 | return 0; | |
1046 | } | |
1047 | ||
1048 | static void __exit hpet_exit(void) | |
1049 | { | |
1050 | acpi_bus_unregister_driver(&hpet_acpi_driver); | |
1051 | ||
1052 | if (sysctl_header) | |
1053 | unregister_sysctl_table(sysctl_header); | |
1054 | misc_deregister(&hpet_misc); | |
1055 | ||
1056 | return; | |
1057 | } | |
1058 | ||
1059 | module_init(hpet_init); | |
1060 | module_exit(hpet_exit); | |
1061 | MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); | |
1062 | MODULE_LICENSE("GPL"); |