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16c63f8e DW |
1 | /* Copyright (c) 2010, Code Aurora Forum. All rights reserved. |
2 | * | |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
15 | * 02110-1301, USA. | |
16 | */ | |
17 | ||
18 | #include <linux/console.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/moduleparam.h> | |
23 | #include <linux/types.h> | |
24 | ||
25 | #include <asm/processor.h> | |
26 | ||
27 | #include "hvc_console.h" | |
28 | ||
29 | /* DCC Status Bits */ | |
30 | #define DCC_STATUS_RX (1 << 30) | |
31 | #define DCC_STATUS_TX (1 << 29) | |
32 | ||
33 | static inline u32 __dcc_getstatus(void) | |
34 | { | |
35 | u32 __ret; | |
36 | ||
37 | asm("mrc p14, 0, %0, c0, c1, 0 @ read comms ctrl reg" | |
38 | : "=r" (__ret) : : "cc"); | |
39 | ||
40 | return __ret; | |
41 | } | |
42 | ||
43 | ||
44 | #if defined(CONFIG_CPU_V7) | |
45 | static inline char __dcc_getchar(void) | |
46 | { | |
47 | char __c; | |
48 | ||
49 | asm("get_wait: mrc p14, 0, pc, c0, c1, 0 \n\ | |
50 | bne get_wait \n\ | |
51 | mrc p14, 0, %0, c0, c5, 0 @ read comms data reg" | |
52 | : "=r" (__c) : : "cc"); | |
53 | ||
54 | return __c; | |
55 | } | |
56 | #else | |
57 | static inline char __dcc_getchar(void) | |
58 | { | |
59 | char __c; | |
60 | ||
61 | asm("mrc p14, 0, %0, c0, c5, 0 @ read comms data reg" | |
62 | : "=r" (__c)); | |
63 | ||
64 | return __c; | |
65 | } | |
66 | #endif | |
67 | ||
68 | #if defined(CONFIG_CPU_V7) | |
69 | static inline void __dcc_putchar(char c) | |
70 | { | |
71 | asm("put_wait: mrc p14, 0, pc, c0, c1, 0 \n\ | |
72 | bcs put_wait \n\ | |
73 | mcr p14, 0, %0, c0, c5, 0 " | |
74 | : : "r" (c) : "cc"); | |
75 | } | |
76 | #else | |
77 | static inline void __dcc_putchar(char c) | |
78 | { | |
79 | asm("mcr p14, 0, %0, c0, c5, 0 @ write a char" | |
80 | : /* no output register */ | |
81 | : "r" (c)); | |
82 | } | |
83 | #endif | |
84 | ||
85 | static int hvc_dcc_put_chars(uint32_t vt, const char *buf, int count) | |
86 | { | |
87 | int i; | |
88 | ||
89 | for (i = 0; i < count; i++) { | |
90 | while (__dcc_getstatus() & DCC_STATUS_TX) | |
91 | cpu_relax(); | |
92 | ||
93 | __dcc_putchar((char)(buf[i] & 0xFF)); | |
94 | } | |
95 | ||
96 | return count; | |
97 | } | |
98 | ||
99 | static int hvc_dcc_get_chars(uint32_t vt, char *buf, int count) | |
100 | { | |
101 | int i; | |
102 | ||
103 | for (i = 0; i < count; ++i) { | |
104 | int c = -1; | |
105 | ||
106 | if (__dcc_getstatus() & DCC_STATUS_RX) | |
107 | c = __dcc_getchar(); | |
108 | if (c < 0) | |
109 | break; | |
110 | buf[i] = c; | |
111 | } | |
112 | ||
113 | return i; | |
114 | } | |
115 | ||
116 | static const struct hv_ops hvc_dcc_get_put_ops = { | |
117 | .get_chars = hvc_dcc_get_chars, | |
118 | .put_chars = hvc_dcc_put_chars, | |
119 | }; | |
120 | ||
121 | static int __init hvc_dcc_console_init(void) | |
122 | { | |
123 | hvc_instantiate(0, 0, &hvc_dcc_get_put_ops); | |
124 | return 0; | |
125 | } | |
126 | console_initcall(hvc_dcc_console_init); | |
127 | ||
128 | static int __init hvc_dcc_init(void) | |
129 | { | |
130 | hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128); | |
131 | return 0; | |
132 | } | |
133 | device_initcall(hvc_dcc_init); |