[mirror_ubuntu-zesty-kernel.git] / drivers / char / hw_random / exynos-rng.c

/*
 * exynos-rng.c - Random Number Generator driver for the exynos
 *
 * Copyright (C) 2012 Samsung Electronics
 * Jonghwa Lee <jonghwa3.lee@smasung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation;
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#include <linux/hw_random.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/pm_runtime.h>
#include <linux/err.h>

#define EXYNOS_PRNG_STATUS_OFFSET	0x10
#define EXYNOS_PRNG_SEED_OFFSET		0x140
#define EXYNOS_PRNG_OUT1_OFFSET		0x160
#define SEED_SETTING_DONE		BIT(1)
#define PRNG_START			0x18
#define PRNG_DONE			BIT(5)
#define EXYNOS_AUTOSUSPEND_DELAY	100

struct exynos_rng {
	struct device *dev;
	struct hwrng rng;
	void __iomem *mem;
	struct clk *clk;
};

static u32 exynos_rng_readl(struct exynos_rng *rng, u32 offset)
{
	return	__raw_readl(rng->mem + offset);
}

static void exynos_rng_writel(struct exynos_rng *rng, u32 val, u32 offset)
{
	__raw_writel(val, rng->mem + offset);
}

static int exynos_rng_configure(struct exynos_rng *exynos_rng)
{
	int i;
	int ret = 0;

	for (i = 0 ; i < 5 ; i++)
		exynos_rng_writel(exynos_rng, jiffies,
				EXYNOS_PRNG_SEED_OFFSET + 4*i);

	if (!(exynos_rng_readl(exynos_rng, EXYNOS_PRNG_STATUS_OFFSET)
						 & SEED_SETTING_DONE))
		ret = -EIO;

	return ret;
}

static int exynos_init(struct hwrng *rng)
{
	struct exynos_rng *exynos_rng = container_of(rng,
						struct exynos_rng, rng);
	int ret = 0;

	pm_runtime_get_sync(exynos_rng->dev);
	ret = exynos_rng_configure(exynos_rng);
	pm_runtime_put_noidle(exynos_rng->dev);

	return ret;
}

static int exynos_read(struct hwrng *rng, void *buf,
					size_t max, bool wait)
{
	struct exynos_rng *exynos_rng = container_of(rng,
						struct exynos_rng, rng);
	u32 *data = buf;
	int retry = 100;

	pm_runtime_get_sync(exynos_rng->dev);

	exynos_rng_writel(exynos_rng, PRNG_START, 0);

	while (!(exynos_rng_readl(exynos_rng,
			EXYNOS_PRNG_STATUS_OFFSET) & PRNG_DONE) && --retry)
		cpu_relax();
	if (!retry)
		return -ETIMEDOUT;

	exynos_rng_writel(exynos_rng, PRNG_DONE, EXYNOS_PRNG_STATUS_OFFSET);

	*data = exynos_rng_readl(exynos_rng, EXYNOS_PRNG_OUT1_OFFSET);

	pm_runtime_mark_last_busy(exynos_rng->dev);
	pm_runtime_put_sync_autosuspend(exynos_rng->dev);

	return 4;
}

static int exynos_rng_probe(struct platform_device *pdev)
{
	struct exynos_rng *exynos_rng;
	struct resource *res;

	exynos_rng = devm_kzalloc(&pdev->dev, sizeof(struct exynos_rng),
					GFP_KERNEL);
	if (!exynos_rng)
		return -ENOMEM;

	exynos_rng->dev = &pdev->dev;
	exynos_rng->rng.name = "exynos";
	exynos_rng->rng.init =	exynos_init;
	exynos_rng->rng.read = exynos_read;
	exynos_rng->clk = devm_clk_get(&pdev->dev, "secss");
	if (IS_ERR(exynos_rng->clk)) {
		dev_err(&pdev->dev, "Couldn't get clock.\n");
		return -ENOENT;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	exynos_rng->mem = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(exynos_rng->mem))
		return PTR_ERR(exynos_rng->mem);

	platform_set_drvdata(pdev, exynos_rng);

	pm_runtime_set_autosuspend_delay(&pdev->dev, EXYNOS_AUTOSUSPEND_DELAY);
	pm_runtime_use_autosuspend(&pdev->dev);
	pm_runtime_enable(&pdev->dev);

	return devm_hwrng_register(&pdev->dev, &exynos_rng->rng);
}

#ifdef CONFIG_PM
static int exynos_rng_runtime_suspend(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);

	clk_disable_unprepare(exynos_rng->clk);

	return 0;
}

static int exynos_rng_runtime_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);

	return clk_prepare_enable(exynos_rng->clk);
}

static int exynos_rng_suspend(struct device *dev)
{
	return pm_runtime_force_suspend(dev);
}

static int exynos_rng_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
	int ret;

	ret = pm_runtime_force_resume(dev);
	if (ret)
		return ret;

	return exynos_rng_configure(exynos_rng);
}
#endif

static const struct dev_pm_ops exynos_rng_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(exynos_rng_suspend, exynos_rng_resume)
	SET_RUNTIME_PM_OPS(exynos_rng_runtime_suspend,
			   exynos_rng_runtime_resume, NULL)
};

static struct platform_driver exynos_rng_driver = {
	.driver		= {
		.name	= "exynos-rng",
		.pm	= &exynos_rng_pm_ops,
	},
	.probe		= exynos_rng_probe,
};

module_platform_driver(exynos_rng_driver);

MODULE_DESCRIPTION("EXYNOS 4 H/W Random Number Generator driver");
MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
b329669e JL	1	/*
	2	* exynos-rng.c - Random Number Generator driver for the exynos
	3	*
	4	* Copyright (C) 2012 Samsung Electronics
	5	* Jonghwa Lee <jonghwa3.lee@smasung.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation;
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*
	20	*/
	21
	22	#include <linux/hw_random.h>
	23	#include <linux/kernel.h>
	24	#include <linux/module.h>
b329669e JL	25	#include <linux/io.h>
	26	#include <linux/platform_device.h>
	27	#include <linux/clk.h>
	28	#include <linux/pm_runtime.h>
	29	#include <linux/err.h>
	30
	31	#define EXYNOS_PRNG_STATUS_OFFSET 0x10
	32	#define EXYNOS_PRNG_SEED_OFFSET 0x140
	33	#define EXYNOS_PRNG_OUT1_OFFSET 0x160
	34	#define SEED_SETTING_DONE BIT(1)
	35	#define PRNG_START 0x18
	36	#define PRNG_DONE BIT(5)
	37	#define EXYNOS_AUTOSUSPEND_DELAY 100
	38
	39	struct exynos_rng {
	40	struct device *dev;
	41	struct hwrng rng;
	42	void __iomem *mem;
	43	struct clk *clk;
	44	};
	45
	46	static u32 exynos_rng_readl(struct exynos_rng *rng, u32 offset)
	47	{
	48	return __raw_readl(rng->mem + offset);
	49	}
	50
	51	static void exynos_rng_writel(struct exynos_rng *rng, u32 val, u32 offset)
	52	{
	53	__raw_writel(val, rng->mem + offset);
	54	}
	55
bd1dffb1	56	static int exynos_rng_configure(struct exynos_rng *exynos_rng)
b329669e	57	{
b329669e JL	58	int i;
	59	int ret = 0;
	60
b329669e JL	61	for (i = 0 ; i < 5 ; i++)
	62	exynos_rng_writel(exynos_rng, jiffies,
	63	EXYNOS_PRNG_SEED_OFFSET + 4*i);
	64
	65	if (!(exynos_rng_readl(exynos_rng, EXYNOS_PRNG_STATUS_OFFSET)
	66	& SEED_SETTING_DONE))
	67	ret = -EIO;
	68
bd1dffb1 KK	69	return ret;
	70	}
	71
	72	static int exynos_init(struct hwrng *rng)
	73	{
	74	struct exynos_rng *exynos_rng = container_of(rng,
	75	struct exynos_rng, rng);
	76	int ret = 0;
	77
	78	pm_runtime_get_sync(exynos_rng->dev);
	79	ret = exynos_rng_configure(exynos_rng);
b329669e JL	80	pm_runtime_put_noidle(exynos_rng->dev);
	81
	82	return ret;
	83	}
	84
	85	static int exynos_read(struct hwrng rng, void buf,
	86	size_t max, bool wait)
	87	{
	88	struct exynos_rng *exynos_rng = container_of(rng,
	89	struct exynos_rng, rng);
	90	u32 *data = buf;
d7fd6075	91	int retry = 100;
b329669e JL	92
	93	pm_runtime_get_sync(exynos_rng->dev);
	94
	95	exynos_rng_writel(exynos_rng, PRNG_START, 0);
	96
	97	while (!(exynos_rng_readl(exynos_rng,
d7fd6075	98	EXYNOS_PRNG_STATUS_OFFSET) & PRNG_DONE) && --retry)
b329669e	99	cpu_relax();
d7fd6075 KK	100	if (!retry)
d7fd6075 KK	101	return -ETIMEDOUT;
b329669e JL	102
	103	exynos_rng_writel(exynos_rng, PRNG_DONE, EXYNOS_PRNG_STATUS_OFFSET);
	104
	105	*data = exynos_rng_readl(exynos_rng, EXYNOS_PRNG_OUT1_OFFSET);
	106
	107	pm_runtime_mark_last_busy(exynos_rng->dev);
f02b7d0c	108	pm_runtime_put_sync_autosuspend(exynos_rng->dev);
b329669e JL	109
	110	return 4;
	111	}
	112
bcd2982a	113	static int exynos_rng_probe(struct platform_device *pdev)
b329669e JL	114	{
b329669e JL	115	struct exynos_rng *exynos_rng;
c7c9e1c3	116	struct resource *res;
b329669e JL	117
	118	exynos_rng = devm_kzalloc(&pdev->dev, sizeof(struct exynos_rng),
	119	GFP_KERNEL);
	120	if (!exynos_rng)
	121	return -ENOMEM;
	122
	123	exynos_rng->dev = &pdev->dev;
	124	exynos_rng->rng.name = "exynos";
	125	exynos_rng->rng.init = exynos_init;
	126	exynos_rng->rng.read = exynos_read;
	127	exynos_rng->clk = devm_clk_get(&pdev->dev, "secss");
	128	if (IS_ERR(exynos_rng->clk)) {
	129	dev_err(&pdev->dev, "Couldn't get clock.\n");
	130	return -ENOENT;
	131	}
	132
c7c9e1c3 TR	133	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	134	exynos_rng->mem = devm_ioremap_resource(&pdev->dev, res);
	135	if (IS_ERR(exynos_rng->mem))
	136	return PTR_ERR(exynos_rng->mem);
b329669e JL	137
	138	platform_set_drvdata(pdev, exynos_rng);
	139
	140	pm_runtime_set_autosuspend_delay(&pdev->dev, EXYNOS_AUTOSUSPEND_DELAY);
	141	pm_runtime_use_autosuspend(&pdev->dev);
	142	pm_runtime_enable(&pdev->dev);
	143
1e6e38a9	144	return devm_hwrng_register(&pdev->dev, &exynos_rng->rng);
b329669e JL	145	}
b329669e JL	146
2d3867d0	147	#ifdef CONFIG_PM
b329669e JL	148	static int exynos_rng_runtime_suspend(struct device *dev)
	149	{
	150	struct platform_device *pdev = to_platform_device(dev);
	151	struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
	152
	153	clk_disable_unprepare(exynos_rng->clk);
	154
	155	return 0;
	156	}
	157
	158	static int exynos_rng_runtime_resume(struct device *dev)
	159	{
	160	struct platform_device *pdev = to_platform_device(dev);
	161	struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
	162
	163	return clk_prepare_enable(exynos_rng->clk);
	164	}
bd1dffb1 KK	165
	166	static int exynos_rng_suspend(struct device *dev)
	167	{
	168	return pm_runtime_force_suspend(dev);
	169	}
	170
	171	static int exynos_rng_resume(struct device *dev)
	172	{
	173	struct platform_device *pdev = to_platform_device(dev);
	174	struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
	175	int ret;
	176
	177	ret = pm_runtime_force_resume(dev);
	178	if (ret)
	179	return ret;
	180
	181	return exynos_rng_configure(exynos_rng);
	182	}
a80c5422	183	#endif
b329669e	184
bd1dffb1 KK	185	static const struct dev_pm_ops exynos_rng_pm_ops = {
	186	SET_SYSTEM_SLEEP_PM_OPS(exynos_rng_suspend, exynos_rng_resume)
	187	SET_RUNTIME_PM_OPS(exynos_rng_runtime_suspend,
	188	exynos_rng_runtime_resume, NULL)
	189	};
b329669e JL	190
	191	static struct platform_driver exynos_rng_driver = {
	192	.driver = {
	193	.name = "exynos-rng",
b329669e JL	194	.pm = &exynos_rng_pm_ops,
	195	},
	196	.probe = exynos_rng_probe,
b329669e JL	197	};
	198
	199	module_platform_driver(exynos_rng_driver);
	200
	201	MODULE_DESCRIPTION("EXYNOS 4 H/W Random Number Generator driver");
	202	MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
	203	MODULE_LICENSE("GPL");