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1 | /* n2rng.h: Niagara2 RNG defines. |
2 | * | |
3 | * Copyright (C) 2008 David S. Miller <davem@davemloft.net> | |
4 | */ | |
5 | ||
6 | #ifndef _N2RNG_H | |
7 | #define _N2RNG_H | |
8 | ||
9 | #define RNG_CTL_WAIT 0x0000000001fffe00ULL /* Minimum wait time */ | |
10 | #define RNG_CTL_WAIT_SHIFT 9 | |
11 | #define RNG_CTL_BYPASS 0x0000000000000100ULL /* VCO voltage source */ | |
12 | #define RNG_CTL_VCO 0x00000000000000c0ULL /* VCO rate control */ | |
13 | #define RNG_CTL_VCO_SHIFT 6 | |
14 | #define RNG_CTL_ASEL 0x0000000000000030ULL /* Analog MUX select */ | |
15 | #define RNG_CTL_ASEL_SHIFT 4 | |
16 | #define RNG_CTL_LFSR 0x0000000000000008ULL /* Use LFSR or plain shift */ | |
17 | #define RNG_CTL_ES3 0x0000000000000004ULL /* Enable entropy source 3 */ | |
18 | #define RNG_CTL_ES2 0x0000000000000002ULL /* Enable entropy source 2 */ | |
19 | #define RNG_CTL_ES1 0x0000000000000001ULL /* Enable entropy source 1 */ | |
20 | ||
21 | #define HV_FAST_RNG_GET_DIAG_CTL 0x130 | |
22 | #define HV_FAST_RNG_CTL_READ 0x131 | |
23 | #define HV_FAST_RNG_CTL_WRITE 0x132 | |
24 | #define HV_FAST_RNG_DATA_READ_DIAG 0x133 | |
25 | #define HV_FAST_RNG_DATA_READ 0x134 | |
26 | ||
27 | #define HV_RNG_STATE_UNCONFIGURED 0 | |
28 | #define HV_RNG_STATE_CONFIGURED 1 | |
29 | #define HV_RNG_STATE_HEALTHCHECK 2 | |
30 | #define HV_RNG_STATE_ERROR 3 | |
31 | ||
32 | #define HV_RNG_NUM_CONTROL 4 | |
33 | ||
34 | #ifndef __ASSEMBLY__ | |
35 | extern unsigned long sun4v_rng_get_diag_ctl(void); | |
36 | extern unsigned long sun4v_rng_ctl_read_v1(unsigned long ctl_regs_ra, | |
37 | unsigned long *state, | |
38 | unsigned long *tick_delta); | |
39 | extern unsigned long sun4v_rng_ctl_read_v2(unsigned long ctl_regs_ra, | |
40 | unsigned long unit, | |
41 | unsigned long *state, | |
42 | unsigned long *tick_delta, | |
43 | unsigned long *watchdog, | |
44 | unsigned long *write_status); | |
45 | extern unsigned long sun4v_rng_ctl_write_v1(unsigned long ctl_regs_ra, | |
46 | unsigned long state, | |
47 | unsigned long write_timeout, | |
48 | unsigned long *tick_delta); | |
49 | extern unsigned long sun4v_rng_ctl_write_v2(unsigned long ctl_regs_ra, | |
50 | unsigned long state, | |
51 | unsigned long write_timeout, | |
52 | unsigned long unit); | |
53 | extern unsigned long sun4v_rng_data_read_diag_v1(unsigned long data_ra, | |
54 | unsigned long len, | |
55 | unsigned long *tick_delta); | |
56 | extern unsigned long sun4v_rng_data_read_diag_v2(unsigned long data_ra, | |
57 | unsigned long len, | |
58 | unsigned long unit, | |
59 | unsigned long *tick_delta); | |
60 | extern unsigned long sun4v_rng_data_read(unsigned long data_ra, | |
61 | unsigned long *tick_delta); | |
62 | ||
63 | struct n2rng_unit { | |
64 | u64 control[HV_RNG_NUM_CONTROL]; | |
65 | }; | |
66 | ||
67 | struct n2rng { | |
2dc11581 | 68 | struct platform_device *op; |
ce087150 DM |
69 | |
70 | unsigned long flags; | |
24f14669 | 71 | #define N2RNG_FLAG_MULTI 0x00000001 /* Multi-unit capable RNG */ |
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72 | #define N2RNG_FLAG_CONTROL 0x00000002 /* Operating in control domain */ |
73 | #define N2RNG_FLAG_READY 0x00000008 /* Ready for hw-rng layer */ | |
74 | #define N2RNG_FLAG_SHUTDOWN 0x00000010 /* Driver unregistering */ | |
75 | #define N2RNG_FLAG_BUFFER_VALID 0x00000020 /* u32 buffer holds valid data */ | |
76 | ||
77 | int num_units; | |
78 | struct n2rng_unit *units; | |
79 | ||
80 | struct hwrng hwrng; | |
81 | u32 buffer; | |
82 | ||
83 | /* Registered hypervisor group API major and minor version. */ | |
84 | unsigned long hvapi_major; | |
85 | unsigned long hvapi_minor; | |
86 | ||
87 | struct delayed_work work; | |
88 | ||
89 | unsigned long hv_state; /* HV_RNG_STATE_foo */ | |
90 | ||
91 | unsigned long health_check_sec; | |
92 | unsigned long accum_cycles; | |
93 | unsigned long wd_timeo; | |
94 | #define N2RNG_HEALTH_CHECK_SEC_DEFAULT 0 | |
95 | #define N2RNG_ACCUM_CYCLES_DEFAULT 2048 | |
96 | #define N2RNG_WD_TIMEO_DEFAULT 0 | |
97 | ||
98 | u64 scratch_control[HV_RNG_NUM_CONTROL]; | |
99 | ||
100 | #define SELFTEST_TICKS 38859 | |
101 | #define SELFTEST_VAL ((u64)0xB8820C7BD387E32C) | |
102 | #define SELFTEST_POLY ((u64)0x231DCEE91262B8A3) | |
103 | #define SELFTEST_MATCH_GOAL 6 | |
104 | #define SELFTEST_LOOPS_MAX 40000 | |
105 | #define SELFTEST_BUFFER_WORDS 8 | |
106 | ||
107 | u64 test_data; | |
108 | u64 test_control[HV_RNG_NUM_CONTROL]; | |
109 | u64 test_buffer[SELFTEST_BUFFER_WORDS]; | |
110 | }; | |
111 | ||
112 | #define N2RNG_BLOCK_LIMIT 60000 | |
113 | #define N2RNG_BUSY_LIMIT 100 | |
114 | #define N2RNG_HCHECK_LIMIT 100 | |
115 | ||
116 | #endif /* !(__ASSEMBLY__) */ | |
117 | ||
118 | #endif /* _N2RNG_H */ |