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CommitLineData
1da177e4
LT
1/*****************************************************************************/
2/*
3 * moxa.c -- MOXA Intellio family multiport serial driver.
4 *
5 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com.tw).
6 *
7 * This code is loosely based on the Linux serial driver, written by
8 * Linus Torvalds, Theodore T'so and others.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
1da177e4
LT
14 */
15
16/*
17 * MOXA Intellio Series Driver
18 * for : LINUX
19 * date : 1999/1/7
20 * version : 5.1
21 */
22
1da177e4
LT
23#include <linux/module.h>
24#include <linux/types.h>
25#include <linux/mm.h>
26#include <linux/ioport.h>
27#include <linux/errno.h>
28#include <linux/signal.h>
29#include <linux/sched.h>
30#include <linux/timer.h>
31#include <linux/interrupt.h>
32#include <linux/tty.h>
33#include <linux/tty_flip.h>
34#include <linux/major.h>
35#include <linux/string.h>
36#include <linux/fcntl.h>
37#include <linux/ptrace.h>
38#include <linux/serial.h>
39#include <linux/tty_driver.h>
40#include <linux/delay.h>
41#include <linux/pci.h>
42#include <linux/init.h>
43#include <linux/bitops.h>
44
45#include <asm/system.h>
46#include <asm/io.h>
47#include <asm/uaccess.h>
48
11324edd 49#define MOXA_VERSION "5.1k"
1da177e4 50
11324edd
JS
51#define MOXAMAJOR 172
52#define MOXACUMAJOR 173
1da177e4 53
11324edd 54#define MAX_BOARDS 4 /* Don't change this value */
1da177e4 55#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
11324edd 56#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
1da177e4
LT
57
58/*
59 * Define the Moxa PCI vendor and device IDs.
60 */
11324edd
JS
61#define MOXA_BUS_TYPE_ISA 0
62#define MOXA_BUS_TYPE_PCI 1
1da177e4 63
1da177e4
LT
64enum {
65 MOXA_BOARD_C218_PCI = 1,
66 MOXA_BOARD_C218_ISA,
67 MOXA_BOARD_C320_PCI,
68 MOXA_BOARD_C320_ISA,
69 MOXA_BOARD_CP204J,
70};
71
72static char *moxa_brdname[] =
73{
74 "C218 Turbo PCI series",
75 "C218 Turbo ISA series",
76 "C320 Turbo PCI series",
77 "C320 Turbo ISA series",
78 "CP-204J series",
79};
80
81#ifdef CONFIG_PCI
82static struct pci_device_id moxa_pcibrds[] = {
5ebb4078
JS
83 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
84 .driver_data = MOXA_BOARD_C218_PCI },
85 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
86 .driver_data = MOXA_BOARD_C320_PCI },
87 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
88 .driver_data = MOXA_BOARD_CP204J },
1da177e4
LT
89 { 0 }
90};
91MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
92#endif /* CONFIG_PCI */
93
9dff89cd 94struct moxa_isa_board_conf {
1da177e4
LT
95 int boardType;
96 int numPorts;
97 unsigned long baseAddr;
9dff89cd 98};
1da177e4 99
9dff89cd 100static struct moxa_isa_board_conf moxa_isa_boards[] =
1da177e4
LT
101{
102/* {MOXA_BOARD_C218_ISA,8,0xDC000}, */
103};
104
8f8ecbad 105static struct moxa_board_conf {
1da177e4
LT
106 int boardType;
107 int numPorts;
108 unsigned long baseAddr;
109 int busType;
889074ee 110 struct pci_dev *pdev;
8f8ecbad
JS
111
112 int loadstat;
113
114 void __iomem *basemem;
115 void __iomem *intNdx;
116 void __iomem *intPend;
117 void __iomem *intTable;
118} moxa_boards[MAX_BOARDS];
119
120struct mxser_mstatus {
121 tcflag_t cflag;
122 int cts;
123 int dsr;
124 int ri;
125 int dcd;
9dff89cd 126};
1da177e4 127
8f8ecbad
JS
128struct moxaq_str {
129 int inq;
130 int outq;
131};
1da177e4 132
8f8ecbad 133struct moxa_port {
1da177e4
LT
134 int type;
135 int port;
136 int close_delay;
137 unsigned short closing_wait;
138 int count;
139 int blocked_open;
140 long event; /* long req'd for set_bit --RR */
141 int asyncflags;
142 unsigned long statusflags;
143 struct tty_struct *tty;
144 int cflag;
145 wait_queue_head_t open_wait;
146 wait_queue_head_t close_wait;
1da177e4 147
8f8ecbad 148 struct timer_list emptyTimer;
1da177e4 149
8f8ecbad
JS
150 char chkPort;
151 char lineCtrl;
152 void __iomem *tableAddr;
153 long curBaud;
154 char DCDState;
155 char lowChkFlag;
156
157 ushort breakCnt;
158};
1da177e4
LT
159
160/* statusflags */
161#define TXSTOPPED 0x1
162#define LOWWAIT 0x2
163#define EMPTYWAIT 0x4
164#define THROTTLE 0x8
165
1da177e4
LT
166#define SERIAL_DO_RESTART
167
1da177e4
LT
168#define WAKEUP_CHARS 256
169
1da177e4
LT
170static int verbose = 0;
171static int ttymajor = MOXAMAJOR;
172/* Variables for insmod */
173#ifdef MODULE
9fa372a8
JS
174static int baseaddr[4];
175static int type[4];
176static int numports[4];
1da177e4
LT
177#endif
178
179MODULE_AUTHOR("William Chen");
180MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
181MODULE_LICENSE("GPL");
182#ifdef MODULE
183module_param_array(type, int, NULL, 0);
184module_param_array(baseaddr, int, NULL, 0);
185module_param_array(numports, int, NULL, 0);
186#endif
187module_param(ttymajor, int, 0);
188module_param(verbose, bool, 0644);
189
1da177e4
LT
190/*
191 * static functions:
192 */
1da177e4
LT
193static int moxa_open(struct tty_struct *, struct file *);
194static void moxa_close(struct tty_struct *, struct file *);
195static int moxa_write(struct tty_struct *, const unsigned char *, int);
196static int moxa_write_room(struct tty_struct *);
197static void moxa_flush_buffer(struct tty_struct *);
198static int moxa_chars_in_buffer(struct tty_struct *);
199static void moxa_flush_chars(struct tty_struct *);
200static void moxa_put_char(struct tty_struct *, unsigned char);
201static int moxa_ioctl(struct tty_struct *, struct file *, unsigned int, unsigned long);
202static void moxa_throttle(struct tty_struct *);
203static void moxa_unthrottle(struct tty_struct *);
606d099c 204static void moxa_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT
205static void moxa_stop(struct tty_struct *);
206static void moxa_start(struct tty_struct *);
207static void moxa_hangup(struct tty_struct *);
208static int moxa_tiocmget(struct tty_struct *tty, struct file *file);
209static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
210 unsigned int set, unsigned int clear);
211static void moxa_poll(unsigned long);
212static void set_tty_param(struct tty_struct *);
213static int block_till_ready(struct tty_struct *, struct file *,
8f8ecbad 214 struct moxa_port *);
1da177e4
LT
215static void setup_empty_event(struct tty_struct *);
216static void check_xmit_empty(unsigned long);
8f8ecbad
JS
217static void shut_down(struct moxa_port *);
218static void receive_data(struct moxa_port *);
1da177e4
LT
219/*
220 * moxa board interface functions:
221 */
222static void MoxaDriverInit(void);
223static int MoxaDriverIoctl(unsigned int, unsigned long, int);
224static int MoxaDriverPoll(void);
225static int MoxaPortsOfCard(int);
226static int MoxaPortIsValid(int);
227static void MoxaPortEnable(int);
228static void MoxaPortDisable(int);
229static long MoxaPortGetMaxBaud(int);
230static long MoxaPortSetBaud(int, long);
606d099c 231static int MoxaPortSetTermio(int, struct ktermios *, speed_t);
1da177e4
LT
232static int MoxaPortGetLineOut(int, int *, int *);
233static void MoxaPortLineCtrl(int, int, int);
234static void MoxaPortFlowCtrl(int, int, int, int, int, int);
235static int MoxaPortLineStatus(int);
236static int MoxaPortDCDChange(int);
237static int MoxaPortDCDON(int);
238static void MoxaPortFlushData(int, int);
239static int MoxaPortWriteData(int, unsigned char *, int);
33f0f88f 240static int MoxaPortReadData(int, struct tty_struct *tty);
1da177e4
LT
241static int MoxaPortTxQueue(int);
242static int MoxaPortRxQueue(int);
243static int MoxaPortTxFree(int);
244static void MoxaPortTxDisable(int);
245static void MoxaPortTxEnable(int);
246static int MoxaPortResetBrkCnt(int);
247static void MoxaPortSendBreak(int, int);
8f8ecbad
JS
248static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
249static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
1da177e4
LT
250static void MoxaSetFifo(int port, int enable);
251
b68e31d0 252static const struct tty_operations moxa_ops = {
1da177e4
LT
253 .open = moxa_open,
254 .close = moxa_close,
255 .write = moxa_write,
256 .write_room = moxa_write_room,
257 .flush_buffer = moxa_flush_buffer,
258 .chars_in_buffer = moxa_chars_in_buffer,
259 .flush_chars = moxa_flush_chars,
260 .put_char = moxa_put_char,
261 .ioctl = moxa_ioctl,
262 .throttle = moxa_throttle,
263 .unthrottle = moxa_unthrottle,
264 .set_termios = moxa_set_termios,
265 .stop = moxa_stop,
266 .start = moxa_start,
267 .hangup = moxa_hangup,
268 .tiocmget = moxa_tiocmget,
269 .tiocmset = moxa_tiocmset,
270};
271
aa7e5221 272static struct tty_driver *moxaDriver;
8f8ecbad 273static struct moxa_port moxa_ports[MAX_PORTS];
aa7e5221 274static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
34af946a 275static DEFINE_SPINLOCK(moxa_lock);
33f0f88f 276
1da177e4 277#ifdef CONFIG_PCI
9dff89cd
JS
278static int moxa_get_PCI_conf(struct pci_dev *p, int board_type,
279 struct moxa_board_conf *board)
1da177e4
LT
280{
281 board->baseAddr = pci_resource_start (p, 2);
282 board->boardType = board_type;
283 switch (board_type) {
284 case MOXA_BOARD_C218_ISA:
285 case MOXA_BOARD_C218_PCI:
286 board->numPorts = 8;
287 break;
288
289 case MOXA_BOARD_CP204J:
290 board->numPorts = 4;
291 break;
292 default:
293 board->numPorts = 0;
294 break;
295 }
296 board->busType = MOXA_BUS_TYPE_PCI;
86fbf148 297 /* don't lose the reference in the next pci_get_device iteration */
889074ee 298 board->pdev = pci_dev_get(p);
1da177e4
LT
299
300 return (0);
301}
302#endif /* CONFIG_PCI */
303
304static int __init moxa_init(void)
305{
306 int i, numBoards;
8f8ecbad 307 struct moxa_port *ch;
1da177e4
LT
308
309 printk(KERN_INFO "MOXA Intellio family driver version %s\n", MOXA_VERSION);
310 moxaDriver = alloc_tty_driver(MAX_PORTS + 1);
311 if (!moxaDriver)
312 return -ENOMEM;
313
1da177e4 314 moxaDriver->owner = THIS_MODULE;
9b4e3b13 315 moxaDriver->name = "ttyMX";
1da177e4
LT
316 moxaDriver->major = ttymajor;
317 moxaDriver->minor_start = 0;
318 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
319 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
320 moxaDriver->init_termios = tty_std_termios;
1da177e4 321 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
606d099c
AC
322 moxaDriver->init_termios.c_ispeed = 9600;
323 moxaDriver->init_termios.c_ospeed = 9600;
1da177e4
LT
324 moxaDriver->flags = TTY_DRIVER_REAL_RAW;
325 tty_set_operations(moxaDriver, &moxa_ops);
326
8f8ecbad 327 for (i = 0, ch = moxa_ports; i < MAX_PORTS; i++, ch++) {
1da177e4
LT
328 ch->type = PORT_16550A;
329 ch->port = i;
1da177e4
LT
330 ch->close_delay = 5 * HZ / 10;
331 ch->closing_wait = 30 * HZ;
1da177e4
LT
332 ch->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
333 init_waitqueue_head(&ch->open_wait);
334 init_waitqueue_head(&ch->close_wait);
8f8ecbad
JS
335
336 setup_timer(&ch->emptyTimer, check_xmit_empty,
337 (unsigned long)ch);
1da177e4
LT
338 }
339
1da177e4
LT
340 printk("Tty devices major number = %d\n", ttymajor);
341
342 if (tty_register_driver(moxaDriver)) {
343 printk(KERN_ERR "Couldn't install MOXA Smartio family driver !\n");
344 put_tty_driver(moxaDriver);
345 return -1;
346 }
1da177e4 347
aa7e5221 348 mod_timer(&moxaTimer, jiffies + HZ / 50);
1da177e4
LT
349
350 /* Find the boards defined in source code */
351 numBoards = 0;
352 for (i = 0; i < MAX_BOARDS; i++) {
353 if ((moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA) ||
354 (moxa_isa_boards[i].boardType == MOXA_BOARD_C320_ISA)) {
355 moxa_boards[numBoards].boardType = moxa_isa_boards[i].boardType;
356 if (moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA)
357 moxa_boards[numBoards].numPorts = 8;
358 else
359 moxa_boards[numBoards].numPorts = moxa_isa_boards[i].numPorts;
360 moxa_boards[numBoards].busType = MOXA_BUS_TYPE_ISA;
361 moxa_boards[numBoards].baseAddr = moxa_isa_boards[i].baseAddr;
362 if (verbose)
363 printk("Board %2d: %s board(baseAddr=%lx)\n",
364 numBoards + 1,
365 moxa_brdname[moxa_boards[numBoards].boardType - 1],
366 moxa_boards[numBoards].baseAddr);
367 numBoards++;
368 }
369 }
370 /* Find the boards defined form module args. */
371#ifdef MODULE
372 for (i = 0; i < MAX_BOARDS; i++) {
373 if ((type[i] == MOXA_BOARD_C218_ISA) ||
374 (type[i] == MOXA_BOARD_C320_ISA)) {
375 if (verbose)
376 printk("Board %2d: %s board(baseAddr=%lx)\n",
377 numBoards + 1,
378 moxa_brdname[type[i] - 1],
379 (unsigned long) baseaddr[i]);
380 if (numBoards >= MAX_BOARDS) {
381 if (verbose)
382 printk("More than %d MOXA Intellio family boards found. Board is ignored.", MAX_BOARDS);
383 continue;
384 }
385 moxa_boards[numBoards].boardType = type[i];
386 if (moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA)
387 moxa_boards[numBoards].numPorts = 8;
388 else
389 moxa_boards[numBoards].numPorts = numports[i];
390 moxa_boards[numBoards].busType = MOXA_BUS_TYPE_ISA;
391 moxa_boards[numBoards].baseAddr = baseaddr[i];
392 numBoards++;
393 }
394 }
395#endif
396 /* Find PCI boards here */
397#ifdef CONFIG_PCI
398 {
399 struct pci_dev *p = NULL;
fe971071 400 int n = ARRAY_SIZE(moxa_pcibrds) - 1;
1da177e4
LT
401 i = 0;
402 while (i < n) {
881a8c12 403 while ((p = pci_get_device(moxa_pcibrds[i].vendor, moxa_pcibrds[i].device, p))!=NULL)
1da177e4
LT
404 {
405 if (pci_enable_device(p))
406 continue;
407 if (numBoards >= MAX_BOARDS) {
408 if (verbose)
409 printk("More than %d MOXA Intellio family boards found. Board is ignored.", MAX_BOARDS);
410 } else {
411 moxa_get_PCI_conf(p, moxa_pcibrds[i].driver_data,
412 &moxa_boards[numBoards]);
413 numBoards++;
414 }
415 }
416 i++;
417 }
418 }
419#endif
420 for (i = 0; i < numBoards; i++) {
8f8ecbad
JS
421 moxa_boards[i].basemem = ioremap(moxa_boards[i].baseAddr,
422 0x4000);
1da177e4
LT
423 }
424
425 return (0);
426}
427
428static void __exit moxa_exit(void)
429{
430 int i;
431
432 if (verbose)
433 printk("Unloading module moxa ...\n");
434
c251ae0d 435 del_timer_sync(&moxaTimer);
1da177e4
LT
436
437 for (i = 0; i < MAX_PORTS; i++)
8f8ecbad 438 del_timer_sync(&moxa_ports[i].emptyTimer);
1da177e4
LT
439
440 if (tty_unregister_driver(moxaDriver))
441 printk("Couldn't unregister MOXA Intellio family serial driver\n");
442 put_tty_driver(moxaDriver);
86fbf148 443
41bdabbb 444 for (i = 0; i < MAX_BOARDS; i++) {
8f8ecbad
JS
445 if (moxa_boards[i].basemem)
446 iounmap(moxa_boards[i].basemem);
86fbf148 447 if (moxa_boards[i].busType == MOXA_BUS_TYPE_PCI)
889074ee 448 pci_dev_put(moxa_boards[i].pdev);
41bdabbb 449 }
86fbf148 450
1da177e4
LT
451 if (verbose)
452 printk("Done\n");
453}
454
455module_init(moxa_init);
456module_exit(moxa_exit);
457
1da177e4
LT
458static int moxa_open(struct tty_struct *tty, struct file *filp)
459{
8f8ecbad 460 struct moxa_port *ch;
1da177e4
LT
461 int port;
462 int retval;
1da177e4 463
11324edd 464 port = tty->index;
1da177e4
LT
465 if (port == MAX_PORTS) {
466 return (0);
467 }
468 if (!MoxaPortIsValid(port)) {
469 tty->driver_data = NULL;
470 return (-ENODEV);
471 }
1da177e4 472
8f8ecbad 473 ch = &moxa_ports[port];
1da177e4
LT
474 ch->count++;
475 tty->driver_data = ch;
476 ch->tty = tty;
477 if (!(ch->asyncflags & ASYNC_INITIALIZED)) {
478 ch->statusflags = 0;
479 set_tty_param(tty);
480 MoxaPortLineCtrl(ch->port, 1, 1);
481 MoxaPortEnable(ch->port);
482 ch->asyncflags |= ASYNC_INITIALIZED;
483 }
484 retval = block_till_ready(tty, filp, ch);
485
486 moxa_unthrottle(tty);
487
488 if (ch->type == PORT_16550A) {
489 MoxaSetFifo(ch->port, 1);
490 } else {
491 MoxaSetFifo(ch->port, 0);
492 }
493
494 return (retval);
495}
496
497static void moxa_close(struct tty_struct *tty, struct file *filp)
498{
8f8ecbad 499 struct moxa_port *ch;
1da177e4
LT
500 int port;
501
11324edd 502 port = tty->index;
1da177e4
LT
503 if (port == MAX_PORTS) {
504 return;
505 }
506 if (!MoxaPortIsValid(port)) {
507#ifdef SERIAL_DEBUG_CLOSE
508 printk("Invalid portno in moxa_close\n");
509#endif
510 tty->driver_data = NULL;
511 return;
512 }
513 if (tty->driver_data == NULL) {
514 return;
515 }
516 if (tty_hung_up_p(filp)) {
517 return;
518 }
8f8ecbad 519 ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
520
521 if ((tty->count == 1) && (ch->count != 1)) {
522 printk("moxa_close: bad serial port count; tty->count is 1, "
523 "ch->count is %d\n", ch->count);
524 ch->count = 1;
525 }
526 if (--ch->count < 0) {
527 printk("moxa_close: bad serial port count, device=%s\n",
528 tty->name);
529 ch->count = 0;
530 }
531 if (ch->count) {
532 return;
533 }
534 ch->asyncflags |= ASYNC_CLOSING;
535
536 ch->cflag = tty->termios->c_cflag;
537 if (ch->asyncflags & ASYNC_INITIALIZED) {
538 setup_empty_event(tty);
539 tty_wait_until_sent(tty, 30 * HZ); /* 30 seconds timeout */
8f8ecbad 540 del_timer_sync(&moxa_ports[ch->port].emptyTimer);
1da177e4
LT
541 }
542 shut_down(ch);
543 MoxaPortFlushData(port, 2);
544
545 if (tty->driver->flush_buffer)
546 tty->driver->flush_buffer(tty);
547 tty_ldisc_flush(tty);
548
549 tty->closing = 0;
550 ch->event = 0;
551 ch->tty = NULL;
552 if (ch->blocked_open) {
553 if (ch->close_delay) {
554 msleep_interruptible(jiffies_to_msecs(ch->close_delay));
555 }
556 wake_up_interruptible(&ch->open_wait);
557 }
558 ch->asyncflags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
559 wake_up_interruptible(&ch->close_wait);
560}
561
562static int moxa_write(struct tty_struct *tty,
563 const unsigned char *buf, int count)
564{
8f8ecbad 565 struct moxa_port *ch;
1da177e4
LT
566 int len, port;
567 unsigned long flags;
568
8f8ecbad 569 ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
570 if (ch == NULL)
571 return (0);
572 port = ch->port;
33f0f88f
AC
573
574 spin_lock_irqsave(&moxa_lock, flags);
1da177e4 575 len = MoxaPortWriteData(port, (unsigned char *) buf, count);
33f0f88f 576 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4
LT
577
578 /*********************************************
579 if ( !(ch->statusflags & LOWWAIT) &&
580 ((len != count) || (MoxaPortTxFree(port) <= 100)) )
581 ************************************************/
582 ch->statusflags |= LOWWAIT;
583 return (len);
584}
585
586static int moxa_write_room(struct tty_struct *tty)
587{
8f8ecbad 588 struct moxa_port *ch;
1da177e4
LT
589
590 if (tty->stopped)
591 return (0);
8f8ecbad 592 ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
593 if (ch == NULL)
594 return (0);
595 return (MoxaPortTxFree(ch->port));
596}
597
598static void moxa_flush_buffer(struct tty_struct *tty)
599{
8f8ecbad 600 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
601
602 if (ch == NULL)
603 return;
604 MoxaPortFlushData(ch->port, 1);
605 tty_wakeup(tty);
606}
607
608static int moxa_chars_in_buffer(struct tty_struct *tty)
609{
610 int chars;
8f8ecbad 611 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
612
613 /*
614 * Sigh...I have to check if driver_data is NULL here, because
615 * if an open() fails, the TTY subsystem eventually calls
616 * tty_wait_until_sent(), which calls the driver's chars_in_buffer()
617 * routine. And since the open() failed, we return 0 here. TDJ
618 */
619 if (ch == NULL)
620 return (0);
621 chars = MoxaPortTxQueue(ch->port);
622 if (chars) {
623 /*
624 * Make it possible to wakeup anything waiting for output
625 * in tty_ioctl.c, etc.
626 */
627 if (!(ch->statusflags & EMPTYWAIT))
628 setup_empty_event(tty);
629 }
630 return (chars);
631}
632
633static void moxa_flush_chars(struct tty_struct *tty)
634{
635 /*
636 * Don't think I need this, because this is called to empty the TX
637 * buffer for the 16450, 16550, etc.
638 */
639}
640
641static void moxa_put_char(struct tty_struct *tty, unsigned char c)
642{
8f8ecbad 643 struct moxa_port *ch;
1da177e4
LT
644 int port;
645 unsigned long flags;
646
8f8ecbad 647 ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
648 if (ch == NULL)
649 return;
650 port = ch->port;
33f0f88f 651 spin_lock_irqsave(&moxa_lock, flags);
f204d267 652 MoxaPortWriteData(port, &c, 1);
33f0f88f 653 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4
LT
654 /************************************************
655 if ( !(ch->statusflags & LOWWAIT) && (MoxaPortTxFree(port) <= 100) )
656 *************************************************/
657 ch->statusflags |= LOWWAIT;
658}
659
660static int moxa_tiocmget(struct tty_struct *tty, struct file *file)
661{
8f8ecbad 662 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
663 int port;
664 int flag = 0, dtr, rts;
665
11324edd 666 port = tty->index;
1da177e4
LT
667 if ((port != MAX_PORTS) && (!ch))
668 return (-EINVAL);
669
670 MoxaPortGetLineOut(ch->port, &dtr, &rts);
671 if (dtr)
672 flag |= TIOCM_DTR;
673 if (rts)
674 flag |= TIOCM_RTS;
675 dtr = MoxaPortLineStatus(ch->port);
676 if (dtr & 1)
677 flag |= TIOCM_CTS;
678 if (dtr & 2)
679 flag |= TIOCM_DSR;
680 if (dtr & 4)
681 flag |= TIOCM_CD;
682 return flag;
683}
684
685static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
686 unsigned int set, unsigned int clear)
687{
8f8ecbad 688 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
689 int port;
690 int dtr, rts;
691
11324edd 692 port = tty->index;
1da177e4
LT
693 if ((port != MAX_PORTS) && (!ch))
694 return (-EINVAL);
695
696 MoxaPortGetLineOut(ch->port, &dtr, &rts);
697 if (set & TIOCM_RTS)
698 rts = 1;
699 if (set & TIOCM_DTR)
700 dtr = 1;
701 if (clear & TIOCM_RTS)
702 rts = 0;
703 if (clear & TIOCM_DTR)
704 dtr = 0;
705 MoxaPortLineCtrl(ch->port, dtr, rts);
706 return 0;
707}
708
709static int moxa_ioctl(struct tty_struct *tty, struct file *file,
710 unsigned int cmd, unsigned long arg)
711{
8f8ecbad 712 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
713 register int port;
714 void __user *argp = (void __user *)arg;
715 int retval;
716
11324edd 717 port = tty->index;
1da177e4
LT
718 if ((port != MAX_PORTS) && (!ch))
719 return (-EINVAL);
720
721 switch (cmd) {
722 case TCSBRK: /* SVID version: non-zero arg --> no break */
723 retval = tty_check_change(tty);
724 if (retval)
725 return (retval);
726 setup_empty_event(tty);
727 tty_wait_until_sent(tty, 0);
728 if (!arg)
729 MoxaPortSendBreak(ch->port, 0);
730 return (0);
731 case TCSBRKP: /* support for POSIX tcsendbreak() */
732 retval = tty_check_change(tty);
733 if (retval)
734 return (retval);
735 setup_empty_event(tty);
736 tty_wait_until_sent(tty, 0);
737 MoxaPortSendBreak(ch->port, arg);
738 return (0);
739 case TIOCGSOFTCAR:
740 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *) argp);
741 case TIOCSSOFTCAR:
742 if(get_user(retval, (unsigned long __user *) argp))
743 return -EFAULT;
744 arg = retval;
745 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) |
746 (arg ? CLOCAL : 0));
747 if (C_CLOCAL(tty))
748 ch->asyncflags &= ~ASYNC_CHECK_CD;
749 else
750 ch->asyncflags |= ASYNC_CHECK_CD;
751 return (0);
752 case TIOCGSERIAL:
753 return moxa_get_serial_info(ch, argp);
754
755 case TIOCSSERIAL:
756 return moxa_set_serial_info(ch, argp);
757 default:
758 retval = MoxaDriverIoctl(cmd, arg, port);
759 }
760 return (retval);
761}
762
763static void moxa_throttle(struct tty_struct *tty)
764{
8f8ecbad 765 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
766
767 ch->statusflags |= THROTTLE;
768}
769
770static void moxa_unthrottle(struct tty_struct *tty)
771{
8f8ecbad 772 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
773
774 ch->statusflags &= ~THROTTLE;
775}
776
777static void moxa_set_termios(struct tty_struct *tty,
606d099c 778 struct ktermios *old_termios)
1da177e4 779{
8f8ecbad 780 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
781
782 if (ch == NULL)
783 return;
784 set_tty_param(tty);
785 if (!(old_termios->c_cflag & CLOCAL) &&
786 (tty->termios->c_cflag & CLOCAL))
787 wake_up_interruptible(&ch->open_wait);
788}
789
790static void moxa_stop(struct tty_struct *tty)
791{
8f8ecbad 792 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
793
794 if (ch == NULL)
795 return;
796 MoxaPortTxDisable(ch->port);
797 ch->statusflags |= TXSTOPPED;
798}
799
800
801static void moxa_start(struct tty_struct *tty)
802{
8f8ecbad 803 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
804
805 if (ch == NULL)
806 return;
807
808 if (!(ch->statusflags & TXSTOPPED))
809 return;
810
811 MoxaPortTxEnable(ch->port);
812 ch->statusflags &= ~TXSTOPPED;
813}
814
815static void moxa_hangup(struct tty_struct *tty)
816{
8f8ecbad 817 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
818
819 moxa_flush_buffer(tty);
820 shut_down(ch);
821 ch->event = 0;
822 ch->count = 0;
823 ch->asyncflags &= ~ASYNC_NORMAL_ACTIVE;
824 ch->tty = NULL;
825 wake_up_interruptible(&ch->open_wait);
826}
827
828static void moxa_poll(unsigned long ignored)
829{
830 register int card;
8f8ecbad 831 struct moxa_port *ch;
1da177e4
LT
832 struct tty_struct *tp;
833 int i, ports;
834
1da177e4
LT
835 del_timer(&moxaTimer);
836
837 if (MoxaDriverPoll() < 0) {
aa7e5221 838 mod_timer(&moxaTimer, jiffies + HZ / 50);
1da177e4
LT
839 return;
840 }
841 for (card = 0; card < MAX_BOARDS; card++) {
842 if ((ports = MoxaPortsOfCard(card)) <= 0)
843 continue;
8f8ecbad 844 ch = &moxa_ports[card * MAX_PORTS_PER_BOARD];
1da177e4
LT
845 for (i = 0; i < ports; i++, ch++) {
846 if ((ch->asyncflags & ASYNC_INITIALIZED) == 0)
847 continue;
848 if (!(ch->statusflags & THROTTLE) &&
849 (MoxaPortRxQueue(ch->port) > 0))
850 receive_data(ch);
851 if ((tp = ch->tty) == 0)
852 continue;
853 if (ch->statusflags & LOWWAIT) {
854 if (MoxaPortTxQueue(ch->port) <= WAKEUP_CHARS) {
855 if (!tp->stopped) {
856 ch->statusflags &= ~LOWWAIT;
857 tty_wakeup(tp);
858 }
859 }
860 }
861 if (!I_IGNBRK(tp) && (MoxaPortResetBrkCnt(ch->port) > 0)) {
862 tty_insert_flip_char(tp, 0, TTY_BREAK);
863 tty_schedule_flip(tp);
864 }
865 if (MoxaPortDCDChange(ch->port)) {
866 if (ch->asyncflags & ASYNC_CHECK_CD) {
867 if (MoxaPortDCDON(ch->port))
868 wake_up_interruptible(&ch->open_wait);
869 else {
ba196df3
JS
870 tty_hangup(tp);
871 wake_up_interruptible(&ch->open_wait);
872 ch->asyncflags &= ~ASYNC_NORMAL_ACTIVE;
1da177e4
LT
873 }
874 }
875 }
876 }
877 }
878
aa7e5221 879 mod_timer(&moxaTimer, jiffies + HZ / 50);
1da177e4
LT
880}
881
882/******************************************************************************/
883
884static void set_tty_param(struct tty_struct *tty)
885{
606d099c 886 register struct ktermios *ts;
8f8ecbad 887 struct moxa_port *ch;
1da177e4
LT
888 int rts, cts, txflow, rxflow, xany;
889
8f8ecbad 890 ch = (struct moxa_port *) tty->driver_data;
1da177e4
LT
891 ts = tty->termios;
892 if (ts->c_cflag & CLOCAL)
893 ch->asyncflags &= ~ASYNC_CHECK_CD;
894 else
895 ch->asyncflags |= ASYNC_CHECK_CD;
896 rts = cts = txflow = rxflow = xany = 0;
897 if (ts->c_cflag & CRTSCTS)
898 rts = cts = 1;
899 if (ts->c_iflag & IXON)
900 txflow = 1;
901 if (ts->c_iflag & IXOFF)
902 rxflow = 1;
903 if (ts->c_iflag & IXANY)
904 xany = 1;
905 MoxaPortFlowCtrl(ch->port, rts, cts, txflow, rxflow, xany);
c7bce309 906 MoxaPortSetTermio(ch->port, ts, tty_get_baud_rate(tty));
1da177e4
LT
907}
908
909static int block_till_ready(struct tty_struct *tty, struct file *filp,
8f8ecbad 910 struct moxa_port *ch)
1da177e4
LT
911{
912 DECLARE_WAITQUEUE(wait,current);
913 unsigned long flags;
914 int retval;
915 int do_clocal = C_CLOCAL(tty);
916
917 /*
918 * If the device is in the middle of being closed, then block
919 * until it's done, and then try again.
920 */
921 if (tty_hung_up_p(filp) || (ch->asyncflags & ASYNC_CLOSING)) {
922 if (ch->asyncflags & ASYNC_CLOSING)
923 interruptible_sleep_on(&ch->close_wait);
924#ifdef SERIAL_DO_RESTART
925 if (ch->asyncflags & ASYNC_HUP_NOTIFY)
926 return (-EAGAIN);
927 else
928 return (-ERESTARTSYS);
929#else
930 return (-EAGAIN);
931#endif
932 }
933 /*
934 * If non-blocking mode is set, then make the check up front
935 * and then exit.
936 */
937 if (filp->f_flags & O_NONBLOCK) {
938 ch->asyncflags |= ASYNC_NORMAL_ACTIVE;
939 return (0);
940 }
941 /*
942 * Block waiting for the carrier detect and the line to become free
943 */
944 retval = 0;
945 add_wait_queue(&ch->open_wait, &wait);
946#ifdef SERIAL_DEBUG_OPEN
947 printk("block_til_ready before block: ttys%d, count = %d\n",
948 ch->line, ch->count);
949#endif
33f0f88f 950 spin_lock_irqsave(&moxa_lock, flags);
1da177e4
LT
951 if (!tty_hung_up_p(filp))
952 ch->count--;
1da177e4 953 ch->blocked_open++;
33f0f88f
AC
954 spin_unlock_irqrestore(&moxa_lock, flags);
955
1da177e4
LT
956 while (1) {
957 set_current_state(TASK_INTERRUPTIBLE);
958 if (tty_hung_up_p(filp) ||
959 !(ch->asyncflags & ASYNC_INITIALIZED)) {
960#ifdef SERIAL_DO_RESTART
961 if (ch->asyncflags & ASYNC_HUP_NOTIFY)
962 retval = -EAGAIN;
963 else
964 retval = -ERESTARTSYS;
965#else
966 retval = -EAGAIN;
967#endif
968 break;
969 }
970 if (!(ch->asyncflags & ASYNC_CLOSING) && (do_clocal ||
971 MoxaPortDCDON(ch->port)))
972 break;
973
974 if (signal_pending(current)) {
975 retval = -ERESTARTSYS;
976 break;
977 }
978 schedule();
979 }
980 set_current_state(TASK_RUNNING);
981 remove_wait_queue(&ch->open_wait, &wait);
33f0f88f
AC
982
983 spin_lock_irqsave(&moxa_lock, flags);
1da177e4
LT
984 if (!tty_hung_up_p(filp))
985 ch->count++;
986 ch->blocked_open--;
33f0f88f 987 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4
LT
988#ifdef SERIAL_DEBUG_OPEN
989 printk("block_til_ready after blocking: ttys%d, count = %d\n",
990 ch->line, ch->count);
991#endif
992 if (retval)
993 return (retval);
33f0f88f 994 /* FIXME: review to see if we need to use set_bit on these */
1da177e4 995 ch->asyncflags |= ASYNC_NORMAL_ACTIVE;
33f0f88f 996 return 0;
1da177e4
LT
997}
998
999static void setup_empty_event(struct tty_struct *tty)
1000{
8f8ecbad 1001 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1002 unsigned long flags;
1003
33f0f88f 1004 spin_lock_irqsave(&moxa_lock, flags);
1da177e4 1005 ch->statusflags |= EMPTYWAIT;
8f8ecbad 1006 mod_timer(&moxa_ports[ch->port].emptyTimer, jiffies + HZ);
33f0f88f 1007 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4
LT
1008}
1009
1010static void check_xmit_empty(unsigned long data)
1011{
8f8ecbad 1012 struct moxa_port *ch;
1da177e4 1013
8f8ecbad
JS
1014 ch = (struct moxa_port *) data;
1015 del_timer_sync(&moxa_ports[ch->port].emptyTimer);
1da177e4
LT
1016 if (ch->tty && (ch->statusflags & EMPTYWAIT)) {
1017 if (MoxaPortTxQueue(ch->port) == 0) {
1018 ch->statusflags &= ~EMPTYWAIT;
1019 tty_wakeup(ch->tty);
1020 return;
1021 }
8f8ecbad 1022 mod_timer(&moxa_ports[ch->port].emptyTimer, jiffies + HZ);
1da177e4
LT
1023 } else
1024 ch->statusflags &= ~EMPTYWAIT;
1025}
1026
8f8ecbad 1027static void shut_down(struct moxa_port *ch)
1da177e4
LT
1028{
1029 struct tty_struct *tp;
1030
1031 if (!(ch->asyncflags & ASYNC_INITIALIZED))
1032 return;
1033
1034 tp = ch->tty;
1035
1036 MoxaPortDisable(ch->port);
1037
1038 /*
1039 * If we're a modem control device and HUPCL is on, drop RTS & DTR.
1040 */
1041 if (tp->termios->c_cflag & HUPCL)
1042 MoxaPortLineCtrl(ch->port, 0, 0);
1043
1044 ch->asyncflags &= ~ASYNC_INITIALIZED;
1045}
1046
8f8ecbad 1047static void receive_data(struct moxa_port *ch)
1da177e4
LT
1048{
1049 struct tty_struct *tp;
606d099c 1050 struct ktermios *ts;
1da177e4
LT
1051 unsigned long flags;
1052
1053 ts = NULL;
1054 tp = ch->tty;
1055 if (tp)
1056 ts = tp->termios;
1057 /**************************************************
1058 if ( !tp || !ts || !(ts->c_cflag & CREAD) ) {
1059 *****************************************************/
1060 if (!tp || !ts) {
1061 MoxaPortFlushData(ch->port, 0);
1062 return;
1063 }
33f0f88f
AC
1064 spin_lock_irqsave(&moxa_lock, flags);
1065 MoxaPortReadData(ch->port, tp);
1066 spin_unlock_irqrestore(&moxa_lock, flags);
1067 tty_schedule_flip(tp);
1da177e4
LT
1068}
1069
1070#define Magic_code 0x404
1071
1072/*
1073 * System Configuration
1074 */
1075/*
1076 * for C218 BIOS initialization
1077 */
1078#define C218_ConfBase 0x800
1079#define C218_status (C218_ConfBase + 0) /* BIOS running status */
1080#define C218_diag (C218_ConfBase + 2) /* diagnostic status */
1081#define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */
1082#define C218DLoad_len (C218_ConfBase + 6) /* WORD */
1083#define C218check_sum (C218_ConfBase + 8) /* BYTE */
1084#define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */
1085#define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */
1086#define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */
1087#define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */
1088#define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */
1089
1090#define C218_LoadBuf 0x0F00
1091#define C218_KeyCode 0x218
1092#define CP204J_KeyCode 0x204
1093
1094/*
1095 * for C320 BIOS initialization
1096 */
1097#define C320_ConfBase 0x800
1098#define C320_LoadBuf 0x0f00
1099#define STS_init 0x05 /* for C320_status */
1100
1101#define C320_status C320_ConfBase + 0 /* BIOS running status */
1102#define C320_diag C320_ConfBase + 2 /* diagnostic status */
1103#define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */
1104#define C320DLoad_len C320_ConfBase + 6 /* WORD */
1105#define C320check_sum C320_ConfBase + 8 /* WORD */
1106#define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */
1107#define C320bapi_len C320_ConfBase + 0x0c /* WORD */
1108#define C320UART_no C320_ConfBase + 0x0e /* WORD */
1109
1110#define C320_KeyCode 0x320
1111
1112#define FixPage_addr 0x0000 /* starting addr of static page */
1113#define DynPage_addr 0x2000 /* starting addr of dynamic page */
1114#define C218_start 0x3000 /* starting addr of C218 BIOS prg */
1115#define Control_reg 0x1ff0 /* select page and reset control */
1116#define HW_reset 0x80
1117
1118/*
1119 * Function Codes
1120 */
1121#define FC_CardReset 0x80
1122#define FC_ChannelReset 1 /* C320 firmware not supported */
1123#define FC_EnableCH 2
1124#define FC_DisableCH 3
1125#define FC_SetParam 4
1126#define FC_SetMode 5
1127#define FC_SetRate 6
1128#define FC_LineControl 7
1129#define FC_LineStatus 8
1130#define FC_XmitControl 9
1131#define FC_FlushQueue 10
1132#define FC_SendBreak 11
1133#define FC_StopBreak 12
1134#define FC_LoopbackON 13
1135#define FC_LoopbackOFF 14
1136#define FC_ClrIrqTable 15
1137#define FC_SendXon 16
1138#define FC_SetTermIrq 17 /* C320 firmware not supported */
1139#define FC_SetCntIrq 18 /* C320 firmware not supported */
1140#define FC_SetBreakIrq 19
1141#define FC_SetLineIrq 20
1142#define FC_SetFlowCtl 21
1143#define FC_GenIrq 22
1144#define FC_InCD180 23
1145#define FC_OutCD180 24
1146#define FC_InUARTreg 23
1147#define FC_OutUARTreg 24
1148#define FC_SetXonXoff 25
1149#define FC_OutCD180CCR 26
1150#define FC_ExtIQueue 27
1151#define FC_ExtOQueue 28
1152#define FC_ClrLineIrq 29
1153#define FC_HWFlowCtl 30
1154#define FC_GetClockRate 35
1155#define FC_SetBaud 36
1156#define FC_SetDataMode 41
1157#define FC_GetCCSR 43
1158#define FC_GetDataError 45
1159#define FC_RxControl 50
1160#define FC_ImmSend 51
1161#define FC_SetXonState 52
1162#define FC_SetXoffState 53
1163#define FC_SetRxFIFOTrig 54
1164#define FC_SetTxFIFOCnt 55
1165#define FC_UnixRate 56
1166#define FC_UnixResetTimer 57
1167
1168#define RxFIFOTrig1 0
1169#define RxFIFOTrig4 1
1170#define RxFIFOTrig8 2
1171#define RxFIFOTrig14 3
1172
1173/*
1174 * Dual-Ported RAM
1175 */
1176#define DRAM_global 0
1177#define INT_data (DRAM_global + 0)
1178#define Config_base (DRAM_global + 0x108)
1179
1180#define IRQindex (INT_data + 0)
1181#define IRQpending (INT_data + 4)
1182#define IRQtable (INT_data + 8)
1183
1184/*
1185 * Interrupt Status
1186 */
1187#define IntrRx 0x01 /* receiver data O.K. */
1188#define IntrTx 0x02 /* transmit buffer empty */
1189#define IntrFunc 0x04 /* function complete */
1190#define IntrBreak 0x08 /* received break */
1191#define IntrLine 0x10 /* line status change
1192 for transmitter */
1193#define IntrIntr 0x20 /* received INTR code */
1194#define IntrQuit 0x40 /* received QUIT code */
1195#define IntrEOF 0x80 /* received EOF code */
1196
1197#define IntrRxTrigger 0x100 /* rx data count reach tigger value */
1198#define IntrTxTrigger 0x200 /* tx data count below trigger value */
1199
1200#define Magic_no (Config_base + 0)
1201#define Card_model_no (Config_base + 2)
1202#define Total_ports (Config_base + 4)
1203#define Module_cnt (Config_base + 8)
1204#define Module_no (Config_base + 10)
1205#define Timer_10ms (Config_base + 14)
1206#define Disable_IRQ (Config_base + 20)
1207#define TMS320_PORT1 (Config_base + 22)
1208#define TMS320_PORT2 (Config_base + 24)
1209#define TMS320_CLOCK (Config_base + 26)
1210
1211/*
1212 * DATA BUFFER in DRAM
1213 */
1214#define Extern_table 0x400 /* Base address of the external table
1215 (24 words * 64) total 3K bytes
1216 (24 words * 128) total 6K bytes */
1217#define Extern_size 0x60 /* 96 bytes */
1218#define RXrptr 0x00 /* read pointer for RX buffer */
1219#define RXwptr 0x02 /* write pointer for RX buffer */
1220#define TXrptr 0x04 /* read pointer for TX buffer */
1221#define TXwptr 0x06 /* write pointer for TX buffer */
1222#define HostStat 0x08 /* IRQ flag and general flag */
1223#define FlagStat 0x0A
1224#define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */
1225 /* x x x x | | | | */
1226 /* | | | + CTS flow */
1227 /* | | +--- RTS flow */
1228 /* | +------ TX Xon/Xoff */
1229 /* +--------- RX Xon/Xoff */
1230#define Break_cnt 0x0E /* received break count */
1231#define CD180TXirq 0x10 /* if non-0: enable TX irq */
1232#define RX_mask 0x12
1233#define TX_mask 0x14
1234#define Ofs_rxb 0x16
1235#define Ofs_txb 0x18
1236#define Page_rxb 0x1A
1237#define Page_txb 0x1C
1238#define EndPage_rxb 0x1E
1239#define EndPage_txb 0x20
1240#define Data_error 0x22
1241#define RxTrigger 0x28
1242#define TxTrigger 0x2a
1243
1244#define rRXwptr 0x34
1245#define Low_water 0x36
1246
1247#define FuncCode 0x40
1248#define FuncArg 0x42
1249#define FuncArg1 0x44
1250
1251#define C218rx_size 0x2000 /* 8K bytes */
1252#define C218tx_size 0x8000 /* 32K bytes */
1253
1254#define C218rx_mask (C218rx_size - 1)
1255#define C218tx_mask (C218tx_size - 1)
1256
1257#define C320p8rx_size 0x2000
1258#define C320p8tx_size 0x8000
1259#define C320p8rx_mask (C320p8rx_size - 1)
1260#define C320p8tx_mask (C320p8tx_size - 1)
1261
1262#define C320p16rx_size 0x2000
1263#define C320p16tx_size 0x4000
1264#define C320p16rx_mask (C320p16rx_size - 1)
1265#define C320p16tx_mask (C320p16tx_size - 1)
1266
1267#define C320p24rx_size 0x2000
1268#define C320p24tx_size 0x2000
1269#define C320p24rx_mask (C320p24rx_size - 1)
1270#define C320p24tx_mask (C320p24tx_size - 1)
1271
1272#define C320p32rx_size 0x1000
1273#define C320p32tx_size 0x1000
1274#define C320p32rx_mask (C320p32rx_size - 1)
1275#define C320p32tx_mask (C320p32tx_size - 1)
1276
1277#define Page_size 0x2000
1278#define Page_mask (Page_size - 1)
1279#define C218rx_spage 3
1280#define C218tx_spage 4
1281#define C218rx_pageno 1
1282#define C218tx_pageno 4
1283#define C218buf_pageno 5
1284
1285#define C320p8rx_spage 3
1286#define C320p8tx_spage 4
1287#define C320p8rx_pgno 1
1288#define C320p8tx_pgno 4
1289#define C320p8buf_pgno 5
1290
1291#define C320p16rx_spage 3
1292#define C320p16tx_spage 4
1293#define C320p16rx_pgno 1
1294#define C320p16tx_pgno 2
1295#define C320p16buf_pgno 3
1296
1297#define C320p24rx_spage 3
1298#define C320p24tx_spage 4
1299#define C320p24rx_pgno 1
1300#define C320p24tx_pgno 1
1301#define C320p24buf_pgno 2
1302
1303#define C320p32rx_spage 3
1304#define C320p32tx_ofs C320p32rx_size
1305#define C320p32tx_spage 3
1306#define C320p32buf_pgno 1
1307
1308/*
1309 * Host Status
1310 */
1311#define WakeupRx 0x01
1312#define WakeupTx 0x02
1313#define WakeupBreak 0x08
1314#define WakeupLine 0x10
1315#define WakeupIntr 0x20
1316#define WakeupQuit 0x40
1317#define WakeupEOF 0x80 /* used in VTIME control */
1318#define WakeupRxTrigger 0x100
1319#define WakeupTxTrigger 0x200
1320/*
1321 * Flag status
1322 */
1323#define Rx_over 0x01
1324#define Xoff_state 0x02
1325#define Tx_flowOff 0x04
1326#define Tx_enable 0x08
1327#define CTS_state 0x10
1328#define DSR_state 0x20
1329#define DCD_state 0x80
1330/*
1331 * FlowControl
1332 */
1333#define CTS_FlowCtl 1
1334#define RTS_FlowCtl 2
1335#define Tx_FlowCtl 4
1336#define Rx_FlowCtl 8
1337#define IXM_IXANY 0x10
1338
1339#define LowWater 128
1340
1341#define DTR_ON 1
1342#define RTS_ON 2
1343#define CTS_ON 1
1344#define DSR_ON 2
1345#define DCD_ON 8
1346
1347/* mode definition */
1348#define MX_CS8 0x03
1349#define MX_CS7 0x02
1350#define MX_CS6 0x01
1351#define MX_CS5 0x00
1352
1353#define MX_STOP1 0x00
1354#define MX_STOP15 0x04
1355#define MX_STOP2 0x08
1356
1357#define MX_PARNONE 0x00
1358#define MX_PAREVEN 0x40
1359#define MX_PARODD 0xC0
1360
1361/*
1362 * Query
1363 */
1da177e4
LT
1364
1365struct mon_str {
1366 int tick;
1367 int rxcnt[MAX_PORTS];
1368 int txcnt[MAX_PORTS];
1369};
1da177e4
LT
1370
1371#define DCD_changed 0x01
1372#define DCD_oldstate 0x80
1373
1374static unsigned char moxaBuff[10240];
1da177e4
LT
1375static int moxaLowWaterChk;
1376static int moxaCard;
9dff89cd 1377static struct mon_str moxaLog;
9fa372a8 1378static int moxaFuncTout = HZ / 2;
1da177e4
LT
1379
1380static void moxadelay(int);
1381static void moxafunc(void __iomem *, int, ushort);
1382static void wait_finish(void __iomem *);
1383static void low_water_check(void __iomem *);
1384static int moxaloadbios(int, unsigned char __user *, int);
1385static int moxafindcard(int);
1386static int moxaload320b(int, unsigned char __user *, int);
1387static int moxaloadcode(int, unsigned char __user *, int);
1388static int moxaloadc218(int, void __iomem *, int);
1389static int moxaloadc320(int, void __iomem *, int, int *);
1390
1391/*****************************************************************************
1392 * Driver level functions: *
1393 * 1. MoxaDriverInit(void); *
1394 * 2. MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port); *
1395 * 3. MoxaDriverPoll(void); *
1396 *****************************************************************************/
1397void MoxaDriverInit(void)
1398{
8f8ecbad
JS
1399 struct moxa_port *p;
1400 unsigned int i;
1da177e4
LT
1401
1402 moxaFuncTout = HZ / 2; /* 500 mini-seconds */
1403 moxaCard = 0;
1404 moxaLog.tick = 0;
1405 moxaLowWaterChk = 0;
1406 for (i = 0; i < MAX_PORTS; i++) {
8f8ecbad
JS
1407 p = &moxa_ports[i];
1408 p->chkPort = 0;
1409 p->lowChkFlag = 0;
1410 p->lineCtrl = 0;
1da177e4
LT
1411 moxaLog.rxcnt[i] = 0;
1412 moxaLog.txcnt[i] = 0;
1413 }
1414}
1415
1416#define MOXA 0x400
1417#define MOXA_GET_IQUEUE (MOXA + 1) /* get input buffered count */
1418#define MOXA_GET_OQUEUE (MOXA + 2) /* get output buffered count */
1419#define MOXA_INIT_DRIVER (MOXA + 6) /* moxaCard=0 */
1420#define MOXA_LOAD_BIOS (MOXA + 9) /* download BIOS */
1421#define MOXA_FIND_BOARD (MOXA + 10) /* Check if MOXA card exist? */
1422#define MOXA_LOAD_C320B (MOXA + 11) /* download 320B firmware */
1423#define MOXA_LOAD_CODE (MOXA + 12) /* download firmware */
1424#define MOXA_GETDATACOUNT (MOXA + 23)
1425#define MOXA_GET_IOQUEUE (MOXA + 27)
1426#define MOXA_FLUSH_QUEUE (MOXA + 28)
1427#define MOXA_GET_CONF (MOXA + 35) /* configuration */
1428#define MOXA_GET_MAJOR (MOXA + 63)
1429#define MOXA_GET_CUMAJOR (MOXA + 64)
1430#define MOXA_GETMSTATUS (MOXA + 65)
1431
1da177e4
LT
1432struct dl_str {
1433 char __user *buf;
1434 int len;
1435 int cardno;
1436};
1437
1da177e4
LT
1438static struct dl_str dltmp;
1439
1440void MoxaPortFlushData(int port, int mode)
1441{
1442 void __iomem *ofsAddr;
1443 if ((mode < 0) || (mode > 2))
1444 return;
8f8ecbad 1445 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
1446 moxafunc(ofsAddr, FC_FlushQueue, mode);
1447 if (mode != 1) {
8f8ecbad 1448 moxa_ports[port].lowChkFlag = 0;
1da177e4
LT
1449 low_water_check(ofsAddr);
1450 }
1451}
1452
1453int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port)
1454{
1455 int i;
1456 int status;
1457 int MoxaPortTxQueue(int), MoxaPortRxQueue(int);
1458 void __user *argp = (void __user *)arg;
1459
11324edd 1460 if (port == MAX_PORTS) {
1da177e4
LT
1461 if ((cmd != MOXA_GET_CONF) && (cmd != MOXA_INIT_DRIVER) &&
1462 (cmd != MOXA_LOAD_BIOS) && (cmd != MOXA_FIND_BOARD) && (cmd != MOXA_LOAD_C320B) &&
1463 (cmd != MOXA_LOAD_CODE) && (cmd != MOXA_GETDATACOUNT) &&
1464 (cmd != MOXA_GET_IOQUEUE) && (cmd != MOXA_GET_MAJOR) &&
1465 (cmd != MOXA_GET_CUMAJOR) && (cmd != MOXA_GETMSTATUS))
1466 return (-EINVAL);
1467 }
1468 switch (cmd) {
1469 case MOXA_GET_CONF:
9dff89cd
JS
1470 if(copy_to_user(argp, &moxa_boards, MAX_BOARDS *
1471 sizeof(struct moxa_board_conf)))
1da177e4
LT
1472 return -EFAULT;
1473 return (0);
1474 case MOXA_INIT_DRIVER:
1475 if ((int) arg == 0x404)
1476 MoxaDriverInit();
1477 return (0);
1478 case MOXA_GETDATACOUNT:
1479 moxaLog.tick = jiffies;
9dff89cd 1480 if(copy_to_user(argp, &moxaLog, sizeof(struct mon_str)))
1da177e4
LT
1481 return -EFAULT;
1482 return (0);
1483 case MOXA_FLUSH_QUEUE:
1484 MoxaPortFlushData(port, arg);
1485 return (0);
8f8ecbad
JS
1486 case MOXA_GET_IOQUEUE: {
1487 struct moxaq_str __user *argm = argp;
181d6f4f 1488 struct moxaq_str tmp;
8f8ecbad
JS
1489
1490 for (i = 0; i < MAX_PORTS; i++, argm++) {
181d6f4f
JS
1491 memset(&tmp, 0, sizeof(tmp));
1492 if (moxa_ports[i].chkPort) {
1493 tmp.inq = MoxaPortRxQueue(i);
1494 tmp.outq = MoxaPortTxQueue(i);
1da177e4 1495 }
181d6f4f 1496 if (copy_to_user(argm, &tmp, sizeof(tmp)))
8f8ecbad 1497 return -EFAULT;
1da177e4 1498 }
1da177e4 1499 return (0);
8f8ecbad 1500 } case MOXA_GET_OQUEUE:
1da177e4
LT
1501 i = MoxaPortTxQueue(port);
1502 return put_user(i, (unsigned long __user *)argp);
1503 case MOXA_GET_IQUEUE:
1504 i = MoxaPortRxQueue(port);
1505 return put_user(i, (unsigned long __user *)argp);
1506 case MOXA_GET_MAJOR:
1507 if(copy_to_user(argp, &ttymajor, sizeof(int)))
1508 return -EFAULT;
1509 return 0;
1510 case MOXA_GET_CUMAJOR:
1511 i = 0;
1512 if(copy_to_user(argp, &i, sizeof(int)))
1513 return -EFAULT;
1514 return 0;
8f8ecbad
JS
1515 case MOXA_GETMSTATUS: {
1516 struct mxser_mstatus __user *argm = argp;
181d6f4f 1517 struct mxser_mstatus tmp;
8f8ecbad
JS
1518 struct moxa_port *p;
1519
1520 for (i = 0; i < MAX_PORTS; i++, argm++) {
1521 p = &moxa_ports[i];
181d6f4f 1522 memset(&tmp, 0, sizeof(tmp));
8f8ecbad
JS
1523 if (!p->chkPort) {
1524 goto copy;
1da177e4 1525 } else {
8f8ecbad 1526 status = MoxaPortLineStatus(p->port);
1da177e4 1527 if (status & 1)
181d6f4f 1528 tmp.cts = 1;
1da177e4 1529 if (status & 2)
181d6f4f 1530 tmp.dsr = 1;
1da177e4 1531 if (status & 4)
181d6f4f 1532 tmp.dcd = 1;
1da177e4
LT
1533 }
1534
8f8ecbad 1535 if (!p->tty || !p->tty->termios)
181d6f4f 1536 tmp.cflag = p->cflag;
1da177e4 1537 else
181d6f4f 1538 tmp.cflag = p->tty->termios->c_cflag;
8f8ecbad 1539copy:
181d6f4f 1540 if (copy_to_user(argm, &tmp, sizeof(tmp)))
8f8ecbad 1541 return -EFAULT;
1da177e4 1542 }
1da177e4 1543 return 0;
8f8ecbad 1544 } default:
1da177e4
LT
1545 return (-ENOIOCTLCMD);
1546 case MOXA_LOAD_BIOS:
1547 case MOXA_FIND_BOARD:
1548 case MOXA_LOAD_C320B:
1549 case MOXA_LOAD_CODE:
49cd619c
AC
1550 if (!capable(CAP_SYS_RAWIO))
1551 return -EPERM;
1da177e4
LT
1552 break;
1553 }
1554
1555 if(copy_from_user(&dltmp, argp, sizeof(struct dl_str)))
1556 return -EFAULT;
1557 if(dltmp.cardno < 0 || dltmp.cardno >= MAX_BOARDS)
1558 return -EINVAL;
1559
1560 switch(cmd)
1561 {
1562 case MOXA_LOAD_BIOS:
1563 i = moxaloadbios(dltmp.cardno, dltmp.buf, dltmp.len);
1564 return (i);
1565 case MOXA_FIND_BOARD:
1566 return moxafindcard(dltmp.cardno);
1567 case MOXA_LOAD_C320B:
1568 moxaload320b(dltmp.cardno, dltmp.buf, dltmp.len);
1569 default: /* to keep gcc happy */
1570 return (0);
1571 case MOXA_LOAD_CODE:
1572 i = moxaloadcode(dltmp.cardno, dltmp.buf, dltmp.len);
1573 if (i == -1)
1574 return (-EFAULT);
1575 return (i);
1576
1577 }
1578}
1579
1580int MoxaDriverPoll(void)
1581{
8f8ecbad 1582 struct moxa_board_conf *brd;
1da177e4
LT
1583 register ushort temp;
1584 register int card;
1585 void __iomem *ofsAddr;
1586 void __iomem *ip;
1587 int port, p, ports;
1588
1589 if (moxaCard == 0)
1590 return (-1);
1591 for (card = 0; card < MAX_BOARDS; card++) {
8f8ecbad
JS
1592 brd = &moxa_boards[card];
1593 if (brd->loadstat == 0)
01cfaf0d 1594 continue;
8f8ecbad 1595 if ((ports = brd->numPorts) == 0)
1da177e4 1596 continue;
8f8ecbad
JS
1597 if (readb(brd->intPend) == 0xff) {
1598 ip = brd->intTable + readb(brd->intNdx);
1da177e4
LT
1599 p = card * MAX_PORTS_PER_BOARD;
1600 ports <<= 1;
1601 for (port = 0; port < ports; port += 2, p++) {
1602 if ((temp = readw(ip + port)) != 0) {
1603 writew(0, ip + port);
8f8ecbad 1604 ofsAddr = moxa_ports[p].tableAddr;
1da177e4
LT
1605 if (temp & IntrTx)
1606 writew(readw(ofsAddr + HostStat) & ~WakeupTx, ofsAddr + HostStat);
1607 if (temp & IntrBreak) {
8f8ecbad 1608 moxa_ports[p].breakCnt++;
1da177e4
LT
1609 }
1610 if (temp & IntrLine) {
1611 if (readb(ofsAddr + FlagStat) & DCD_state) {
8f8ecbad
JS
1612 if ((moxa_ports[p].DCDState & DCD_oldstate) == 0)
1613 moxa_ports[p].DCDState = (DCD_oldstate |
1da177e4
LT
1614 DCD_changed);
1615 } else {
8f8ecbad
JS
1616 if (moxa_ports[p].DCDState & DCD_oldstate)
1617 moxa_ports[p].DCDState = DCD_changed;
1da177e4
LT
1618 }
1619 }
1620 }
1621 }
8f8ecbad 1622 writeb(0, brd->intPend);
1da177e4
LT
1623 }
1624 if (moxaLowWaterChk) {
1625 p = card * MAX_PORTS_PER_BOARD;
1626 for (port = 0; port < ports; port++, p++) {
8f8ecbad
JS
1627 if (moxa_ports[p].lowChkFlag) {
1628 moxa_ports[p].lowChkFlag = 0;
1629 ofsAddr = moxa_ports[p].tableAddr;
1da177e4
LT
1630 low_water_check(ofsAddr);
1631 }
1632 }
1633 }
1634 }
1635 moxaLowWaterChk = 0;
1636 return (0);
1637}
1638
1639/*****************************************************************************
1640 * Card level function: *
1641 * 1. MoxaPortsOfCard(int cardno); *
1642 *****************************************************************************/
1643int MoxaPortsOfCard(int cardno)
1644{
1645
1646 if (moxa_boards[cardno].boardType == 0)
1647 return (0);
1648 return (moxa_boards[cardno].numPorts);
1649}
1650
1651/*****************************************************************************
1652 * Port level functions: *
1653 * 1. MoxaPortIsValid(int port); *
1654 * 2. MoxaPortEnable(int port); *
1655 * 3. MoxaPortDisable(int port); *
1656 * 4. MoxaPortGetMaxBaud(int port); *
1da177e4 1657 * 6. MoxaPortSetBaud(int port, long baud); *
1da177e4
LT
1658 * 8. MoxaPortSetTermio(int port, unsigned char *termio); *
1659 * 9. MoxaPortGetLineOut(int port, int *dtrState, int *rtsState); *
1660 * 10. MoxaPortLineCtrl(int port, int dtrState, int rtsState); *
1661 * 11. MoxaPortFlowCtrl(int port, int rts, int cts, int rx, int tx,int xany); *
1662 * 12. MoxaPortLineStatus(int port); *
1663 * 13. MoxaPortDCDChange(int port); *
1664 * 14. MoxaPortDCDON(int port); *
1665 * 15. MoxaPortFlushData(int port, int mode); *
1666 * 16. MoxaPortWriteData(int port, unsigned char * buffer, int length); *
33f0f88f 1667 * 17. MoxaPortReadData(int port, struct tty_struct *tty); *
1da177e4
LT
1668 * 20. MoxaPortTxQueue(int port); *
1669 * 21. MoxaPortTxFree(int port); *
1670 * 22. MoxaPortRxQueue(int port); *
1da177e4
LT
1671 * 24. MoxaPortTxDisable(int port); *
1672 * 25. MoxaPortTxEnable(int port); *
1da177e4 1673 * 27. MoxaPortResetBrkCnt(int port); *
1da177e4
LT
1674 * 30. MoxaPortSendBreak(int port, int ticks); *
1675 *****************************************************************************/
1676/*
1677 * Moxa Port Number Description:
1678 *
1679 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1680 * the port number using in MOXA driver functions will be 0 to 31 for
1681 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1682 * to 127 for fourth. For example, if you setup three MOXA boards,
1683 * first board is C218, second board is C320-16 and third board is
1684 * C320-32. The port number of first board (C218 - 8 ports) is from
1685 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1686 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1687 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1688 * 127 will be invalid.
1689 *
1690 *
1691 * Moxa Functions Description:
1692 *
1693 * Function 1: Driver initialization routine, this routine must be
1694 * called when initialized driver.
1695 * Syntax:
1696 * void MoxaDriverInit();
1697 *
1698 *
1699 * Function 2: Moxa driver private IOCTL command processing.
1700 * Syntax:
1701 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1702 *
1703 * unsigned int cmd : IOCTL command
1704 * unsigned long arg : IOCTL argument
1705 * int port : port number (0 - 127)
1706 *
1707 * return: 0 (OK)
1708 * -EINVAL
1709 * -ENOIOCTLCMD
1710 *
1711 *
1712 * Function 3: Moxa driver polling process routine.
1713 * Syntax:
1714 * int MoxaDriverPoll(void);
1715 *
1716 * return: 0 ; polling O.K.
1717 * -1 : no any Moxa card.
1718 *
1719 *
1720 * Function 4: Get the ports of this card.
1721 * Syntax:
1722 * int MoxaPortsOfCard(int cardno);
1723 *
1724 * int cardno : card number (0 - 3)
1725 *
1726 * return: 0 : this card is invalid
1727 * 8/16/24/32
1728 *
1729 *
1730 * Function 5: Check this port is valid or invalid
1731 * Syntax:
1732 * int MoxaPortIsValid(int port);
1733 * int port : port number (0 - 127, ref port description)
1734 *
1735 * return: 0 : this port is invalid
1736 * 1 : this port is valid
1737 *
1738 *
1739 * Function 6: Enable this port to start Tx/Rx data.
1740 * Syntax:
1741 * void MoxaPortEnable(int port);
1742 * int port : port number (0 - 127)
1743 *
1744 *
1745 * Function 7: Disable this port
1746 * Syntax:
1747 * void MoxaPortDisable(int port);
1748 * int port : port number (0 - 127)
1749 *
1750 *
1751 * Function 8: Get the maximun available baud rate of this port.
1752 * Syntax:
1753 * long MoxaPortGetMaxBaud(int port);
1754 * int port : port number (0 - 127)
1755 *
1756 * return: 0 : this port is invalid
1757 * 38400/57600/115200 bps
1758 *
1759 *
1da177e4
LT
1760 * Function 10: Setting baud rate of this port.
1761 * Syntax:
1762 * long MoxaPortSetBaud(int port, long baud);
1763 * int port : port number (0 - 127)
1764 * long baud : baud rate (50 - 115200)
1765 *
1766 * return: 0 : this port is invalid or baud < 50
1767 * 50 - 115200 : the real baud rate set to the port, if
1768 * the argument baud is large than maximun
1769 * available baud rate, the real setting
1770 * baud rate will be the maximun baud rate.
1771 *
1772 *
1da177e4
LT
1773 * Function 12: Configure the port.
1774 * Syntax:
606d099c 1775 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1da177e4 1776 * int port : port number (0 - 127)
606d099c 1777 * struct ktermios * termio : termio structure pointer
c7bce309 1778 * speed_t baud : baud rate
1da177e4
LT
1779 *
1780 * return: -1 : this port is invalid or termio == NULL
1781 * 0 : setting O.K.
1782 *
1783 *
1784 * Function 13: Get the DTR/RTS state of this port.
1785 * Syntax:
1786 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1787 * int port : port number (0 - 127)
1788 * int * dtrState : pointer to INT to receive the current DTR
1789 * state. (if NULL, this function will not
1790 * write to this address)
1791 * int * rtsState : pointer to INT to receive the current RTS
1792 * state. (if NULL, this function will not
1793 * write to this address)
1794 *
1795 * return: -1 : this port is invalid
1796 * 0 : O.K.
1797 *
1798 *
1799 * Function 14: Setting the DTR/RTS output state of this port.
1800 * Syntax:
1801 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1802 * int port : port number (0 - 127)
1803 * int dtrState : DTR output state (0: off, 1: on)
1804 * int rtsState : RTS output state (0: off, 1: on)
1805 *
1806 *
1807 * Function 15: Setting the flow control of this port.
1808 * Syntax:
1809 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1810 * int txFlow,int xany);
1811 * int port : port number (0 - 127)
1812 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1813 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1814 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1815 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1816 * int xany : S/W XANY flow control (0: no, 1: yes)
1817 *
1818 *
1819 * Function 16: Get ths line status of this port
1820 * Syntax:
1821 * int MoxaPortLineStatus(int port);
1822 * int port : port number (0 - 127)
1823 *
1824 * return: Bit 0 - CTS state (0: off, 1: on)
1825 * Bit 1 - DSR state (0: off, 1: on)
1826 * Bit 2 - DCD state (0: off, 1: on)
1827 *
1828 *
1829 * Function 17: Check the DCD state has changed since the last read
1830 * of this function.
1831 * Syntax:
1832 * int MoxaPortDCDChange(int port);
1833 * int port : port number (0 - 127)
1834 *
1835 * return: 0 : no changed
1836 * 1 : DCD has changed
1837 *
1838 *
1839 * Function 18: Check ths current DCD state is ON or not.
1840 * Syntax:
1841 * int MoxaPortDCDON(int port);
1842 * int port : port number (0 - 127)
1843 *
1844 * return: 0 : DCD off
1845 * 1 : DCD on
1846 *
1847 *
1848 * Function 19: Flush the Rx/Tx buffer data of this port.
1849 * Syntax:
1850 * void MoxaPortFlushData(int port, int mode);
1851 * int port : port number (0 - 127)
1852 * int mode
1853 * 0 : flush the Rx buffer
1854 * 1 : flush the Tx buffer
1855 * 2 : flush the Rx and Tx buffer
1856 *
1857 *
1858 * Function 20: Write data.
1859 * Syntax:
1860 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1861 * int port : port number (0 - 127)
1862 * unsigned char * buffer : pointer to write data buffer.
1863 * int length : write data length
1864 *
1865 * return: 0 - length : real write data length
1866 *
1867 *
1868 * Function 21: Read data.
1869 * Syntax:
33f0f88f 1870 * int MoxaPortReadData(int port, struct tty_struct *tty);
1da177e4 1871 * int port : port number (0 - 127)
33f0f88f 1872 * struct tty_struct *tty : tty for data
1da177e4
LT
1873 *
1874 * return: 0 - length : real read data length
1875 *
1876 *
1da177e4
LT
1877 * Function 24: Get the Tx buffer current queued data bytes
1878 * Syntax:
1879 * int MoxaPortTxQueue(int port);
1880 * int port : port number (0 - 127)
1881 *
1882 * return: .. : Tx buffer current queued data bytes
1883 *
1884 *
1885 * Function 25: Get the Tx buffer current free space
1886 * Syntax:
1887 * int MoxaPortTxFree(int port);
1888 * int port : port number (0 - 127)
1889 *
1890 * return: .. : Tx buffer current free space
1891 *
1892 *
1893 * Function 26: Get the Rx buffer current queued data bytes
1894 * Syntax:
1895 * int MoxaPortRxQueue(int port);
1896 * int port : port number (0 - 127)
1897 *
1898 * return: .. : Rx buffer current queued data bytes
1899 *
1900 *
1da177e4
LT
1901 * Function 28: Disable port data transmission.
1902 * Syntax:
1903 * void MoxaPortTxDisable(int port);
1904 * int port : port number (0 - 127)
1905 *
1906 *
1907 * Function 29: Enable port data transmission.
1908 * Syntax:
1909 * void MoxaPortTxEnable(int port);
1910 * int port : port number (0 - 127)
1911 *
1912 *
1da177e4
LT
1913 * Function 31: Get the received BREAK signal count and reset it.
1914 * Syntax:
1915 * int MoxaPortResetBrkCnt(int port);
1916 * int port : port number (0 - 127)
1917 *
1918 * return: 0 - .. : BREAK signal count
1919 *
1920 *
1da177e4
LT
1921 * Function 34: Send out a BREAK signal.
1922 * Syntax:
1923 * void MoxaPortSendBreak(int port, int ms100);
1924 * int port : port number (0 - 127)
1925 * int ms100 : break signal time interval.
1926 * unit: 100 mini-second. if ms100 == 0, it will
1927 * send out a about 250 ms BREAK signal.
1928 *
1929 */
1930int MoxaPortIsValid(int port)
1931{
1932
1933 if (moxaCard == 0)
1934 return (0);
8f8ecbad 1935 if (moxa_ports[port].chkPort == 0)
1da177e4
LT
1936 return (0);
1937 return (1);
1938}
1939
1940void MoxaPortEnable(int port)
1941{
1942 void __iomem *ofsAddr;
1943 int MoxaPortLineStatus(int);
1944 short lowwater = 512;
1945
8f8ecbad 1946 ofsAddr = moxa_ports[port].tableAddr;
1da177e4 1947 writew(lowwater, ofsAddr + Low_water);
8f8ecbad 1948 moxa_ports[port].breakCnt = 0;
1da177e4
LT
1949 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
1950 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
1951 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1952 } else {
1953 writew(readw(ofsAddr + HostStat) | WakeupBreak, ofsAddr + HostStat);
1954 }
1955
1956 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1957 moxafunc(ofsAddr, FC_FlushQueue, 2);
1958
1959 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1960 MoxaPortLineStatus(port);
1961}
1962
1963void MoxaPortDisable(int port)
1964{
8f8ecbad 1965 void __iomem *ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
1966
1967 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1968 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1969 writew(0, ofsAddr + HostStat);
1970 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1971}
1972
1973long MoxaPortGetMaxBaud(int port)
1974{
1975 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
1976 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI))
1977 return (460800L);
1978 else
1979 return (921600L);
1980}
1981
1982
1983long MoxaPortSetBaud(int port, long baud)
1984{
1985 void __iomem *ofsAddr;
1986 long max, clock;
1987 unsigned int val;
1988
1989 if ((baud < 50L) || ((max = MoxaPortGetMaxBaud(port)) == 0))
1990 return (0);
8f8ecbad 1991 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
1992 if (baud > max)
1993 baud = max;
1994 if (max == 38400L)
1995 clock = 614400L; /* for 9.8304 Mhz : max. 38400 bps */
1996 else if (max == 57600L)
1997 clock = 691200L; /* for 11.0592 Mhz : max. 57600 bps */
1998 else
1999 clock = 921600L; /* for 14.7456 Mhz : max. 115200 bps */
2000 val = clock / baud;
2001 moxafunc(ofsAddr, FC_SetBaud, val);
2002 baud = clock / val;
8f8ecbad 2003 moxa_ports[port].curBaud = baud;
1da177e4
LT
2004 return (baud);
2005}
2006
606d099c 2007int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud)
1da177e4
LT
2008{
2009 void __iomem *ofsAddr;
2010 tcflag_t cflag;
1da177e4
LT
2011 tcflag_t mode = 0;
2012
8f8ecbad 2013 if (moxa_ports[port].chkPort == 0 || termio == 0)
1da177e4 2014 return (-1);
8f8ecbad 2015 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2016 cflag = termio->c_cflag; /* termio->c_cflag */
2017
2018 mode = termio->c_cflag & CSIZE;
2019 if (mode == CS5)
2020 mode = MX_CS5;
2021 else if (mode == CS6)
2022 mode = MX_CS6;
2023 else if (mode == CS7)
2024 mode = MX_CS7;
2025 else if (mode == CS8)
2026 mode = MX_CS8;
2027
2028 if (termio->c_cflag & CSTOPB) {
2029 if (mode == MX_CS5)
2030 mode |= MX_STOP15;
2031 else
2032 mode |= MX_STOP2;
2033 } else
2034 mode |= MX_STOP1;
2035
2036 if (termio->c_cflag & PARENB) {
2037 if (termio->c_cflag & PARODD)
2038 mode |= MX_PARODD;
2039 else
2040 mode |= MX_PAREVEN;
2041 } else
2042 mode |= MX_PARNONE;
2043
2044 moxafunc(ofsAddr, FC_SetDataMode, (ushort) mode);
2045
1da177e4
LT
2046 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
2047 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
c7bce309 2048 if (baud >= 921600L)
1da177e4
LT
2049 return (-1);
2050 }
2051 MoxaPortSetBaud(port, baud);
2052
2053 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
2054 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
2055 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
2056 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
2057 wait_finish(ofsAddr);
2058
2059 }
2060 return (0);
2061}
2062
2063int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState)
2064{
2065
2066 if (!MoxaPortIsValid(port))
2067 return (-1);
2068 if (dtrState) {
8f8ecbad 2069 if (moxa_ports[port].lineCtrl & DTR_ON)
1da177e4
LT
2070 *dtrState = 1;
2071 else
2072 *dtrState = 0;
2073 }
2074 if (rtsState) {
8f8ecbad 2075 if (moxa_ports[port].lineCtrl & RTS_ON)
1da177e4
LT
2076 *rtsState = 1;
2077 else
2078 *rtsState = 0;
2079 }
2080 return (0);
2081}
2082
2083void MoxaPortLineCtrl(int port, int dtr, int rts)
2084{
2085 void __iomem *ofsAddr;
2086 int mode;
2087
8f8ecbad 2088 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2089 mode = 0;
2090 if (dtr)
2091 mode |= DTR_ON;
2092 if (rts)
2093 mode |= RTS_ON;
8f8ecbad 2094 moxa_ports[port].lineCtrl = mode;
1da177e4
LT
2095 moxafunc(ofsAddr, FC_LineControl, mode);
2096}
2097
2098void MoxaPortFlowCtrl(int port, int rts, int cts, int txflow, int rxflow, int txany)
2099{
2100 void __iomem *ofsAddr;
2101 int mode;
2102
8f8ecbad 2103 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2104 mode = 0;
2105 if (rts)
2106 mode |= RTS_FlowCtl;
2107 if (cts)
2108 mode |= CTS_FlowCtl;
2109 if (txflow)
2110 mode |= Tx_FlowCtl;
2111 if (rxflow)
2112 mode |= Rx_FlowCtl;
2113 if (txany)
2114 mode |= IXM_IXANY;
2115 moxafunc(ofsAddr, FC_SetFlowCtl, mode);
2116}
2117
2118int MoxaPortLineStatus(int port)
2119{
2120 void __iomem *ofsAddr;
2121 int val;
2122
8f8ecbad 2123 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2124 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
2125 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
2126 moxafunc(ofsAddr, FC_LineStatus, 0);
2127 val = readw(ofsAddr + FuncArg);
2128 } else {
2129 val = readw(ofsAddr + FlagStat) >> 4;
2130 }
2131 val &= 0x0B;
2132 if (val & 8) {
2133 val |= 4;
8f8ecbad
JS
2134 if ((moxa_ports[port].DCDState & DCD_oldstate) == 0)
2135 moxa_ports[port].DCDState = (DCD_oldstate | DCD_changed);
1da177e4 2136 } else {
8f8ecbad
JS
2137 if (moxa_ports[port].DCDState & DCD_oldstate)
2138 moxa_ports[port].DCDState = DCD_changed;
1da177e4
LT
2139 }
2140 val &= 7;
2141 return (val);
2142}
2143
2144int MoxaPortDCDChange(int port)
2145{
2146 int n;
2147
8f8ecbad 2148 if (moxa_ports[port].chkPort == 0)
1da177e4 2149 return (0);
8f8ecbad
JS
2150 n = moxa_ports[port].DCDState;
2151 moxa_ports[port].DCDState &= ~DCD_changed;
1da177e4
LT
2152 n &= DCD_changed;
2153 return (n);
2154}
2155
2156int MoxaPortDCDON(int port)
2157{
2158 int n;
2159
8f8ecbad 2160 if (moxa_ports[port].chkPort == 0)
1da177e4 2161 return (0);
8f8ecbad 2162 if (moxa_ports[port].DCDState & DCD_oldstate)
1da177e4
LT
2163 n = 1;
2164 else
2165 n = 0;
2166 return (n);
2167}
2168
1da177e4
LT
2169int MoxaPortWriteData(int port, unsigned char * buffer, int len)
2170{
2171 int c, total, i;
2172 ushort tail;
2173 int cnt;
2174 ushort head, tx_mask, spage, epage;
2175 ushort pageno, pageofs, bufhead;
2176 void __iomem *baseAddr, *ofsAddr, *ofs;
2177
8f8ecbad
JS
2178 ofsAddr = moxa_ports[port].tableAddr;
2179 baseAddr = moxa_boards[port / MAX_PORTS_PER_BOARD].basemem;
1da177e4
LT
2180 tx_mask = readw(ofsAddr + TX_mask);
2181 spage = readw(ofsAddr + Page_txb);
2182 epage = readw(ofsAddr + EndPage_txb);
2183 tail = readw(ofsAddr + TXwptr);
2184 head = readw(ofsAddr + TXrptr);
2185 c = (head > tail) ? (head - tail - 1)
2186 : (head - tail + tx_mask);
2187 if (c > len)
2188 c = len;
2189 moxaLog.txcnt[port] += c;
2190 total = c;
2191 if (spage == epage) {
2192 bufhead = readw(ofsAddr + Ofs_txb);
2193 writew(spage, baseAddr + Control_reg);
2194 while (c > 0) {
2195 if (head > tail)
2196 len = head - tail - 1;
2197 else
2198 len = tx_mask + 1 - tail;
2199 len = (c > len) ? len : c;
2200 ofs = baseAddr + DynPage_addr + bufhead + tail;
2201 for (i = 0; i < len; i++)
2202 writeb(*buffer++, ofs + i);
2203 tail = (tail + len) & tx_mask;
2204 c -= len;
2205 }
2206 writew(tail, ofsAddr + TXwptr);
2207 } else {
2208 len = c;
2209 pageno = spage + (tail >> 13);
2210 pageofs = tail & Page_mask;
2211 do {
2212 cnt = Page_size - pageofs;
2213 if (cnt > c)
2214 cnt = c;
2215 c -= cnt;
2216 writeb(pageno, baseAddr + Control_reg);
2217 ofs = baseAddr + DynPage_addr + pageofs;
2218 for (i = 0; i < cnt; i++)
2219 writeb(*buffer++, ofs + i);
2220 if (c == 0) {
2221 writew((tail + len) & tx_mask, ofsAddr + TXwptr);
2222 break;
2223 }
2224 if (++pageno == epage)
2225 pageno = spage;
2226 pageofs = 0;
2227 } while (1);
2228 }
2229 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2230 return (total);
2231}
2232
33f0f88f 2233int MoxaPortReadData(int port, struct tty_struct *tty)
1da177e4
LT
2234{
2235 register ushort head, pageofs;
2236 int i, count, cnt, len, total, remain;
2237 ushort tail, rx_mask, spage, epage;
2238 ushort pageno, bufhead;
2239 void __iomem *baseAddr, *ofsAddr, *ofs;
2240
8f8ecbad
JS
2241 ofsAddr = moxa_ports[port].tableAddr;
2242 baseAddr = moxa_boards[port / MAX_PORTS_PER_BOARD].basemem;
1da177e4
LT
2243 head = readw(ofsAddr + RXrptr);
2244 tail = readw(ofsAddr + RXwptr);
2245 rx_mask = readw(ofsAddr + RX_mask);
2246 spage = readw(ofsAddr + Page_rxb);
2247 epage = readw(ofsAddr + EndPage_rxb);
2248 count = (tail >= head) ? (tail - head)
2249 : (tail - head + rx_mask + 1);
2250 if (count == 0)
33f0f88f 2251 return 0;
1da177e4 2252
33f0f88f 2253 total = count;
1da177e4
LT
2254 remain = count - total;
2255 moxaLog.rxcnt[port] += total;
2256 count = total;
2257 if (spage == epage) {
2258 bufhead = readw(ofsAddr + Ofs_rxb);
2259 writew(spage, baseAddr + Control_reg);
2260 while (count > 0) {
2261 if (tail >= head)
2262 len = tail - head;
2263 else
2264 len = rx_mask + 1 - head;
2265 len = (count > len) ? len : count;
2266 ofs = baseAddr + DynPage_addr + bufhead + head;
2267 for (i = 0; i < len; i++)
33f0f88f 2268 tty_insert_flip_char(tty, readb(ofs + i), TTY_NORMAL);
1da177e4
LT
2269 head = (head + len) & rx_mask;
2270 count -= len;
2271 }
2272 writew(head, ofsAddr + RXrptr);
2273 } else {
2274 len = count;
2275 pageno = spage + (head >> 13);
2276 pageofs = head & Page_mask;
2277 do {
2278 cnt = Page_size - pageofs;
2279 if (cnt > count)
2280 cnt = count;
2281 count -= cnt;
2282 writew(pageno, baseAddr + Control_reg);
2283 ofs = baseAddr + DynPage_addr + pageofs;
2284 for (i = 0; i < cnt; i++)
33f0f88f 2285 tty_insert_flip_char(tty, readb(ofs + i), TTY_NORMAL);
1da177e4
LT
2286 if (count == 0) {
2287 writew((head + len) & rx_mask, ofsAddr + RXrptr);
2288 break;
2289 }
2290 if (++pageno == epage)
2291 pageno = spage;
2292 pageofs = 0;
2293 } while (1);
2294 }
2295 if ((readb(ofsAddr + FlagStat) & Xoff_state) && (remain < LowWater)) {
2296 moxaLowWaterChk = 1;
8f8ecbad 2297 moxa_ports[port].lowChkFlag = 1;
1da177e4
LT
2298 }
2299 return (total);
2300}
2301
2302
2303int MoxaPortTxQueue(int port)
2304{
2305 void __iomem *ofsAddr;
2306 ushort rptr, wptr, mask;
2307 int len;
2308
8f8ecbad 2309 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2310 rptr = readw(ofsAddr + TXrptr);
2311 wptr = readw(ofsAddr + TXwptr);
2312 mask = readw(ofsAddr + TX_mask);
2313 len = (wptr - rptr) & mask;
2314 return (len);
2315}
2316
2317int MoxaPortTxFree(int port)
2318{
2319 void __iomem *ofsAddr;
2320 ushort rptr, wptr, mask;
2321 int len;
2322
8f8ecbad 2323 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2324 rptr = readw(ofsAddr + TXrptr);
2325 wptr = readw(ofsAddr + TXwptr);
2326 mask = readw(ofsAddr + TX_mask);
2327 len = mask - ((wptr - rptr) & mask);
2328 return (len);
2329}
2330
2331int MoxaPortRxQueue(int port)
2332{
2333 void __iomem *ofsAddr;
2334 ushort rptr, wptr, mask;
2335 int len;
2336
8f8ecbad 2337 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2338 rptr = readw(ofsAddr + RXrptr);
2339 wptr = readw(ofsAddr + RXwptr);
2340 mask = readw(ofsAddr + RX_mask);
2341 len = (wptr - rptr) & mask;
2342 return (len);
2343}
2344
2345
2346void MoxaPortTxDisable(int port)
2347{
2348 void __iomem *ofsAddr;
2349
8f8ecbad 2350 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2351 moxafunc(ofsAddr, FC_SetXoffState, Magic_code);
2352}
2353
2354void MoxaPortTxEnable(int port)
2355{
2356 void __iomem *ofsAddr;
2357
8f8ecbad 2358 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2359 moxafunc(ofsAddr, FC_SetXonState, Magic_code);
2360}
2361
2362
2363int MoxaPortResetBrkCnt(int port)
2364{
2365 ushort cnt;
8f8ecbad
JS
2366 cnt = moxa_ports[port].breakCnt;
2367 moxa_ports[port].breakCnt = 0;
1da177e4
LT
2368 return (cnt);
2369}
2370
2371
2372void MoxaPortSendBreak(int port, int ms100)
2373{
2374 void __iomem *ofsAddr;
2375
8f8ecbad 2376 ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2377 if (ms100) {
2378 moxafunc(ofsAddr, FC_SendBreak, Magic_code);
2379 moxadelay(ms100 * (HZ / 10));
2380 } else {
2381 moxafunc(ofsAddr, FC_SendBreak, Magic_code);
2382 moxadelay(HZ / 4); /* 250 ms */
2383 }
2384 moxafunc(ofsAddr, FC_StopBreak, Magic_code);
2385}
2386
8f8ecbad 2387static int moxa_get_serial_info(struct moxa_port *info,
1da177e4
LT
2388 struct serial_struct __user *retinfo)
2389{
2390 struct serial_struct tmp;
2391
2392 memset(&tmp, 0, sizeof(tmp));
2393 tmp.type = info->type;
2394 tmp.line = info->port;
2395 tmp.port = 0;
2396 tmp.irq = 0;
2397 tmp.flags = info->asyncflags;
2398 tmp.baud_base = 921600;
2399 tmp.close_delay = info->close_delay;
2400 tmp.closing_wait = info->closing_wait;
2401 tmp.custom_divisor = 0;
2402 tmp.hub6 = 0;
2403 if(copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2404 return -EFAULT;
2405 return (0);
2406}
2407
2408
8f8ecbad 2409static int moxa_set_serial_info(struct moxa_port *info,
1da177e4
LT
2410 struct serial_struct __user *new_info)
2411{
2412 struct serial_struct new_serial;
2413
2414 if(copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2415 return -EFAULT;
2416
2417 if ((new_serial.irq != 0) ||
2418 (new_serial.port != 0) ||
2419// (new_serial.type != info->type) ||
2420 (new_serial.custom_divisor != 0) ||
2421 (new_serial.baud_base != 921600))
2422 return (-EPERM);
2423
2424 if (!capable(CAP_SYS_ADMIN)) {
2425 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
2426 (info->asyncflags & ~ASYNC_USR_MASK)))
2427 return (-EPERM);
2428 } else {
2429 info->close_delay = new_serial.close_delay * HZ / 100;
2430 info->closing_wait = new_serial.closing_wait * HZ / 100;
2431 }
2432
2433 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
2434 new_serial.flags |= (info->asyncflags & ASYNC_FLAGS);
2435
2436 if (new_serial.type == PORT_16550A) {
2437 MoxaSetFifo(info->port, 1);
2438 } else {
2439 MoxaSetFifo(info->port, 0);
2440 }
2441
2442 info->type = new_serial.type;
2443 return (0);
2444}
2445
2446
2447
2448/*****************************************************************************
2449 * Static local functions: *
2450 *****************************************************************************/
2451/*
2452 * moxadelay - delays a specified number ticks
2453 */
2454static void moxadelay(int tick)
2455{
2456 unsigned long st, et;
2457
2458 st = jiffies;
2459 et = st + tick;
2460 while (time_before(jiffies, et));
2461}
2462
2463static void moxafunc(void __iomem *ofsAddr, int cmd, ushort arg)
2464{
2465
2466 writew(arg, ofsAddr + FuncArg);
2467 writew(cmd, ofsAddr + FuncCode);
2468 wait_finish(ofsAddr);
2469}
2470
2471static void wait_finish(void __iomem *ofsAddr)
2472{
2473 unsigned long i, j;
2474
2475 i = jiffies;
2476 while (readw(ofsAddr + FuncCode) != 0) {
2477 j = jiffies;
2478 if ((j - i) > moxaFuncTout) {
2479 return;
2480 }
2481 }
2482}
2483
2484static void low_water_check(void __iomem *ofsAddr)
2485{
2486 int len;
2487 ushort rptr, wptr, mask;
2488
2489 if (readb(ofsAddr + FlagStat) & Xoff_state) {
2490 rptr = readw(ofsAddr + RXrptr);
2491 wptr = readw(ofsAddr + RXwptr);
2492 mask = readw(ofsAddr + RX_mask);
2493 len = (wptr - rptr) & mask;
2494 if (len <= Low_water)
2495 moxafunc(ofsAddr, FC_SendXon, 0);
2496 }
2497}
2498
2499static int moxaloadbios(int cardno, unsigned char __user *tmp, int len)
2500{
2501 void __iomem *baseAddr;
2502 int i;
2503
2504 if(copy_from_user(moxaBuff, tmp, len))
2505 return -EFAULT;
8f8ecbad 2506 baseAddr = moxa_boards[cardno].basemem;
1da177e4
LT
2507 writeb(HW_reset, baseAddr + Control_reg); /* reset */
2508 moxadelay(1); /* delay 10 ms */
2509 for (i = 0; i < 4096; i++)
2510 writeb(0, baseAddr + i); /* clear fix page */
2511 for (i = 0; i < len; i++)
2512 writeb(moxaBuff[i], baseAddr + i); /* download BIOS */
2513 writeb(0, baseAddr + Control_reg); /* restart */
2514 return (0);
2515}
2516
2517static int moxafindcard(int cardno)
2518{
2519 void __iomem *baseAddr;
2520 ushort tmp;
2521
8f8ecbad 2522 baseAddr = moxa_boards[cardno].basemem;
1da177e4
LT
2523 switch (moxa_boards[cardno].boardType) {
2524 case MOXA_BOARD_C218_ISA:
2525 case MOXA_BOARD_C218_PCI:
2526 if ((tmp = readw(baseAddr + C218_key)) != C218_KeyCode) {
2527 return (-1);
2528 }
2529 break;
2530 case MOXA_BOARD_CP204J:
2531 if ((tmp = readw(baseAddr + C218_key)) != CP204J_KeyCode) {
2532 return (-1);
2533 }
2534 break;
2535 default:
2536 if ((tmp = readw(baseAddr + C320_key)) != C320_KeyCode) {
2537 return (-1);
2538 }
2539 if ((tmp = readw(baseAddr + C320_status)) != STS_init) {
2540 return (-2);
2541 }
2542 }
2543 return (0);
2544}
2545
2546static int moxaload320b(int cardno, unsigned char __user *tmp, int len)
2547{
2548 void __iomem *baseAddr;
2549 int i;
2550
2551 if(len > sizeof(moxaBuff))
2552 return -EINVAL;
2553 if(copy_from_user(moxaBuff, tmp, len))
2554 return -EFAULT;
8f8ecbad 2555 baseAddr = moxa_boards[cardno].basemem;
1da177e4
LT
2556 writew(len - 7168 - 2, baseAddr + C320bapi_len);
2557 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
2558 for (i = 0; i < 7168; i++)
2559 writeb(moxaBuff[i], baseAddr + DynPage_addr + i);
2560 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
2561 for (i = 0; i < (len - 7168); i++)
2562 writeb(moxaBuff[i + 7168], baseAddr + DynPage_addr + i);
2563 return (0);
2564}
2565
2566static int moxaloadcode(int cardno, unsigned char __user *tmp, int len)
2567{
2568 void __iomem *baseAddr, *ofsAddr;
2569 int retval, port, i;
2570
2571 if(copy_from_user(moxaBuff, tmp, len))
2572 return -EFAULT;
8f8ecbad 2573 baseAddr = moxa_boards[cardno].basemem;
1da177e4
LT
2574 switch (moxa_boards[cardno].boardType) {
2575 case MOXA_BOARD_C218_ISA:
2576 case MOXA_BOARD_C218_PCI:
2577 case MOXA_BOARD_CP204J:
2578 retval = moxaloadc218(cardno, baseAddr, len);
2579 if (retval)
2580 return (retval);
2581 port = cardno * MAX_PORTS_PER_BOARD;
2582 for (i = 0; i < moxa_boards[cardno].numPorts; i++, port++) {
8f8ecbad
JS
2583 struct moxa_port *p = &moxa_ports[port];
2584
2585 p->chkPort = 1;
2586 p->curBaud = 9600L;
2587 p->DCDState = 0;
2588 p->tableAddr = baseAddr + Extern_table + Extern_size * i;
2589 ofsAddr = p->tableAddr;
1da177e4
LT
2590 writew(C218rx_mask, ofsAddr + RX_mask);
2591 writew(C218tx_mask, ofsAddr + TX_mask);
2592 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
2593 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
2594
2595 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
2596 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
2597
2598 }
2599 break;
2600 default:
2601 retval = moxaloadc320(cardno, baseAddr, len,
2602 &moxa_boards[cardno].numPorts);
2603 if (retval)
2604 return (retval);
2605 port = cardno * MAX_PORTS_PER_BOARD;
2606 for (i = 0; i < moxa_boards[cardno].numPorts; i++, port++) {
8f8ecbad
JS
2607 struct moxa_port *p = &moxa_ports[port];
2608
2609 p->chkPort = 1;
2610 p->curBaud = 9600L;
2611 p->DCDState = 0;
2612 p->tableAddr = baseAddr + Extern_table + Extern_size * i;
2613 ofsAddr = p->tableAddr;
1da177e4
LT
2614 if (moxa_boards[cardno].numPorts == 8) {
2615 writew(C320p8rx_mask, ofsAddr + RX_mask);
2616 writew(C320p8tx_mask, ofsAddr + TX_mask);
2617 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
2618 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
2619 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
2620 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
2621
2622 } else if (moxa_boards[cardno].numPorts == 16) {
2623 writew(C320p16rx_mask, ofsAddr + RX_mask);
2624 writew(C320p16tx_mask, ofsAddr + TX_mask);
2625 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
2626 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
2627 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
2628 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
2629
2630 } else if (moxa_boards[cardno].numPorts == 24) {
2631 writew(C320p24rx_mask, ofsAddr + RX_mask);
2632 writew(C320p24tx_mask, ofsAddr + TX_mask);
2633 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
2634 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
2635 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
2636 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
2637 } else if (moxa_boards[cardno].numPorts == 32) {
2638 writew(C320p32rx_mask, ofsAddr + RX_mask);
2639 writew(C320p32tx_mask, ofsAddr + TX_mask);
2640 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
2641 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
2642 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
2643 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
2644 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
2645 }
2646 }
2647 break;
2648 }
8f8ecbad 2649 moxa_boards[cardno].loadstat = 1;
1da177e4
LT
2650 return (0);
2651}
2652
2653static int moxaloadc218(int cardno, void __iomem *baseAddr, int len)
2654{
2655 char retry;
2656 int i, j, len1, len2;
2657 ushort usum, *ptr, keycode;
2658
2659 if (moxa_boards[cardno].boardType == MOXA_BOARD_CP204J)
2660 keycode = CP204J_KeyCode;
2661 else
2662 keycode = C218_KeyCode;
2663 usum = 0;
2664 len1 = len >> 1;
2665 ptr = (ushort *) moxaBuff;
2666 for (i = 0; i < len1; i++)
01cfaf0d 2667 usum += le16_to_cpu(*(ptr + i));
1da177e4
LT
2668 retry = 0;
2669 do {
2670 len1 = len >> 1;
2671 j = 0;
2672 while (len1) {
2673 len2 = (len1 > 2048) ? 2048 : len1;
2674 len1 -= len2;
2675 for (i = 0; i < len2 << 1; i++)
2676 writeb(moxaBuff[i + j], baseAddr + C218_LoadBuf + i);
2677 j += i;
2678
2679 writew(len2, baseAddr + C218DLoad_len);
2680 writew(0, baseAddr + C218_key);
2681 for (i = 0; i < 100; i++) {
2682 if (readw(baseAddr + C218_key) == keycode)
2683 break;
2684 moxadelay(1); /* delay 10 ms */
2685 }
2686 if (readw(baseAddr + C218_key) != keycode) {
2687 return (-1);
2688 }
2689 }
2690 writew(0, baseAddr + C218DLoad_len);
2691 writew(usum, baseAddr + C218check_sum);
2692 writew(0, baseAddr + C218_key);
2693 for (i = 0; i < 100; i++) {
2694 if (readw(baseAddr + C218_key) == keycode)
2695 break;
2696 moxadelay(1); /* delay 10 ms */
2697 }
2698 retry++;
2699 } while ((readb(baseAddr + C218chksum_ok) != 1) && (retry < 3));
2700 if (readb(baseAddr + C218chksum_ok) != 1) {
2701 return (-1);
2702 }
2703 writew(0, baseAddr + C218_key);
2704 for (i = 0; i < 100; i++) {
2705 if (readw(baseAddr + Magic_no) == Magic_code)
2706 break;
2707 moxadelay(1); /* delay 10 ms */
2708 }
2709 if (readw(baseAddr + Magic_no) != Magic_code) {
2710 return (-1);
2711 }
2712 writew(1, baseAddr + Disable_IRQ);
2713 writew(0, baseAddr + Magic_no);
2714 for (i = 0; i < 100; i++) {
2715 if (readw(baseAddr + Magic_no) == Magic_code)
2716 break;
2717 moxadelay(1); /* delay 10 ms */
2718 }
2719 if (readw(baseAddr + Magic_no) != Magic_code) {
2720 return (-1);
2721 }
2722 moxaCard = 1;
8f8ecbad
JS
2723 moxa_boards[cardno].intNdx = baseAddr + IRQindex;
2724 moxa_boards[cardno].intPend = baseAddr + IRQpending;
2725 moxa_boards[cardno].intTable = baseAddr + IRQtable;
1da177e4
LT
2726 return (0);
2727}
2728
2729static int moxaloadc320(int cardno, void __iomem *baseAddr, int len, int *numPorts)
2730{
2731 ushort usum;
2732 int i, j, wlen, len2, retry;
2733 ushort *uptr;
2734
2735 usum = 0;
2736 wlen = len >> 1;
2737 uptr = (ushort *) moxaBuff;
2738 for (i = 0; i < wlen; i++)
01cfaf0d 2739 usum += le16_to_cpu(uptr[i]);
1da177e4
LT
2740 retry = 0;
2741 j = 0;
2742 do {
2743 while (wlen) {
2744 if (wlen > 2048)
2745 len2 = 2048;
2746 else
2747 len2 = wlen;
2748 wlen -= len2;
2749 len2 <<= 1;
2750 for (i = 0; i < len2; i++)
2751 writeb(moxaBuff[j + i], baseAddr + C320_LoadBuf + i);
2752 len2 >>= 1;
2753 j += i;
2754 writew(len2, baseAddr + C320DLoad_len);
2755 writew(0, baseAddr + C320_key);
2756 for (i = 0; i < 10; i++) {
2757 if (readw(baseAddr + C320_key) == C320_KeyCode)
2758 break;
2759 moxadelay(1);
2760 }
2761 if (readw(baseAddr + C320_key) != C320_KeyCode)
2762 return (-1);
2763 }
2764 writew(0, baseAddr + C320DLoad_len);
2765 writew(usum, baseAddr + C320check_sum);
2766 writew(0, baseAddr + C320_key);
2767 for (i = 0; i < 10; i++) {
2768 if (readw(baseAddr + C320_key) == C320_KeyCode)
2769 break;
2770 moxadelay(1);
2771 }
2772 retry++;
2773 } while ((readb(baseAddr + C320chksum_ok) != 1) && (retry < 3));
2774 if (readb(baseAddr + C320chksum_ok) != 1)
2775 return (-1);
2776 writew(0, baseAddr + C320_key);
2777 for (i = 0; i < 600; i++) {
2778 if (readw(baseAddr + Magic_no) == Magic_code)
2779 break;
2780 moxadelay(1);
2781 }
2782 if (readw(baseAddr + Magic_no) != Magic_code)
2783 return (-100);
2784
2785 if (moxa_boards[cardno].busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
2786 writew(0x3800, baseAddr + TMS320_PORT1);
2787 writew(0x3900, baseAddr + TMS320_PORT2);
2788 writew(28499, baseAddr + TMS320_CLOCK);
2789 } else {
2790 writew(0x3200, baseAddr + TMS320_PORT1);
2791 writew(0x3400, baseAddr + TMS320_PORT2);
2792 writew(19999, baseAddr + TMS320_CLOCK);
2793 }
2794 writew(1, baseAddr + Disable_IRQ);
2795 writew(0, baseAddr + Magic_no);
2796 for (i = 0; i < 500; i++) {
2797 if (readw(baseAddr + Magic_no) == Magic_code)
2798 break;
2799 moxadelay(1);
2800 }
2801 if (readw(baseAddr + Magic_no) != Magic_code)
2802 return (-102);
2803
2804 j = readw(baseAddr + Module_cnt);
2805 if (j <= 0)
2806 return (-101);
2807 *numPorts = j * 8;
2808 writew(j, baseAddr + Module_no);
2809 writew(0, baseAddr + Magic_no);
2810 for (i = 0; i < 600; i++) {
2811 if (readw(baseAddr + Magic_no) == Magic_code)
2812 break;
2813 moxadelay(1);
2814 }
2815 if (readw(baseAddr + Magic_no) != Magic_code)
2816 return (-102);
2817 moxaCard = 1;
8f8ecbad
JS
2818 moxa_boards[cardno].intNdx = baseAddr + IRQindex;
2819 moxa_boards[cardno].intPend = baseAddr + IRQpending;
2820 moxa_boards[cardno].intTable = baseAddr + IRQtable;
1da177e4
LT
2821 return (0);
2822}
2823
1da177e4
LT
2824static void MoxaSetFifo(int port, int enable)
2825{
8f8ecbad 2826 void __iomem *ofsAddr = moxa_ports[port].tableAddr;
1da177e4
LT
2827
2828 if (!enable) {
2829 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2830 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2831 } else {
2832 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2833 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2834 }
2835}