]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blame - drivers/char/mxser.c
projects / mirror_ubuntu-eoan-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] tty: switch to ktermios
[mirror_ubuntu-eoan-kernel.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 12 * (at your option) any later version.
1da177e4
LT		 13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
1da177e4 39#include <linux/module.h>
1da177e4
LT		 40#include <linux/autoconf.h>
41#include <linux/errno.h>
42#include <linux/signal.h>
43#include <linux/sched.h>
44#include <linux/timer.h>
45#include <linux/interrupt.h>
46#include <linux/tty.h>
47#include <linux/tty_flip.h>
48#include <linux/serial.h>
49#include <linux/serial_reg.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/gfp.h>
55#include <linux/ioport.h>
56#include <linux/mm.h>
57#include <linux/smp_lock.h>
58#include <linux/delay.h>
59#include <linux/pci.h>
60
61#include <asm/system.h>
62#include <asm/io.h>
63#include <asm/irq.h>
1da177e4
LT		 64#include <asm/bitops.h>
65#include <asm/uaccess.h>
66
67#include "mxser.h"
68
69#define MXSER_VERSION "1.8"
70#define MXSERMAJOR 174
71#define MXSERCUMAJOR 175
72
8ea2c2ec
JJ		 73#define MXSER_EVENT_TXLOW 1
74#define MXSER_EVENT_HANGUP 2
1da177e4
LT		 75
76#define MXSER_BOARDS 4 /* Max. boards */
77#define MXSER_PORTS 32 /* Max. ports */
78#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
79#define MXSER_ISR_PASS_LIMIT 256
80
81#define MXSER_ERR_IOADDR -1
82#define MXSER_ERR_IRQ -2
83#define MXSER_ERR_IRQ_CONFLIT -3
84#define MXSER_ERR_VECTOR -4
85
86#define SERIAL_TYPE_NORMAL 1
87#define SERIAL_TYPE_CALLOUT 2
88
89#define WAKEUP_CHARS 256
90
91#define UART_MCR_AFE 0x20
92#define UART_LSR_SPECIAL 0x1E
93
8ea2c2ec
JJ		 94#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
95 IXON|IXOFF))
1da177e4 96
0f2ed4c6 97#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
1da177e4
LT		 98
99#define C168_ASIC_ID 1
100#define C104_ASIC_ID 2
101#define C102_ASIC_ID 0xB
102#define CI132_ASIC_ID 4
103#define CI134_ASIC_ID 3
104#define CI104J_ASIC_ID 5
105
106enum {
107 MXSER_BOARD_C168_ISA = 1,
108 MXSER_BOARD_C104_ISA,
109 MXSER_BOARD_CI104J,
110 MXSER_BOARD_C168_PCI,
111 MXSER_BOARD_C104_PCI,
112 MXSER_BOARD_C102_ISA,
113 MXSER_BOARD_CI132,
114 MXSER_BOARD_CI134,
115 MXSER_BOARD_CP132,
116 MXSER_BOARD_CP114,
117 MXSER_BOARD_CT114,
118 MXSER_BOARD_CP102,
119 MXSER_BOARD_CP104U,
120 MXSER_BOARD_CP168U,
121 MXSER_BOARD_CP132U,
122 MXSER_BOARD_CP134U,
123 MXSER_BOARD_CP104JU,
124 MXSER_BOARD_RC7000,
125 MXSER_BOARD_CP118U,
126 MXSER_BOARD_CP102UL,
127 MXSER_BOARD_CP102U,
128};
129
130static char *mxser_brdname[] = {
131 "C168 series",
132 "C104 series",
133 "CI-104J series",
134 "C168H/PCI series",
135 "C104H/PCI series",
136 "C102 series",
137 "CI-132 series",
138 "CI-134 series",
139 "CP-132 series",
140 "CP-114 series",
141 "CT-114 series",
142 "CP-102 series",
143 "CP-104U series",
144 "CP-168U series",
145 "CP-132U series",
146 "CP-134U series",
147 "CP-104JU series",
148 "Moxa UC7000 Serial",
149 "CP-118U series",
150 "CP-102UL series",
151 "CP-102U series",
152};
153
154static int mxser_numports[] = {
8ea2c2ec
JJ		 155 8, /* C168-ISA */
156 4, /* C104-ISA */
157 4, /* CI104J */
158 8, /* C168-PCI */
159 4, /* C104-PCI */
160 2, /* C102-ISA */
161 2, /* CI132 */
162 4, /* CI134 */
163 2, /* CP132 */
164 4, /* CP114 */
165 4, /* CT114 */
166 2, /* CP102 */
167 4, /* CP104U */
168 8, /* CP168U */
169 2, /* CP132U */
170 4, /* CP134U */
171 4, /* CP104JU */
172 8, /* RC7000 */
173 8, /* CP118U */
174 2, /* CP102UL */
175 2, /* CP102U */
1da177e4
LT		 176};
177
178#define UART_TYPE_NUM 2
179
180static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
181 MOXA_MUST_MU150_HWID,
182 MOXA_MUST_MU860_HWID
183};
184
8ea2c2ec 185/* This is only for PCI */
1da177e4
LT		 186#define UART_INFO_NUM 3
187struct mxpciuart_info {
188 int type;
189 int tx_fifo;
190 int rx_fifo;
191 int xmit_fifo_size;
192 int rx_high_water;
193 int rx_trigger;
194 int rx_low_water;
195 long max_baud;
196};
197
198static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
199 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
200 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
201 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
202};
203
204
205#ifdef CONFIG_PCI
206
207static struct pci_device_id mxser_pcibrds[] = {
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
219 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
220 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
221 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
222 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
223 {0}
224};
225
226MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
227
228
229#endif
230
231typedef struct _moxa_pci_info {
232 unsigned short busNum;
233 unsigned short devNum;
8ea2c2ec 234 struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
1da177e4
LT		 235} moxa_pci_info;
236
237static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
238static int ttymajor = MXSERMAJOR;
239static int calloutmajor = MXSERCUMAJOR;
240static int verbose = 0;
241
242/* Variables for insmod */
243
244MODULE_AUTHOR("Casper Yang");
245MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
8d3b33f6
RR		 246module_param_array(ioaddr, int, NULL, 0);
247module_param(ttymajor, int, 0);
248module_param(calloutmajor, int, 0);
249module_param(verbose, bool, 0);
1da177e4
LT		 250MODULE_LICENSE("GPL");
251
252struct mxser_log {
253 int tick;
254 unsigned long rxcnt[MXSER_PORTS];
255 unsigned long txcnt[MXSER_PORTS];
256};
257
258
259struct mxser_mon {
260 unsigned long rxcnt;
261 unsigned long txcnt;
262 unsigned long up_rxcnt;
263 unsigned long up_txcnt;
264 int modem_status;
265 unsigned char hold_reason;
266};
267
268struct mxser_mon_ext {
269 unsigned long rx_cnt[32];
270 unsigned long tx_cnt[32];
271 unsigned long up_rxcnt[32];
272 unsigned long up_txcnt[32];
273 int modem_status[32];
274
275 long baudrate[32];
276 int databits[32];
277 int stopbits[32];
278 int parity[32];
279 int flowctrl[32];
280 int fifo[32];
281 int iftype[32];
282};
8ea2c2ec 283
1da177e4
LT		 284struct mxser_hwconf {
285 int board_type;
286 int ports;
287 int irq;
288 int vector;
289 int vector_mask;
290 int uart_type;
291 int ioaddr[MXSER_PORTS_PER_BOARD];
292 int baud_base[MXSER_PORTS_PER_BOARD];
293 moxa_pci_info pciInfo;
8ea2c2ec
JJ		 294 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
295 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
296 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 297};
298
299struct mxser_struct {
300 int port;
301 int base; /* port base address */
302 int irq; /* port using irq no. */
303 int vector; /* port irq vector */
304 int vectormask; /* port vector mask */
305 int rx_high_water;
306 int rx_trigger; /* Rx fifo trigger level */
307 int rx_low_water;
308 int baud_base; /* max. speed */
309 int flags; /* defined in tty.h */
310 int type; /* UART type */
311 struct tty_struct *tty;
312 int read_status_mask;
313 int ignore_status_mask;
314 int xmit_fifo_size;
315 int custom_divisor;
316 int x_char; /* xon/xoff character */
317 int close_delay;
318 unsigned short closing_wait;
319 int IER; /* Interrupt Enable Register */
320 int MCR; /* Modem control register */
321 unsigned long event;
322 int count; /* # of fd on device */
323 int blocked_open; /* # of blocked opens */
324 long session; /* Session of opening process */
325 long pgrp; /* pgrp of opening process */
326 unsigned char *xmit_buf;
327 int xmit_head;
328 int xmit_tail;
329 int xmit_cnt;
330 struct work_struct tqueue;
606d099c
AC		 331 struct ktermios normal_termios;
332 struct ktermios callout_termios;
1da177e4
LT		 333 wait_queue_head_t open_wait;
334 wait_queue_head_t close_wait;
335 wait_queue_head_t delta_msr_wait;
336 struct async_icount icount; /* kernel counters for the 4 input interrupts */
337 int timeout;
8ea2c2ec
JJ		 338 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
339 int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
340 int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 341 unsigned char stop_rx;
342 unsigned char ldisc_stop_rx;
343 long realbaud;
344 struct mxser_mon mon_data;
345 unsigned char err_shadow;
346 spinlock_t slock;
347};
348
1da177e4
LT		 349struct mxser_mstatus {
350 tcflag_t cflag;
351 int cts;
352 int dsr;
353 int ri;
354 int dcd;
355};
356
357static struct mxser_mstatus GMStatus[MXSER_PORTS];
358
359static int mxserBoardCAP[MXSER_BOARDS] = {
360 0, 0, 0, 0
8ea2c2ec 361 /* 0x180, 0x280, 0x200, 0x320 */
1da177e4
LT		 362};
363
364static struct tty_driver *mxvar_sdriver;
365static struct mxser_struct mxvar_table[MXSER_PORTS];
366static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
606d099c
AC		 367static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
368static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
1da177e4
LT		 369static struct mxser_log mxvar_log;
370static int mxvar_diagflag;
371static unsigned char mxser_msr[MXSER_PORTS + 1];
372static struct mxser_mon_ext mon_data_ext;
373static int mxser_set_baud_method[MXSER_PORTS + 1];
374static spinlock_t gm_lock;
375
376/*
377 * This is used to figure out the divisor speeds and the timeouts
378 */
379
380static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
381
382/*
383 * static functions:
384 */
385
386static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
387static int mxser_init(void);
388
8ea2c2ec 389/* static void mxser_poll(unsigned long); */
1da177e4
LT		 390static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
391static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
c4028958 392static void mxser_do_softint(struct work_struct *);
1da177e4
LT		 393static int mxser_open(struct tty_struct *, struct file *);
394static void mxser_close(struct tty_struct *, struct file *);
395static int mxser_write(struct tty_struct *, const unsigned char *, int);
396static int mxser_write_room(struct tty_struct *);
397static void mxser_flush_buffer(struct tty_struct *);
398static int mxser_chars_in_buffer(struct tty_struct *);
399static void mxser_flush_chars(struct tty_struct *);
400static void mxser_put_char(struct tty_struct *, unsigned char);
401static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
402static int mxser_ioctl_special(unsigned int, void __user *);
403static void mxser_throttle(struct tty_struct *);
404static void mxser_unthrottle(struct tty_struct *);
606d099c 405static void mxser_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 406static void mxser_stop(struct tty_struct *);
407static void mxser_start(struct tty_struct *);
408static void mxser_hangup(struct tty_struct *);
409static void mxser_rs_break(struct tty_struct *, int);
7d12e780 410static irqreturn_t mxser_interrupt(int, void *);
1da177e4
LT		 411static void mxser_receive_chars(struct mxser_struct *, int *);
412static void mxser_transmit_chars(struct mxser_struct *);
413static void mxser_check_modem_status(struct mxser_struct *, int);
414static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
415static int mxser_startup(struct mxser_struct *);
416static void mxser_shutdown(struct mxser_struct *);
606d099c 417static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
1da177e4
LT		 418static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
419static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
420static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
421static void mxser_send_break(struct mxser_struct *, int);
422static int mxser_tiocmget(struct tty_struct *, struct file *);
423static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
424static int mxser_set_baud(struct mxser_struct *info, long newspd);
425static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
426
427static void mxser_startrx(struct tty_struct *tty);
428static void mxser_stoprx(struct tty_struct *tty);
429
430
431static int CheckIsMoxaMust(int io)
432{
433 u8 oldmcr, hwid;
434 int i;
435
436 outb(0, io + UART_LCR);
437 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
438 oldmcr = inb(io + UART_MCR);
439 outb(0, io + UART_MCR);
440 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
441 if ((hwid = inb(io + UART_MCR)) != 0) {
442 outb(oldmcr, io + UART_MCR);
8ea2c2ec 443 return MOXA_OTHER_UART;
1da177e4
LT		 444 }
445
446 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
447 for (i = 0; i < UART_TYPE_NUM; i++) {
448 if (hwid == Gmoxa_uart_id[i])
8ea2c2ec 449 return (int)hwid;
1da177e4
LT		 450 }
451 return MOXA_OTHER_UART;
452}
453
8ea2c2ec 454/* above is modified by Victor Yu. 08-15-2002 */
1da177e4 455
b68e31d0 456static const struct tty_operations mxser_ops = {
1da177e4
LT		 457 .open = mxser_open,
458 .close = mxser_close,
459 .write = mxser_write,
460 .put_char = mxser_put_char,
461 .flush_chars = mxser_flush_chars,
462 .write_room = mxser_write_room,
463 .chars_in_buffer = mxser_chars_in_buffer,
464 .flush_buffer = mxser_flush_buffer,
465 .ioctl = mxser_ioctl,
466 .throttle = mxser_throttle,
467 .unthrottle = mxser_unthrottle,
468 .set_termios = mxser_set_termios,
469 .stop = mxser_stop,
470 .start = mxser_start,
471 .hangup = mxser_hangup,
57432345
KS		 472 .break_ctl = mxser_rs_break,
473 .wait_until_sent = mxser_wait_until_sent,
1da177e4
LT		 474 .tiocmget = mxser_tiocmget,
475 .tiocmset = mxser_tiocmset,
476};
477
478/*
479 * The MOXA Smartio/Industio serial driver boot-time initialization code!
480 */
481
482static int __init mxser_module_init(void)
483{
484 int ret;
485
486 if (verbose)
487 printk(KERN_DEBUG "Loading module mxser ...\n");
488 ret = mxser_init();
489 if (verbose)
490 printk(KERN_DEBUG "Done.\n");
491 return ret;
492}
493
494static void __exit mxser_module_exit(void)
495{
64698b69 496 int i, err;
1da177e4
LT		 497
498 if (verbose)
499 printk(KERN_DEBUG "Unloading module mxser ...\n");
500
64698b69
KS		 501 err = tty_unregister_driver(mxvar_sdriver);
502 if (!err)
503 put_tty_driver(mxvar_sdriver);
504 else
1da177e4
LT		 505 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
506
507 for (i = 0; i < MXSER_BOARDS; i++) {
508 struct pci_dev *pdev;
509
510 if (mxsercfg[i].board_type == -1)
511 continue;
512 else {
513 pdev = mxsercfg[i].pciInfo.pdev;
514 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 515 if (pdev != NULL) { /* PCI */
1da177e4
LT		 516 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
517 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
1187ece3 518 pci_dev_put(pdev);
1da177e4
LT		 519 } else {
520 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
521 release_region(mxsercfg[i].vector, 1);
522 }
523 }
524 }
525 if (verbose)
526 printk(KERN_DEBUG "Done.\n");
1da177e4
LT		 527}
528
529static void process_txrx_fifo(struct mxser_struct *info)
530{
531 int i;
532
533 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
534 info->rx_trigger = 1;
535 info->rx_high_water = 1;
536 info->rx_low_water = 1;
537 info->xmit_fifo_size = 1;
538 } else {
539 for (i = 0; i < UART_INFO_NUM; i++) {
540 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
541 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
542 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
543 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
544 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
545 break;
546 }
547 }
548 }
549}
550
551static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
552{
553 struct mxser_struct *info;
554 int retval;
555 int i, n;
556
557 n = board * MXSER_PORTS_PER_BOARD;
558 info = &mxvar_table[n];
559 /*if (verbose) */ {
ae25f8ec 560 printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
8ea2c2ec
JJ		 561 n, n + hwconf->ports - 1);
562 printk(" max. baud rate = %d bps.\n",
563 hwconf->MaxCanSetBaudRate[0]);
1da177e4
LT		 564 }
565
566 for (i = 0; i < hwconf->ports; i++, n++, info++) {
567 info->port = n;
568 info->base = hwconf->ioaddr[i];
569 info->irq = hwconf->irq;
570 info->vector = hwconf->vector;
571 info->vectormask = hwconf->vector_mask;
8ea2c2ec 572 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 573 info->stop_rx = 0;
574 info->ldisc_stop_rx = 0;
575
576 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
8ea2c2ec 577 /* Enhance mode enabled here */
1da177e4
LT		 578 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
579 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
580 }
581
582 info->flags = ASYNC_SHARE_IRQ;
583 info->type = hwconf->uart_type;
584 info->baud_base = hwconf->baud_base[i];
585
586 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
587
588 process_txrx_fifo(info);
589
590
591 info->custom_divisor = hwconf->baud_base[i] * 16;
592 info->close_delay = 5 * HZ / 10;
593 info->closing_wait = 30 * HZ;
c4028958 594 INIT_WORK(&info->tqueue, mxser_do_softint);
1da177e4
LT		 595 info->normal_termios = mxvar_sdriver->init_termios;
596 init_waitqueue_head(&info->open_wait);
597 init_waitqueue_head(&info->close_wait);
598 init_waitqueue_head(&info->delta_msr_wait);
599 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
600 info->err_shadow = 0;
601 spin_lock_init(&info->slock);
602 }
603 /*
604 * Allocate the IRQ if necessary
605 */
606
607
608 /* before set INT ISR, disable all int */
609 for (i = 0; i < hwconf->ports; i++) {
8ea2c2ec
JJ		 610 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
611 hwconf->ioaddr[i] + UART_IER);
1da177e4
LT		 612 }
613
614 n = board * MXSER_PORTS_PER_BOARD;
615 info = &mxvar_table[n];
616
8ea2c2ec
JJ		 617 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
618 "mxser", info);
1da177e4 619 if (retval) {
8ea2c2ec
JJ		 620 printk(KERN_ERR "Board %d: %s",
621 board, mxser_brdname[hwconf->board_type - 1]);
622 printk(" Request irq failed, IRQ (%d) may conflict with"
623 " another device.\n", info->irq);
1da177e4
LT		 624 return retval;
625 }
626 return 0;
627}
628
1da177e4
LT		 629static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
630{
631 mxsercfg[board] = *hwconf;
632}
633
634#ifdef CONFIG_PCI
635static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
636{
637 int i, j;
8ea2c2ec 638 /* unsigned int val; */
1da177e4
LT		 639 unsigned int ioaddress;
640 struct pci_dev *pdev = hwconf->pciInfo.pdev;
641
8ea2c2ec 642 /* io address */
1da177e4
LT		 643 hwconf->board_type = board_type;
644 hwconf->ports = mxser_numports[board_type - 1];
645 ioaddress = pci_resource_start(pdev, 2);
8ea2c2ec
JJ		 646 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
647 "mxser(IO)");
1da177e4 648
8ea2c2ec 649 for (i = 0; i < hwconf->ports; i++)
1da177e4 650 hwconf->ioaddr[i] = ioaddress + 8 * i;
1da177e4 651
8ea2c2ec 652 /* vector */
1da177e4 653 ioaddress = pci_resource_start(pdev, 3);
8ea2c2ec
JJ		 654 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
655 "mxser(vector)");
1da177e4
LT		 656 hwconf->vector = ioaddress;
657
8ea2c2ec 658 /* irq */
1da177e4
LT		 659 hwconf->irq = hwconf->pciInfo.pdev->irq;
660
661 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
662 hwconf->uart_type = PORT_16550A;
663 hwconf->vector_mask = 0;
664
665
666 for (i = 0; i < hwconf->ports; i++) {
667 for (j = 0; j < UART_INFO_NUM; j++) {
668 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
669 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
670
8ea2c2ec 671 /* exception....CP-102 */
1da177e4
LT		 672 if (board_type == MXSER_BOARD_CP102)
673 hwconf->MaxCanSetBaudRate[i] = 921600;
674 break;
675 }
676 }
677 }
678
679 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
680 for (i = 0; i < hwconf->ports; i++) {
681 if (i < 4)
682 hwconf->opmode_ioaddr[i] = ioaddress + 4;
683 else
684 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
685 }
8ea2c2ec
JJ		 686 outb(0, ioaddress + 4); /* default set to RS232 mode */
687 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4
LT		 688 }
689
690 for (i = 0; i < hwconf->ports; i++) {
691 hwconf->vector_mask |= (1 << i);
692 hwconf->baud_base[i] = 921600;
693 }
8ea2c2ec 694 return 0;
1da177e4
LT		 695}
696#endif
697
698static int mxser_init(void)
699{
700 int i, m, retval, b, n;
1da177e4
LT		 701 struct pci_dev *pdev = NULL;
702 int index;
703 unsigned char busnum, devnum;
704 struct mxser_hwconf hwconf;
705
706 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
707 if (!mxvar_sdriver)
708 return -ENOMEM;
709 spin_lock_init(&gm_lock);
710
711 for (i = 0; i < MXSER_BOARDS; i++) {
712 mxsercfg[i].board_type = -1;
713 }
714
8ea2c2ec
JJ		 715 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
716 MXSER_VERSION);
1da177e4
LT		 717
718 /* Initialize the tty_driver structure */
719 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
720 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
ae25f8ec 721 mxvar_sdriver->name = "ttyMI";
1da177e4
LT		 722 mxvar_sdriver->major = ttymajor;
723 mxvar_sdriver->minor_start = 0;
724 mxvar_sdriver->num = MXSER_PORTS + 1;
725 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
726 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
727 mxvar_sdriver->init_termios = tty_std_termios;
8ea2c2ec 728 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
606d099c
AC		 729 mxvar_sdriver->init_termios.c_ispeed = 9600;
730 mxvar_sdriver->init_termios.c_ospeed = 9600;
1da177e4
LT		 731 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
732 tty_set_operations(mxvar_sdriver, &mxser_ops);
733 mxvar_sdriver->ttys = mxvar_tty;
734 mxvar_sdriver->termios = mxvar_termios;
735 mxvar_sdriver->termios_locked = mxvar_termios_locked;
736
1da177e4
LT		 737 mxvar_diagflag = 0;
738 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
739 memset(&mxvar_log, 0, sizeof(struct mxser_log));
740
741 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
742 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
743 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
744 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
745
746 m = 0;
747 /* Start finding ISA boards here */
748 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
749 int cap;
8ea2c2ec 750
1da177e4
LT		 751 if (!(cap = mxserBoardCAP[b]))
752 continue;
753
754 retval = mxser_get_ISA_conf(cap, &hwconf);
755
756 if (retval != 0)
8ea2c2ec
JJ		 757 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
758 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 759
760 if (retval <= 0) {
761 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 762 printk(KERN_ERR "Invalid interrupt number, "
763 "board not configured\n");
1da177e4 764 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 765 printk(KERN_ERR "Invalid interrupt number, "
766 "board not configured\n");
1da177e4 767 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 768 printk(KERN_ERR "Invalid interrupt vector, "
769 "board not configured\n");
1da177e4 770 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 771 printk(KERN_ERR "Invalid I/O address, "
772 "board not configured\n");
1da177e4
LT		 773
774 continue;
775 }
776
777 hwconf.pciInfo.busNum = 0;
778 hwconf.pciInfo.devNum = 0;
779 hwconf.pciInfo.pdev = NULL;
780
781 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 782 /*
783 * init mxsercfg first,
784 * or mxsercfg data is not correct on ISR.
785 */
786 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 787 if (mxser_initbrd(m, &hwconf) < 0)
788 continue;
789
1da177e4
LT		 790 m++;
791 }
792
793 /* Start finding ISA boards from module arg */
794 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
795 int cap;
8ea2c2ec 796
1da177e4
LT		 797 if (!(cap = ioaddr[b]))
798 continue;
799
800 retval = mxser_get_ISA_conf(cap, &hwconf);
801
802 if (retval != 0)
8ea2c2ec
JJ		 803 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
804 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 805
806 if (retval <= 0) {
807 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 808 printk(KERN_ERR "Invalid interrupt number, "
809 "board not configured\n");
1da177e4 810 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 811 printk(KERN_ERR "Invalid interrupt number, "
812 "board not configured\n");
1da177e4 813 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 814 printk(KERN_ERR "Invalid interrupt vector, "
815 "board not configured\n");
1da177e4 816 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 817 printk(KERN_ERR "Invalid I/O address, "
818 "board not configured\n");
1da177e4
LT		 819
820 continue;
821 }
822
823 hwconf.pciInfo.busNum = 0;
824 hwconf.pciInfo.devNum = 0;
825 hwconf.pciInfo.pdev = NULL;
826
827 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 828 /*
829 * init mxsercfg first,
830 * or mxsercfg data is not correct on ISR.
831 */
832 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 833 if (mxser_initbrd(m, &hwconf) < 0)
834 continue;
835
836 m++;
837 }
838
839 /* start finding PCI board here */
840#ifdef CONFIG_PCI
fe971071 841 n = ARRAY_SIZE(mxser_pcibrds) - 1;
1da177e4
LT		 842 index = 0;
843 b = 0;
844 while (b < n) {
1187ece3 845 pdev = pci_get_device(mxser_pcibrds[b].vendor,
8ea2c2ec 846 mxser_pcibrds[b].device, pdev);
1187ece3 847 if (pdev == NULL) {
1da177e4
LT		 848 b++;
849 continue;
850 }
851 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
852 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
853 hwconf.pciInfo.pdev = pdev;
8ea2c2ec
JJ		 854 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
855 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
856 busnum, devnum >> 3);
1da177e4 857 index++;
8ea2c2ec
JJ		 858 if (m >= MXSER_BOARDS)
859 printk(KERN_ERR
860 "Too many Smartio/Industio family boards find "
861 "(maximum %d), board not configured\n",
862 MXSER_BOARDS);
863 else {
1da177e4 864 if (pci_enable_device(pdev)) {
8ea2c2ec
JJ		 865 printk(KERN_ERR "Moxa SmartI/O PCI enable "
866 "fail !\n");
1da177e4
LT		 867 continue;
868 }
8ea2c2ec
JJ		 869 retval = mxser_get_PCI_conf(busnum, devnum,
870 (int)mxser_pcibrds[b].driver_data,
871 &hwconf);
1da177e4
LT		 872 if (retval < 0) {
873 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 874 printk(KERN_ERR
875 "Invalid interrupt number, "
876 "board not configured\n");
1da177e4 877 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 878 printk(KERN_ERR
879 "Invalid interrupt number, "
880 "board not configured\n");
1da177e4 881 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 882 printk(KERN_ERR
883 "Invalid interrupt vector, "
884 "board not configured\n");
1da177e4 885 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 886 printk(KERN_ERR
887 "Invalid I/O address, "
888 "board not configured\n");
1da177e4
LT		 889 continue;
890 }
891 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 892 /* init mxsercfg first,
893 * or mxsercfg data is not correct on ISR.
894 */
895 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 896 if (mxser_initbrd(m, &hwconf) < 0)
897 continue;
898 m++;
1187ece3
AC		 899 /* Keep an extra reference if we succeeded. It will
900 be returned at unload time */
901 pci_dev_get(pdev);
1da177e4
LT		 902 }
903 }
904#endif
905
64698b69
KS		 906 retval = tty_register_driver(mxvar_sdriver);
907 if (retval) {
8ea2c2ec
JJ		 908 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
909 " driver !\n");
64698b69 910 put_tty_driver(mxvar_sdriver);
1da177e4 911
1da177e4
LT		 912 for (i = 0; i < MXSER_BOARDS; i++) {
913 if (mxsercfg[i].board_type == -1)
914 continue;
915 else {
916 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 917 /* todo: release io, vector */
1da177e4
LT		 918 }
919 }
64698b69 920 return retval;
1da177e4
LT		 921 }
922
64698b69 923 return 0;
1da177e4
LT		 924}
925
c4028958 926static void mxser_do_softint(struct work_struct *work)
1da177e4 927{
c4028958
DH		 928 struct mxser_struct *info =
929 container_of(work, struct mxser_struct, tqueue);
1da177e4
LT		 930 struct tty_struct *tty;
931
932 tty = info->tty;
933
934 if (tty) {
935 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
936 tty_wakeup(tty);
937 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
938 tty_hangup(tty);
939 }
940}
941
942static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
943{
944 unsigned char status = 0;
945
946 status = inb(baseaddr + UART_MSR);
947
948 mxser_msr[port] &= 0x0F;
949 mxser_msr[port] |= status;
950 status = mxser_msr[port];
951 if (mode)
952 mxser_msr[port] = 0;
953
954 return status;
955}
956
957/*
958 * This routine is called whenever a serial port is opened. It
959 * enables interrupts for a serial port, linking in its async structure into
960 * the IRQ chain. It also performs the serial-specific
961 * initialization for the tty structure.
962 */
963static int mxser_open(struct tty_struct *tty, struct file *filp)
964{
965 struct mxser_struct *info;
966 int retval, line;
967
6f08b72c
KS		 968 /* initialize driver_data in case something fails */
969 tty->driver_data = NULL;
970
1da177e4
LT		 971 line = tty->index;
972 if (line == MXSER_PORTS)
973 return 0;
974 if (line < 0 || line > MXSER_PORTS)
975 return -ENODEV;
976 info = mxvar_table + line;
977 if (!info->base)
8ea2c2ec 978 return -ENODEV;
1da177e4
LT		 979
980 tty->driver_data = info;
981 info->tty = tty;
982 /*
983 * Start up serial port
984 */
985 retval = mxser_startup(info);
986 if (retval)
8ea2c2ec 987 return retval;
1da177e4
LT		 988
989 retval = mxser_block_til_ready(tty, filp, info);
990 if (retval)
8ea2c2ec 991 return retval;
1da177e4
LT		 992
993 info->count++;
994
995 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
996 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
997 *tty->termios = info->normal_termios;
998 else
999 *tty->termios = info->callout_termios;
1000 mxser_change_speed(info, NULL);
1001 }
1002
937949d9 1003 info->session = process_session(current);
1da177e4 1004 info->pgrp = process_group(current);
1da177e4 1005
8ea2c2ec
JJ		 1006 /*
1007 status = mxser_get_msr(info->base, 0, info->port);
1008 mxser_check_modem_status(info, status);
1009 */
1da177e4 1010
8ea2c2ec 1011/* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1012 tty->low_latency = 1;
1013 return 0;
1014}
1015
1016/*
1017 * This routine is called when the serial port gets closed. First, we
1018 * wait for the last remaining data to be sent. Then, we unlink its
1019 * async structure from the interrupt chain if necessary, and we free
1020 * that IRQ if nothing is left in the chain.
1021 */
1022static void mxser_close(struct tty_struct *tty, struct file *filp)
1023{
56e139f6 1024 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1025
1026 unsigned long timeout;
1027 unsigned long flags;
1028 struct tty_ldisc *ld;
1029
1030 if (tty->index == MXSER_PORTS)
1031 return;
1032 if (!info)
6f08b72c 1033 return;
1da177e4
LT		 1034
1035 spin_lock_irqsave(&info->slock, flags);
1036
1037 if (tty_hung_up_p(filp)) {
1038 spin_unlock_irqrestore(&info->slock, flags);
1039 return;
1040 }
1041 if ((tty->count == 1) && (info->count != 1)) {
1042 /*
1043 * Uh, oh. tty->count is 1, which means that the tty
1044 * structure will be freed. Info->count should always
1045 * be one in these conditions. If it's greater than
1046 * one, we've got real problems, since it means the
1047 * serial port won't be shutdown.
1048 */
8ea2c2ec
JJ		 1049 printk(KERN_ERR "mxser_close: bad serial port count; "
1050 "tty->count is 1, info->count is %d\n", info->count);
1da177e4
LT		 1051 info->count = 1;
1052 }
1053 if (--info->count < 0) {
8ea2c2ec
JJ		 1054 printk(KERN_ERR "mxser_close: bad serial port count for "
1055 "ttys%d: %d\n", info->port, info->count);
1da177e4
LT		 1056 info->count = 0;
1057 }
1058 if (info->count) {
1059 spin_unlock_irqrestore(&info->slock, flags);
1060 return;
1061 }
1062 info->flags |= ASYNC_CLOSING;
1063 spin_unlock_irqrestore(&info->slock, flags);
1064 /*
1065 * Save the termios structure, since this port may have
1066 * separate termios for callout and dialin.
1067 */
1068 if (info->flags & ASYNC_NORMAL_ACTIVE)
1069 info->normal_termios = *tty->termios;
1070 /*
1071 * Now we wait for the transmit buffer to clear; and we notify
1072 * the line discipline to only process XON/XOFF characters.
1073 */
1074 tty->closing = 1;
1075 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1076 tty_wait_until_sent(tty, info->closing_wait);
1077 /*
1078 * At this point we stop accepting input. To do this, we
1079 * disable the receive line status interrupts, and tell the
1080 * interrupt driver to stop checking the data ready bit in the
1081 * line status register.
1082 */
1083 info->IER &= ~UART_IER_RLSI;
1084 if (info->IsMoxaMustChipFlag)
1085 info->IER &= ~MOXA_MUST_RECV_ISR;
1086/* by William
1087 info->read_status_mask &= ~UART_LSR_DR;
1088*/
1089 if (info->flags & ASYNC_INITIALIZED) {
1090 outb(info->IER, info->base + UART_IER);
1091 /*
1092 * Before we drop DTR, make sure the UART transmitter
1093 * has completely drained; this is especially
1094 * important if there is a transmit FIFO!
1095 */
1096 timeout = jiffies + HZ;
1097 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1098 schedule_timeout_interruptible(5);
1da177e4
LT		 1099 if (time_after(jiffies, timeout))
1100 break;
1101 }
1102 }
1103 mxser_shutdown(info);
1104
1105 if (tty->driver->flush_buffer)
1106 tty->driver->flush_buffer(tty);
1107
1108 ld = tty_ldisc_ref(tty);
1109 if (ld) {
8ea2c2ec 1110 if (ld->flush_buffer)
1da177e4
LT		 1111 ld->flush_buffer(tty);
1112 tty_ldisc_deref(ld);
1113 }
1114
1115 tty->closing = 0;
1116 info->event = 0;
1117 info->tty = NULL;
1118 if (info->blocked_open) {
da4cd8df
NA		 1119 if (info->close_delay)
1120 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 1121 wake_up_interruptible(&info->open_wait);
1122 }
1123
1124 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1125 wake_up_interruptible(&info->close_wait);
1126
1127}
1128
1129static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1130{
1131 int c, total = 0;
56e139f6 1132 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1133 unsigned long flags;
1134
8a7f7c93 1135 if (!info->xmit_buf)
8ea2c2ec 1136 return 0;
1da177e4
LT		 1137
1138 while (1) {
8ea2c2ec
JJ		 1139 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1140 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1141 if (c <= 0)
1142 break;
1143
1144 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1145 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1146 info->xmit_head = (info->xmit_head + c) &
1147 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1148 info->xmit_cnt += c;
1149 spin_unlock_irqrestore(&info->slock, flags);
1150
1151 buf += c;
1152 count -= c;
1153 total += c;
1da177e4
LT		 1154 }
1155
1156 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1157 if (!tty->hw_stopped ||
1158 (info->type == PORT_16550A) ||
1159 (info->IsMoxaMustChipFlag)) {
1da177e4
LT		 1160 spin_lock_irqsave(&info->slock, flags);
1161 info->IER |= UART_IER_THRI;
1162 outb(info->IER, info->base + UART_IER);
1163 spin_unlock_irqrestore(&info->slock, flags);
1164 }
1165 }
1166 return total;
1167}
1168
1169static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1170{
56e139f6 1171 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1172 unsigned long flags;
1173
8a7f7c93 1174 if (!info->xmit_buf)
1da177e4
LT		 1175 return;
1176
1177 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1178 return;
1179
1180 spin_lock_irqsave(&info->slock, flags);
1181 info->xmit_buf[info->xmit_head++] = ch;
1182 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1183 info->xmit_cnt++;
1184 spin_unlock_irqrestore(&info->slock, flags);
1185 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1186 if (!tty->hw_stopped ||
1187 (info->type == PORT_16550A) ||
1188 info->IsMoxaMustChipFlag) {
1da177e4
LT		 1189 spin_lock_irqsave(&info->slock, flags);
1190 info->IER |= UART_IER_THRI;
1191 outb(info->IER, info->base + UART_IER);
1192 spin_unlock_irqrestore(&info->slock, flags);
1193 }
1194 }
1195}
1196
1197
1198static void mxser_flush_chars(struct tty_struct *tty)
1199{
56e139f6 1200 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1201 unsigned long flags;
1202
8ea2c2ec
JJ		 1203 if (info->xmit_cnt <= 0 ||
1204 tty->stopped ||
1205 !info->xmit_buf ||
1206 (tty->hw_stopped &&
1207 (info->type != PORT_16550A) &&
1208 (!info->IsMoxaMustChipFlag)
1209 ))
1da177e4
LT		 1210 return;
1211
1212 spin_lock_irqsave(&info->slock, flags);
1213
1214 info->IER |= UART_IER_THRI;
1215 outb(info->IER, info->base + UART_IER);
1216
1217 spin_unlock_irqrestore(&info->slock, flags);
1218}
1219
1220static int mxser_write_room(struct tty_struct *tty)
1221{
56e139f6 1222 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1223 int ret;
1224
1225 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1226 if (ret < 0)
1227 ret = 0;
8ea2c2ec 1228 return ret;
1da177e4
LT		 1229}
1230
1231static int mxser_chars_in_buffer(struct tty_struct *tty)
1232{
56e139f6 1233 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1234 return info->xmit_cnt;
1235}
1236
1237static void mxser_flush_buffer(struct tty_struct *tty)
1238{
56e139f6 1239 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1240 char fcr;
1241 unsigned long flags;
1242
1243
1244 spin_lock_irqsave(&info->slock, flags);
1245 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1246
1247 /* below added by shinhay */
1248 fcr = inb(info->base + UART_FCR);
8ea2c2ec
JJ		 1249 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1250 info->base + UART_FCR);
1da177e4
LT		 1251 outb(fcr, info->base + UART_FCR);
1252
1253 spin_unlock_irqrestore(&info->slock, flags);
1254 /* above added by shinhay */
1255
1256 wake_up_interruptible(&tty->write_wait);
1257 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
1258 (tty->ldisc.write_wakeup) (tty);
1259}
1260
1261static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1262{
56e139f6 1263 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1264 int retval;
1265 struct async_icount cprev, cnow; /* kernel counter temps */
1266 struct serial_icounter_struct __user *p_cuser;
1267 unsigned long templ;
1268 unsigned long flags;
1269 void __user *argp = (void __user *)arg;
1270
1271 if (tty->index == MXSER_PORTS)
8ea2c2ec 1272 return mxser_ioctl_special(cmd, argp);
1da177e4 1273
8ea2c2ec 1274 /* following add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1275 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1276 int opmode, p;
1277 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1278 int shiftbit;
1279 unsigned char val, mask;
1280
1281 p = info->port % 4;
1282 if (cmd == MOXA_SET_OP_MODE) {
1283 if (get_user(opmode, (int __user *) argp))
1284 return -EFAULT;
8ea2c2ec
JJ		 1285 if (opmode != RS232_MODE &&
1286 opmode != RS485_2WIRE_MODE &&
1287 opmode != RS422_MODE &&
1288 opmode != RS485_4WIRE_MODE)
1da177e4
LT		 1289 return -EFAULT;
1290 mask = ModeMask[p];
1291 shiftbit = p * 2;
1292 val = inb(info->opmode_ioaddr);
1293 val &= mask;
1294 val |= (opmode << shiftbit);
1295 outb(val, info->opmode_ioaddr);
1296 } else {
1297 shiftbit = p * 2;
1298 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1299 opmode &= OP_MODE_MASK;
1300 if (copy_to_user(argp, &opmode, sizeof(int)))
1301 return -EFAULT;
1302 }
1303 return 0;
1304 }
8ea2c2ec 1305 /* above add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1306
1307 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1308 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 1309 return -EIO;
1da177e4
LT		 1310 }
1311 switch (cmd) {
1312 case TCSBRK: /* SVID version: non-zero arg --> no break */
1313 retval = tty_check_change(tty);
1314 if (retval)
8ea2c2ec 1315 return retval;
1da177e4
LT		 1316 tty_wait_until_sent(tty, 0);
1317 if (!arg)
1318 mxser_send_break(info, HZ / 4); /* 1/4 second */
8ea2c2ec 1319 return 0;
1da177e4
LT		 1320 case TCSBRKP: /* support for POSIX tcsendbreak() */
1321 retval = tty_check_change(tty);
1322 if (retval)
8ea2c2ec 1323 return retval;
1da177e4
LT		 1324 tty_wait_until_sent(tty, 0);
1325 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
8ea2c2ec 1326 return 0;
1da177e4 1327 case TIOCGSOFTCAR:
8ea2c2ec 1328 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1da177e4
LT		 1329 case TIOCSSOFTCAR:
1330 if (get_user(templ, (unsigned long __user *) argp))
1331 return -EFAULT;
1332 arg = templ;
1333 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
8ea2c2ec 1334 return 0;
1da177e4
LT		 1335 case TIOCGSERIAL:
1336 return mxser_get_serial_info(info, argp);
1337 case TIOCSSERIAL:
1338 return mxser_set_serial_info(info, argp);
1339 case TIOCSERGETLSR: /* Get line status register */
1340 return mxser_get_lsr_info(info, argp);
1341 /*
1342 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1343 * - mask passed in arg for lines of interest
1344 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1345 * Caller should use TIOCGICOUNT to see which one it was
1346 */
8ea2c2ec 1347 case TIOCMIWAIT: {
1da177e4
LT		 1348 DECLARE_WAITQUEUE(wait, current);
1349 int ret;
1350 spin_lock_irqsave(&info->slock, flags);
1351 cprev = info->icount; /* note the counters on entry */
1352 spin_unlock_irqrestore(&info->slock, flags);
1353
1354 add_wait_queue(&info->delta_msr_wait, &wait);
1355 while (1) {
1356 spin_lock_irqsave(&info->slock, flags);
1357 cnow = info->icount; /* atomic copy */
1358 spin_unlock_irqrestore(&info->slock, flags);
1359
1360 set_current_state(TASK_INTERRUPTIBLE);
8ea2c2ec
JJ		 1361 if (((arg & TIOCM_RNG) &&
1362 (cnow.rng != cprev.rng)) ||
1363 ((arg & TIOCM_DSR) &&
1364 (cnow.dsr != cprev.dsr)) ||
1365 ((arg & TIOCM_CD) &&
1366 (cnow.dcd != cprev.dcd)) ||
1367 ((arg & TIOCM_CTS) &&
1368 (cnow.cts != cprev.cts))) {
1da177e4
LT		 1369 ret = 0;
1370 break;
1371 }
1372 /* see if a signal did it */
1373 if (signal_pending(current)) {
1374 ret = -ERESTARTSYS;
1375 break;
1376 }
1377 cprev = cnow;
1378 }
1379 current->state = TASK_RUNNING;
1380 remove_wait_queue(&info->delta_msr_wait, &wait);
1381 break;
1382 }
1383 /* NOTREACHED */
1384 /*
1385 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1386 * Return: write counters to the user passed counter struct
1387 * NB: both 1->0 and 0->1 transitions are counted except for
1388 * RI where only 0->1 is counted.
1389 */
1390 case TIOCGICOUNT:
1391 spin_lock_irqsave(&info->slock, flags);
1392 cnow = info->icount;
1393 spin_unlock_irqrestore(&info->slock, flags);
1394 p_cuser = argp;
1395 /* modified by casper 1/11/2000 */
1396 if (put_user(cnow.frame, &p_cuser->frame))
1397 return -EFAULT;
1398 if (put_user(cnow.brk, &p_cuser->brk))
1399 return -EFAULT;
1400 if (put_user(cnow.overrun, &p_cuser->overrun))
1401 return -EFAULT;
1402 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1403 return -EFAULT;
1404 if (put_user(cnow.parity, &p_cuser->parity))
1405 return -EFAULT;
1406 if (put_user(cnow.rx, &p_cuser->rx))
1407 return -EFAULT;
1408 if (put_user(cnow.tx, &p_cuser->tx))
1409 return -EFAULT;
1410 put_user(cnow.cts, &p_cuser->cts);
1411 put_user(cnow.dsr, &p_cuser->dsr);
1412 put_user(cnow.rng, &p_cuser->rng);
1413 put_user(cnow.dcd, &p_cuser->dcd);
1da177e4
LT		 1414 return 0;
1415 case MOXA_HighSpeedOn:
8ea2c2ec
JJ		 1416 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1417 case MOXA_SDS_RSTICOUNTER: {
1da177e4
LT		 1418 info->mon_data.rxcnt = 0;
1419 info->mon_data.txcnt = 0;
1420 return 0;
1421 }
8ea2c2ec 1422/* (above) added by James. */
1da177e4
LT		 1423 case MOXA_ASPP_SETBAUD:{
1424 long baud;
8ea2c2ec 1425 if (get_user(baud, (long __user *)argp))
1da177e4
LT		 1426 return -EFAULT;
1427 mxser_set_baud(info, baud);
1428 return 0;
1429 }
1430 case MOXA_ASPP_GETBAUD:
1431 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1432 return -EFAULT;
1433
1434 return 0;
1435
1436 case MOXA_ASPP_OQUEUE:{
1437 int len, lsr;
1438
1439 len = mxser_chars_in_buffer(tty);
1440
1441 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1442
1443 len += (lsr ? 0 : 1);
1444
1445 if (copy_to_user(argp, &len, sizeof(int)))
1446 return -EFAULT;
1447
1448 return 0;
1449 }
8ea2c2ec 1450 case MOXA_ASPP_MON: {
1da177e4 1451 int mcr, status;
8ea2c2ec
JJ		 1452
1453 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1da177e4
LT		 1454
1455 status = mxser_get_msr(info->base, 1, info->port, info);
1456 mxser_check_modem_status(info, status);
1457
1458 mcr = inb(info->base + UART_MCR);
1459 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1460 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1461 else
1462 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1463
1464 if (mcr & MOXA_MUST_MCR_TX_XON)
1465 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1466 else
1467 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1468
1469 if (info->tty->hw_stopped)
1470 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1471 else
1472 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1473
8ea2c2ec
JJ		 1474 if (copy_to_user(argp, &info->mon_data,
1475 sizeof(struct mxser_mon)))
1da177e4
LT		 1476 return -EFAULT;
1477
1478 return 0;
1da177e4
LT		 1479 }
1480
8ea2c2ec
JJ		 1481 case MOXA_ASPP_LSTATUS: {
1482 if (copy_to_user(argp, &info->err_shadow,
1483 sizeof(unsigned char)))
1da177e4
LT		 1484 return -EFAULT;
1485
1486 info->err_shadow = 0;
1487 return 0;
1da177e4 1488 }
8ea2c2ec 1489 case MOXA_SET_BAUD_METHOD: {
1da177e4 1490 int method;
8ea2c2ec
JJ		 1491
1492 if (get_user(method, (int __user *)argp))
1da177e4
LT		 1493 return -EFAULT;
1494 mxser_set_baud_method[info->port] = method;
1495 if (copy_to_user(argp, &method, sizeof(int)))
1496 return -EFAULT;
1497
1498 return 0;
1499 }
1500 default:
1501 return -ENOIOCTLCMD;
1502 }
1503 return 0;
1504}
1505
1506#ifndef CMSPAR
1507#define CMSPAR 010000000000
1508#endif
1509
1510static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1511{
1512 int i, result, status;
1513
1514 switch (cmd) {
1515 case MOXA_GET_CONF:
8ea2c2ec
JJ		 1516 if (copy_to_user(argp, mxsercfg,
1517 sizeof(struct mxser_hwconf) * 4))
1da177e4
LT		 1518 return -EFAULT;
1519 return 0;
1520 case MOXA_GET_MAJOR:
1521 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1522 return -EFAULT;
1523 return 0;
1524
1525 case MOXA_GET_CUMAJOR:
1526 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1527 return -EFAULT;
1528 return 0;
1529
1530 case MOXA_CHKPORTENABLE:
1531 result = 0;
1532 for (i = 0; i < MXSER_PORTS; i++) {
1533 if (mxvar_table[i].base)
1534 result |= (1 << i);
1535 }
8ea2c2ec 1536 return put_user(result, (unsigned long __user *)argp);
1da177e4
LT		 1537 case MOXA_GETDATACOUNT:
1538 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1539 return -EFAULT;
8ea2c2ec 1540 return 0;
1da177e4
LT		 1541 case MOXA_GETMSTATUS:
1542 for (i = 0; i < MXSER_PORTS; i++) {
1543 GMStatus[i].ri = 0;
1544 if (!mxvar_table[i].base) {
1545 GMStatus[i].dcd = 0;
1546 GMStatus[i].dsr = 0;
1547 GMStatus[i].cts = 0;
1548 continue;
1549 }
1550
1551 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1552 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1553 else
1554 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1555
1556 status = inb(mxvar_table[i].base + UART_MSR);
1557 if (status & 0x80 /*UART_MSR_DCD */ )
1558 GMStatus[i].dcd = 1;
1559 else
1560 GMStatus[i].dcd = 0;
1561
1562 if (status & 0x20 /*UART_MSR_DSR */ )
1563 GMStatus[i].dsr = 1;
1564 else
1565 GMStatus[i].dsr = 0;
1566
1567
1568 if (status & 0x10 /*UART_MSR_CTS */ )
1569 GMStatus[i].cts = 1;
1570 else
1571 GMStatus[i].cts = 0;
1572 }
8ea2c2ec
JJ		 1573 if (copy_to_user(argp, GMStatus,
1574 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1da177e4
LT		 1575 return -EFAULT;
1576 return 0;
8ea2c2ec 1577 case MOXA_ASPP_MON_EXT: {
1da177e4
LT		 1578 int status;
1579 int opmode, p;
1580 int shiftbit;
1581 unsigned cflag, iflag;
1582
1583 for (i = 0; i < MXSER_PORTS; i++) {
1da177e4
LT		 1584 if (!mxvar_table[i].base)
1585 continue;
1586
8ea2c2ec
JJ		 1587 status = mxser_get_msr(mxvar_table[i].base, 0,
1588 i, &(mxvar_table[i]));
1589 /*
1590 mxser_check_modem_status(&mxvar_table[i],
1591 status);
1592 */
1da177e4
LT		 1593 if (status & UART_MSR_TERI)
1594 mxvar_table[i].icount.rng++;
1595 if (status & UART_MSR_DDSR)
1596 mxvar_table[i].icount.dsr++;
1597 if (status & UART_MSR_DDCD)
1598 mxvar_table[i].icount.dcd++;
1599 if (status & UART_MSR_DCTS)
1600 mxvar_table[i].icount.cts++;
1601
1602 mxvar_table[i].mon_data.modem_status = status;
1603 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1604 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1605 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1606 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1607 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1608 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1609
1610 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1611 cflag = mxvar_table[i].normal_termios.c_cflag;
1612 iflag = mxvar_table[i].normal_termios.c_iflag;
1613 } else {
1614 cflag = mxvar_table[i].tty->termios->c_cflag;
1615 iflag = mxvar_table[i].tty->termios->c_iflag;
1616 }
1617
1618 mon_data_ext.databits[i] = cflag & CSIZE;
1619
1620 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1621
1622 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1623
1624 mon_data_ext.flowctrl[i] = 0x00;
1625
1626 if (cflag & CRTSCTS)
1627 mon_data_ext.flowctrl[i] |= 0x03;
1628
1629 if (iflag & (IXON | IXOFF))
1630 mon_data_ext.flowctrl[i] |= 0x0C;
1631
1632 if (mxvar_table[i].type == PORT_16550A)
1633 mon_data_ext.fifo[i] = 1;
1634 else
1635 mon_data_ext.fifo[i] = 0;
1636
1637 p = i % 4;
1638 shiftbit = p * 2;
1639 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1640 opmode &= OP_MODE_MASK;
1641
1642 mon_data_ext.iftype[i] = opmode;
1643
1644 }
1645 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1646 return -EFAULT;
1647
1648 return 0;
1649
1650 }
1651 default:
1652 return -ENOIOCTLCMD;
1653 }
1654 return 0;
1655}
1656
1da177e4
LT		 1657static void mxser_stoprx(struct tty_struct *tty)
1658{
56e139f6 1659 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1660 /* unsigned long flags; */
1da177e4
LT		 1661
1662 info->ldisc_stop_rx = 1;
1663 if (I_IXOFF(tty)) {
8ea2c2ec
JJ		 1664 /* MX_LOCK(&info->slock); */
1665 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1666 if (info->IsMoxaMustChipFlag) {
1667 info->IER &= ~MOXA_MUST_RECV_ISR;
1668 outb(info->IER, info->base + UART_IER);
1669 } else {
8ea2c2ec 1670 /* above add by Victor Yu. 09-02-2002 */
1da177e4 1671 info->x_char = STOP_CHAR(tty);
8ea2c2ec
JJ		 1672 /* mask by Victor Yu. 09-02-2002 */
1673 /* outb(info->IER, 0); */
1da177e4
LT		 1674 outb(0, info->base + UART_IER);
1675 info->IER |= UART_IER_THRI;
8ea2c2ec
JJ		 1676 /* force Tx interrupt */
1677 outb(info->IER, info->base + UART_IER);
1678 } /* add by Victor Yu. 09-02-2002 */
1679 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1680 }
1681
1682 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1683 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1684 info->MCR &= ~UART_MCR_RTS;
1685 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1686 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1687 }
1688}
1689
1690static void mxser_startrx(struct tty_struct *tty)
1691{
56e139f6 1692 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1693 /* unsigned long flags; */
1da177e4
LT		 1694
1695 info->ldisc_stop_rx = 0;
1696 if (I_IXOFF(tty)) {
1697 if (info->x_char)
1698 info->x_char = 0;
1699 else {
8ea2c2ec 1700 /* MX_LOCK(&info->slock); */
1da177e4 1701
8ea2c2ec 1702 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1703 if (info->IsMoxaMustChipFlag) {
1704 info->IER |= MOXA_MUST_RECV_ISR;
1705 outb(info->IER, info->base + UART_IER);
1706 } else {
8ea2c2ec 1707 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1708
1709 info->x_char = START_CHAR(tty);
8ea2c2ec
JJ		 1710 /* mask by Victor Yu. 09-02-2002 */
1711 /* outb(info->IER, 0); */
1712 /* add by Victor Yu. 09-02-2002 */
1713 outb(0, info->base + UART_IER);
1714 /* force Tx interrupt */
1715 info->IER |= UART_IER_THRI;
1da177e4 1716 outb(info->IER, info->base + UART_IER);
8ea2c2ec
JJ		 1717 } /* add by Victor Yu. 09-02-2002 */
1718 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1719 }
1720 }
1721
1722 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1723 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1724 info->MCR |= UART_MCR_RTS;
1725 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1726 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1727 }
1728}
1729
1730/*
1731 * This routine is called by the upper-layer tty layer to signal that
1732 * incoming characters should be throttled.
1733 */
1734static void mxser_throttle(struct tty_struct *tty)
1735{
8ea2c2ec
JJ		 1736 /* struct mxser_struct *info = tty->driver_data; */
1737 /* unsigned long flags; */
1738
1739 /* MX_LOCK(&info->slock); */
1da177e4 1740 mxser_stoprx(tty);
8ea2c2ec 1741 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1742}
1743
1744static void mxser_unthrottle(struct tty_struct *tty)
1745{
8ea2c2ec
JJ		 1746 /* struct mxser_struct *info = tty->driver_data; */
1747 /* unsigned long flags; */
1748
1749 /* MX_LOCK(&info->slock); */
1da177e4 1750 mxser_startrx(tty);
8ea2c2ec 1751 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1752}
1753
606d099c 1754static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1755{
56e139f6 1756 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1757 unsigned long flags;
1758
8ea2c2ec
JJ		 1759 if ((tty->termios->c_cflag != old_termios->c_cflag) ||
1760 (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
1da177e4
LT		 1761
1762 mxser_change_speed(info, old_termios);
1763
8ea2c2ec
JJ		 1764 if ((old_termios->c_cflag & CRTSCTS) &&
1765 !(tty->termios->c_cflag & CRTSCTS)) {
1da177e4
LT		 1766 tty->hw_stopped = 0;
1767 mxser_start(tty);
1768 }
1769 }
1770
1771/* Handle sw stopped */
8ea2c2ec
JJ		 1772 if ((old_termios->c_iflag & IXON) &&
1773 !(tty->termios->c_iflag & IXON)) {
1da177e4
LT		 1774 tty->stopped = 0;
1775
8ea2c2ec 1776 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1777 if (info->IsMoxaMustChipFlag) {
1778 spin_lock_irqsave(&info->slock, flags);
1779 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1780 spin_unlock_irqrestore(&info->slock, flags);
1781 }
8ea2c2ec 1782 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1783
1784 mxser_start(tty);
1785 }
1786}
1787
1788/*
1789 * mxser_stop() and mxser_start()
1790 *
1791 * This routines are called before setting or resetting tty->stopped.
1792 * They enable or disable transmitter interrupts, as necessary.
1793 */
1794static void mxser_stop(struct tty_struct *tty)
1795{
56e139f6 1796 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1797 unsigned long flags;
1798
1799 spin_lock_irqsave(&info->slock, flags);
1800 if (info->IER & UART_IER_THRI) {
1801 info->IER &= ~UART_IER_THRI;
1802 outb(info->IER, info->base + UART_IER);
1803 }
1804 spin_unlock_irqrestore(&info->slock, flags);
1805}
1806
1807static void mxser_start(struct tty_struct *tty)
1808{
56e139f6 1809 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1810 unsigned long flags;
1811
1812 spin_lock_irqsave(&info->slock, flags);
1813 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1814 info->IER |= UART_IER_THRI;
1815 outb(info->IER, info->base + UART_IER);
1816 }
1817 spin_unlock_irqrestore(&info->slock, flags);
1818}
1819
1820/*
1821 * mxser_wait_until_sent() --- wait until the transmitter is empty
1822 */
1823static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1824{
56e139f6 1825 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1826 unsigned long orig_jiffies, char_time;
1827 int lsr;
1828
1829 if (info->type == PORT_UNKNOWN)
1830 return;
1831
1832 if (info->xmit_fifo_size == 0)
1833 return; /* Just in case.... */
1834
1835 orig_jiffies = jiffies;
1836 /*
1837 * Set the check interval to be 1/5 of the estimated time to
1838 * send a single character, and make it at least 1. The check
1839 * interval should also be less than the timeout.
1840 *
1841 * Note: we have to use pretty tight timings here to satisfy
1842 * the NIST-PCTS.
1843 */
1844 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1845 char_time = char_time / 5;
1846 if (char_time == 0)
1847 char_time = 1;
1848 if (timeout && timeout < char_time)
1849 char_time = timeout;
1850 /*
1851 * If the transmitter hasn't cleared in twice the approximate
1852 * amount of time to send the entire FIFO, it probably won't
1853 * ever clear. This assumes the UART isn't doing flow
1854 * control, which is currently the case. Hence, if it ever
1855 * takes longer than info->timeout, this is probably due to a
1856 * UART bug of some kind. So, we clamp the timeout parameter at
1857 * 2*info->timeout.
1858 */
1859 if (!timeout || timeout > 2 * info->timeout)
1860 timeout = 2 * info->timeout;
1861#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 1862 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1863 timeout, char_time);
1da177e4
LT		 1864 printk("jiff=%lu...", jiffies);
1865#endif
1866 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1867#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1868 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1869#endif
da4cd8df 1870 schedule_timeout_interruptible(char_time);
1da177e4
LT		 1871 if (signal_pending(current))
1872 break;
1873 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1874 break;
1875 }
1876 set_current_state(TASK_RUNNING);
1877
1878#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1879 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1880#endif
1881}
1882
1883
1884/*
1885 * This routine is called by tty_hangup() when a hangup is signaled.
1886 */
1887void mxser_hangup(struct tty_struct *tty)
1888{
56e139f6 1889 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1890
1891 mxser_flush_buffer(tty);
1892 mxser_shutdown(info);
1893 info->event = 0;
1894 info->count = 0;
1895 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1896 info->tty = NULL;
1897 wake_up_interruptible(&info->open_wait);
1898}
1899
1900
8ea2c2ec 1901/* added by James 03-12-2004. */
1da177e4
LT		 1902/*
1903 * mxser_rs_break() --- routine which turns the break handling on or off
1904 */
1905static void mxser_rs_break(struct tty_struct *tty, int break_state)
1906{
56e139f6 1907 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1908 unsigned long flags;
1909
1910 spin_lock_irqsave(&info->slock, flags);
1911 if (break_state == -1)
8ea2c2ec
JJ		 1912 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
1913 info->base + UART_LCR);
1da177e4 1914 else
8ea2c2ec
JJ		 1915 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
1916 info->base + UART_LCR);
1da177e4
LT		 1917 spin_unlock_irqrestore(&info->slock, flags);
1918}
1919
8ea2c2ec 1920/* (above) added by James. */
1da177e4
LT		 1921
1922
1923/*
1924 * This is the serial driver's generic interrupt routine
1925 */
7d12e780 1926static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4
LT		 1927{
1928 int status, iir, i;
1929 struct mxser_struct *info;
1930 struct mxser_struct *port;
1931 int max, irqbits, bits, msr;
1932 int pass_counter = 0;
1933 int handled = IRQ_NONE;
1934
1935 port = NULL;
8ea2c2ec 1936 /* spin_lock(&gm_lock); */
1da177e4
LT		 1937
1938 for (i = 0; i < MXSER_BOARDS; i++) {
1939 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1940 port = dev_id;
1941 break;
1942 }
1943 }
1944
8ea2c2ec 1945 if (i == MXSER_BOARDS)
1da177e4 1946 goto irq_stop;
8ea2c2ec 1947 if (port == 0)
1da177e4 1948 goto irq_stop;
1da177e4
LT		 1949 max = mxser_numports[mxsercfg[i].board_type - 1];
1950 while (1) {
1951 irqbits = inb(port->vector) & port->vectormask;
8ea2c2ec 1952 if (irqbits == port->vectormask)
1da177e4 1953 break;
1da177e4
LT		 1954
1955 handled = IRQ_HANDLED;
1956 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
8ea2c2ec 1957 if (irqbits == port->vectormask)
1da177e4 1958 break;
1da177e4
LT		 1959 if (bits & irqbits)
1960 continue;
1961 info = port + i;
1962
8ea2c2ec 1963 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1964 iir = inb(info->base + UART_IIR);
1965 if (iir & UART_IIR_NO_INT)
1966 continue;
1967 iir &= MOXA_MUST_IIR_MASK;
1968 if (!info->tty) {
1969 status = inb(info->base + UART_LSR);
1970 outb(0x27, info->base + UART_FCR);
1971 inb(info->base + UART_MSR);
1972 continue;
1973 }
8ea2c2ec 1974 /* above add by Victor Yu. 09-13-2002 */
1da177e4 1975 /*
8ea2c2ec 1976 if (info->tty->flip.count < TTY_FLIPBUF_SIZE / 4) {
1da177e4
LT		 1977 info->IER |= MOXA_MUST_RECV_ISR;
1978 outb(info->IER, info->base + UART_IER);
1979 }
1980 */
1981
1982
1983 /* mask by Victor Yu. 09-13-2002
1984 if ( !info->tty ||
1985 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1986 continue;
1987 */
1988 /* mask by Victor Yu. 09-02-2002
1989 status = inb(info->base + UART_LSR) & info->read_status_mask;
1990 */
1991
8ea2c2ec 1992 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1993 status = inb(info->base + UART_LSR);
1994
8ea2c2ec 1995 if (status & UART_LSR_PE)
1da177e4 1996 info->err_shadow |= NPPI_NOTIFY_PARITY;
8ea2c2ec 1997 if (status & UART_LSR_FE)
1da177e4 1998 info->err_shadow |= NPPI_NOTIFY_FRAMING;
8ea2c2ec 1999 if (status & UART_LSR_OE)
1da177e4 2000 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1da177e4
LT		 2001 if (status & UART_LSR_BI)
2002 info->err_shadow |= NPPI_NOTIFY_BREAK;
2003
2004 if (info->IsMoxaMustChipFlag) {
2005 /*
2006 if ( (status & 0x02) && !(status & 0x01) ) {
2007 outb(info->base+UART_FCR, 0x23);
2008 continue;
2009 }
2010 */
8ea2c2ec
JJ		 2011 if (iir == MOXA_MUST_IIR_GDA ||
2012 iir == MOXA_MUST_IIR_RDA ||
2013 iir == MOXA_MUST_IIR_RTO ||
2014 iir == MOXA_MUST_IIR_LSR)
1da177e4
LT		 2015 mxser_receive_chars(info, &status);
2016
2017 } else {
8ea2c2ec 2018 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2019
2020 status &= info->read_status_mask;
2021 if (status & UART_LSR_DR)
2022 mxser_receive_chars(info, &status);
2023 }
2024 msr = inb(info->base + UART_MSR);
2025 if (msr & UART_MSR_ANY_DELTA) {
2026 mxser_check_modem_status(info, msr);
2027 }
8ea2c2ec 2028 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2029 if (info->IsMoxaMustChipFlag) {
2030 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
2031 mxser_transmit_chars(info);
2032 }
2033 } else {
8ea2c2ec 2034 /* above add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2035
2036 if (status & UART_LSR_THRE) {
2037/* 8-2-99 by William
2038 if ( info->x_char || (info->xmit_cnt > 0) )
2039*/
2040 mxser_transmit_chars(info);
2041 }
2042 }
2043 }
2044 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
2045 break; /* Prevent infinite loops */
2046 }
2047 }
2048
2049 irq_stop:
8ea2c2ec 2050 /* spin_unlock(&gm_lock); */
1da177e4
LT		 2051 return handled;
2052}
2053
2054static void mxser_receive_chars(struct mxser_struct *info, int *status)
2055{
2056 struct tty_struct *tty = info->tty;
2057 unsigned char ch, gdl;
2058 int ignored = 0;
2059 int cnt = 0;
1da177e4
LT		 2060 int recv_room;
2061 int max = 256;
2062 unsigned long flags;
2063
2064 spin_lock_irqsave(&info->slock, flags);
2065
33f0f88f 2066 recv_room = tty->receive_room;
1da177e4 2067 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
8ea2c2ec 2068 /* mxser_throttle(tty); */
1da177e4 2069 mxser_stoprx(tty);
8ea2c2ec 2070 /* return; */
1da177e4
LT		 2071 }
2072
8ea2c2ec 2073 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2074 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
2075
2076 if (*status & UART_LSR_SPECIAL) {
2077 goto intr_old;
2078 }
8ea2c2ec
JJ		 2079 /* following add by Victor Yu. 02-11-2004 */
2080 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
2081 (*status & MOXA_MUST_LSR_RERR))
1da177e4 2082 goto intr_old;
8ea2c2ec 2083 /* above add by Victor Yu. 02-14-2004 */
1da177e4
LT		 2084 if (*status & MOXA_MUST_LSR_RERR)
2085 goto intr_old;
2086
2087 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2088
8ea2c2ec
JJ		 2089 /* add by Victor Yu. 02-11-2004 */
2090 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
1da177e4
LT		 2091 gdl &= MOXA_MUST_GDL_MASK;
2092 if (gdl >= recv_room) {
2093 if (!info->ldisc_stop_rx) {
8ea2c2ec 2094 /* mxser_throttle(tty); */
1da177e4
LT		 2095 mxser_stoprx(tty);
2096 }
8ea2c2ec 2097 /* return; */
1da177e4
LT		 2098 }
2099 while (gdl--) {
2100 ch = inb(info->base + UART_RX);
3399ba5b 2101 tty_insert_flip_char(tty, ch, 0);
1da177e4
LT		 2102 cnt++;
2103 /*
8ea2c2ec 2104 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4 2105 mxser_stoprx(tty);
8ea2c2ec 2106 info->stop_rx = 1;
1da177e4
LT		 2107 break;
2108 } */
2109 }
2110 goto end_intr;
2111 }
8ea2c2ec
JJ		 2112 intr_old:
2113 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2114
2115 do {
2116 if (max-- < 0)
2117 break;
2118 /*
8ea2c2ec 2119 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4
LT		 2120 mxser_stoprx(tty);
2121 info->stop_rx=1;
2122 break;
2123 }
2124 */
2125
2126 ch = inb(info->base + UART_RX);
8ea2c2ec 2127 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2128 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2129 outb(0x23, info->base + UART_FCR);
2130 *status &= info->read_status_mask;
8ea2c2ec 2131 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2132 if (*status & info->ignore_status_mask) {
2133 if (++ignored > 100)
2134 break;
2135 } else {
3399ba5b 2136 char flag = 0;
1da177e4
LT		 2137 if (*status & UART_LSR_SPECIAL) {
2138 if (*status & UART_LSR_BI) {
3399ba5b 2139 flag = TTY_BREAK;
1da177e4
LT		 2140/* added by casper 1/11/2000 */
2141 info->icount.brk++;
1da177e4
LT		 2142/* */
2143 if (info->flags & ASYNC_SAK)
2144 do_SAK(tty);
2145 } else if (*status & UART_LSR_PE) {
3399ba5b 2146 flag = TTY_PARITY;
1da177e4
LT		 2147/* added by casper 1/11/2000 */
2148 info->icount.parity++;
2149/* */
2150 } else if (*status & UART_LSR_FE) {
3399ba5b 2151 flag = TTY_FRAME;
1da177e4
LT		 2152/* added by casper 1/11/2000 */
2153 info->icount.frame++;
2154/* */
2155 } else if (*status & UART_LSR_OE) {
3399ba5b 2156 flag = TTY_OVERRUN;
1da177e4
LT		 2157/* added by casper 1/11/2000 */
2158 info->icount.overrun++;
2159/* */
3399ba5b
DV		 2160 }
2161 }
2162 tty_insert_flip_char(tty, ch, flag);
1da177e4
LT		 2163 cnt++;
2164 if (cnt >= recv_room) {
2165 if (!info->ldisc_stop_rx) {
8ea2c2ec 2166 /* mxser_throttle(tty); */
1da177e4
LT		 2167 mxser_stoprx(tty);
2168 }
2169 break;
2170 }
2171
2172 }
2173
8ea2c2ec 2174 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2175 if (info->IsMoxaMustChipFlag)
2176 break;
8ea2c2ec 2177 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2178
2179 /* mask by Victor Yu. 09-02-2002
2180 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2181 */
8ea2c2ec 2182 /* following add by Victor Yu. 09-02-2002 */
1da177e4 2183 *status = inb(info->base + UART_LSR);
8ea2c2ec 2184 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2185 } while (*status & UART_LSR_DR);
2186
8ea2c2ec 2187end_intr: /* add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2188 mxvar_log.rxcnt[info->port] += cnt;
2189 info->mon_data.rxcnt += cnt;
2190 info->mon_data.up_rxcnt += cnt;
2191 spin_unlock_irqrestore(&info->slock, flags);
3399ba5b 2192
1da177e4
LT		 2193 tty_flip_buffer_push(tty);
2194}
2195
2196static void mxser_transmit_chars(struct mxser_struct *info)
2197{
2198 int count, cnt;
2199 unsigned long flags;
2200
2201 spin_lock_irqsave(&info->slock, flags);
2202
2203 if (info->x_char) {
2204 outb(info->x_char, info->base + UART_TX);
2205 info->x_char = 0;
2206 mxvar_log.txcnt[info->port]++;
2207 info->mon_data.txcnt++;
2208 info->mon_data.up_txcnt++;
2209
2210/* added by casper 1/11/2000 */
2211 info->icount.tx++;
2212/* */
2213 spin_unlock_irqrestore(&info->slock, flags);
2214 return;
2215 }
2216
2217 if (info->xmit_buf == 0) {
2218 spin_unlock_irqrestore(&info->slock, flags);
2219 return;
2220 }
2221
8ea2c2ec
JJ		 2222 if ((info->xmit_cnt <= 0) || info->tty->stopped ||
2223 (info->tty->hw_stopped &&
2224 (info->type != PORT_16550A) &&
2225 (!info->IsMoxaMustChipFlag))) {
1da177e4
LT		 2226 info->IER &= ~UART_IER_THRI;
2227 outb(info->IER, info->base + UART_IER);
2228 spin_unlock_irqrestore(&info->slock, flags);
2229 return;
2230 }
2231
2232 cnt = info->xmit_cnt;
2233 count = info->xmit_fifo_size;
2234 do {
8ea2c2ec
JJ		 2235 outb(info->xmit_buf[info->xmit_tail++],
2236 info->base + UART_TX);
1da177e4
LT		 2237 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2238 if (--info->xmit_cnt <= 0)
2239 break;
2240 } while (--count > 0);
2241 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2242
8ea2c2ec 2243/* added by James 03-12-2004. */
1da177e4
LT		 2244 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2245 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
8ea2c2ec 2246/* (above) added by James. */
1da177e4
LT		 2247
2248/* added by casper 1/11/2000 */
2249 info->icount.tx += (cnt - info->xmit_cnt);
2250/* */
2251
2252 if (info->xmit_cnt < WAKEUP_CHARS) {
2253 set_bit(MXSER_EVENT_TXLOW, &info->event);
2254 schedule_work(&info->tqueue);
2255 }
2256 if (info->xmit_cnt <= 0) {
2257 info->IER &= ~UART_IER_THRI;
2258 outb(info->IER, info->base + UART_IER);
2259 }
2260 spin_unlock_irqrestore(&info->slock, flags);
2261}
2262
2263static void mxser_check_modem_status(struct mxser_struct *info, int status)
2264{
2265 /* update input line counters */
2266 if (status & UART_MSR_TERI)
2267 info->icount.rng++;
2268 if (status & UART_MSR_DDSR)
2269 info->icount.dsr++;
2270 if (status & UART_MSR_DDCD)
2271 info->icount.dcd++;
2272 if (status & UART_MSR_DCTS)
2273 info->icount.cts++;
2274 info->mon_data.modem_status = status;
2275 wake_up_interruptible(&info->delta_msr_wait);
2276
1da177e4
LT		 2277 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2278 if (status & UART_MSR_DCD)
2279 wake_up_interruptible(&info->open_wait);
2280 schedule_work(&info->tqueue);
2281 }
2282
2283 if (info->flags & ASYNC_CTS_FLOW) {
2284 if (info->tty->hw_stopped) {
2285 if (status & UART_MSR_CTS) {
2286 info->tty->hw_stopped = 0;
2287
8ea2c2ec
JJ		 2288 if ((info->type != PORT_16550A) &&
2289 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2290 info->IER |= UART_IER_THRI;
2291 outb(info->IER, info->base + UART_IER);
2292 }
2293 set_bit(MXSER_EVENT_TXLOW, &info->event);
2294 schedule_work(&info->tqueue); }
2295 } else {
2296 if (!(status & UART_MSR_CTS)) {
2297 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2298 if ((info->type != PORT_16550A) &&
2299 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2300 info->IER &= ~UART_IER_THRI;
2301 outb(info->IER, info->base + UART_IER);
2302 }
2303 }
2304 }
2305 }
2306}
2307
2308static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2309{
2310 DECLARE_WAITQUEUE(wait, current);
2311 int retval;
2312 int do_clocal = 0;
2313 unsigned long flags;
2314
2315 /*
2316 * If non-blocking mode is set, or the port is not enabled,
2317 * then make the check up front and then exit.
2318 */
2319 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2320 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2321 return 0;
1da177e4
LT		 2322 }
2323
2324 if (tty->termios->c_cflag & CLOCAL)
2325 do_clocal = 1;
2326
2327 /*
2328 * Block waiting for the carrier detect and the line to become
2329 * free (i.e., not in use by the callout). While we are in
2330 * this loop, info->count is dropped by one, so that
2331 * mxser_close() knows when to free things. We restore it upon
2332 * exit, either normal or abnormal.
2333 */
2334 retval = 0;
2335 add_wait_queue(&info->open_wait, &wait);
2336
2337 spin_lock_irqsave(&info->slock, flags);
2338 if (!tty_hung_up_p(filp))
2339 info->count--;
2340 spin_unlock_irqrestore(&info->slock, flags);
2341 info->blocked_open++;
2342 while (1) {
2343 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2344 outb(inb(info->base + UART_MCR) |
2345 UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
1da177e4
LT		 2346 spin_unlock_irqrestore(&info->slock, flags);
2347 set_current_state(TASK_INTERRUPTIBLE);
2348 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2349 if (info->flags & ASYNC_HUP_NOTIFY)
2350 retval = -EAGAIN;
2351 else
2352 retval = -ERESTARTSYS;
2353 break;
2354 }
8ea2c2ec
JJ		 2355 if (!(info->flags & ASYNC_CLOSING) &&
2356 (do_clocal ||
2357 (inb(info->base + UART_MSR) & UART_MSR_DCD)))
1da177e4
LT		 2358 break;
2359 if (signal_pending(current)) {
2360 retval = -ERESTARTSYS;
2361 break;
2362 }
2363 schedule();
2364 }
2365 set_current_state(TASK_RUNNING);
2366 remove_wait_queue(&info->open_wait, &wait);
2367 if (!tty_hung_up_p(filp))
2368 info->count++;
2369 info->blocked_open--;
2370 if (retval)
8ea2c2ec 2371 return retval;
1da177e4 2372 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2373 return 0;
1da177e4
LT		 2374}
2375
2376static int mxser_startup(struct mxser_struct *info)
2377{
1da177e4
LT		 2378 unsigned long page;
2379 unsigned long flags;
2380
2381 page = __get_free_page(GFP_KERNEL);
2382 if (!page)
8ea2c2ec 2383 return -ENOMEM;
1da177e4
LT		 2384
2385 spin_lock_irqsave(&info->slock, flags);
2386
2387 if (info->flags & ASYNC_INITIALIZED) {
2388 free_page(page);
2389 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2390 return 0;
1da177e4
LT		 2391 }
2392
2393 if (!info->base || !info->type) {
2394 if (info->tty)
2395 set_bit(TTY_IO_ERROR, &info->tty->flags);
2396 free_page(page);
2397 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2398 return 0;
1da177e4
LT		 2399 }
2400 if (info->xmit_buf)
2401 free_page(page);
2402 else
2403 info->xmit_buf = (unsigned char *) page;
2404
2405 /*
2406 * Clear the FIFO buffers and disable them
2407 * (they will be reenabled in mxser_change_speed())
2408 */
2409 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2410 outb((UART_FCR_CLEAR_RCVR |
2411 UART_FCR_CLEAR_XMIT |
2412 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2413 else
8ea2c2ec
JJ		 2414 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2415 info->base + UART_FCR);
1da177e4
LT		 2416
2417 /*
2418 * At this point there's no way the LSR could still be 0xFF;
2419 * if it is, then bail out, because there's likely no UART
2420 * here.
2421 */
2422 if (inb(info->base + UART_LSR) == 0xff) {
2423 spin_unlock_irqrestore(&info->slock, flags);
2424 if (capable(CAP_SYS_ADMIN)) {
2425 if (info->tty)
2426 set_bit(TTY_IO_ERROR, &info->tty->flags);
8ea2c2ec 2427 return 0;
1da177e4 2428 } else
8ea2c2ec 2429 return -ENODEV;
1da177e4
LT		 2430 }
2431
2432 /*
2433 * Clear the interrupt registers.
2434 */
2435 (void) inb(info->base + UART_LSR);
2436 (void) inb(info->base + UART_RX);
2437 (void) inb(info->base + UART_IIR);
2438 (void) inb(info->base + UART_MSR);
2439
2440 /*
2441 * Now, initialize the UART
2442 */
2443 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2444 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2445 outb(info->MCR, info->base + UART_MCR);
2446
2447 /*
2448 * Finally, enable interrupts
2449 */
2450 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
8ea2c2ec 2451 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
1da177e4 2452
8ea2c2ec 2453 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2454 if (info->IsMoxaMustChipFlag)
2455 info->IER |= MOXA_MUST_IER_EGDAI;
8ea2c2ec 2456 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2457 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2458
2459 /*
2460 * And clear the interrupt registers again for luck.
2461 */
2462 (void) inb(info->base + UART_LSR);
2463 (void) inb(info->base + UART_RX);
2464 (void) inb(info->base + UART_IIR);
2465 (void) inb(info->base + UART_MSR);
2466
2467 if (info->tty)
2468 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2469 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2470
2471 /*
2472 * and set the speed of the serial port
2473 */
2474 spin_unlock_irqrestore(&info->slock, flags);
2475 mxser_change_speed(info, NULL);
2476
2477 info->flags |= ASYNC_INITIALIZED;
8ea2c2ec 2478 return 0;
1da177e4
LT		 2479}
2480
2481/*
2482 * This routine will shutdown a serial port; interrupts maybe disabled, and
2483 * DTR is dropped if the hangup on close termio flag is on.
2484 */
2485static void mxser_shutdown(struct mxser_struct *info)
2486{
2487 unsigned long flags;
2488
2489 if (!(info->flags & ASYNC_INITIALIZED))
2490 return;
2491
2492 spin_lock_irqsave(&info->slock, flags);
2493
2494 /*
2495 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2496 * here so the queue might never be waken up
2497 */
2498 wake_up_interruptible(&info->delta_msr_wait);
2499
2500 /*
2501 * Free the IRQ, if necessary
2502 */
2503 if (info->xmit_buf) {
2504 free_page((unsigned long) info->xmit_buf);
2505 info->xmit_buf = NULL;
2506 }
2507
2508 info->IER = 0;
2509 outb(0x00, info->base + UART_IER);
2510
2511 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2512 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2513 outb(info->MCR, info->base + UART_MCR);
2514
2515 /* clear Rx/Tx FIFO's */
8ea2c2ec 2516 /* following add by Victor Yu. 08-30-2002 */
1da177e4 2517 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2518 outb((UART_FCR_CLEAR_RCVR |
2519 UART_FCR_CLEAR_XMIT |
2520 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2521 else
8ea2c2ec
JJ		 2522 /* above add by Victor Yu. 08-30-2002 */
2523 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2524 info->base + UART_FCR);
1da177e4
LT		 2525
2526 /* read data port to reset things */
2527 (void) inb(info->base + UART_RX);
2528
2529 if (info->tty)
2530 set_bit(TTY_IO_ERROR, &info->tty->flags);
2531
2532 info->flags &= ~ASYNC_INITIALIZED;
2533
8ea2c2ec
JJ		 2534 /* following add by Victor Yu. 09-23-2002 */
2535 if (info->IsMoxaMustChipFlag)
1da177e4 2536 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
8ea2c2ec 2537 /* above add by Victor Yu. 09-23-2002 */
1da177e4
LT		 2538
2539 spin_unlock_irqrestore(&info->slock, flags);
2540}
2541
2542/*
2543 * This routine is called to set the UART divisor registers to match
2544 * the specified baud rate for a serial port.
2545 */
606d099c 2546static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
1da177e4
LT		 2547{
2548 unsigned cflag, cval, fcr;
2549 int ret = 0;
2550 unsigned char status;
2551 long baud;
2552 unsigned long flags;
2553
1da177e4
LT		 2554 if (!info->tty || !info->tty->termios)
2555 return ret;
2556 cflag = info->tty->termios->c_cflag;
2557 if (!(info->base))
2558 return ret;
2559
1da177e4
LT		 2560#ifndef B921600
2561#define B921600 (B460800 +1)
2562#endif
2563 if (mxser_set_baud_method[info->port] == 0) {
c7bce309 2564 baud = tty_get_baud_rate(info->tty);
1da177e4
LT		 2565 mxser_set_baud(info, baud);
2566 }
2567
2568 /* byte size and parity */
2569 switch (cflag & CSIZE) {
2570 case CS5:
2571 cval = 0x00;
2572 break;
2573 case CS6:
2574 cval = 0x01;
2575 break;
2576 case CS7:
2577 cval = 0x02;
2578 break;
2579 case CS8:
2580 cval = 0x03;
2581 break;
2582 default:
2583 cval = 0x00;
2584 break; /* too keep GCC shut... */
2585 }
2586 if (cflag & CSTOPB)
2587 cval |= 0x04;
2588 if (cflag & PARENB)
2589 cval |= UART_LCR_PARITY;
8ea2c2ec 2590 if (!(cflag & PARODD))
1da177e4 2591 cval |= UART_LCR_EPAR;
1da177e4
LT		 2592 if (cflag & CMSPAR)
2593 cval |= UART_LCR_SPAR;
2594
2595 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2596 if (info->IsMoxaMustChipFlag) {
2597 fcr = UART_FCR_ENABLE_FIFO;
2598 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2599 SET_MOXA_MUST_FIFO_VALUE(info);
2600 } else
2601 fcr = 0;
2602 } else {
2603 fcr = UART_FCR_ENABLE_FIFO;
8ea2c2ec 2604 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2605 if (info->IsMoxaMustChipFlag) {
2606 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2607 SET_MOXA_MUST_FIFO_VALUE(info);
2608 } else {
8ea2c2ec 2609 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2610 switch (info->rx_trigger) {
2611 case 1:
2612 fcr |= UART_FCR_TRIGGER_1;
2613 break;
2614 case 4:
2615 fcr |= UART_FCR_TRIGGER_4;
2616 break;
2617 case 8:
2618 fcr |= UART_FCR_TRIGGER_8;
2619 break;
2620 default:
2621 fcr |= UART_FCR_TRIGGER_14;
2622 break;
2623 }
2624 }
2625 }
2626
2627 /* CTS flow control flag and modem status interrupts */
2628 info->IER &= ~UART_IER_MSI;
2629 info->MCR &= ~UART_MCR_AFE;
2630 if (cflag & CRTSCTS) {
2631 info->flags |= ASYNC_CTS_FLOW;
2632 info->IER |= UART_IER_MSI;
2633 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2634 info->MCR |= UART_MCR_AFE;
8ea2c2ec
JJ		 2635 /* status = mxser_get_msr(info->base, 0, info->port); */
2636/*
2637 save_flags(flags);
1da177e4
LT		 2638 cli();
2639 status = inb(baseaddr + UART_MSR);
8ea2c2ec
JJ		 2640 restore_flags(flags);
2641*/
2642 /* mxser_check_modem_status(info, status); */
1da177e4 2643 } else {
8ea2c2ec
JJ		 2644 /* status = mxser_get_msr(info->base, 0, info->port); */
2645 /* MX_LOCK(&info->slock); */
1da177e4 2646 status = inb(info->base + UART_MSR);
8ea2c2ec 2647 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 2648 if (info->tty->hw_stopped) {
2649 if (status & UART_MSR_CTS) {
2650 info->tty->hw_stopped = 0;
8ea2c2ec
JJ		 2651 if ((info->type != PORT_16550A) &&
2652 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2653 info->IER |= UART_IER_THRI;
2654 outb(info->IER, info->base + UART_IER);
2655 }
2656 set_bit(MXSER_EVENT_TXLOW, &info->event);
2657 schedule_work(&info->tqueue); }
2658 } else {
2659 if (!(status & UART_MSR_CTS)) {
2660 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2661 if ((info->type != PORT_16550A) &&
2662 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2663 info->IER &= ~UART_IER_THRI;
2664 outb(info->IER, info->base + UART_IER);
2665 }
2666 }
2667 }
2668 }
2669 } else {
2670 info->flags &= ~ASYNC_CTS_FLOW;
2671 }
2672 outb(info->MCR, info->base + UART_MCR);
2673 if (cflag & CLOCAL) {
2674 info->flags &= ~ASYNC_CHECK_CD;
2675 } else {
2676 info->flags |= ASYNC_CHECK_CD;
2677 info->IER |= UART_IER_MSI;
2678 }
2679 outb(info->IER, info->base + UART_IER);
2680
2681 /*
2682 * Set up parity check flag
2683 */
2684 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2685 if (I_INPCK(info->tty))
2686 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2687 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2688 info->read_status_mask |= UART_LSR_BI;
2689
2690 info->ignore_status_mask = 0;
2691
2692 if (I_IGNBRK(info->tty)) {
2693 info->ignore_status_mask |= UART_LSR_BI;
2694 info->read_status_mask |= UART_LSR_BI;
2695 /*
2696 * If we're ignore parity and break indicators, ignore
2697 * overruns too. (For real raw support).
2698 */
2699 if (I_IGNPAR(info->tty)) {
8ea2c2ec
JJ		 2700 info->ignore_status_mask |=
2701 UART_LSR_OE |
2702 UART_LSR_PE |
2703 UART_LSR_FE;
2704 info->read_status_mask |=
2705 UART_LSR_OE |
2706 UART_LSR_PE |
2707 UART_LSR_FE;
1da177e4
LT		 2708 }
2709 }
8ea2c2ec 2710 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2711 if (info->IsMoxaMustChipFlag) {
2712 spin_lock_irqsave(&info->slock, flags);
2713 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2714 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2715 if (I_IXON(info->tty)) {
2716 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2717 } else {
2718 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2719 }
2720 if (I_IXOFF(info->tty)) {
2721 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2722 } else {
2723 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2724 }
2725 /*
2726 if ( I_IXANY(info->tty) ) {
2727 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2728 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2729 } else {
2730 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2731 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2732 }
2733 */
2734 spin_unlock_irqrestore(&info->slock, flags);
2735 }
8ea2c2ec 2736 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2737
2738
2739 outb(fcr, info->base + UART_FCR); /* set fcr */
2740 outb(cval, info->base + UART_LCR);
2741
2742 return ret;
2743}
2744
2745
2746static int mxser_set_baud(struct mxser_struct *info, long newspd)
2747{
2748 int quot = 0;
2749 unsigned char cval;
2750 int ret = 0;
2751 unsigned long flags;
2752
2753 if (!info->tty || !info->tty->termios)
2754 return ret;
2755
2756 if (!(info->base))
2757 return ret;
2758
2759 if (newspd > info->MaxCanSetBaudRate)
2760 return 0;
2761
2762 info->realbaud = newspd;
2763 if (newspd == 134) {
2764 quot = (2 * info->baud_base / 269);
2765 } else if (newspd) {
2766 quot = info->baud_base / newspd;
1da177e4
LT		 2767 if (quot == 0)
2768 quot = 1;
1da177e4
LT		 2769 } else {
2770 quot = 0;
2771 }
2772
2773 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2774 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2775
2776 if (quot) {
2777 spin_lock_irqsave(&info->slock, flags);
2778 info->MCR |= UART_MCR_DTR;
2779 outb(info->MCR, info->base + UART_MCR);
2780 spin_unlock_irqrestore(&info->slock, flags);
2781 } else {
2782 spin_lock_irqsave(&info->slock, flags);
2783 info->MCR &= ~UART_MCR_DTR;
2784 outb(info->MCR, info->base + UART_MCR);
2785 spin_unlock_irqrestore(&info->slock, flags);
2786 return ret;
2787 }
2788
2789 cval = inb(info->base + UART_LCR);
2790
2791 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2792
2793 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2794 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2795 outb(cval, info->base + UART_LCR); /* reset DLAB */
2796
2797
2798 return ret;
2799}
2800
1da177e4
LT		 2801/*
2802 * ------------------------------------------------------------
2803 * friends of mxser_ioctl()
2804 * ------------------------------------------------------------
2805 */
2806static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2807{
2808 struct serial_struct tmp;
2809
2810 if (!retinfo)
8ea2c2ec 2811 return -EFAULT;
1da177e4
LT		 2812 memset(&tmp, 0, sizeof(tmp));
2813 tmp.type = info->type;
2814 tmp.line = info->port;
2815 tmp.port = info->base;
2816 tmp.irq = info->irq;
2817 tmp.flags = info->flags;
2818 tmp.baud_base = info->baud_base;
2819 tmp.close_delay = info->close_delay;
2820 tmp.closing_wait = info->closing_wait;
2821 tmp.custom_divisor = info->custom_divisor;
2822 tmp.hub6 = 0;
2823 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2824 return -EFAULT;
8ea2c2ec 2825 return 0;
1da177e4
LT		 2826}
2827
2828static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2829{
2830 struct serial_struct new_serial;
2831 unsigned int flags;
2832 int retval = 0;
2833
2834 if (!new_info || !info->base)
8ea2c2ec 2835 return -EFAULT;
1da177e4
LT		 2836 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2837 return -EFAULT;
2838
8ea2c2ec
JJ		 2839 if ((new_serial.irq != info->irq) ||
2840 (new_serial.port != info->base) ||
2841 (new_serial.custom_divisor != info->custom_divisor) ||
2842 (new_serial.baud_base != info->baud_base))
2843 return -EPERM;
1da177e4
LT		 2844
2845 flags = info->flags & ASYNC_SPD_MASK;
2846
2847 if (!capable(CAP_SYS_ADMIN)) {
8ea2c2ec
JJ		 2848 if ((new_serial.baud_base != info->baud_base) ||
2849 (new_serial.close_delay != info->close_delay) ||
2850 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2851 return -EPERM;
2852 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
2853 (new_serial.flags & ASYNC_USR_MASK));
1da177e4
LT		 2854 } else {
2855 /*
2856 * OK, past this point, all the error checking has been done.
2857 * At this point, we start making changes.....
2858 */
8ea2c2ec
JJ		 2859 info->flags = ((info->flags & ~ASYNC_FLAGS) |
2860 (new_serial.flags & ASYNC_FLAGS));
1da177e4
LT		 2861 info->close_delay = new_serial.close_delay * HZ / 100;
2862 info->closing_wait = new_serial.closing_wait * HZ / 100;
8ea2c2ec
JJ		 2863 info->tty->low_latency =
2864 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2865 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1da177e4
LT		 2866 }
2867
2868 /* added by casper, 3/17/2000, for mouse */
2869 info->type = new_serial.type;
2870
2871 process_txrx_fifo(info);
2872
1da177e4
LT		 2873 if (info->flags & ASYNC_INITIALIZED) {
2874 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2875 mxser_change_speed(info, NULL);
2876 }
2877 } else {
2878 retval = mxser_startup(info);
2879 }
8ea2c2ec 2880 return retval;
1da177e4
LT		 2881}
2882
2883/*
2884 * mxser_get_lsr_info - get line status register info
2885 *
2886 * Purpose: Let user call ioctl() to get info when the UART physically
2887 * is emptied. On bus types like RS485, the transmitter must
2888 * release the bus after transmitting. This must be done when
2889 * the transmit shift register is empty, not be done when the
2890 * transmit holding register is empty. This functionality
2891 * allows an RS485 driver to be written in user space.
2892 */
2893static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2894{
2895 unsigned char status;
2896 unsigned int result;
2897 unsigned long flags;
2898
2899 spin_lock_irqsave(&info->slock, flags);
2900 status = inb(info->base + UART_LSR);
2901 spin_unlock_irqrestore(&info->slock, flags);
2902 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2903 return put_user(result, value);
2904}
2905
2906/*
2907 * This routine sends a break character out the serial port.
2908 */
2909static void mxser_send_break(struct mxser_struct *info, int duration)
2910{
2911 unsigned long flags;
2912
2913 if (!info->base)
2914 return;
2915 set_current_state(TASK_INTERRUPTIBLE);
2916 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2917 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
2918 info->base + UART_LCR);
1da177e4
LT		 2919 spin_unlock_irqrestore(&info->slock, flags);
2920 schedule_timeout(duration);
2921 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2922 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
2923 info->base + UART_LCR);
1da177e4
LT		 2924 spin_unlock_irqrestore(&info->slock, flags);
2925}
2926
2927static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2928{
56e139f6 2929 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2930 unsigned char control, status;
2931 unsigned long flags;
2932
2933
2934 if (tty->index == MXSER_PORTS)
8ea2c2ec 2935 return -ENOIOCTLCMD;
1da177e4 2936 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 2937 return -EIO;
1da177e4
LT		 2938
2939 control = info->MCR;
2940
2941 spin_lock_irqsave(&info->slock, flags);
2942 status = inb(info->base + UART_MSR);
2943 if (status & UART_MSR_ANY_DELTA)
2944 mxser_check_modem_status(info, status);
2945 spin_unlock_irqrestore(&info->slock, flags);
2946 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
8ea2c2ec
JJ		 2947 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
2948 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
2949 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
2950 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
2951 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1da177e4
LT		 2952}
2953
2954static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2955{
56e139f6 2956 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2957 unsigned long flags;
2958
2959
2960 if (tty->index == MXSER_PORTS)
2961 return -ENOIOCTLCMD;
2962 if (tty->flags & (1 << TTY_IO_ERROR))
2963 return -EIO;
2964
2965 spin_lock_irqsave(&info->slock, flags);
2966
2967 if (set & TIOCM_RTS)
2968 info->MCR |= UART_MCR_RTS;
2969 if (set & TIOCM_DTR)
2970 info->MCR |= UART_MCR_DTR;
2971
2972 if (clear & TIOCM_RTS)
2973 info->MCR &= ~UART_MCR_RTS;
2974 if (clear & TIOCM_DTR)
2975 info->MCR &= ~UART_MCR_DTR;
2976
2977 outb(info->MCR, info->base + UART_MCR);
2978 spin_unlock_irqrestore(&info->slock, flags);
2979 return 0;
2980}
2981
2982
2983static int mxser_read_register(int, unsigned short *);
2984static int mxser_program_mode(int);
2985static void mxser_normal_mode(int);
2986
2987static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2988{
2989 int id, i, bits;
2990 unsigned short regs[16], irq;
2991 unsigned char scratch, scratch2;
2992
2993 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2994
2995 id = mxser_read_register(cap, regs);
2996 if (id == C168_ASIC_ID) {
2997 hwconf->board_type = MXSER_BOARD_C168_ISA;
2998 hwconf->ports = 8;
2999 } else if (id == C104_ASIC_ID) {
3000 hwconf->board_type = MXSER_BOARD_C104_ISA;
3001 hwconf->ports = 4;
3002 } else if (id == C102_ASIC_ID) {
3003 hwconf->board_type = MXSER_BOARD_C102_ISA;
3004 hwconf->ports = 2;
3005 } else if (id == CI132_ASIC_ID) {
3006 hwconf->board_type = MXSER_BOARD_CI132;
3007 hwconf->ports = 2;
3008 } else if (id == CI134_ASIC_ID) {
3009 hwconf->board_type = MXSER_BOARD_CI134;
3010 hwconf->ports = 4;
3011 } else if (id == CI104J_ASIC_ID) {
3012 hwconf->board_type = MXSER_BOARD_CI104J;
3013 hwconf->ports = 4;
3014 } else
8ea2c2ec 3015 return 0;
1da177e4
LT		 3016
3017 irq = 0;
3018 if (hwconf->ports == 2) {
3019 irq = regs[9] & 0xF000;
3020 irq = irq | (irq >> 4);
3021 if (irq != (regs[9] & 0xFF00))
8ea2c2ec 3022 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3023 } else if (hwconf->ports == 4) {
3024 irq = regs[9] & 0xF000;
3025 irq = irq | (irq >> 4);
3026 irq = irq | (irq >> 8);
3027 if (irq != regs[9])
8ea2c2ec 3028 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3029 } else if (hwconf->ports == 8) {
3030 irq = regs[9] & 0xF000;
3031 irq = irq | (irq >> 4);
3032 irq = irq | (irq >> 8);
3033 if ((irq != regs[9]) || (irq != regs[10]))
8ea2c2ec 3034 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3035 }
3036
8ea2c2ec
JJ		 3037 if (!irq)
3038 return MXSER_ERR_IRQ;
3039 hwconf->irq = ((int)(irq & 0xF000) >> 12);
1da177e4
LT		 3040 for (i = 0; i < 8; i++)
3041 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
8ea2c2ec
JJ		 3042 if ((regs[12] & 0x80) == 0)
3043 return MXSER_ERR_VECTOR;
3044 hwconf->vector = (int)regs[11]; /* interrupt vector */
1da177e4
LT		 3045 if (id == 1)
3046 hwconf->vector_mask = 0x00FF;
3047 else
3048 hwconf->vector_mask = 0x000F;
3049 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3050 if (regs[12] & bits) {
3051 hwconf->baud_base[i] = 921600;
8ea2c2ec 3052 hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3053 } else {
3054 hwconf->baud_base[i] = 115200;
8ea2c2ec 3055 hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3056 }
3057 }
3058 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3059 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3060 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3061 outb(scratch2, cap + UART_LCR);
3062 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3063 scratch = inb(cap + UART_IIR);
3064
3065 if (scratch & 0xC0)
3066 hwconf->uart_type = PORT_16550A;
3067 else
3068 hwconf->uart_type = PORT_16450;
3069 if (id == 1)
3070 hwconf->ports = 8;
3071 else
3072 hwconf->ports = 4;
3073 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3074 request_region(hwconf->vector, 1, "mxser(vector)");
8ea2c2ec 3075 return hwconf->ports;
1da177e4
LT		 3076}
3077
3078#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3079#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3080#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3081#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3082#define EN_CCMD 0x000 /* Chip's command register */
3083#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3084#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3085#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3086#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3087#define EN0_DCFG 0x00E /* Data configuration reg WR */
3088#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3089#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3090#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3091static int mxser_read_register(int port, unsigned short *regs)
3092{
3093 int i, k, value, id;
3094 unsigned int j;
3095
3096 id = mxser_program_mode(port);
3097 if (id < 0)
8ea2c2ec 3098 return id;
1da177e4
LT		 3099 for (i = 0; i < 14; i++) {
3100 k = (i & 0x3F) | 0x180;
3101 for (j = 0x100; j > 0; j >>= 1) {
3102 outb(CHIP_CS, port);
3103 if (k & j) {
3104 outb(CHIP_CS | CHIP_DO, port);
3105 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3106 } else {
3107 outb(CHIP_CS, port);
3108 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3109 }
3110 }
8ea2c2ec 3111 (void)inb(port);
1da177e4
LT		 3112 value = 0;
3113 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3114 outb(CHIP_CS, port);
3115 outb(CHIP_CS | CHIP_SK, port);
3116 if (inb(port) & CHIP_DI)
3117 value |= j;
3118 }
3119 regs[i] = value;
3120 outb(0, port);
3121 }
3122 mxser_normal_mode(port);
8ea2c2ec 3123 return id;
1da177e4
LT		 3124}
3125
3126static int mxser_program_mode(int port)
3127{
3128 int id, i, j, n;
8ea2c2ec 3129 /* unsigned long flags; */
1da177e4
LT		 3130
3131 spin_lock(&gm_lock);
3132 outb(0, port);
3133 outb(0, port);
3134 outb(0, port);
8ea2c2ec
JJ		 3135 (void)inb(port);
3136 (void)inb(port);
1da177e4 3137 outb(0, port);
8ea2c2ec
JJ		 3138 (void)inb(port);
3139 /* restore_flags(flags); */
1da177e4
LT		 3140 spin_unlock(&gm_lock);
3141
3142 id = inb(port + 1) & 0x1F;
8ea2c2ec
JJ		 3143 if ((id != C168_ASIC_ID) &&
3144 (id != C104_ASIC_ID) &&
3145 (id != C102_ASIC_ID) &&
3146 (id != CI132_ASIC_ID) &&
3147 (id != CI134_ASIC_ID) &&
3148 (id != CI104J_ASIC_ID))
3149 return -1;
1da177e4
LT		 3150 for (i = 0, j = 0; i < 4; i++) {
3151 n = inb(port + 2);
3152 if (n == 'M') {
3153 j = 1;
3154 } else if ((j == 1) && (n == 1)) {
3155 j = 2;
3156 break;
3157 } else
3158 j = 0;
3159 }
3160 if (j != 2)
3161 id = -2;
8ea2c2ec 3162 return id;
1da177e4
LT		 3163}
3164
3165static void mxser_normal_mode(int port)
3166{
3167 int i, n;
3168
3169 outb(0xA5, port + 1);
3170 outb(0x80, port + 3);
3171 outb(12, port + 0); /* 9600 bps */
3172 outb(0, port + 1);
3173 outb(0x03, port + 3); /* 8 data bits */
3174 outb(0x13, port + 4); /* loop back mode */
3175 for (i = 0; i < 16; i++) {
3176 n = inb(port + 5);
3177 if ((n & 0x61) == 0x60)
3178 break;
3179 if ((n & 1) == 1)
8ea2c2ec 3180 (void)inb(port);
1da177e4
LT		 3181 }
3182 outb(0x00, port + 4);
3183}
3184
3185module_init(mxser_module_init);
3186module_exit(mxser_module_exit);
Ubuntu Eoan Linux kernel mirror