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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * mxser.c -- MOXA Smartio/Industio family multiport serial driver. | |
3 | * | |
80ff8a80 JS |
4 | * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). |
5 | * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> | |
1da177e4 | 6 | * |
1c45607a JS |
7 | * This code is loosely based on the 1.8 moxa driver which is based on |
8 | * Linux serial driver, written by Linus Torvalds, Theodore T'so and | |
9 | * others. | |
1da177e4 LT |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
8ea2c2ec | 14 | * (at your option) any later version. |
1da177e4 | 15 | * |
1da177e4 LT |
16 | * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox |
17 | * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com. | |
18 | * - Fixed x86_64 cleanness | |
1da177e4 LT |
19 | */ |
20 | ||
1da177e4 | 21 | #include <linux/module.h> |
1da177e4 LT |
22 | #include <linux/errno.h> |
23 | #include <linux/signal.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/timer.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/tty_flip.h> | |
29 | #include <linux/serial.h> | |
30 | #include <linux/serial_reg.h> | |
31 | #include <linux/major.h> | |
32 | #include <linux/string.h> | |
33 | #include <linux/fcntl.h> | |
34 | #include <linux/ptrace.h> | |
35 | #include <linux/gfp.h> | |
36 | #include <linux/ioport.h> | |
37 | #include <linux/mm.h> | |
1da177e4 LT |
38 | #include <linux/delay.h> |
39 | #include <linux/pci.h> | |
1977f032 | 40 | #include <linux/bitops.h> |
1da177e4 LT |
41 | |
42 | #include <asm/system.h> | |
43 | #include <asm/io.h> | |
44 | #include <asm/irq.h> | |
1da177e4 LT |
45 | #include <asm/uaccess.h> |
46 | ||
47 | #include "mxser.h" | |
48 | ||
e129deff | 49 | #define MXSER_VERSION "2.0.4" /* 1.12 */ |
1da177e4 | 50 | #define MXSERMAJOR 174 |
1da177e4 | 51 | |
1da177e4 | 52 | #define MXSER_BOARDS 4 /* Max. boards */ |
1da177e4 | 53 | #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ |
1c45607a JS |
54 | #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) |
55 | #define MXSER_ISR_PASS_LIMIT 100 | |
1da177e4 | 56 | |
1c45607a JS |
57 | /*CheckIsMoxaMust return value*/ |
58 | #define MOXA_OTHER_UART 0x00 | |
59 | #define MOXA_MUST_MU150_HWID 0x01 | |
60 | #define MOXA_MUST_MU860_HWID 0x02 | |
61 | ||
1da177e4 LT |
62 | #define WAKEUP_CHARS 256 |
63 | ||
64 | #define UART_MCR_AFE 0x20 | |
65 | #define UART_LSR_SPECIAL 0x1E | |
66 | ||
e129deff | 67 | #define PCI_DEVICE_ID_POS104UL 0x1044 |
1c45607a | 68 | #define PCI_DEVICE_ID_CB108 0x1080 |
e129deff | 69 | #define PCI_DEVICE_ID_CP102UF 0x1023 |
1c45607a | 70 | #define PCI_DEVICE_ID_CB114 0x1142 |
80ff8a80 | 71 | #define PCI_DEVICE_ID_CP114UL 0x1143 |
1c45607a JS |
72 | #define PCI_DEVICE_ID_CB134I 0x1341 |
73 | #define PCI_DEVICE_ID_CP138U 0x1380 | |
1da177e4 | 74 | |
1da177e4 LT |
75 | |
76 | #define C168_ASIC_ID 1 | |
77 | #define C104_ASIC_ID 2 | |
78 | #define C102_ASIC_ID 0xB | |
79 | #define CI132_ASIC_ID 4 | |
80 | #define CI134_ASIC_ID 3 | |
81 | #define CI104J_ASIC_ID 5 | |
82 | ||
1c45607a JS |
83 | #define MXSER_HIGHBAUD 1 |
84 | #define MXSER_HAS2 2 | |
1da177e4 | 85 | |
8ea2c2ec | 86 | /* This is only for PCI */ |
1c45607a | 87 | static const struct { |
1da177e4 LT |
88 | int type; |
89 | int tx_fifo; | |
90 | int rx_fifo; | |
91 | int xmit_fifo_size; | |
92 | int rx_high_water; | |
93 | int rx_trigger; | |
94 | int rx_low_water; | |
95 | long max_baud; | |
1c45607a | 96 | } Gpci_uart_info[] = { |
1da177e4 LT |
97 | {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, |
98 | {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, | |
99 | {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} | |
100 | }; | |
1c45607a | 101 | #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) |
1da177e4 | 102 | |
1c45607a JS |
103 | struct mxser_cardinfo { |
104 | char *name; | |
105 | unsigned int nports; | |
106 | unsigned int flags; | |
107 | }; | |
1da177e4 | 108 | |
1c45607a JS |
109 | static const struct mxser_cardinfo mxser_cards[] = { |
110 | /* 0*/ { "C168 series", 8, }, | |
111 | { "C104 series", 4, }, | |
112 | { "CI-104J series", 4, }, | |
113 | { "C168H/PCI series", 8, }, | |
114 | { "C104H/PCI series", 4, }, | |
115 | /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ | |
116 | { "CI-132 series", 4, MXSER_HAS2 }, | |
117 | { "CI-134 series", 4, }, | |
118 | { "CP-132 series", 2, }, | |
119 | { "CP-114 series", 4, }, | |
120 | /*10*/ { "CT-114 series", 4, }, | |
121 | { "CP-102 series", 2, MXSER_HIGHBAUD }, | |
122 | { "CP-104U series", 4, }, | |
123 | { "CP-168U series", 8, }, | |
124 | { "CP-132U series", 2, }, | |
125 | /*15*/ { "CP-134U series", 4, }, | |
126 | { "CP-104JU series", 4, }, | |
127 | { "Moxa UC7000 Serial", 8, }, /* RC7000 */ | |
128 | { "CP-118U series", 8, }, | |
129 | { "CP-102UL series", 2, }, | |
130 | /*20*/ { "CP-102U series", 2, }, | |
131 | { "CP-118EL series", 8, }, | |
132 | { "CP-168EL series", 8, }, | |
133 | { "CP-104EL series", 4, }, | |
134 | { "CB-108 series", 8, }, | |
135 | /*25*/ { "CB-114 series", 4, }, | |
136 | { "CB-134I series", 4, }, | |
137 | { "CP-138U series", 8, }, | |
80ff8a80 | 138 | { "POS-104UL series", 4, }, |
e129deff JS |
139 | { "CP-114UL series", 4, }, |
140 | /*30*/ { "CP-102UF series", 2, } | |
1c45607a | 141 | }; |
1da177e4 | 142 | |
1c45607a JS |
143 | /* driver_data correspond to the lines in the structure above |
144 | see also ISA probe function before you change something */ | |
1da177e4 | 145 | static struct pci_device_id mxser_pcibrds[] = { |
1c45607a JS |
146 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, |
147 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, | |
148 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, | |
149 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, | |
150 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, | |
151 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, | |
152 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, | |
153 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, | |
154 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, | |
155 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, | |
156 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, | |
157 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, | |
158 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, | |
159 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, | |
160 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, | |
161 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, | |
162 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, | |
163 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, | |
164 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, | |
165 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, | |
166 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, | |
167 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, | |
168 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, | |
80ff8a80 | 169 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, |
e129deff | 170 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, |
1c45607a | 171 | { } |
1da177e4 | 172 | }; |
1da177e4 LT |
173 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); |
174 | ||
1df00924 | 175 | static unsigned long ioaddr[MXSER_BOARDS]; |
1da177e4 | 176 | static int ttymajor = MXSERMAJOR; |
1da177e4 LT |
177 | |
178 | /* Variables for insmod */ | |
179 | ||
180 | MODULE_AUTHOR("Casper Yang"); | |
181 | MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); | |
1df00924 JS |
182 | module_param_array(ioaddr, ulong, NULL, 0); |
183 | MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); | |
8d3b33f6 | 184 | module_param(ttymajor, int, 0); |
1da177e4 LT |
185 | MODULE_LICENSE("GPL"); |
186 | ||
187 | struct mxser_log { | |
188 | int tick; | |
189 | unsigned long rxcnt[MXSER_PORTS]; | |
190 | unsigned long txcnt[MXSER_PORTS]; | |
191 | }; | |
192 | ||
1da177e4 LT |
193 | struct mxser_mon { |
194 | unsigned long rxcnt; | |
195 | unsigned long txcnt; | |
196 | unsigned long up_rxcnt; | |
197 | unsigned long up_txcnt; | |
198 | int modem_status; | |
199 | unsigned char hold_reason; | |
200 | }; | |
201 | ||
202 | struct mxser_mon_ext { | |
203 | unsigned long rx_cnt[32]; | |
204 | unsigned long tx_cnt[32]; | |
205 | unsigned long up_rxcnt[32]; | |
206 | unsigned long up_txcnt[32]; | |
207 | int modem_status[32]; | |
208 | ||
209 | long baudrate[32]; | |
210 | int databits[32]; | |
211 | int stopbits[32]; | |
212 | int parity[32]; | |
213 | int flowctrl[32]; | |
214 | int fifo[32]; | |
215 | int iftype[32]; | |
216 | }; | |
8ea2c2ec | 217 | |
1c45607a JS |
218 | struct mxser_board; |
219 | ||
220 | struct mxser_port { | |
0ad9e7d1 | 221 | struct tty_port port; |
1c45607a | 222 | struct mxser_board *board; |
1c45607a JS |
223 | |
224 | unsigned long ioaddr; | |
225 | unsigned long opmode_ioaddr; | |
226 | int max_baud; | |
1da177e4 | 227 | |
1da177e4 LT |
228 | int rx_high_water; |
229 | int rx_trigger; /* Rx fifo trigger level */ | |
230 | int rx_low_water; | |
231 | int baud_base; /* max. speed */ | |
1da177e4 | 232 | int type; /* UART type */ |
1c45607a | 233 | |
1da177e4 | 234 | int x_char; /* xon/xoff character */ |
1da177e4 LT |
235 | int IER; /* Interrupt Enable Register */ |
236 | int MCR; /* Modem control register */ | |
1c45607a JS |
237 | |
238 | unsigned char stop_rx; | |
239 | unsigned char ldisc_stop_rx; | |
240 | ||
241 | int custom_divisor; | |
1c45607a | 242 | unsigned char err_shadow; |
1c45607a | 243 | |
1c45607a JS |
244 | struct async_icount icount; /* kernel counters for 4 input interrupts */ |
245 | int timeout; | |
246 | ||
247 | int read_status_mask; | |
248 | int ignore_status_mask; | |
249 | int xmit_fifo_size; | |
1da177e4 LT |
250 | int xmit_head; |
251 | int xmit_tail; | |
252 | int xmit_cnt; | |
1c45607a | 253 | |
606d099c | 254 | struct ktermios normal_termios; |
1c45607a | 255 | |
1da177e4 | 256 | struct mxser_mon mon_data; |
1c45607a | 257 | |
1da177e4 | 258 | spinlock_t slock; |
1c45607a JS |
259 | wait_queue_head_t delta_msr_wait; |
260 | }; | |
261 | ||
262 | struct mxser_board { | |
263 | unsigned int idx; | |
264 | int irq; | |
265 | const struct mxser_cardinfo *info; | |
266 | unsigned long vector; | |
267 | unsigned long vector_mask; | |
268 | ||
269 | int chip_flag; | |
270 | int uart_type; | |
271 | ||
272 | struct mxser_port ports[MXSER_PORTS_PER_BOARD]; | |
1da177e4 LT |
273 | }; |
274 | ||
1da177e4 LT |
275 | struct mxser_mstatus { |
276 | tcflag_t cflag; | |
277 | int cts; | |
278 | int dsr; | |
279 | int ri; | |
280 | int dcd; | |
281 | }; | |
282 | ||
1c45607a | 283 | static struct mxser_board mxser_boards[MXSER_BOARDS]; |
1da177e4 | 284 | static struct tty_driver *mxvar_sdriver; |
1da177e4 | 285 | static struct mxser_log mxvar_log; |
1da177e4 | 286 | static int mxser_set_baud_method[MXSER_PORTS + 1]; |
1da177e4 | 287 | |
148ff86b CH |
288 | static void mxser_enable_must_enchance_mode(unsigned long baseio) |
289 | { | |
290 | u8 oldlcr; | |
291 | u8 efr; | |
292 | ||
293 | oldlcr = inb(baseio + UART_LCR); | |
294 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
295 | ||
296 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
297 | efr |= MOXA_MUST_EFR_EFRB_ENABLE; | |
298 | ||
299 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
300 | outb(oldlcr, baseio + UART_LCR); | |
301 | } | |
302 | ||
303 | static void mxser_disable_must_enchance_mode(unsigned long baseio) | |
304 | { | |
305 | u8 oldlcr; | |
306 | u8 efr; | |
307 | ||
308 | oldlcr = inb(baseio + UART_LCR); | |
309 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
310 | ||
311 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
312 | efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; | |
313 | ||
314 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
315 | outb(oldlcr, baseio + UART_LCR); | |
316 | } | |
317 | ||
318 | static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) | |
319 | { | |
320 | u8 oldlcr; | |
321 | u8 efr; | |
322 | ||
323 | oldlcr = inb(baseio + UART_LCR); | |
324 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
325 | ||
326 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
327 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
328 | efr |= MOXA_MUST_EFR_BANK0; | |
329 | ||
330 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
331 | outb(value, baseio + MOXA_MUST_XON1_REGISTER); | |
332 | outb(oldlcr, baseio + UART_LCR); | |
333 | } | |
334 | ||
335 | static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) | |
336 | { | |
337 | u8 oldlcr; | |
338 | u8 efr; | |
339 | ||
340 | oldlcr = inb(baseio + UART_LCR); | |
341 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
342 | ||
343 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
344 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
345 | efr |= MOXA_MUST_EFR_BANK0; | |
346 | ||
347 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
348 | outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); | |
349 | outb(oldlcr, baseio + UART_LCR); | |
350 | } | |
351 | ||
352 | static void mxser_set_must_fifo_value(struct mxser_port *info) | |
353 | { | |
354 | u8 oldlcr; | |
355 | u8 efr; | |
356 | ||
357 | oldlcr = inb(info->ioaddr + UART_LCR); | |
358 | outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); | |
359 | ||
360 | efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
361 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
362 | efr |= MOXA_MUST_EFR_BANK1; | |
363 | ||
364 | outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
365 | outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); | |
366 | outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); | |
367 | outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); | |
368 | outb(oldlcr, info->ioaddr + UART_LCR); | |
369 | } | |
370 | ||
371 | static void mxser_set_must_enum_value(unsigned long baseio, u8 value) | |
372 | { | |
373 | u8 oldlcr; | |
374 | u8 efr; | |
375 | ||
376 | oldlcr = inb(baseio + UART_LCR); | |
377 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
378 | ||
379 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
380 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
381 | efr |= MOXA_MUST_EFR_BANK2; | |
382 | ||
383 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
384 | outb(value, baseio + MOXA_MUST_ENUM_REGISTER); | |
385 | outb(oldlcr, baseio + UART_LCR); | |
386 | } | |
387 | ||
388 | static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) | |
389 | { | |
390 | u8 oldlcr; | |
391 | u8 efr; | |
392 | ||
393 | oldlcr = inb(baseio + UART_LCR); | |
394 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
395 | ||
396 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
397 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
398 | efr |= MOXA_MUST_EFR_BANK2; | |
399 | ||
400 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
401 | *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); | |
402 | outb(oldlcr, baseio + UART_LCR); | |
403 | } | |
404 | ||
405 | static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) | |
406 | { | |
407 | u8 oldlcr; | |
408 | u8 efr; | |
409 | ||
410 | oldlcr = inb(baseio + UART_LCR); | |
411 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
412 | ||
413 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
414 | efr &= ~MOXA_MUST_EFR_SF_MASK; | |
415 | ||
416 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
417 | outb(oldlcr, baseio + UART_LCR); | |
418 | } | |
419 | ||
420 | static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) | |
421 | { | |
422 | u8 oldlcr; | |
423 | u8 efr; | |
424 | ||
425 | oldlcr = inb(baseio + UART_LCR); | |
426 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
427 | ||
428 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
429 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
430 | efr |= MOXA_MUST_EFR_SF_TX1; | |
431 | ||
432 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
433 | outb(oldlcr, baseio + UART_LCR); | |
434 | } | |
435 | ||
436 | static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) | |
437 | { | |
438 | u8 oldlcr; | |
439 | u8 efr; | |
440 | ||
441 | oldlcr = inb(baseio + UART_LCR); | |
442 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
443 | ||
444 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
445 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
446 | ||
447 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
448 | outb(oldlcr, baseio + UART_LCR); | |
449 | } | |
450 | ||
451 | static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) | |
452 | { | |
453 | u8 oldlcr; | |
454 | u8 efr; | |
455 | ||
456 | oldlcr = inb(baseio + UART_LCR); | |
457 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
458 | ||
459 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
460 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
461 | efr |= MOXA_MUST_EFR_SF_RX1; | |
462 | ||
463 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
464 | outb(oldlcr, baseio + UART_LCR); | |
465 | } | |
466 | ||
467 | static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) | |
468 | { | |
469 | u8 oldlcr; | |
470 | u8 efr; | |
471 | ||
472 | oldlcr = inb(baseio + UART_LCR); | |
473 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
474 | ||
475 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
476 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
477 | ||
478 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
479 | outb(oldlcr, baseio + UART_LCR); | |
480 | } | |
481 | ||
b8cc5549 | 482 | #ifdef CONFIG_PCI |
1c45607a | 483 | static int __devinit CheckIsMoxaMust(unsigned long io) |
1da177e4 LT |
484 | { |
485 | u8 oldmcr, hwid; | |
486 | int i; | |
487 | ||
488 | outb(0, io + UART_LCR); | |
148ff86b | 489 | mxser_disable_must_enchance_mode(io); |
1da177e4 LT |
490 | oldmcr = inb(io + UART_MCR); |
491 | outb(0, io + UART_MCR); | |
148ff86b | 492 | mxser_set_must_xon1_value(io, 0x11); |
1da177e4 LT |
493 | if ((hwid = inb(io + UART_MCR)) != 0) { |
494 | outb(oldmcr, io + UART_MCR); | |
8ea2c2ec | 495 | return MOXA_OTHER_UART; |
1da177e4 LT |
496 | } |
497 | ||
148ff86b | 498 | mxser_get_must_hardware_id(io, &hwid); |
1c45607a JS |
499 | for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ |
500 | if (hwid == Gpci_uart_info[i].type) | |
8ea2c2ec | 501 | return (int)hwid; |
1da177e4 LT |
502 | } |
503 | return MOXA_OTHER_UART; | |
504 | } | |
b8cc5549 | 505 | #endif |
1da177e4 | 506 | |
1c45607a | 507 | static void process_txrx_fifo(struct mxser_port *info) |
1da177e4 LT |
508 | { |
509 | int i; | |
510 | ||
511 | if ((info->type == PORT_16450) || (info->type == PORT_8250)) { | |
512 | info->rx_trigger = 1; | |
513 | info->rx_high_water = 1; | |
514 | info->rx_low_water = 1; | |
515 | info->xmit_fifo_size = 1; | |
1c45607a JS |
516 | } else |
517 | for (i = 0; i < UART_INFO_NUM; i++) | |
518 | if (info->board->chip_flag == Gpci_uart_info[i].type) { | |
1da177e4 LT |
519 | info->rx_trigger = Gpci_uart_info[i].rx_trigger; |
520 | info->rx_low_water = Gpci_uart_info[i].rx_low_water; | |
521 | info->rx_high_water = Gpci_uart_info[i].rx_high_water; | |
522 | info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; | |
523 | break; | |
524 | } | |
1da177e4 LT |
525 | } |
526 | ||
1c45607a | 527 | static unsigned char mxser_get_msr(int baseaddr, int mode, int port) |
1da177e4 | 528 | { |
72800df9 | 529 | static unsigned char mxser_msr[MXSER_PORTS + 1]; |
1c45607a | 530 | unsigned char status = 0; |
1da177e4 | 531 | |
1c45607a | 532 | status = inb(baseaddr + UART_MSR); |
1da177e4 | 533 | |
1c45607a JS |
534 | mxser_msr[port] &= 0x0F; |
535 | mxser_msr[port] |= status; | |
536 | status = mxser_msr[port]; | |
537 | if (mode) | |
538 | mxser_msr[port] = 0; | |
1da177e4 | 539 | |
1c45607a JS |
540 | return status; |
541 | } | |
1da177e4 | 542 | |
1c45607a JS |
543 | static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, |
544 | struct mxser_port *port) | |
545 | { | |
546 | DECLARE_WAITQUEUE(wait, current); | |
547 | int retval; | |
548 | int do_clocal = 0; | |
549 | unsigned long flags; | |
1da177e4 | 550 | |
1c45607a JS |
551 | /* |
552 | * If non-blocking mode is set, or the port is not enabled, | |
553 | * then make the check up front and then exit. | |
554 | */ | |
555 | if ((filp->f_flags & O_NONBLOCK) || | |
556 | test_bit(TTY_IO_ERROR, &tty->flags)) { | |
0ad9e7d1 | 557 | port->port.flags |= ASYNC_NORMAL_ACTIVE; |
1c45607a JS |
558 | return 0; |
559 | } | |
1da177e4 | 560 | |
1c45607a JS |
561 | if (tty->termios->c_cflag & CLOCAL) |
562 | do_clocal = 1; | |
1da177e4 | 563 | |
1da177e4 | 564 | /* |
1c45607a JS |
565 | * Block waiting for the carrier detect and the line to become |
566 | * free (i.e., not in use by the callout). While we are in | |
0ad9e7d1 | 567 | * this loop, port->port.count is dropped by one, so that |
1c45607a JS |
568 | * mxser_close() knows when to free things. We restore it upon |
569 | * exit, either normal or abnormal. | |
1da177e4 | 570 | */ |
1c45607a | 571 | retval = 0; |
0ad9e7d1 | 572 | add_wait_queue(&port->port.open_wait, &wait); |
1da177e4 | 573 | |
1c45607a JS |
574 | spin_lock_irqsave(&port->slock, flags); |
575 | if (!tty_hung_up_p(filp)) | |
0ad9e7d1 | 576 | port->port.count--; |
1c45607a | 577 | spin_unlock_irqrestore(&port->slock, flags); |
0ad9e7d1 | 578 | port->port.blocked_open++; |
1c45607a JS |
579 | while (1) { |
580 | spin_lock_irqsave(&port->slock, flags); | |
581 | outb(inb(port->ioaddr + UART_MCR) | | |
582 | UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR); | |
583 | spin_unlock_irqrestore(&port->slock, flags); | |
584 | set_current_state(TASK_INTERRUPTIBLE); | |
0ad9e7d1 AC |
585 | if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) { |
586 | if (port->port.flags & ASYNC_HUP_NOTIFY) | |
1c45607a JS |
587 | retval = -EAGAIN; |
588 | else | |
589 | retval = -ERESTARTSYS; | |
590 | break; | |
591 | } | |
0ad9e7d1 | 592 | if (!(port->port.flags & ASYNC_CLOSING) && |
1c45607a JS |
593 | (do_clocal || |
594 | (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD))) | |
595 | break; | |
596 | if (signal_pending(current)) { | |
597 | retval = -ERESTARTSYS; | |
598 | break; | |
599 | } | |
600 | schedule(); | |
1da177e4 | 601 | } |
1c45607a | 602 | set_current_state(TASK_RUNNING); |
0ad9e7d1 | 603 | remove_wait_queue(&port->port.open_wait, &wait); |
1c45607a | 604 | if (!tty_hung_up_p(filp)) |
0ad9e7d1 AC |
605 | port->port.count++; |
606 | port->port.blocked_open--; | |
1c45607a | 607 | if (retval) |
1da177e4 | 608 | return retval; |
0ad9e7d1 | 609 | port->port.flags |= ASYNC_NORMAL_ACTIVE; |
1da177e4 LT |
610 | return 0; |
611 | } | |
612 | ||
1c45607a | 613 | static int mxser_set_baud(struct mxser_port *info, long newspd) |
1da177e4 | 614 | { |
1c45607a JS |
615 | int quot = 0, baud; |
616 | unsigned char cval; | |
1da177e4 | 617 | |
0ad9e7d1 | 618 | if (!info->port.tty || !info->port.tty->termios) |
1c45607a | 619 | return -1; |
1da177e4 | 620 | |
1c45607a JS |
621 | if (!(info->ioaddr)) |
622 | return -1; | |
1da177e4 | 623 | |
1c45607a JS |
624 | if (newspd > info->max_baud) |
625 | return -1; | |
1da177e4 | 626 | |
1c45607a JS |
627 | if (newspd == 134) { |
628 | quot = 2 * info->baud_base / 269; | |
0ad9e7d1 | 629 | tty_encode_baud_rate(info->port.tty, 134, 134); |
1c45607a JS |
630 | } else if (newspd) { |
631 | quot = info->baud_base / newspd; | |
632 | if (quot == 0) | |
633 | quot = 1; | |
634 | baud = info->baud_base/quot; | |
0ad9e7d1 | 635 | tty_encode_baud_rate(info->port.tty, baud, baud); |
1c45607a JS |
636 | } else { |
637 | quot = 0; | |
638 | } | |
1da177e4 | 639 | |
1c45607a JS |
640 | info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); |
641 | info->timeout += HZ / 50; /* Add .02 seconds of slop */ | |
1da177e4 | 642 | |
1c45607a JS |
643 | if (quot) { |
644 | info->MCR |= UART_MCR_DTR; | |
645 | outb(info->MCR, info->ioaddr + UART_MCR); | |
646 | } else { | |
647 | info->MCR &= ~UART_MCR_DTR; | |
648 | outb(info->MCR, info->ioaddr + UART_MCR); | |
649 | return 0; | |
650 | } | |
1da177e4 | 651 | |
1c45607a | 652 | cval = inb(info->ioaddr + UART_LCR); |
1da177e4 | 653 | |
1c45607a | 654 | outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ |
1da177e4 | 655 | |
1c45607a JS |
656 | outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ |
657 | outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ | |
658 | outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ | |
1da177e4 | 659 | |
1c45607a | 660 | #ifdef BOTHER |
0ad9e7d1 | 661 | if (C_BAUD(info->port.tty) == BOTHER) { |
1c45607a JS |
662 | quot = info->baud_base % newspd; |
663 | quot *= 8; | |
664 | if (quot % newspd > newspd / 2) { | |
665 | quot /= newspd; | |
666 | quot++; | |
667 | } else | |
668 | quot /= newspd; | |
669 | ||
148ff86b | 670 | mxser_set_must_enum_value(info->ioaddr, quot); |
1c45607a JS |
671 | } else |
672 | #endif | |
148ff86b | 673 | mxser_set_must_enum_value(info->ioaddr, 0); |
1da177e4 | 674 | |
8ea2c2ec | 675 | return 0; |
1da177e4 | 676 | } |
1da177e4 | 677 | |
1c45607a JS |
678 | /* |
679 | * This routine is called to set the UART divisor registers to match | |
680 | * the specified baud rate for a serial port. | |
681 | */ | |
682 | static int mxser_change_speed(struct mxser_port *info, | |
683 | struct ktermios *old_termios) | |
1da177e4 | 684 | { |
1c45607a JS |
685 | unsigned cflag, cval, fcr; |
686 | int ret = 0; | |
687 | unsigned char status; | |
1da177e4 | 688 | |
0ad9e7d1 | 689 | if (!info->port.tty || !info->port.tty->termios) |
1c45607a | 690 | return ret; |
0ad9e7d1 | 691 | cflag = info->port.tty->termios->c_cflag; |
1c45607a JS |
692 | if (!(info->ioaddr)) |
693 | return ret; | |
1da177e4 | 694 | |
0ad9e7d1 AC |
695 | if (mxser_set_baud_method[info->port.tty->index] == 0) |
696 | mxser_set_baud(info, tty_get_baud_rate(info->port.tty)); | |
1da177e4 | 697 | |
1c45607a JS |
698 | /* byte size and parity */ |
699 | switch (cflag & CSIZE) { | |
700 | case CS5: | |
701 | cval = 0x00; | |
702 | break; | |
703 | case CS6: | |
704 | cval = 0x01; | |
705 | break; | |
706 | case CS7: | |
707 | cval = 0x02; | |
708 | break; | |
709 | case CS8: | |
710 | cval = 0x03; | |
711 | break; | |
712 | default: | |
713 | cval = 0x00; | |
714 | break; /* too keep GCC shut... */ | |
715 | } | |
716 | if (cflag & CSTOPB) | |
717 | cval |= 0x04; | |
718 | if (cflag & PARENB) | |
719 | cval |= UART_LCR_PARITY; | |
720 | if (!(cflag & PARODD)) | |
721 | cval |= UART_LCR_EPAR; | |
722 | if (cflag & CMSPAR) | |
723 | cval |= UART_LCR_SPAR; | |
1da177e4 | 724 | |
1c45607a JS |
725 | if ((info->type == PORT_8250) || (info->type == PORT_16450)) { |
726 | if (info->board->chip_flag) { | |
727 | fcr = UART_FCR_ENABLE_FIFO; | |
728 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 729 | mxser_set_must_fifo_value(info); |
1c45607a JS |
730 | } else |
731 | fcr = 0; | |
732 | } else { | |
733 | fcr = UART_FCR_ENABLE_FIFO; | |
734 | if (info->board->chip_flag) { | |
735 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 736 | mxser_set_must_fifo_value(info); |
1c45607a JS |
737 | } else { |
738 | switch (info->rx_trigger) { | |
739 | case 1: | |
740 | fcr |= UART_FCR_TRIGGER_1; | |
741 | break; | |
742 | case 4: | |
743 | fcr |= UART_FCR_TRIGGER_4; | |
744 | break; | |
745 | case 8: | |
746 | fcr |= UART_FCR_TRIGGER_8; | |
747 | break; | |
748 | default: | |
749 | fcr |= UART_FCR_TRIGGER_14; | |
750 | break; | |
751 | } | |
1da177e4 | 752 | } |
1da177e4 LT |
753 | } |
754 | ||
1c45607a JS |
755 | /* CTS flow control flag and modem status interrupts */ |
756 | info->IER &= ~UART_IER_MSI; | |
757 | info->MCR &= ~UART_MCR_AFE; | |
758 | if (cflag & CRTSCTS) { | |
0ad9e7d1 | 759 | info->port.flags |= ASYNC_CTS_FLOW; |
1c45607a JS |
760 | info->IER |= UART_IER_MSI; |
761 | if ((info->type == PORT_16550A) || (info->board->chip_flag)) { | |
762 | info->MCR |= UART_MCR_AFE; | |
763 | } else { | |
764 | status = inb(info->ioaddr + UART_MSR); | |
0ad9e7d1 | 765 | if (info->port.tty->hw_stopped) { |
1c45607a | 766 | if (status & UART_MSR_CTS) { |
0ad9e7d1 | 767 | info->port.tty->hw_stopped = 0; |
1c45607a JS |
768 | if (info->type != PORT_16550A && |
769 | !info->board->chip_flag) { | |
770 | outb(info->IER & ~UART_IER_THRI, | |
771 | info->ioaddr + | |
772 | UART_IER); | |
773 | info->IER |= UART_IER_THRI; | |
774 | outb(info->IER, info->ioaddr + | |
775 | UART_IER); | |
776 | } | |
0ad9e7d1 | 777 | tty_wakeup(info->port.tty); |
1c45607a JS |
778 | } |
779 | } else { | |
780 | if (!(status & UART_MSR_CTS)) { | |
0ad9e7d1 | 781 | info->port.tty->hw_stopped = 1; |
1c45607a JS |
782 | if ((info->type != PORT_16550A) && |
783 | (!info->board->chip_flag)) { | |
784 | info->IER &= ~UART_IER_THRI; | |
785 | outb(info->IER, info->ioaddr + | |
786 | UART_IER); | |
787 | } | |
788 | } | |
789 | } | |
1da177e4 | 790 | } |
1c45607a | 791 | } else { |
0ad9e7d1 | 792 | info->port.flags &= ~ASYNC_CTS_FLOW; |
1c45607a JS |
793 | } |
794 | outb(info->MCR, info->ioaddr + UART_MCR); | |
795 | if (cflag & CLOCAL) { | |
0ad9e7d1 | 796 | info->port.flags &= ~ASYNC_CHECK_CD; |
1c45607a | 797 | } else { |
0ad9e7d1 | 798 | info->port.flags |= ASYNC_CHECK_CD; |
1c45607a JS |
799 | info->IER |= UART_IER_MSI; |
800 | } | |
801 | outb(info->IER, info->ioaddr + UART_IER); | |
802 | ||
803 | /* | |
804 | * Set up parity check flag | |
805 | */ | |
806 | info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; | |
0ad9e7d1 | 807 | if (I_INPCK(info->port.tty)) |
1c45607a | 808 | info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; |
0ad9e7d1 | 809 | if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty)) |
1c45607a | 810 | info->read_status_mask |= UART_LSR_BI; |
1da177e4 | 811 | |
1c45607a | 812 | info->ignore_status_mask = 0; |
1da177e4 | 813 | |
0ad9e7d1 | 814 | if (I_IGNBRK(info->port.tty)) { |
1c45607a JS |
815 | info->ignore_status_mask |= UART_LSR_BI; |
816 | info->read_status_mask |= UART_LSR_BI; | |
8ea2c2ec | 817 | /* |
1c45607a JS |
818 | * If we're ignore parity and break indicators, ignore |
819 | * overruns too. (For real raw support). | |
8ea2c2ec | 820 | */ |
0ad9e7d1 | 821 | if (I_IGNPAR(info->port.tty)) { |
1c45607a JS |
822 | info->ignore_status_mask |= |
823 | UART_LSR_OE | | |
824 | UART_LSR_PE | | |
825 | UART_LSR_FE; | |
826 | info->read_status_mask |= | |
827 | UART_LSR_OE | | |
828 | UART_LSR_PE | | |
829 | UART_LSR_FE; | |
830 | } | |
1da177e4 | 831 | } |
1c45607a | 832 | if (info->board->chip_flag) { |
0ad9e7d1 AC |
833 | mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty)); |
834 | mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty)); | |
835 | if (I_IXON(info->port.tty)) { | |
148ff86b CH |
836 | mxser_enable_must_rx_software_flow_control( |
837 | info->ioaddr); | |
1c45607a | 838 | } else { |
148ff86b CH |
839 | mxser_disable_must_rx_software_flow_control( |
840 | info->ioaddr); | |
1da177e4 | 841 | } |
0ad9e7d1 | 842 | if (I_IXOFF(info->port.tty)) { |
148ff86b CH |
843 | mxser_enable_must_tx_software_flow_control( |
844 | info->ioaddr); | |
1c45607a | 845 | } else { |
148ff86b CH |
846 | mxser_disable_must_tx_software_flow_control( |
847 | info->ioaddr); | |
1da177e4 LT |
848 | } |
849 | } | |
1da177e4 | 850 | |
1da177e4 | 851 | |
1c45607a JS |
852 | outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ |
853 | outb(cval, info->ioaddr + UART_LCR); | |
1da177e4 | 854 | |
1c45607a | 855 | return ret; |
1da177e4 LT |
856 | } |
857 | ||
1c45607a | 858 | static void mxser_check_modem_status(struct mxser_port *port, int status) |
1da177e4 | 859 | { |
1c45607a JS |
860 | /* update input line counters */ |
861 | if (status & UART_MSR_TERI) | |
862 | port->icount.rng++; | |
863 | if (status & UART_MSR_DDSR) | |
864 | port->icount.dsr++; | |
865 | if (status & UART_MSR_DDCD) | |
866 | port->icount.dcd++; | |
867 | if (status & UART_MSR_DCTS) | |
868 | port->icount.cts++; | |
869 | port->mon_data.modem_status = status; | |
870 | wake_up_interruptible(&port->delta_msr_wait); | |
1da177e4 | 871 | |
0ad9e7d1 | 872 | if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { |
1c45607a | 873 | if (status & UART_MSR_DCD) |
0ad9e7d1 | 874 | wake_up_interruptible(&port->port.open_wait); |
1c45607a | 875 | } |
1da177e4 | 876 | |
0ad9e7d1 AC |
877 | if (port->port.flags & ASYNC_CTS_FLOW) { |
878 | if (port->port.tty->hw_stopped) { | |
1c45607a | 879 | if (status & UART_MSR_CTS) { |
0ad9e7d1 | 880 | port->port.tty->hw_stopped = 0; |
1c45607a JS |
881 | |
882 | if ((port->type != PORT_16550A) && | |
883 | (!port->board->chip_flag)) { | |
884 | outb(port->IER & ~UART_IER_THRI, | |
885 | port->ioaddr + UART_IER); | |
886 | port->IER |= UART_IER_THRI; | |
887 | outb(port->IER, port->ioaddr + | |
888 | UART_IER); | |
889 | } | |
0ad9e7d1 | 890 | tty_wakeup(port->port.tty); |
1c45607a JS |
891 | } |
892 | } else { | |
893 | if (!(status & UART_MSR_CTS)) { | |
0ad9e7d1 | 894 | port->port.tty->hw_stopped = 1; |
1c45607a JS |
895 | if (port->type != PORT_16550A && |
896 | !port->board->chip_flag) { | |
897 | port->IER &= ~UART_IER_THRI; | |
898 | outb(port->IER, port->ioaddr + | |
899 | UART_IER); | |
900 | } | |
901 | } | |
902 | } | |
1da177e4 LT |
903 | } |
904 | } | |
905 | ||
1c45607a | 906 | static int mxser_startup(struct mxser_port *info) |
1da177e4 | 907 | { |
1c45607a JS |
908 | unsigned long page; |
909 | unsigned long flags; | |
1da177e4 | 910 | |
1c45607a JS |
911 | page = __get_free_page(GFP_KERNEL); |
912 | if (!page) | |
913 | return -ENOMEM; | |
1da177e4 | 914 | |
1c45607a | 915 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 916 | |
0ad9e7d1 | 917 | if (info->port.flags & ASYNC_INITIALIZED) { |
1c45607a JS |
918 | free_page(page); |
919 | spin_unlock_irqrestore(&info->slock, flags); | |
920 | return 0; | |
921 | } | |
6f08b72c | 922 | |
1c45607a | 923 | if (!info->ioaddr || !info->type) { |
0ad9e7d1 AC |
924 | if (info->port.tty) |
925 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | |
1c45607a JS |
926 | free_page(page); |
927 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 928 | return 0; |
1c45607a | 929 | } |
0ad9e7d1 | 930 | if (info->port.xmit_buf) |
1c45607a JS |
931 | free_page(page); |
932 | else | |
0ad9e7d1 | 933 | info->port.xmit_buf = (unsigned char *) page; |
1da177e4 | 934 | |
1da177e4 | 935 | /* |
1c45607a JS |
936 | * Clear the FIFO buffers and disable them |
937 | * (they will be reenabled in mxser_change_speed()) | |
1da177e4 | 938 | */ |
1c45607a JS |
939 | if (info->board->chip_flag) |
940 | outb((UART_FCR_CLEAR_RCVR | | |
941 | UART_FCR_CLEAR_XMIT | | |
942 | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); | |
943 | else | |
944 | outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
945 | info->ioaddr + UART_FCR); | |
1da177e4 | 946 | |
1c45607a JS |
947 | /* |
948 | * At this point there's no way the LSR could still be 0xFF; | |
949 | * if it is, then bail out, because there's likely no UART | |
950 | * here. | |
951 | */ | |
952 | if (inb(info->ioaddr + UART_LSR) == 0xff) { | |
953 | spin_unlock_irqrestore(&info->slock, flags); | |
954 | if (capable(CAP_SYS_ADMIN)) { | |
0ad9e7d1 AC |
955 | if (info->port.tty) |
956 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | |
1c45607a JS |
957 | return 0; |
958 | } else | |
959 | return -ENODEV; | |
960 | } | |
1da177e4 | 961 | |
1c45607a JS |
962 | /* |
963 | * Clear the interrupt registers. | |
964 | */ | |
965 | (void) inb(info->ioaddr + UART_LSR); | |
966 | (void) inb(info->ioaddr + UART_RX); | |
967 | (void) inb(info->ioaddr + UART_IIR); | |
968 | (void) inb(info->ioaddr + UART_MSR); | |
969 | ||
970 | /* | |
971 | * Now, initialize the UART | |
972 | */ | |
973 | outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ | |
974 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | |
975 | outb(info->MCR, info->ioaddr + UART_MCR); | |
976 | ||
977 | /* | |
978 | * Finally, enable interrupts | |
979 | */ | |
980 | info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; | |
981 | ||
982 | if (info->board->chip_flag) | |
983 | info->IER |= MOXA_MUST_IER_EGDAI; | |
984 | outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ | |
985 | ||
986 | /* | |
987 | * And clear the interrupt registers again for luck. | |
988 | */ | |
989 | (void) inb(info->ioaddr + UART_LSR); | |
990 | (void) inb(info->ioaddr + UART_RX); | |
991 | (void) inb(info->ioaddr + UART_IIR); | |
992 | (void) inb(info->ioaddr + UART_MSR); | |
993 | ||
0ad9e7d1 AC |
994 | if (info->port.tty) |
995 | clear_bit(TTY_IO_ERROR, &info->port.tty->flags); | |
1c45607a JS |
996 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
997 | ||
998 | /* | |
999 | * and set the speed of the serial port | |
1000 | */ | |
1001 | mxser_change_speed(info, NULL); | |
0ad9e7d1 | 1002 | info->port.flags |= ASYNC_INITIALIZED; |
1c45607a JS |
1003 | spin_unlock_irqrestore(&info->slock, flags); |
1004 | ||
1005 | return 0; | |
1006 | } | |
1007 | ||
1008 | /* | |
1009 | * This routine will shutdown a serial port; interrupts maybe disabled, and | |
1010 | * DTR is dropped if the hangup on close termio flag is on. | |
1011 | */ | |
1012 | static void mxser_shutdown(struct mxser_port *info) | |
1013 | { | |
1014 | unsigned long flags; | |
1015 | ||
0ad9e7d1 | 1016 | if (!(info->port.flags & ASYNC_INITIALIZED)) |
1c45607a JS |
1017 | return; |
1018 | ||
1019 | spin_lock_irqsave(&info->slock, flags); | |
1020 | ||
1021 | /* | |
1022 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | |
1023 | * here so the queue might never be waken up | |
1024 | */ | |
1025 | wake_up_interruptible(&info->delta_msr_wait); | |
1026 | ||
1027 | /* | |
1028 | * Free the IRQ, if necessary | |
1029 | */ | |
0ad9e7d1 AC |
1030 | if (info->port.xmit_buf) { |
1031 | free_page((unsigned long) info->port.xmit_buf); | |
1032 | info->port.xmit_buf = NULL; | |
1da177e4 LT |
1033 | } |
1034 | ||
1c45607a JS |
1035 | info->IER = 0; |
1036 | outb(0x00, info->ioaddr + UART_IER); | |
1037 | ||
0ad9e7d1 | 1038 | if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL)) |
1c45607a JS |
1039 | info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS); |
1040 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1041 | ||
1042 | /* clear Rx/Tx FIFO's */ | |
1043 | if (info->board->chip_flag) | |
1044 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | | |
1045 | MOXA_MUST_FCR_GDA_MODE_ENABLE, | |
1046 | info->ioaddr + UART_FCR); | |
1047 | else | |
1048 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, | |
1049 | info->ioaddr + UART_FCR); | |
1050 | ||
1051 | /* read data port to reset things */ | |
1052 | (void) inb(info->ioaddr + UART_RX); | |
1053 | ||
0ad9e7d1 AC |
1054 | if (info->port.tty) |
1055 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | |
1c45607a | 1056 | |
0ad9e7d1 | 1057 | info->port.flags &= ~ASYNC_INITIALIZED; |
1c45607a JS |
1058 | |
1059 | if (info->board->chip_flag) | |
1060 | SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
1061 | ||
1062 | spin_unlock_irqrestore(&info->slock, flags); | |
1063 | } | |
1064 | ||
1065 | /* | |
1066 | * This routine is called whenever a serial port is opened. It | |
1067 | * enables interrupts for a serial port, linking in its async structure into | |
1068 | * the IRQ chain. It also performs the serial-specific | |
1069 | * initialization for the tty structure. | |
1070 | */ | |
1071 | static int mxser_open(struct tty_struct *tty, struct file *filp) | |
1072 | { | |
1073 | struct mxser_port *info; | |
1074 | unsigned long flags; | |
1075 | int retval, line; | |
1076 | ||
1077 | line = tty->index; | |
1078 | if (line == MXSER_PORTS) | |
1079 | return 0; | |
1080 | if (line < 0 || line > MXSER_PORTS) | |
1081 | return -ENODEV; | |
1082 | info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; | |
1083 | if (!info->ioaddr) | |
1084 | return -ENODEV; | |
1085 | ||
1086 | tty->driver_data = info; | |
0ad9e7d1 | 1087 | info->port.tty = tty; |
8ea2c2ec | 1088 | /* |
1c45607a JS |
1089 | * Start up serial port |
1090 | */ | |
1091 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1092 | info->port.count++; |
1c45607a JS |
1093 | spin_unlock_irqrestore(&info->slock, flags); |
1094 | retval = mxser_startup(info); | |
1095 | if (retval) | |
1096 | return retval; | |
1097 | ||
1098 | retval = mxser_block_til_ready(tty, filp, info); | |
1099 | if (retval) | |
1100 | return retval; | |
1da177e4 | 1101 | |
8cddd707 | 1102 | /* unmark here for very high baud rate (ex. 921600 bps) used */ |
1da177e4 LT |
1103 | tty->low_latency = 1; |
1104 | return 0; | |
1105 | } | |
1106 | ||
978e595f AC |
1107 | static void mxser_flush_buffer(struct tty_struct *tty) |
1108 | { | |
1109 | struct mxser_port *info = tty->driver_data; | |
1110 | char fcr; | |
1111 | unsigned long flags; | |
1112 | ||
1113 | ||
1114 | spin_lock_irqsave(&info->slock, flags); | |
1115 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
1116 | ||
1117 | fcr = inb(info->ioaddr + UART_FCR); | |
1118 | outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
1119 | info->ioaddr + UART_FCR); | |
1120 | outb(fcr, info->ioaddr + UART_FCR); | |
1121 | ||
1122 | spin_unlock_irqrestore(&info->slock, flags); | |
1123 | ||
1124 | tty_wakeup(tty); | |
1125 | } | |
1126 | ||
1127 | ||
1da177e4 LT |
1128 | /* |
1129 | * This routine is called when the serial port gets closed. First, we | |
1130 | * wait for the last remaining data to be sent. Then, we unlink its | |
1131 | * async structure from the interrupt chain if necessary, and we free | |
1132 | * that IRQ if nothing is left in the chain. | |
1133 | */ | |
1134 | static void mxser_close(struct tty_struct *tty, struct file *filp) | |
1135 | { | |
1c45607a | 1136 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1137 | |
1138 | unsigned long timeout; | |
1139 | unsigned long flags; | |
1da177e4 LT |
1140 | |
1141 | if (tty->index == MXSER_PORTS) | |
1142 | return; | |
1143 | if (!info) | |
6f08b72c | 1144 | return; |
1da177e4 LT |
1145 | |
1146 | spin_lock_irqsave(&info->slock, flags); | |
1147 | ||
1148 | if (tty_hung_up_p(filp)) { | |
1149 | spin_unlock_irqrestore(&info->slock, flags); | |
1150 | return; | |
1151 | } | |
0ad9e7d1 | 1152 | if ((tty->count == 1) && (info->port.count != 1)) { |
1da177e4 LT |
1153 | /* |
1154 | * Uh, oh. tty->count is 1, which means that the tty | |
0ad9e7d1 | 1155 | * structure will be freed. Info->port.count should always |
1da177e4 LT |
1156 | * be one in these conditions. If it's greater than |
1157 | * one, we've got real problems, since it means the | |
1158 | * serial port won't be shutdown. | |
1159 | */ | |
8ea2c2ec | 1160 | printk(KERN_ERR "mxser_close: bad serial port count; " |
0ad9e7d1 AC |
1161 | "tty->count is 1, info->port.count is %d\n", info->port.count); |
1162 | info->port.count = 1; | |
1da177e4 | 1163 | } |
0ad9e7d1 | 1164 | if (--info->port.count < 0) { |
8ea2c2ec | 1165 | printk(KERN_ERR "mxser_close: bad serial port count for " |
0ad9e7d1 AC |
1166 | "ttys%d: %d\n", tty->index, info->port.count); |
1167 | info->port.count = 0; | |
1da177e4 | 1168 | } |
0ad9e7d1 | 1169 | if (info->port.count) { |
1da177e4 LT |
1170 | spin_unlock_irqrestore(&info->slock, flags); |
1171 | return; | |
1172 | } | |
0ad9e7d1 | 1173 | info->port.flags |= ASYNC_CLOSING; |
1da177e4 LT |
1174 | spin_unlock_irqrestore(&info->slock, flags); |
1175 | /* | |
1176 | * Save the termios structure, since this port may have | |
1177 | * separate termios for callout and dialin. | |
1178 | */ | |
0ad9e7d1 | 1179 | if (info->port.flags & ASYNC_NORMAL_ACTIVE) |
1da177e4 LT |
1180 | info->normal_termios = *tty->termios; |
1181 | /* | |
1182 | * Now we wait for the transmit buffer to clear; and we notify | |
1183 | * the line discipline to only process XON/XOFF characters. | |
1184 | */ | |
1185 | tty->closing = 1; | |
44b7d1b3 AC |
1186 | if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE) |
1187 | tty_wait_until_sent(tty, info->port.closing_wait); | |
1da177e4 LT |
1188 | /* |
1189 | * At this point we stop accepting input. To do this, we | |
1190 | * disable the receive line status interrupts, and tell the | |
1191 | * interrupt driver to stop checking the data ready bit in the | |
1192 | * line status register. | |
1193 | */ | |
1194 | info->IER &= ~UART_IER_RLSI; | |
1c45607a | 1195 | if (info->board->chip_flag) |
1da177e4 | 1196 | info->IER &= ~MOXA_MUST_RECV_ISR; |
1c45607a | 1197 | |
0ad9e7d1 | 1198 | if (info->port.flags & ASYNC_INITIALIZED) { |
1c45607a | 1199 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1200 | /* |
1201 | * Before we drop DTR, make sure the UART transmitter | |
1202 | * has completely drained; this is especially | |
1203 | * important if there is a transmit FIFO! | |
1204 | */ | |
1205 | timeout = jiffies + HZ; | |
1c45607a | 1206 | while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { |
da4cd8df | 1207 | schedule_timeout_interruptible(5); |
1da177e4 LT |
1208 | if (time_after(jiffies, timeout)) |
1209 | break; | |
1210 | } | |
1211 | } | |
1212 | mxser_shutdown(info); | |
1213 | ||
978e595f | 1214 | mxser_flush_buffer(tty); |
1c45607a JS |
1215 | tty_ldisc_flush(tty); |
1216 | ||
1da177e4 | 1217 | tty->closing = 0; |
0ad9e7d1 AC |
1218 | info->port.tty = NULL; |
1219 | if (info->port.blocked_open) { | |
44b7d1b3 AC |
1220 | if (info->port.close_delay) |
1221 | schedule_timeout_interruptible(info->port.close_delay); | |
0ad9e7d1 | 1222 | wake_up_interruptible(&info->port.open_wait); |
1da177e4 LT |
1223 | } |
1224 | ||
0ad9e7d1 | 1225 | info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); |
1da177e4 LT |
1226 | } |
1227 | ||
1228 | static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
1229 | { | |
1230 | int c, total = 0; | |
1c45607a | 1231 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1232 | unsigned long flags; |
1233 | ||
0ad9e7d1 | 1234 | if (!info->port.xmit_buf) |
8ea2c2ec | 1235 | return 0; |
1da177e4 LT |
1236 | |
1237 | while (1) { | |
8ea2c2ec JJ |
1238 | c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, |
1239 | SERIAL_XMIT_SIZE - info->xmit_head)); | |
1da177e4 LT |
1240 | if (c <= 0) |
1241 | break; | |
1242 | ||
0ad9e7d1 | 1243 | memcpy(info->port.xmit_buf + info->xmit_head, buf, c); |
1da177e4 | 1244 | spin_lock_irqsave(&info->slock, flags); |
8ea2c2ec JJ |
1245 | info->xmit_head = (info->xmit_head + c) & |
1246 | (SERIAL_XMIT_SIZE - 1); | |
1da177e4 LT |
1247 | info->xmit_cnt += c; |
1248 | spin_unlock_irqrestore(&info->slock, flags); | |
1249 | ||
1250 | buf += c; | |
1251 | count -= c; | |
1252 | total += c; | |
1da177e4 LT |
1253 | } |
1254 | ||
1c45607a | 1255 | if (info->xmit_cnt && !tty->stopped) { |
8ea2c2ec JJ |
1256 | if (!tty->hw_stopped || |
1257 | (info->type == PORT_16550A) || | |
1c45607a | 1258 | (info->board->chip_flag)) { |
1da177e4 | 1259 | spin_lock_irqsave(&info->slock, flags); |
1c45607a JS |
1260 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + |
1261 | UART_IER); | |
1da177e4 | 1262 | info->IER |= UART_IER_THRI; |
1c45607a | 1263 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1264 | spin_unlock_irqrestore(&info->slock, flags); |
1265 | } | |
1266 | } | |
1267 | return total; | |
1268 | } | |
1269 | ||
0be2eade | 1270 | static int mxser_put_char(struct tty_struct *tty, unsigned char ch) |
1da177e4 | 1271 | { |
1c45607a | 1272 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1273 | unsigned long flags; |
1274 | ||
0ad9e7d1 | 1275 | if (!info->port.xmit_buf) |
0be2eade | 1276 | return 0; |
1da177e4 LT |
1277 | |
1278 | if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) | |
0be2eade | 1279 | return 0; |
1da177e4 LT |
1280 | |
1281 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1282 | info->port.xmit_buf[info->xmit_head++] = ch; |
1da177e4 LT |
1283 | info->xmit_head &= SERIAL_XMIT_SIZE - 1; |
1284 | info->xmit_cnt++; | |
1285 | spin_unlock_irqrestore(&info->slock, flags); | |
1c45607a | 1286 | if (!tty->stopped) { |
8ea2c2ec JJ |
1287 | if (!tty->hw_stopped || |
1288 | (info->type == PORT_16550A) || | |
1c45607a | 1289 | info->board->chip_flag) { |
1da177e4 | 1290 | spin_lock_irqsave(&info->slock, flags); |
1c45607a | 1291 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1292 | info->IER |= UART_IER_THRI; |
1c45607a | 1293 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1294 | spin_unlock_irqrestore(&info->slock, flags); |
1295 | } | |
1296 | } | |
0be2eade | 1297 | return 1; |
1da177e4 LT |
1298 | } |
1299 | ||
1300 | ||
1301 | static void mxser_flush_chars(struct tty_struct *tty) | |
1302 | { | |
1c45607a | 1303 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1304 | unsigned long flags; |
1305 | ||
ace7dd96 JS |
1306 | if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || |
1307 | (tty->hw_stopped && info->type != PORT_16550A && | |
1308 | !info->board->chip_flag)) | |
1da177e4 LT |
1309 | return; |
1310 | ||
1311 | spin_lock_irqsave(&info->slock, flags); | |
1312 | ||
1c45607a | 1313 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1314 | info->IER |= UART_IER_THRI; |
1c45607a | 1315 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1316 | |
1317 | spin_unlock_irqrestore(&info->slock, flags); | |
1318 | } | |
1319 | ||
1320 | static int mxser_write_room(struct tty_struct *tty) | |
1321 | { | |
1c45607a | 1322 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1323 | int ret; |
1324 | ||
1325 | ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; | |
ace7dd96 | 1326 | return ret < 0 ? 0 : ret; |
1da177e4 LT |
1327 | } |
1328 | ||
1329 | static int mxser_chars_in_buffer(struct tty_struct *tty) | |
1330 | { | |
1c45607a | 1331 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1332 | return info->xmit_cnt; |
1333 | } | |
1334 | ||
1c45607a JS |
1335 | /* |
1336 | * ------------------------------------------------------------ | |
1337 | * friends of mxser_ioctl() | |
1338 | * ------------------------------------------------------------ | |
1339 | */ | |
1340 | static int mxser_get_serial_info(struct mxser_port *info, | |
1341 | struct serial_struct __user *retinfo) | |
1342 | { | |
1343 | struct serial_struct tmp = { | |
1344 | .type = info->type, | |
0ad9e7d1 | 1345 | .line = info->port.tty->index, |
1c45607a JS |
1346 | .port = info->ioaddr, |
1347 | .irq = info->board->irq, | |
0ad9e7d1 | 1348 | .flags = info->port.flags, |
1c45607a | 1349 | .baud_base = info->baud_base, |
44b7d1b3 AC |
1350 | .close_delay = info->port.close_delay, |
1351 | .closing_wait = info->port.closing_wait, | |
1c45607a JS |
1352 | .custom_divisor = info->custom_divisor, |
1353 | .hub6 = 0 | |
1354 | }; | |
1355 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) | |
1356 | return -EFAULT; | |
1357 | return 0; | |
1358 | } | |
1359 | ||
1360 | static int mxser_set_serial_info(struct mxser_port *info, | |
1361 | struct serial_struct __user *new_info) | |
1da177e4 | 1362 | { |
1c45607a | 1363 | struct serial_struct new_serial; |
80ff8a80 | 1364 | speed_t baud; |
1c45607a JS |
1365 | unsigned long sl_flags; |
1366 | unsigned int flags; | |
1367 | int retval = 0; | |
1da177e4 | 1368 | |
1c45607a | 1369 | if (!new_info || !info->ioaddr) |
80ff8a80 | 1370 | return -ENODEV; |
1c45607a JS |
1371 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) |
1372 | return -EFAULT; | |
1da177e4 | 1373 | |
80ff8a80 JS |
1374 | if (new_serial.irq != info->board->irq || |
1375 | new_serial.port != info->ioaddr) | |
1376 | return -EINVAL; | |
1da177e4 | 1377 | |
0ad9e7d1 | 1378 | flags = info->port.flags & ASYNC_SPD_MASK; |
1da177e4 | 1379 | |
1c45607a JS |
1380 | if (!capable(CAP_SYS_ADMIN)) { |
1381 | if ((new_serial.baud_base != info->baud_base) || | |
44b7d1b3 | 1382 | (new_serial.close_delay != info->port.close_delay) || |
0ad9e7d1 | 1383 | ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) |
1c45607a | 1384 | return -EPERM; |
0ad9e7d1 | 1385 | info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | |
1c45607a JS |
1386 | (new_serial.flags & ASYNC_USR_MASK)); |
1387 | } else { | |
1da177e4 | 1388 | /* |
1c45607a JS |
1389 | * OK, past this point, all the error checking has been done. |
1390 | * At this point, we start making changes..... | |
1da177e4 | 1391 | */ |
0ad9e7d1 | 1392 | info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) | |
1c45607a | 1393 | (new_serial.flags & ASYNC_FLAGS)); |
44b7d1b3 AC |
1394 | info->port.close_delay = new_serial.close_delay * HZ / 100; |
1395 | info->port.closing_wait = new_serial.closing_wait * HZ / 100; | |
0ad9e7d1 AC |
1396 | info->port.tty->low_latency = |
1397 | (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; | |
0ad9e7d1 | 1398 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && |
80ff8a80 JS |
1399 | (new_serial.baud_base != info->baud_base || |
1400 | new_serial.custom_divisor != | |
1401 | info->custom_divisor)) { | |
1402 | baud = new_serial.baud_base / new_serial.custom_divisor; | |
0ad9e7d1 | 1403 | tty_encode_baud_rate(info->port.tty, baud, baud); |
80ff8a80 | 1404 | } |
1c45607a | 1405 | } |
fc83815c | 1406 | |
1c45607a | 1407 | info->type = new_serial.type; |
1da177e4 | 1408 | |
1c45607a JS |
1409 | process_txrx_fifo(info); |
1410 | ||
0ad9e7d1 AC |
1411 | if (info->port.flags & ASYNC_INITIALIZED) { |
1412 | if (flags != (info->port.flags & ASYNC_SPD_MASK)) { | |
1c45607a JS |
1413 | spin_lock_irqsave(&info->slock, sl_flags); |
1414 | mxser_change_speed(info, NULL); | |
1415 | spin_unlock_irqrestore(&info->slock, sl_flags); | |
1da177e4 | 1416 | } |
1c45607a JS |
1417 | } else |
1418 | retval = mxser_startup(info); | |
1da177e4 | 1419 | |
1c45607a JS |
1420 | return retval; |
1421 | } | |
1da177e4 | 1422 | |
1c45607a JS |
1423 | /* |
1424 | * mxser_get_lsr_info - get line status register info | |
1425 | * | |
1426 | * Purpose: Let user call ioctl() to get info when the UART physically | |
1427 | * is emptied. On bus types like RS485, the transmitter must | |
1428 | * release the bus after transmitting. This must be done when | |
1429 | * the transmit shift register is empty, not be done when the | |
1430 | * transmit holding register is empty. This functionality | |
1431 | * allows an RS485 driver to be written in user space. | |
1432 | */ | |
1433 | static int mxser_get_lsr_info(struct mxser_port *info, | |
1434 | unsigned int __user *value) | |
1435 | { | |
1436 | unsigned char status; | |
1437 | unsigned int result; | |
1438 | unsigned long flags; | |
1da177e4 | 1439 | |
1c45607a JS |
1440 | spin_lock_irqsave(&info->slock, flags); |
1441 | status = inb(info->ioaddr + UART_LSR); | |
1442 | spin_unlock_irqrestore(&info->slock, flags); | |
1443 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | |
1444 | return put_user(result, value); | |
1445 | } | |
1da177e4 | 1446 | |
1c45607a JS |
1447 | static int mxser_tiocmget(struct tty_struct *tty, struct file *file) |
1448 | { | |
1449 | struct mxser_port *info = tty->driver_data; | |
1450 | unsigned char control, status; | |
1451 | unsigned long flags; | |
1da177e4 | 1452 | |
8ea2c2ec | 1453 | |
1c45607a JS |
1454 | if (tty->index == MXSER_PORTS) |
1455 | return -ENOIOCTLCMD; | |
1456 | if (test_bit(TTY_IO_ERROR, &tty->flags)) | |
1457 | return -EIO; | |
1da177e4 | 1458 | |
1c45607a | 1459 | control = info->MCR; |
1da177e4 | 1460 | |
1c45607a JS |
1461 | spin_lock_irqsave(&info->slock, flags); |
1462 | status = inb(info->ioaddr + UART_MSR); | |
1463 | if (status & UART_MSR_ANY_DELTA) | |
1464 | mxser_check_modem_status(info, status); | |
1465 | spin_unlock_irqrestore(&info->slock, flags); | |
1466 | return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | | |
1467 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | | |
1468 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | | |
1469 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | | |
1470 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | | |
1471 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | |
1472 | } | |
1da177e4 | 1473 | |
1c45607a JS |
1474 | static int mxser_tiocmset(struct tty_struct *tty, struct file *file, |
1475 | unsigned int set, unsigned int clear) | |
1476 | { | |
1477 | struct mxser_port *info = tty->driver_data; | |
1478 | unsigned long flags; | |
1da177e4 | 1479 | |
1da177e4 | 1480 | |
1c45607a JS |
1481 | if (tty->index == MXSER_PORTS) |
1482 | return -ENOIOCTLCMD; | |
1483 | if (test_bit(TTY_IO_ERROR, &tty->flags)) | |
1484 | return -EIO; | |
1da177e4 | 1485 | |
1c45607a | 1486 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 1487 | |
1c45607a JS |
1488 | if (set & TIOCM_RTS) |
1489 | info->MCR |= UART_MCR_RTS; | |
1490 | if (set & TIOCM_DTR) | |
1491 | info->MCR |= UART_MCR_DTR; | |
1da177e4 | 1492 | |
1c45607a JS |
1493 | if (clear & TIOCM_RTS) |
1494 | info->MCR &= ~UART_MCR_RTS; | |
1495 | if (clear & TIOCM_DTR) | |
1496 | info->MCR &= ~UART_MCR_DTR; | |
8ea2c2ec | 1497 | |
1c45607a JS |
1498 | outb(info->MCR, info->ioaddr + UART_MCR); |
1499 | spin_unlock_irqrestore(&info->slock, flags); | |
1500 | return 0; | |
1501 | } | |
1da177e4 | 1502 | |
1c45607a JS |
1503 | static int __init mxser_program_mode(int port) |
1504 | { | |
1505 | int id, i, j, n; | |
1506 | ||
1507 | outb(0, port); | |
1508 | outb(0, port); | |
1509 | outb(0, port); | |
1510 | (void)inb(port); | |
1511 | (void)inb(port); | |
1512 | outb(0, port); | |
1513 | (void)inb(port); | |
1514 | ||
1515 | id = inb(port + 1) & 0x1F; | |
1516 | if ((id != C168_ASIC_ID) && | |
1517 | (id != C104_ASIC_ID) && | |
1518 | (id != C102_ASIC_ID) && | |
1519 | (id != CI132_ASIC_ID) && | |
1520 | (id != CI134_ASIC_ID) && | |
1521 | (id != CI104J_ASIC_ID)) | |
1522 | return -1; | |
1523 | for (i = 0, j = 0; i < 4; i++) { | |
1524 | n = inb(port + 2); | |
1525 | if (n == 'M') { | |
1526 | j = 1; | |
1527 | } else if ((j == 1) && (n == 1)) { | |
1528 | j = 2; | |
1529 | break; | |
1530 | } else | |
1531 | j = 0; | |
1da177e4 | 1532 | } |
1c45607a JS |
1533 | if (j != 2) |
1534 | id = -2; | |
1535 | return id; | |
1da177e4 LT |
1536 | } |
1537 | ||
1c45607a JS |
1538 | static void __init mxser_normal_mode(int port) |
1539 | { | |
1540 | int i, n; | |
1541 | ||
1542 | outb(0xA5, port + 1); | |
1543 | outb(0x80, port + 3); | |
1544 | outb(12, port + 0); /* 9600 bps */ | |
1545 | outb(0, port + 1); | |
1546 | outb(0x03, port + 3); /* 8 data bits */ | |
1547 | outb(0x13, port + 4); /* loop back mode */ | |
1548 | for (i = 0; i < 16; i++) { | |
1549 | n = inb(port + 5); | |
1550 | if ((n & 0x61) == 0x60) | |
1551 | break; | |
1552 | if ((n & 1) == 1) | |
1553 | (void)inb(port); | |
1554 | } | |
1555 | outb(0x00, port + 4); | |
1556 | } | |
1557 | ||
1558 | #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ | |
1559 | #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ | |
1560 | #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ | |
1561 | #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ | |
1562 | #define EN_CCMD 0x000 /* Chip's command register */ | |
1563 | #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ | |
1564 | #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ | |
1565 | #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ | |
1566 | #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ | |
1567 | #define EN0_DCFG 0x00E /* Data configuration reg WR */ | |
1568 | #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ | |
1569 | #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ | |
1570 | #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ | |
1571 | static int __init mxser_read_register(int port, unsigned short *regs) | |
1572 | { | |
1573 | int i, k, value, id; | |
1574 | unsigned int j; | |
1575 | ||
1576 | id = mxser_program_mode(port); | |
1577 | if (id < 0) | |
1578 | return id; | |
1579 | for (i = 0; i < 14; i++) { | |
1580 | k = (i & 0x3F) | 0x180; | |
1581 | for (j = 0x100; j > 0; j >>= 1) { | |
1582 | outb(CHIP_CS, port); | |
1583 | if (k & j) { | |
1584 | outb(CHIP_CS | CHIP_DO, port); | |
1585 | outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ | |
1586 | } else { | |
1587 | outb(CHIP_CS, port); | |
1588 | outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ | |
1589 | } | |
1590 | } | |
1591 | (void)inb(port); | |
1592 | value = 0; | |
1593 | for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { | |
1594 | outb(CHIP_CS, port); | |
1595 | outb(CHIP_CS | CHIP_SK, port); | |
1596 | if (inb(port) & CHIP_DI) | |
1597 | value |= j; | |
1598 | } | |
1599 | regs[i] = value; | |
1600 | outb(0, port); | |
1601 | } | |
1602 | mxser_normal_mode(port); | |
1603 | return id; | |
1604 | } | |
1da177e4 LT |
1605 | |
1606 | static int mxser_ioctl_special(unsigned int cmd, void __user *argp) | |
1607 | { | |
1c45607a JS |
1608 | struct mxser_port *port; |
1609 | int result, status; | |
1610 | unsigned int i, j; | |
9d6d162d | 1611 | int ret = 0; |
1da177e4 LT |
1612 | |
1613 | switch (cmd) { | |
1da177e4 | 1614 | case MOXA_GET_MAJOR: |
8f3d137e JS |
1615 | if (printk_ratelimit()) |
1616 | printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl " | |
1617 | "%x (GET_MAJOR), fix your userspace\n", | |
1618 | current->comm, cmd); | |
1c45607a | 1619 | return put_user(ttymajor, (int __user *)argp); |
1da177e4 LT |
1620 | |
1621 | case MOXA_CHKPORTENABLE: | |
1622 | result = 0; | |
9d6d162d | 1623 | lock_kernel(); |
1c45607a JS |
1624 | for (i = 0; i < MXSER_BOARDS; i++) |
1625 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) | |
1626 | if (mxser_boards[i].ports[j].ioaddr) | |
1627 | result |= (1 << i); | |
9d6d162d | 1628 | unlock_kernel(); |
8ea2c2ec | 1629 | return put_user(result, (unsigned long __user *)argp); |
1da177e4 | 1630 | case MOXA_GETDATACOUNT: |
9d6d162d | 1631 | lock_kernel(); |
1da177e4 | 1632 | if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) |
9d6d162d AC |
1633 | ret = -EFAULT; |
1634 | unlock_kernel(); | |
1635 | return ret; | |
72800df9 JS |
1636 | case MOXA_GETMSTATUS: { |
1637 | struct mxser_mstatus ms, __user *msu = argp; | |
9d6d162d | 1638 | lock_kernel(); |
1c45607a JS |
1639 | for (i = 0; i < MXSER_BOARDS; i++) |
1640 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
1641 | port = &mxser_boards[i].ports[j]; | |
72800df9 | 1642 | memset(&ms, 0, sizeof(ms)); |
1c45607a | 1643 | |
72800df9 JS |
1644 | if (!port->ioaddr) |
1645 | goto copy; | |
1da177e4 | 1646 | |
0ad9e7d1 | 1647 | if (!port->port.tty || !port->port.tty->termios) |
72800df9 | 1648 | ms.cflag = port->normal_termios.c_cflag; |
1c45607a | 1649 | else |
72800df9 | 1650 | ms.cflag = port->port.tty->termios->c_cflag; |
1da177e4 | 1651 | |
1c45607a | 1652 | status = inb(port->ioaddr + UART_MSR); |
72800df9 JS |
1653 | if (status & UART_MSR_DCD) |
1654 | ms.dcd = 1; | |
1655 | if (status & UART_MSR_DSR) | |
1656 | ms.dsr = 1; | |
1657 | if (status & UART_MSR_CTS) | |
1658 | ms.cts = 1; | |
1659 | copy: | |
1660 | if (copy_to_user(msu, &ms, sizeof(ms))) { | |
1661 | unlock_kernel(); | |
1662 | return -EFAULT; | |
1663 | } | |
1664 | msu++; | |
1c45607a | 1665 | } |
9d6d162d | 1666 | unlock_kernel(); |
1da177e4 | 1667 | return 0; |
72800df9 | 1668 | } |
8ea2c2ec | 1669 | case MOXA_ASPP_MON_EXT: { |
72800df9 JS |
1670 | struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ |
1671 | unsigned int cflag, iflag, p; | |
1672 | u8 opmode; | |
1673 | ||
1674 | me = kzalloc(sizeof(*me), GFP_KERNEL); | |
1675 | if (!me) | |
1676 | return -ENOMEM; | |
1c45607a | 1677 | |
9d6d162d | 1678 | lock_kernel(); |
72800df9 JS |
1679 | for (i = 0, p = 0; i < MXSER_BOARDS; i++) { |
1680 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { | |
1681 | if (p >= ARRAY_SIZE(me->rx_cnt)) { | |
1682 | i = MXSER_BOARDS; | |
1683 | break; | |
1684 | } | |
1c45607a JS |
1685 | port = &mxser_boards[i].ports[j]; |
1686 | if (!port->ioaddr) | |
1da177e4 LT |
1687 | continue; |
1688 | ||
72800df9 | 1689 | status = mxser_get_msr(port->ioaddr, 0, p); |
1c45607a | 1690 | |
1da177e4 | 1691 | if (status & UART_MSR_TERI) |
1c45607a | 1692 | port->icount.rng++; |
1da177e4 | 1693 | if (status & UART_MSR_DDSR) |
1c45607a | 1694 | port->icount.dsr++; |
1da177e4 | 1695 | if (status & UART_MSR_DDCD) |
1c45607a | 1696 | port->icount.dcd++; |
1da177e4 | 1697 | if (status & UART_MSR_DCTS) |
1c45607a JS |
1698 | port->icount.cts++; |
1699 | ||
1700 | port->mon_data.modem_status = status; | |
72800df9 JS |
1701 | me->rx_cnt[p] = port->mon_data.rxcnt; |
1702 | me->tx_cnt[p] = port->mon_data.txcnt; | |
1703 | me->up_rxcnt[p] = port->mon_data.up_rxcnt; | |
1704 | me->up_txcnt[p] = port->mon_data.up_txcnt; | |
1705 | me->modem_status[p] = | |
1c45607a | 1706 | port->mon_data.modem_status; |
72800df9 | 1707 | me->baudrate[p] = tty_get_baud_rate(port->port.tty); |
1c45607a | 1708 | |
0ad9e7d1 | 1709 | if (!port->port.tty || !port->port.tty->termios) { |
1c45607a JS |
1710 | cflag = port->normal_termios.c_cflag; |
1711 | iflag = port->normal_termios.c_iflag; | |
1da177e4 | 1712 | } else { |
0ad9e7d1 AC |
1713 | cflag = port->port.tty->termios->c_cflag; |
1714 | iflag = port->port.tty->termios->c_iflag; | |
1da177e4 LT |
1715 | } |
1716 | ||
72800df9 JS |
1717 | me->databits[p] = cflag & CSIZE; |
1718 | me->stopbits[p] = cflag & CSTOPB; | |
1719 | me->parity[p] = cflag & (PARENB | PARODD | | |
1720 | CMSPAR); | |
1da177e4 LT |
1721 | |
1722 | if (cflag & CRTSCTS) | |
72800df9 | 1723 | me->flowctrl[p] |= 0x03; |
1da177e4 LT |
1724 | |
1725 | if (iflag & (IXON | IXOFF)) | |
72800df9 | 1726 | me->flowctrl[p] |= 0x0C; |
1da177e4 | 1727 | |
1c45607a | 1728 | if (port->type == PORT_16550A) |
72800df9 | 1729 | me->fifo[p] = 1; |
1da177e4 | 1730 | |
72800df9 JS |
1731 | opmode = inb(port->opmode_ioaddr) >> |
1732 | ((p % 4) * 2); | |
1da177e4 | 1733 | opmode &= OP_MODE_MASK; |
72800df9 | 1734 | me->iftype[p] = opmode; |
1da177e4 | 1735 | } |
9d6d162d AC |
1736 | } |
1737 | unlock_kernel(); | |
72800df9 JS |
1738 | if (copy_to_user(argp, me, sizeof(*me))) |
1739 | ret = -EFAULT; | |
1740 | kfree(me); | |
1741 | return ret; | |
9d6d162d AC |
1742 | } |
1743 | default: | |
1da177e4 LT |
1744 | return -ENOIOCTLCMD; |
1745 | } | |
1746 | return 0; | |
1747 | } | |
1748 | ||
1c45607a JS |
1749 | static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, |
1750 | struct async_icount *cprev) | |
1da177e4 | 1751 | { |
1c45607a JS |
1752 | struct async_icount cnow; |
1753 | unsigned long flags; | |
1754 | int ret; | |
1da177e4 | 1755 | |
1c45607a JS |
1756 | spin_lock_irqsave(&info->slock, flags); |
1757 | cnow = info->icount; /* atomic copy */ | |
1758 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 1759 | |
1c45607a JS |
1760 | ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || |
1761 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || | |
1762 | ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || | |
1763 | ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); | |
1da177e4 | 1764 | |
1c45607a JS |
1765 | *cprev = cnow; |
1766 | ||
1767 | return ret; | |
1768 | } | |
1769 | ||
1770 | static int mxser_ioctl(struct tty_struct *tty, struct file *file, | |
1771 | unsigned int cmd, unsigned long arg) | |
1da177e4 | 1772 | { |
1c45607a JS |
1773 | struct mxser_port *info = tty->driver_data; |
1774 | struct async_icount cnow; | |
1c45607a JS |
1775 | unsigned long flags; |
1776 | void __user *argp = (void __user *)arg; | |
1777 | int retval; | |
1da177e4 | 1778 | |
1c45607a JS |
1779 | if (tty->index == MXSER_PORTS) |
1780 | return mxser_ioctl_special(cmd, argp); | |
1da177e4 | 1781 | |
1c45607a JS |
1782 | if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { |
1783 | int p; | |
1784 | unsigned long opmode; | |
1785 | static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; | |
1786 | int shiftbit; | |
1787 | unsigned char val, mask; | |
1da177e4 | 1788 | |
1c45607a JS |
1789 | p = tty->index % 4; |
1790 | if (cmd == MOXA_SET_OP_MODE) { | |
1791 | if (get_user(opmode, (int __user *) argp)) | |
1792 | return -EFAULT; | |
1793 | if (opmode != RS232_MODE && | |
1794 | opmode != RS485_2WIRE_MODE && | |
1795 | opmode != RS422_MODE && | |
1796 | opmode != RS485_4WIRE_MODE) | |
1797 | return -EFAULT; | |
9d6d162d | 1798 | lock_kernel(); |
1c45607a JS |
1799 | mask = ModeMask[p]; |
1800 | shiftbit = p * 2; | |
1801 | val = inb(info->opmode_ioaddr); | |
1802 | val &= mask; | |
1803 | val |= (opmode << shiftbit); | |
1804 | outb(val, info->opmode_ioaddr); | |
9d6d162d | 1805 | unlock_kernel(); |
1c45607a | 1806 | } else { |
9d6d162d | 1807 | lock_kernel(); |
1c45607a JS |
1808 | shiftbit = p * 2; |
1809 | opmode = inb(info->opmode_ioaddr) >> shiftbit; | |
1810 | opmode &= OP_MODE_MASK; | |
9d6d162d | 1811 | unlock_kernel(); |
1c45607a JS |
1812 | if (put_user(opmode, (int __user *)argp)) |
1813 | return -EFAULT; | |
1814 | } | |
1815 | return 0; | |
1816 | } | |
1817 | ||
1818 | if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT && | |
1819 | test_bit(TTY_IO_ERROR, &tty->flags)) | |
1820 | return -EIO; | |
1821 | ||
1822 | switch (cmd) { | |
1c45607a | 1823 | case TIOCGSERIAL: |
9d6d162d AC |
1824 | lock_kernel(); |
1825 | retval = mxser_get_serial_info(info, argp); | |
1826 | unlock_kernel(); | |
1827 | return retval; | |
1c45607a | 1828 | case TIOCSSERIAL: |
9d6d162d AC |
1829 | lock_kernel(); |
1830 | retval = mxser_set_serial_info(info, argp); | |
1831 | unlock_kernel(); | |
1832 | return retval; | |
1c45607a | 1833 | case TIOCSERGETLSR: /* Get line status register */ |
9d6d162d | 1834 | return mxser_get_lsr_info(info, argp); |
1c45607a JS |
1835 | /* |
1836 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | |
1837 | * - mask passed in arg for lines of interest | |
1838 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | |
1839 | * Caller should use TIOCGICOUNT to see which one it was | |
1840 | */ | |
1841 | case TIOCMIWAIT: | |
1842 | spin_lock_irqsave(&info->slock, flags); | |
1843 | cnow = info->icount; /* note the counters on entry */ | |
1844 | spin_unlock_irqrestore(&info->slock, flags); | |
1845 | ||
1846 | return wait_event_interruptible(info->delta_msr_wait, | |
1847 | mxser_cflags_changed(info, arg, &cnow)); | |
1848 | /* | |
1849 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | |
1850 | * Return: write counters to the user passed counter struct | |
1851 | * NB: both 1->0 and 0->1 transitions are counted except for | |
1852 | * RI where only 0->1 is counted. | |
1853 | */ | |
41aee9a1 JS |
1854 | case TIOCGICOUNT: { |
1855 | struct serial_icounter_struct icnt = { 0 }; | |
1c45607a JS |
1856 | spin_lock_irqsave(&info->slock, flags); |
1857 | cnow = info->icount; | |
1858 | spin_unlock_irqrestore(&info->slock, flags); | |
41aee9a1 JS |
1859 | |
1860 | icnt.frame = cnow.frame; | |
1861 | icnt.brk = cnow.brk; | |
1862 | icnt.overrun = cnow.overrun; | |
1863 | icnt.buf_overrun = cnow.buf_overrun; | |
1864 | icnt.parity = cnow.parity; | |
1865 | icnt.rx = cnow.rx; | |
1866 | icnt.tx = cnow.tx; | |
1867 | icnt.cts = cnow.cts; | |
1868 | icnt.dsr = cnow.dsr; | |
1869 | icnt.rng = cnow.rng; | |
1870 | icnt.dcd = cnow.dcd; | |
1871 | ||
1872 | return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0; | |
1873 | } | |
1c45607a JS |
1874 | case MOXA_HighSpeedOn: |
1875 | return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); | |
1876 | case MOXA_SDS_RSTICOUNTER: | |
9d6d162d | 1877 | lock_kernel(); |
1c45607a JS |
1878 | info->mon_data.rxcnt = 0; |
1879 | info->mon_data.txcnt = 0; | |
9d6d162d | 1880 | unlock_kernel(); |
1c45607a JS |
1881 | return 0; |
1882 | ||
1883 | case MOXA_ASPP_OQUEUE:{ | |
1884 | int len, lsr; | |
1885 | ||
9d6d162d | 1886 | lock_kernel(); |
1c45607a | 1887 | len = mxser_chars_in_buffer(tty); |
1c45607a | 1888 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT; |
1c45607a | 1889 | len += (lsr ? 0 : 1); |
9d6d162d | 1890 | unlock_kernel(); |
1c45607a JS |
1891 | |
1892 | return put_user(len, (int __user *)argp); | |
1893 | } | |
1894 | case MOXA_ASPP_MON: { | |
1895 | int mcr, status; | |
1896 | ||
9d6d162d | 1897 | lock_kernel(); |
1c45607a JS |
1898 | status = mxser_get_msr(info->ioaddr, 1, tty->index); |
1899 | mxser_check_modem_status(info, status); | |
1900 | ||
1901 | mcr = inb(info->ioaddr + UART_MCR); | |
1902 | if (mcr & MOXA_MUST_MCR_XON_FLAG) | |
1903 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; | |
1904 | else | |
1905 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; | |
1906 | ||
1907 | if (mcr & MOXA_MUST_MCR_TX_XON) | |
1908 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; | |
1909 | else | |
1910 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; | |
1911 | ||
0ad9e7d1 | 1912 | if (info->port.tty->hw_stopped) |
1c45607a JS |
1913 | info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; |
1914 | else | |
1915 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; | |
9d6d162d | 1916 | unlock_kernel(); |
1c45607a JS |
1917 | if (copy_to_user(argp, &info->mon_data, |
1918 | sizeof(struct mxser_mon))) | |
1919 | return -EFAULT; | |
1920 | ||
1921 | return 0; | |
1922 | } | |
1923 | case MOXA_ASPP_LSTATUS: { | |
1924 | if (put_user(info->err_shadow, (unsigned char __user *)argp)) | |
1925 | return -EFAULT; | |
1926 | ||
1927 | info->err_shadow = 0; | |
1928 | return 0; | |
1929 | } | |
1930 | case MOXA_SET_BAUD_METHOD: { | |
1931 | int method; | |
1932 | ||
1933 | if (get_user(method, (int __user *)argp)) | |
1934 | return -EFAULT; | |
1935 | mxser_set_baud_method[tty->index] = method; | |
1936 | return put_user(method, (int __user *)argp); | |
1937 | } | |
1938 | default: | |
1939 | return -ENOIOCTLCMD; | |
1940 | } | |
1941 | return 0; | |
1942 | } | |
1943 | ||
1944 | static void mxser_stoprx(struct tty_struct *tty) | |
1945 | { | |
1946 | struct mxser_port *info = tty->driver_data; | |
1947 | ||
1948 | info->ldisc_stop_rx = 1; | |
1949 | if (I_IXOFF(tty)) { | |
1950 | if (info->board->chip_flag) { | |
1951 | info->IER &= ~MOXA_MUST_RECV_ISR; | |
1952 | outb(info->IER, info->ioaddr + UART_IER); | |
1953 | } else { | |
1954 | info->x_char = STOP_CHAR(tty); | |
1955 | outb(0, info->ioaddr + UART_IER); | |
1956 | info->IER |= UART_IER_THRI; | |
1957 | outb(info->IER, info->ioaddr + UART_IER); | |
1da177e4 LT |
1958 | } |
1959 | } | |
1960 | ||
0ad9e7d1 | 1961 | if (info->port.tty->termios->c_cflag & CRTSCTS) { |
1c45607a JS |
1962 | info->MCR &= ~UART_MCR_RTS; |
1963 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
1964 | } |
1965 | } | |
1966 | ||
1967 | /* | |
1968 | * This routine is called by the upper-layer tty layer to signal that | |
1969 | * incoming characters should be throttled. | |
1970 | */ | |
1971 | static void mxser_throttle(struct tty_struct *tty) | |
1972 | { | |
1da177e4 | 1973 | mxser_stoprx(tty); |
1da177e4 LT |
1974 | } |
1975 | ||
1976 | static void mxser_unthrottle(struct tty_struct *tty) | |
1977 | { | |
1c45607a | 1978 | struct mxser_port *info = tty->driver_data; |
1da177e4 | 1979 | |
1c45607a JS |
1980 | /* startrx */ |
1981 | info->ldisc_stop_rx = 0; | |
1982 | if (I_IXOFF(tty)) { | |
1983 | if (info->x_char) | |
1984 | info->x_char = 0; | |
1985 | else { | |
1986 | if (info->board->chip_flag) { | |
1987 | info->IER |= MOXA_MUST_RECV_ISR; | |
1988 | outb(info->IER, info->ioaddr + UART_IER); | |
1989 | } else { | |
1990 | info->x_char = START_CHAR(tty); | |
1991 | outb(0, info->ioaddr + UART_IER); | |
1992 | info->IER |= UART_IER_THRI; | |
1993 | outb(info->IER, info->ioaddr + UART_IER); | |
1994 | } | |
1da177e4 | 1995 | } |
1c45607a | 1996 | } |
1da177e4 | 1997 | |
0ad9e7d1 | 1998 | if (info->port.tty->termios->c_cflag & CRTSCTS) { |
1c45607a JS |
1999 | info->MCR |= UART_MCR_RTS; |
2000 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
2001 | } |
2002 | } | |
2003 | ||
2004 | /* | |
2005 | * mxser_stop() and mxser_start() | |
2006 | * | |
2007 | * This routines are called before setting or resetting tty->stopped. | |
2008 | * They enable or disable transmitter interrupts, as necessary. | |
2009 | */ | |
2010 | static void mxser_stop(struct tty_struct *tty) | |
2011 | { | |
1c45607a | 2012 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2013 | unsigned long flags; |
2014 | ||
2015 | spin_lock_irqsave(&info->slock, flags); | |
2016 | if (info->IER & UART_IER_THRI) { | |
2017 | info->IER &= ~UART_IER_THRI; | |
1c45607a | 2018 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
2019 | } |
2020 | spin_unlock_irqrestore(&info->slock, flags); | |
2021 | } | |
2022 | ||
2023 | static void mxser_start(struct tty_struct *tty) | |
2024 | { | |
1c45607a | 2025 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2026 | unsigned long flags; |
2027 | ||
2028 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 2029 | if (info->xmit_cnt && info->port.xmit_buf) { |
1c45607a | 2030 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 2031 | info->IER |= UART_IER_THRI; |
1c45607a | 2032 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
2033 | } |
2034 | spin_unlock_irqrestore(&info->slock, flags); | |
2035 | } | |
2036 | ||
1c45607a JS |
2037 | static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) |
2038 | { | |
2039 | struct mxser_port *info = tty->driver_data; | |
2040 | unsigned long flags; | |
2041 | ||
2042 | spin_lock_irqsave(&info->slock, flags); | |
2043 | mxser_change_speed(info, old_termios); | |
2044 | spin_unlock_irqrestore(&info->slock, flags); | |
2045 | ||
2046 | if ((old_termios->c_cflag & CRTSCTS) && | |
2047 | !(tty->termios->c_cflag & CRTSCTS)) { | |
2048 | tty->hw_stopped = 0; | |
2049 | mxser_start(tty); | |
2050 | } | |
2051 | ||
2052 | /* Handle sw stopped */ | |
2053 | if ((old_termios->c_iflag & IXON) && | |
2054 | !(tty->termios->c_iflag & IXON)) { | |
2055 | tty->stopped = 0; | |
2056 | ||
2057 | if (info->board->chip_flag) { | |
2058 | spin_lock_irqsave(&info->slock, flags); | |
148ff86b CH |
2059 | mxser_disable_must_rx_software_flow_control( |
2060 | info->ioaddr); | |
1c45607a JS |
2061 | spin_unlock_irqrestore(&info->slock, flags); |
2062 | } | |
2063 | ||
2064 | mxser_start(tty); | |
2065 | } | |
2066 | } | |
2067 | ||
1da177e4 LT |
2068 | /* |
2069 | * mxser_wait_until_sent() --- wait until the transmitter is empty | |
2070 | */ | |
2071 | static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) | |
2072 | { | |
1c45607a | 2073 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2074 | unsigned long orig_jiffies, char_time; |
2075 | int lsr; | |
2076 | ||
2077 | if (info->type == PORT_UNKNOWN) | |
2078 | return; | |
2079 | ||
2080 | if (info->xmit_fifo_size == 0) | |
2081 | return; /* Just in case.... */ | |
2082 | ||
2083 | orig_jiffies = jiffies; | |
2084 | /* | |
2085 | * Set the check interval to be 1/5 of the estimated time to | |
2086 | * send a single character, and make it at least 1. The check | |
2087 | * interval should also be less than the timeout. | |
2088 | * | |
2089 | * Note: we have to use pretty tight timings here to satisfy | |
2090 | * the NIST-PCTS. | |
2091 | */ | |
2092 | char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; | |
2093 | char_time = char_time / 5; | |
2094 | if (char_time == 0) | |
2095 | char_time = 1; | |
2096 | if (timeout && timeout < char_time) | |
2097 | char_time = timeout; | |
2098 | /* | |
2099 | * If the transmitter hasn't cleared in twice the approximate | |
2100 | * amount of time to send the entire FIFO, it probably won't | |
2101 | * ever clear. This assumes the UART isn't doing flow | |
2102 | * control, which is currently the case. Hence, if it ever | |
2103 | * takes longer than info->timeout, this is probably due to a | |
2104 | * UART bug of some kind. So, we clamp the timeout parameter at | |
2105 | * 2*info->timeout. | |
2106 | */ | |
2107 | if (!timeout || timeout > 2 * info->timeout) | |
2108 | timeout = 2 * info->timeout; | |
2109 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
8ea2c2ec JJ |
2110 | printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", |
2111 | timeout, char_time); | |
1da177e4 LT |
2112 | printk("jiff=%lu...", jiffies); |
2113 | #endif | |
978e595f | 2114 | lock_kernel(); |
1c45607a | 2115 | while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { |
1da177e4 LT |
2116 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
2117 | printk("lsr = %d (jiff=%lu)...", lsr, jiffies); | |
2118 | #endif | |
da4cd8df | 2119 | schedule_timeout_interruptible(char_time); |
1da177e4 | 2120 | if (signal_pending(current)) |
1c45607a JS |
2121 | break; |
2122 | if (timeout && time_after(jiffies, orig_jiffies + timeout)) | |
2123 | break; | |
1da177e4 | 2124 | } |
1c45607a | 2125 | set_current_state(TASK_RUNNING); |
978e595f | 2126 | unlock_kernel(); |
1da177e4 | 2127 | |
1c45607a JS |
2128 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
2129 | printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); | |
2130 | #endif | |
2131 | } | |
1da177e4 | 2132 | |
1c45607a JS |
2133 | /* |
2134 | * This routine is called by tty_hangup() when a hangup is signaled. | |
2135 | */ | |
2136 | static void mxser_hangup(struct tty_struct *tty) | |
2137 | { | |
2138 | struct mxser_port *info = tty->driver_data; | |
1da177e4 | 2139 | |
1c45607a JS |
2140 | mxser_flush_buffer(tty); |
2141 | mxser_shutdown(info); | |
0ad9e7d1 AC |
2142 | info->port.count = 0; |
2143 | info->port.flags &= ~ASYNC_NORMAL_ACTIVE; | |
2144 | info->port.tty = NULL; | |
2145 | wake_up_interruptible(&info->port.open_wait); | |
1da177e4 LT |
2146 | } |
2147 | ||
1c45607a JS |
2148 | /* |
2149 | * mxser_rs_break() --- routine which turns the break handling on or off | |
2150 | */ | |
9e98966c | 2151 | static int mxser_rs_break(struct tty_struct *tty, int break_state) |
1da177e4 | 2152 | { |
1c45607a | 2153 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2154 | unsigned long flags; |
2155 | ||
1c45607a JS |
2156 | spin_lock_irqsave(&info->slock, flags); |
2157 | if (break_state == -1) | |
2158 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
2159 | info->ioaddr + UART_LCR); | |
2160 | else | |
2161 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
2162 | info->ioaddr + UART_LCR); | |
2163 | spin_unlock_irqrestore(&info->slock, flags); | |
9e98966c | 2164 | return 0; |
1c45607a | 2165 | } |
1da177e4 | 2166 | |
1c45607a JS |
2167 | static void mxser_receive_chars(struct mxser_port *port, int *status) |
2168 | { | |
0ad9e7d1 | 2169 | struct tty_struct *tty = port->port.tty; |
1c45607a JS |
2170 | unsigned char ch, gdl; |
2171 | int ignored = 0; | |
2172 | int cnt = 0; | |
2173 | int recv_room; | |
2174 | int max = 256; | |
1da177e4 | 2175 | |
1c45607a JS |
2176 | recv_room = tty->receive_room; |
2177 | if ((recv_room == 0) && (!port->ldisc_stop_rx)) | |
2178 | mxser_stoprx(tty); | |
1da177e4 | 2179 | |
1c45607a | 2180 | if (port->board->chip_flag != MOXA_OTHER_UART) { |
1da177e4 | 2181 | |
1c45607a JS |
2182 | if (*status & UART_LSR_SPECIAL) |
2183 | goto intr_old; | |
2184 | if (port->board->chip_flag == MOXA_MUST_MU860_HWID && | |
2185 | (*status & MOXA_MUST_LSR_RERR)) | |
2186 | goto intr_old; | |
2187 | if (*status & MOXA_MUST_LSR_RERR) | |
2188 | goto intr_old; | |
1da177e4 | 2189 | |
1c45607a JS |
2190 | gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); |
2191 | ||
2192 | if (port->board->chip_flag == MOXA_MUST_MU150_HWID) | |
2193 | gdl &= MOXA_MUST_GDL_MASK; | |
2194 | if (gdl >= recv_room) { | |
2195 | if (!port->ldisc_stop_rx) | |
2196 | mxser_stoprx(tty); | |
2197 | } | |
2198 | while (gdl--) { | |
2199 | ch = inb(port->ioaddr + UART_RX); | |
2200 | tty_insert_flip_char(tty, ch, 0); | |
2201 | cnt++; | |
2202 | } | |
2203 | goto end_intr; | |
1da177e4 | 2204 | } |
1c45607a JS |
2205 | intr_old: |
2206 | ||
2207 | do { | |
2208 | if (max-- < 0) | |
2209 | break; | |
1da177e4 | 2210 | |
1c45607a JS |
2211 | ch = inb(port->ioaddr + UART_RX); |
2212 | if (port->board->chip_flag && (*status & UART_LSR_OE)) | |
2213 | outb(0x23, port->ioaddr + UART_FCR); | |
2214 | *status &= port->read_status_mask; | |
2215 | if (*status & port->ignore_status_mask) { | |
2216 | if (++ignored > 100) | |
2217 | break; | |
2218 | } else { | |
2219 | char flag = 0; | |
2220 | if (*status & UART_LSR_SPECIAL) { | |
2221 | if (*status & UART_LSR_BI) { | |
2222 | flag = TTY_BREAK; | |
2223 | port->icount.brk++; | |
1da177e4 | 2224 | |
0ad9e7d1 | 2225 | if (port->port.flags & ASYNC_SAK) |
1c45607a JS |
2226 | do_SAK(tty); |
2227 | } else if (*status & UART_LSR_PE) { | |
2228 | flag = TTY_PARITY; | |
2229 | port->icount.parity++; | |
2230 | } else if (*status & UART_LSR_FE) { | |
2231 | flag = TTY_FRAME; | |
2232 | port->icount.frame++; | |
2233 | } else if (*status & UART_LSR_OE) { | |
2234 | flag = TTY_OVERRUN; | |
2235 | port->icount.overrun++; | |
2236 | } else | |
2237 | flag = TTY_BREAK; | |
2238 | } | |
2239 | tty_insert_flip_char(tty, ch, flag); | |
2240 | cnt++; | |
2241 | if (cnt >= recv_room) { | |
2242 | if (!port->ldisc_stop_rx) | |
2243 | mxser_stoprx(tty); | |
2244 | break; | |
2245 | } | |
1da177e4 | 2246 | |
1c45607a | 2247 | } |
1da177e4 | 2248 | |
1c45607a JS |
2249 | if (port->board->chip_flag) |
2250 | break; | |
1da177e4 | 2251 | |
1c45607a JS |
2252 | *status = inb(port->ioaddr + UART_LSR); |
2253 | } while (*status & UART_LSR_DR); | |
1da177e4 | 2254 | |
1c45607a | 2255 | end_intr: |
0ad9e7d1 | 2256 | mxvar_log.rxcnt[port->port.tty->index] += cnt; |
1c45607a JS |
2257 | port->mon_data.rxcnt += cnt; |
2258 | port->mon_data.up_rxcnt += cnt; | |
1da177e4 | 2259 | |
1c45607a JS |
2260 | /* |
2261 | * We are called from an interrupt context with &port->slock | |
2262 | * being held. Drop it temporarily in order to prevent | |
2263 | * recursive locking. | |
2264 | */ | |
2265 | spin_unlock(&port->slock); | |
2266 | tty_flip_buffer_push(tty); | |
2267 | spin_lock(&port->slock); | |
1da177e4 LT |
2268 | } |
2269 | ||
1c45607a | 2270 | static void mxser_transmit_chars(struct mxser_port *port) |
1da177e4 | 2271 | { |
1c45607a | 2272 | int count, cnt; |
1da177e4 | 2273 | |
1c45607a JS |
2274 | if (port->x_char) { |
2275 | outb(port->x_char, port->ioaddr + UART_TX); | |
2276 | port->x_char = 0; | |
0ad9e7d1 | 2277 | mxvar_log.txcnt[port->port.tty->index]++; |
1c45607a JS |
2278 | port->mon_data.txcnt++; |
2279 | port->mon_data.up_txcnt++; | |
2280 | port->icount.tx++; | |
2281 | return; | |
2282 | } | |
1da177e4 | 2283 | |
0ad9e7d1 | 2284 | if (port->port.xmit_buf == NULL) |
1c45607a | 2285 | return; |
1da177e4 | 2286 | |
0ad9e7d1 AC |
2287 | if ((port->xmit_cnt <= 0) || port->port.tty->stopped || |
2288 | (port->port.tty->hw_stopped && | |
1c45607a JS |
2289 | (port->type != PORT_16550A) && |
2290 | (!port->board->chip_flag))) { | |
2291 | port->IER &= ~UART_IER_THRI; | |
2292 | outb(port->IER, port->ioaddr + UART_IER); | |
2293 | return; | |
1da177e4 LT |
2294 | } |
2295 | ||
1c45607a JS |
2296 | cnt = port->xmit_cnt; |
2297 | count = port->xmit_fifo_size; | |
2298 | do { | |
0ad9e7d1 | 2299 | outb(port->port.xmit_buf[port->xmit_tail++], |
1c45607a JS |
2300 | port->ioaddr + UART_TX); |
2301 | port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); | |
2302 | if (--port->xmit_cnt <= 0) | |
2303 | break; | |
2304 | } while (--count > 0); | |
0ad9e7d1 | 2305 | mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt); |
1da177e4 | 2306 | |
1c45607a JS |
2307 | port->mon_data.txcnt += (cnt - port->xmit_cnt); |
2308 | port->mon_data.up_txcnt += (cnt - port->xmit_cnt); | |
2309 | port->icount.tx += (cnt - port->xmit_cnt); | |
1da177e4 | 2310 | |
1c45607a | 2311 | if (port->xmit_cnt < WAKEUP_CHARS) |
0ad9e7d1 | 2312 | tty_wakeup(port->port.tty); |
1c45607a JS |
2313 | |
2314 | if (port->xmit_cnt <= 0) { | |
2315 | port->IER &= ~UART_IER_THRI; | |
2316 | outb(port->IER, port->ioaddr + UART_IER); | |
1da177e4 | 2317 | } |
1da177e4 LT |
2318 | } |
2319 | ||
2320 | /* | |
1c45607a | 2321 | * This is the serial driver's generic interrupt routine |
1da177e4 | 2322 | */ |
1c45607a | 2323 | static irqreturn_t mxser_interrupt(int irq, void *dev_id) |
1da177e4 | 2324 | { |
1c45607a JS |
2325 | int status, iir, i; |
2326 | struct mxser_board *brd = NULL; | |
2327 | struct mxser_port *port; | |
2328 | int max, irqbits, bits, msr; | |
2329 | unsigned int int_cnt, pass_counter = 0; | |
2330 | int handled = IRQ_NONE; | |
1da177e4 | 2331 | |
1c45607a JS |
2332 | for (i = 0; i < MXSER_BOARDS; i++) |
2333 | if (dev_id == &mxser_boards[i]) { | |
2334 | brd = dev_id; | |
2335 | break; | |
2336 | } | |
1da177e4 | 2337 | |
1c45607a JS |
2338 | if (i == MXSER_BOARDS) |
2339 | goto irq_stop; | |
2340 | if (brd == NULL) | |
2341 | goto irq_stop; | |
2342 | max = brd->info->nports; | |
2343 | while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { | |
2344 | irqbits = inb(brd->vector) & brd->vector_mask; | |
2345 | if (irqbits == brd->vector_mask) | |
2346 | break; | |
1da177e4 | 2347 | |
1c45607a JS |
2348 | handled = IRQ_HANDLED; |
2349 | for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { | |
2350 | if (irqbits == brd->vector_mask) | |
2351 | break; | |
2352 | if (bits & irqbits) | |
2353 | continue; | |
2354 | port = &brd->ports[i]; | |
2355 | ||
2356 | int_cnt = 0; | |
2357 | spin_lock(&port->slock); | |
2358 | do { | |
2359 | iir = inb(port->ioaddr + UART_IIR); | |
2360 | if (iir & UART_IIR_NO_INT) | |
2361 | break; | |
2362 | iir &= MOXA_MUST_IIR_MASK; | |
0ad9e7d1 AC |
2363 | if (!port->port.tty || |
2364 | (port->port.flags & ASYNC_CLOSING) || | |
2365 | !(port->port.flags & | |
1c45607a JS |
2366 | ASYNC_INITIALIZED)) { |
2367 | status = inb(port->ioaddr + UART_LSR); | |
2368 | outb(0x27, port->ioaddr + UART_FCR); | |
2369 | inb(port->ioaddr + UART_MSR); | |
2370 | break; | |
2371 | } | |
1da177e4 | 2372 | |
1c45607a JS |
2373 | status = inb(port->ioaddr + UART_LSR); |
2374 | ||
2375 | if (status & UART_LSR_PE) | |
2376 | port->err_shadow |= NPPI_NOTIFY_PARITY; | |
2377 | if (status & UART_LSR_FE) | |
2378 | port->err_shadow |= NPPI_NOTIFY_FRAMING; | |
2379 | if (status & UART_LSR_OE) | |
2380 | port->err_shadow |= | |
2381 | NPPI_NOTIFY_HW_OVERRUN; | |
2382 | if (status & UART_LSR_BI) | |
2383 | port->err_shadow |= NPPI_NOTIFY_BREAK; | |
2384 | ||
2385 | if (port->board->chip_flag) { | |
2386 | if (iir == MOXA_MUST_IIR_GDA || | |
2387 | iir == MOXA_MUST_IIR_RDA || | |
2388 | iir == MOXA_MUST_IIR_RTO || | |
2389 | iir == MOXA_MUST_IIR_LSR) | |
2390 | mxser_receive_chars(port, | |
2391 | &status); | |
2392 | ||
2393 | } else { | |
2394 | status &= port->read_status_mask; | |
2395 | if (status & UART_LSR_DR) | |
2396 | mxser_receive_chars(port, | |
2397 | &status); | |
2398 | } | |
2399 | msr = inb(port->ioaddr + UART_MSR); | |
2400 | if (msr & UART_MSR_ANY_DELTA) | |
2401 | mxser_check_modem_status(port, msr); | |
2402 | ||
2403 | if (port->board->chip_flag) { | |
2404 | if (iir == 0x02 && (status & | |
2405 | UART_LSR_THRE)) | |
2406 | mxser_transmit_chars(port); | |
2407 | } else { | |
2408 | if (status & UART_LSR_THRE) | |
2409 | mxser_transmit_chars(port); | |
2410 | } | |
2411 | } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); | |
2412 | spin_unlock(&port->slock); | |
2413 | } | |
2414 | } | |
1da177e4 | 2415 | |
1c45607a JS |
2416 | irq_stop: |
2417 | return handled; | |
2418 | } | |
1da177e4 | 2419 | |
1c45607a JS |
2420 | static const struct tty_operations mxser_ops = { |
2421 | .open = mxser_open, | |
2422 | .close = mxser_close, | |
2423 | .write = mxser_write, | |
2424 | .put_char = mxser_put_char, | |
2425 | .flush_chars = mxser_flush_chars, | |
2426 | .write_room = mxser_write_room, | |
2427 | .chars_in_buffer = mxser_chars_in_buffer, | |
2428 | .flush_buffer = mxser_flush_buffer, | |
2429 | .ioctl = mxser_ioctl, | |
2430 | .throttle = mxser_throttle, | |
2431 | .unthrottle = mxser_unthrottle, | |
2432 | .set_termios = mxser_set_termios, | |
2433 | .stop = mxser_stop, | |
2434 | .start = mxser_start, | |
2435 | .hangup = mxser_hangup, | |
2436 | .break_ctl = mxser_rs_break, | |
2437 | .wait_until_sent = mxser_wait_until_sent, | |
2438 | .tiocmget = mxser_tiocmget, | |
2439 | .tiocmset = mxser_tiocmset, | |
2440 | }; | |
1da177e4 | 2441 | |
1c45607a JS |
2442 | /* |
2443 | * The MOXA Smartio/Industio serial driver boot-time initialization code! | |
2444 | */ | |
1da177e4 | 2445 | |
1c45607a JS |
2446 | static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev, |
2447 | unsigned int irq) | |
2448 | { | |
2449 | if (irq) | |
2450 | free_irq(brd->irq, brd); | |
2451 | if (pdev != NULL) { /* PCI */ | |
2452 | #ifdef CONFIG_PCI | |
2453 | pci_release_region(pdev, 2); | |
2454 | pci_release_region(pdev, 3); | |
2455 | #endif | |
2456 | } else { | |
2457 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); | |
2458 | release_region(brd->vector, 1); | |
2459 | } | |
1da177e4 LT |
2460 | } |
2461 | ||
1c45607a JS |
2462 | static int __devinit mxser_initbrd(struct mxser_board *brd, |
2463 | struct pci_dev *pdev) | |
1da177e4 | 2464 | { |
1c45607a JS |
2465 | struct mxser_port *info; |
2466 | unsigned int i; | |
2467 | int retval; | |
1da177e4 | 2468 | |
83766bc6 JS |
2469 | printk(KERN_INFO "mxser: max. baud rate = %d bps\n", |
2470 | brd->ports[0].max_baud); | |
1da177e4 | 2471 | |
1c45607a JS |
2472 | for (i = 0; i < brd->info->nports; i++) { |
2473 | info = &brd->ports[i]; | |
44b7d1b3 | 2474 | tty_port_init(&info->port); |
1c45607a JS |
2475 | info->board = brd; |
2476 | info->stop_rx = 0; | |
2477 | info->ldisc_stop_rx = 0; | |
1da177e4 | 2478 | |
1c45607a JS |
2479 | /* Enhance mode enabled here */ |
2480 | if (brd->chip_flag != MOXA_OTHER_UART) | |
148ff86b | 2481 | mxser_enable_must_enchance_mode(info->ioaddr); |
1da177e4 | 2482 | |
0ad9e7d1 | 2483 | info->port.flags = ASYNC_SHARE_IRQ; |
1c45607a | 2484 | info->type = brd->uart_type; |
1da177e4 | 2485 | |
1c45607a | 2486 | process_txrx_fifo(info); |
1da177e4 | 2487 | |
1c45607a | 2488 | info->custom_divisor = info->baud_base * 16; |
44b7d1b3 AC |
2489 | info->port.close_delay = 5 * HZ / 10; |
2490 | info->port.closing_wait = 30 * HZ; | |
1c45607a | 2491 | info->normal_termios = mxvar_sdriver->init_termios; |
1c45607a JS |
2492 | init_waitqueue_head(&info->delta_msr_wait); |
2493 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); | |
2494 | info->err_shadow = 0; | |
2495 | spin_lock_init(&info->slock); | |
1da177e4 | 2496 | |
1c45607a JS |
2497 | /* before set INT ISR, disable all int */ |
2498 | outb(inb(info->ioaddr + UART_IER) & 0xf0, | |
2499 | info->ioaddr + UART_IER); | |
2500 | } | |
1da177e4 | 2501 | |
1c45607a JS |
2502 | retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", |
2503 | brd); | |
2504 | if (retval) { | |
2505 | printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " | |
2506 | "conflict with another device.\n", | |
2507 | brd->info->name, brd->irq); | |
2508 | /* We hold resources, we need to release them. */ | |
2509 | mxser_release_res(brd, pdev, 0); | |
2510 | } | |
2511 | return retval; | |
2512 | } | |
1da177e4 | 2513 | |
1c45607a | 2514 | static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) |
1da177e4 LT |
2515 | { |
2516 | int id, i, bits; | |
2517 | unsigned short regs[16], irq; | |
2518 | unsigned char scratch, scratch2; | |
2519 | ||
1c45607a | 2520 | brd->chip_flag = MOXA_OTHER_UART; |
1da177e4 LT |
2521 | |
2522 | id = mxser_read_register(cap, regs); | |
1c45607a JS |
2523 | switch (id) { |
2524 | case C168_ASIC_ID: | |
2525 | brd->info = &mxser_cards[0]; | |
2526 | break; | |
2527 | case C104_ASIC_ID: | |
2528 | brd->info = &mxser_cards[1]; | |
2529 | break; | |
2530 | case CI104J_ASIC_ID: | |
2531 | brd->info = &mxser_cards[2]; | |
2532 | break; | |
2533 | case C102_ASIC_ID: | |
2534 | brd->info = &mxser_cards[5]; | |
2535 | break; | |
2536 | case CI132_ASIC_ID: | |
2537 | brd->info = &mxser_cards[6]; | |
2538 | break; | |
2539 | case CI134_ASIC_ID: | |
2540 | brd->info = &mxser_cards[7]; | |
2541 | break; | |
2542 | default: | |
8ea2c2ec | 2543 | return 0; |
1c45607a | 2544 | } |
1da177e4 LT |
2545 | |
2546 | irq = 0; | |
1c45607a JS |
2547 | /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) |
2548 | Flag-hack checks if configuration should be read as 2-port here. */ | |
2549 | if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { | |
1da177e4 LT |
2550 | irq = regs[9] & 0xF000; |
2551 | irq = irq | (irq >> 4); | |
2552 | if (irq != (regs[9] & 0xFF00)) | |
83766bc6 | 2553 | goto err_irqconflict; |
1c45607a | 2554 | } else if (brd->info->nports == 4) { |
1da177e4 LT |
2555 | irq = regs[9] & 0xF000; |
2556 | irq = irq | (irq >> 4); | |
2557 | irq = irq | (irq >> 8); | |
2558 | if (irq != regs[9]) | |
83766bc6 | 2559 | goto err_irqconflict; |
1c45607a | 2560 | } else if (brd->info->nports == 8) { |
1da177e4 LT |
2561 | irq = regs[9] & 0xF000; |
2562 | irq = irq | (irq >> 4); | |
2563 | irq = irq | (irq >> 8); | |
2564 | if ((irq != regs[9]) || (irq != regs[10])) | |
83766bc6 | 2565 | goto err_irqconflict; |
1da177e4 LT |
2566 | } |
2567 | ||
83766bc6 JS |
2568 | if (!irq) { |
2569 | printk(KERN_ERR "mxser: interrupt number unset\n"); | |
2570 | return -EIO; | |
2571 | } | |
1c45607a | 2572 | brd->irq = ((int)(irq & 0xF000) >> 12); |
1da177e4 | 2573 | for (i = 0; i < 8; i++) |
1c45607a | 2574 | brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; |
83766bc6 JS |
2575 | if ((regs[12] & 0x80) == 0) { |
2576 | printk(KERN_ERR "mxser: invalid interrupt vector\n"); | |
2577 | return -EIO; | |
2578 | } | |
1c45607a | 2579 | brd->vector = (int)regs[11]; /* interrupt vector */ |
1da177e4 | 2580 | if (id == 1) |
1c45607a | 2581 | brd->vector_mask = 0x00FF; |
1da177e4 | 2582 | else |
1c45607a | 2583 | brd->vector_mask = 0x000F; |
1da177e4 LT |
2584 | for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { |
2585 | if (regs[12] & bits) { | |
1c45607a JS |
2586 | brd->ports[i].baud_base = 921600; |
2587 | brd->ports[i].max_baud = 921600; | |
1da177e4 | 2588 | } else { |
1c45607a JS |
2589 | brd->ports[i].baud_base = 115200; |
2590 | brd->ports[i].max_baud = 115200; | |
1da177e4 LT |
2591 | } |
2592 | } | |
2593 | scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); | |
2594 | outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); | |
2595 | outb(0, cap + UART_EFR); /* EFR is the same as FCR */ | |
2596 | outb(scratch2, cap + UART_LCR); | |
2597 | outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); | |
2598 | scratch = inb(cap + UART_IIR); | |
2599 | ||
2600 | if (scratch & 0xC0) | |
1c45607a | 2601 | brd->uart_type = PORT_16550A; |
1da177e4 | 2602 | else |
1c45607a JS |
2603 | brd->uart_type = PORT_16450; |
2604 | if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, | |
83766bc6 JS |
2605 | "mxser(IO)")) { |
2606 | printk(KERN_ERR "mxser: can't request ports I/O region: " | |
2607 | "0x%.8lx-0x%.8lx\n", | |
2608 | brd->ports[0].ioaddr, brd->ports[0].ioaddr + | |
2609 | 8 * brd->info->nports - 1); | |
2610 | return -EIO; | |
2611 | } | |
1c45607a JS |
2612 | if (!request_region(brd->vector, 1, "mxser(vector)")) { |
2613 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); | |
83766bc6 JS |
2614 | printk(KERN_ERR "mxser: can't request interrupt vector region: " |
2615 | "0x%.8lx-0x%.8lx\n", | |
2616 | brd->ports[0].ioaddr, brd->ports[0].ioaddr + | |
2617 | 8 * brd->info->nports - 1); | |
2618 | return -EIO; | |
1c45607a JS |
2619 | } |
2620 | return brd->info->nports; | |
83766bc6 JS |
2621 | |
2622 | err_irqconflict: | |
2623 | printk(KERN_ERR "mxser: invalid interrupt number\n"); | |
2624 | return -EIO; | |
1da177e4 LT |
2625 | } |
2626 | ||
1c45607a JS |
2627 | static int __devinit mxser_probe(struct pci_dev *pdev, |
2628 | const struct pci_device_id *ent) | |
1da177e4 | 2629 | { |
1c45607a JS |
2630 | #ifdef CONFIG_PCI |
2631 | struct mxser_board *brd; | |
2632 | unsigned int i, j; | |
2633 | unsigned long ioaddress; | |
2634 | int retval = -EINVAL; | |
1da177e4 | 2635 | |
1c45607a JS |
2636 | for (i = 0; i < MXSER_BOARDS; i++) |
2637 | if (mxser_boards[i].info == NULL) | |
2638 | break; | |
2639 | ||
2640 | if (i >= MXSER_BOARDS) { | |
83766bc6 JS |
2641 | dev_err(&pdev->dev, "too many boards found (maximum %d), board " |
2642 | "not configured\n", MXSER_BOARDS); | |
1c45607a JS |
2643 | goto err; |
2644 | } | |
2645 | ||
2646 | brd = &mxser_boards[i]; | |
2647 | brd->idx = i * MXSER_PORTS_PER_BOARD; | |
83766bc6 | 2648 | dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", |
1c45607a JS |
2649 | mxser_cards[ent->driver_data].name, |
2650 | pdev->bus->number, PCI_SLOT(pdev->devfn)); | |
2651 | ||
2652 | retval = pci_enable_device(pdev); | |
2653 | if (retval) { | |
83766bc6 | 2654 | dev_err(&pdev->dev, "PCI enable failed\n"); |
1c45607a JS |
2655 | goto err; |
2656 | } | |
2657 | ||
2658 | /* io address */ | |
2659 | ioaddress = pci_resource_start(pdev, 2); | |
2660 | retval = pci_request_region(pdev, 2, "mxser(IO)"); | |
2661 | if (retval) | |
2662 | goto err; | |
2663 | ||
2664 | brd->info = &mxser_cards[ent->driver_data]; | |
2665 | for (i = 0; i < brd->info->nports; i++) | |
2666 | brd->ports[i].ioaddr = ioaddress + 8 * i; | |
2667 | ||
2668 | /* vector */ | |
2669 | ioaddress = pci_resource_start(pdev, 3); | |
2670 | retval = pci_request_region(pdev, 3, "mxser(vector)"); | |
2671 | if (retval) | |
2672 | goto err_relio; | |
2673 | brd->vector = ioaddress; | |
2674 | ||
2675 | /* irq */ | |
2676 | brd->irq = pdev->irq; | |
2677 | ||
2678 | brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); | |
2679 | brd->uart_type = PORT_16550A; | |
2680 | brd->vector_mask = 0; | |
2681 | ||
2682 | for (i = 0; i < brd->info->nports; i++) { | |
2683 | for (j = 0; j < UART_INFO_NUM; j++) { | |
2684 | if (Gpci_uart_info[j].type == brd->chip_flag) { | |
2685 | brd->ports[i].max_baud = | |
2686 | Gpci_uart_info[j].max_baud; | |
2687 | ||
2688 | /* exception....CP-102 */ | |
2689 | if (brd->info->flags & MXSER_HIGHBAUD) | |
2690 | brd->ports[i].max_baud = 921600; | |
2691 | break; | |
1da177e4 LT |
2692 | } |
2693 | } | |
1c45607a JS |
2694 | } |
2695 | ||
2696 | if (brd->chip_flag == MOXA_MUST_MU860_HWID) { | |
2697 | for (i = 0; i < brd->info->nports; i++) { | |
2698 | if (i < 4) | |
2699 | brd->ports[i].opmode_ioaddr = ioaddress + 4; | |
2700 | else | |
2701 | brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; | |
1da177e4 | 2702 | } |
1c45607a JS |
2703 | outb(0, ioaddress + 4); /* default set to RS232 mode */ |
2704 | outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ | |
1da177e4 | 2705 | } |
1c45607a JS |
2706 | |
2707 | for (i = 0; i < brd->info->nports; i++) { | |
2708 | brd->vector_mask |= (1 << i); | |
2709 | brd->ports[i].baud_base = 921600; | |
2710 | } | |
2711 | ||
2712 | /* mxser_initbrd will hook ISR. */ | |
2713 | retval = mxser_initbrd(brd, pdev); | |
2714 | if (retval) | |
2715 | goto err_null; | |
2716 | ||
2717 | for (i = 0; i < brd->info->nports; i++) | |
2718 | tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev); | |
2719 | ||
2720 | pci_set_drvdata(pdev, brd); | |
2721 | ||
2722 | return 0; | |
2723 | err_relio: | |
2724 | pci_release_region(pdev, 2); | |
2725 | err_null: | |
2726 | brd->info = NULL; | |
2727 | err: | |
2728 | return retval; | |
2729 | #else | |
2730 | return -ENODEV; | |
2731 | #endif | |
1da177e4 LT |
2732 | } |
2733 | ||
1c45607a | 2734 | static void __devexit mxser_remove(struct pci_dev *pdev) |
1da177e4 | 2735 | { |
1c45607a JS |
2736 | struct mxser_board *brd = pci_get_drvdata(pdev); |
2737 | unsigned int i; | |
1da177e4 | 2738 | |
1c45607a JS |
2739 | for (i = 0; i < brd->info->nports; i++) |
2740 | tty_unregister_device(mxvar_sdriver, brd->idx + i); | |
1da177e4 | 2741 | |
1c45607a JS |
2742 | mxser_release_res(brd, pdev, 1); |
2743 | brd->info = NULL; | |
1da177e4 LT |
2744 | } |
2745 | ||
1c45607a JS |
2746 | static struct pci_driver mxser_driver = { |
2747 | .name = "mxser", | |
2748 | .id_table = mxser_pcibrds, | |
2749 | .probe = mxser_probe, | |
2750 | .remove = __devexit_p(mxser_remove) | |
2751 | }; | |
2752 | ||
2753 | static int __init mxser_module_init(void) | |
1da177e4 | 2754 | { |
1c45607a | 2755 | struct mxser_board *brd; |
1df00924 JS |
2756 | unsigned int b, i, m; |
2757 | int retval; | |
1da177e4 | 2758 | |
1c45607a JS |
2759 | mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); |
2760 | if (!mxvar_sdriver) | |
2761 | return -ENOMEM; | |
2762 | ||
2763 | printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", | |
2764 | MXSER_VERSION); | |
2765 | ||
2766 | /* Initialize the tty_driver structure */ | |
2767 | mxvar_sdriver->owner = THIS_MODULE; | |
2768 | mxvar_sdriver->magic = TTY_DRIVER_MAGIC; | |
2769 | mxvar_sdriver->name = "ttyMI"; | |
2770 | mxvar_sdriver->major = ttymajor; | |
2771 | mxvar_sdriver->minor_start = 0; | |
2772 | mxvar_sdriver->num = MXSER_PORTS + 1; | |
2773 | mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; | |
2774 | mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; | |
2775 | mxvar_sdriver->init_termios = tty_std_termios; | |
2776 | mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; | |
2777 | mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; | |
2778 | tty_set_operations(mxvar_sdriver, &mxser_ops); | |
2779 | ||
2780 | retval = tty_register_driver(mxvar_sdriver); | |
2781 | if (retval) { | |
2782 | printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " | |
2783 | "tty driver !\n"); | |
2784 | goto err_put; | |
1da177e4 | 2785 | } |
1c45607a | 2786 | |
1c45607a | 2787 | /* Start finding ISA boards here */ |
1df00924 JS |
2788 | for (m = 0, b = 0; b < MXSER_BOARDS; b++) { |
2789 | if (!ioaddr[b]) | |
2790 | continue; | |
2791 | ||
2792 | brd = &mxser_boards[m]; | |
2793 | retval = mxser_get_ISA_conf(!ioaddr[b], brd); | |
2794 | if (retval <= 0) { | |
2795 | brd->info = NULL; | |
2796 | continue; | |
2797 | } | |
1c45607a | 2798 | |
1df00924 JS |
2799 | printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", |
2800 | brd->info->name, ioaddr[b]); | |
83766bc6 | 2801 | |
1df00924 JS |
2802 | /* mxser_initbrd will hook ISR. */ |
2803 | if (mxser_initbrd(brd, NULL) < 0) { | |
2804 | brd->info = NULL; | |
2805 | continue; | |
2806 | } | |
1c45607a | 2807 | |
1df00924 JS |
2808 | brd->idx = m * MXSER_PORTS_PER_BOARD; |
2809 | for (i = 0; i < brd->info->nports; i++) | |
2810 | tty_register_device(mxvar_sdriver, brd->idx + i, NULL); | |
1c45607a | 2811 | |
1df00924 JS |
2812 | m++; |
2813 | } | |
1c45607a JS |
2814 | |
2815 | retval = pci_register_driver(&mxser_driver); | |
2816 | if (retval) { | |
83766bc6 | 2817 | printk(KERN_ERR "mxser: can't register pci driver\n"); |
1c45607a JS |
2818 | if (!m) { |
2819 | retval = -ENODEV; | |
2820 | goto err_unr; | |
2821 | } /* else: we have some ISA cards under control */ | |
2822 | } | |
2823 | ||
1c45607a JS |
2824 | return 0; |
2825 | err_unr: | |
2826 | tty_unregister_driver(mxvar_sdriver); | |
2827 | err_put: | |
2828 | put_tty_driver(mxvar_sdriver); | |
2829 | return retval; | |
2830 | } | |
2831 | ||
2832 | static void __exit mxser_module_exit(void) | |
2833 | { | |
2834 | unsigned int i, j; | |
2835 | ||
1c45607a JS |
2836 | pci_unregister_driver(&mxser_driver); |
2837 | ||
2838 | for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ | |
2839 | if (mxser_boards[i].info != NULL) | |
2840 | for (j = 0; j < mxser_boards[i].info->nports; j++) | |
2841 | tty_unregister_device(mxvar_sdriver, | |
2842 | mxser_boards[i].idx + j); | |
2843 | tty_unregister_driver(mxvar_sdriver); | |
2844 | put_tty_driver(mxvar_sdriver); | |
2845 | ||
2846 | for (i = 0; i < MXSER_BOARDS; i++) | |
2847 | if (mxser_boards[i].info != NULL) | |
2848 | mxser_release_res(&mxser_boards[i], NULL, 1); | |
1da177e4 LT |
2849 | } |
2850 | ||
2851 | module_init(mxser_module_init); | |
2852 | module_exit(mxser_module_exit); |