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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * mxser.c -- MOXA Smartio/Industio family multiport serial driver. | |
3 | * | |
80ff8a80 JS |
4 | * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). |
5 | * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> | |
1da177e4 | 6 | * |
1c45607a JS |
7 | * This code is loosely based on the 1.8 moxa driver which is based on |
8 | * Linux serial driver, written by Linus Torvalds, Theodore T'so and | |
9 | * others. | |
1da177e4 LT |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
8ea2c2ec | 14 | * (at your option) any later version. |
1da177e4 | 15 | * |
1da177e4 LT |
16 | * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox |
17 | * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com. | |
18 | * - Fixed x86_64 cleanness | |
19 | * - Fixed sleep with spinlock held in mxser_send_break | |
20 | */ | |
21 | ||
1da177e4 | 22 | #include <linux/module.h> |
1da177e4 LT |
23 | #include <linux/errno.h> |
24 | #include <linux/signal.h> | |
25 | #include <linux/sched.h> | |
26 | #include <linux/timer.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/tty.h> | |
29 | #include <linux/tty_flip.h> | |
30 | #include <linux/serial.h> | |
31 | #include <linux/serial_reg.h> | |
32 | #include <linux/major.h> | |
33 | #include <linux/string.h> | |
34 | #include <linux/fcntl.h> | |
35 | #include <linux/ptrace.h> | |
36 | #include <linux/gfp.h> | |
37 | #include <linux/ioport.h> | |
38 | #include <linux/mm.h> | |
1da177e4 LT |
39 | #include <linux/delay.h> |
40 | #include <linux/pci.h> | |
1977f032 | 41 | #include <linux/bitops.h> |
1da177e4 LT |
42 | |
43 | #include <asm/system.h> | |
44 | #include <asm/io.h> | |
45 | #include <asm/irq.h> | |
1da177e4 LT |
46 | #include <asm/uaccess.h> |
47 | ||
48 | #include "mxser.h" | |
49 | ||
80ff8a80 | 50 | #define MXSER_VERSION "2.0.3" /* 1.11 */ |
1da177e4 LT |
51 | #define MXSERMAJOR 174 |
52 | #define MXSERCUMAJOR 175 | |
53 | ||
1da177e4 | 54 | #define MXSER_BOARDS 4 /* Max. boards */ |
1da177e4 | 55 | #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ |
1c45607a JS |
56 | #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) |
57 | #define MXSER_ISR_PASS_LIMIT 100 | |
1da177e4 LT |
58 | |
59 | #define MXSER_ERR_IOADDR -1 | |
60 | #define MXSER_ERR_IRQ -2 | |
61 | #define MXSER_ERR_IRQ_CONFLIT -3 | |
62 | #define MXSER_ERR_VECTOR -4 | |
63 | ||
1c45607a JS |
64 | /*CheckIsMoxaMust return value*/ |
65 | #define MOXA_OTHER_UART 0x00 | |
66 | #define MOXA_MUST_MU150_HWID 0x01 | |
67 | #define MOXA_MUST_MU860_HWID 0x02 | |
68 | ||
1da177e4 LT |
69 | #define WAKEUP_CHARS 256 |
70 | ||
71 | #define UART_MCR_AFE 0x20 | |
72 | #define UART_LSR_SPECIAL 0x1E | |
73 | ||
1c45607a JS |
74 | #define PCI_DEVICE_ID_CB108 0x1080 |
75 | #define PCI_DEVICE_ID_CB114 0x1142 | |
80ff8a80 | 76 | #define PCI_DEVICE_ID_CP114UL 0x1143 |
1c45607a JS |
77 | #define PCI_DEVICE_ID_CB134I 0x1341 |
78 | #define PCI_DEVICE_ID_CP138U 0x1380 | |
79 | #define PCI_DEVICE_ID_POS104UL 0x1044 | |
1da177e4 | 80 | |
1da177e4 LT |
81 | |
82 | #define C168_ASIC_ID 1 | |
83 | #define C104_ASIC_ID 2 | |
84 | #define C102_ASIC_ID 0xB | |
85 | #define CI132_ASIC_ID 4 | |
86 | #define CI134_ASIC_ID 3 | |
87 | #define CI104J_ASIC_ID 5 | |
88 | ||
1c45607a JS |
89 | #define MXSER_HIGHBAUD 1 |
90 | #define MXSER_HAS2 2 | |
1da177e4 | 91 | |
8ea2c2ec | 92 | /* This is only for PCI */ |
1c45607a | 93 | static const struct { |
1da177e4 LT |
94 | int type; |
95 | int tx_fifo; | |
96 | int rx_fifo; | |
97 | int xmit_fifo_size; | |
98 | int rx_high_water; | |
99 | int rx_trigger; | |
100 | int rx_low_water; | |
101 | long max_baud; | |
1c45607a | 102 | } Gpci_uart_info[] = { |
1da177e4 LT |
103 | {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, |
104 | {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, | |
105 | {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} | |
106 | }; | |
1c45607a | 107 | #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) |
1da177e4 | 108 | |
1c45607a JS |
109 | struct mxser_cardinfo { |
110 | char *name; | |
111 | unsigned int nports; | |
112 | unsigned int flags; | |
113 | }; | |
1da177e4 | 114 | |
1c45607a JS |
115 | static const struct mxser_cardinfo mxser_cards[] = { |
116 | /* 0*/ { "C168 series", 8, }, | |
117 | { "C104 series", 4, }, | |
118 | { "CI-104J series", 4, }, | |
119 | { "C168H/PCI series", 8, }, | |
120 | { "C104H/PCI series", 4, }, | |
121 | /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ | |
122 | { "CI-132 series", 4, MXSER_HAS2 }, | |
123 | { "CI-134 series", 4, }, | |
124 | { "CP-132 series", 2, }, | |
125 | { "CP-114 series", 4, }, | |
126 | /*10*/ { "CT-114 series", 4, }, | |
127 | { "CP-102 series", 2, MXSER_HIGHBAUD }, | |
128 | { "CP-104U series", 4, }, | |
129 | { "CP-168U series", 8, }, | |
130 | { "CP-132U series", 2, }, | |
131 | /*15*/ { "CP-134U series", 4, }, | |
132 | { "CP-104JU series", 4, }, | |
133 | { "Moxa UC7000 Serial", 8, }, /* RC7000 */ | |
134 | { "CP-118U series", 8, }, | |
135 | { "CP-102UL series", 2, }, | |
136 | /*20*/ { "CP-102U series", 2, }, | |
137 | { "CP-118EL series", 8, }, | |
138 | { "CP-168EL series", 8, }, | |
139 | { "CP-104EL series", 4, }, | |
140 | { "CB-108 series", 8, }, | |
141 | /*25*/ { "CB-114 series", 4, }, | |
142 | { "CB-134I series", 4, }, | |
143 | { "CP-138U series", 8, }, | |
80ff8a80 JS |
144 | { "POS-104UL series", 4, }, |
145 | { "CP-114UL series", 4, } | |
1c45607a | 146 | }; |
1da177e4 | 147 | |
1c45607a JS |
148 | /* driver_data correspond to the lines in the structure above |
149 | see also ISA probe function before you change something */ | |
1da177e4 | 150 | static struct pci_device_id mxser_pcibrds[] = { |
1c45607a JS |
151 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, |
152 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, | |
153 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, | |
154 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, | |
155 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, | |
156 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, | |
157 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, | |
158 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, | |
159 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, | |
160 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, | |
161 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, | |
162 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, | |
163 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, | |
164 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, | |
165 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, | |
166 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, | |
167 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, | |
168 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, | |
169 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, | |
170 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, | |
171 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, | |
172 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, | |
173 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, | |
80ff8a80 | 174 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, |
1c45607a | 175 | { } |
1da177e4 | 176 | }; |
1da177e4 LT |
177 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); |
178 | ||
1da177e4 LT |
179 | static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 }; |
180 | static int ttymajor = MXSERMAJOR; | |
1da177e4 LT |
181 | |
182 | /* Variables for insmod */ | |
183 | ||
184 | MODULE_AUTHOR("Casper Yang"); | |
185 | MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); | |
8d3b33f6 RR |
186 | module_param_array(ioaddr, int, NULL, 0); |
187 | module_param(ttymajor, int, 0); | |
1da177e4 LT |
188 | MODULE_LICENSE("GPL"); |
189 | ||
190 | struct mxser_log { | |
191 | int tick; | |
192 | unsigned long rxcnt[MXSER_PORTS]; | |
193 | unsigned long txcnt[MXSER_PORTS]; | |
194 | }; | |
195 | ||
196 | ||
197 | struct mxser_mon { | |
198 | unsigned long rxcnt; | |
199 | unsigned long txcnt; | |
200 | unsigned long up_rxcnt; | |
201 | unsigned long up_txcnt; | |
202 | int modem_status; | |
203 | unsigned char hold_reason; | |
204 | }; | |
205 | ||
206 | struct mxser_mon_ext { | |
207 | unsigned long rx_cnt[32]; | |
208 | unsigned long tx_cnt[32]; | |
209 | unsigned long up_rxcnt[32]; | |
210 | unsigned long up_txcnt[32]; | |
211 | int modem_status[32]; | |
212 | ||
213 | long baudrate[32]; | |
214 | int databits[32]; | |
215 | int stopbits[32]; | |
216 | int parity[32]; | |
217 | int flowctrl[32]; | |
218 | int fifo[32]; | |
219 | int iftype[32]; | |
220 | }; | |
8ea2c2ec | 221 | |
1c45607a JS |
222 | struct mxser_board; |
223 | ||
224 | struct mxser_port { | |
0ad9e7d1 | 225 | struct tty_port port; |
1c45607a | 226 | struct mxser_board *board; |
1c45607a JS |
227 | |
228 | unsigned long ioaddr; | |
229 | unsigned long opmode_ioaddr; | |
230 | int max_baud; | |
1da177e4 | 231 | |
1da177e4 LT |
232 | int rx_high_water; |
233 | int rx_trigger; /* Rx fifo trigger level */ | |
234 | int rx_low_water; | |
235 | int baud_base; /* max. speed */ | |
1da177e4 | 236 | int type; /* UART type */ |
1c45607a | 237 | |
1da177e4 | 238 | int x_char; /* xon/xoff character */ |
1da177e4 LT |
239 | int IER; /* Interrupt Enable Register */ |
240 | int MCR; /* Modem control register */ | |
1c45607a JS |
241 | |
242 | unsigned char stop_rx; | |
243 | unsigned char ldisc_stop_rx; | |
244 | ||
245 | int custom_divisor; | |
1c45607a | 246 | unsigned char err_shadow; |
1c45607a | 247 | |
1c45607a JS |
248 | struct async_icount icount; /* kernel counters for 4 input interrupts */ |
249 | int timeout; | |
250 | ||
251 | int read_status_mask; | |
252 | int ignore_status_mask; | |
253 | int xmit_fifo_size; | |
1da177e4 LT |
254 | int xmit_head; |
255 | int xmit_tail; | |
256 | int xmit_cnt; | |
1c45607a | 257 | |
606d099c | 258 | struct ktermios normal_termios; |
1c45607a | 259 | |
1da177e4 | 260 | struct mxser_mon mon_data; |
1c45607a | 261 | |
1da177e4 | 262 | spinlock_t slock; |
1c45607a JS |
263 | wait_queue_head_t delta_msr_wait; |
264 | }; | |
265 | ||
266 | struct mxser_board { | |
267 | unsigned int idx; | |
268 | int irq; | |
269 | const struct mxser_cardinfo *info; | |
270 | unsigned long vector; | |
271 | unsigned long vector_mask; | |
272 | ||
273 | int chip_flag; | |
274 | int uart_type; | |
275 | ||
276 | struct mxser_port ports[MXSER_PORTS_PER_BOARD]; | |
1da177e4 LT |
277 | }; |
278 | ||
1da177e4 LT |
279 | struct mxser_mstatus { |
280 | tcflag_t cflag; | |
281 | int cts; | |
282 | int dsr; | |
283 | int ri; | |
284 | int dcd; | |
285 | }; | |
286 | ||
287 | static struct mxser_mstatus GMStatus[MXSER_PORTS]; | |
288 | ||
289 | static int mxserBoardCAP[MXSER_BOARDS] = { | |
290 | 0, 0, 0, 0 | |
8ea2c2ec | 291 | /* 0x180, 0x280, 0x200, 0x320 */ |
1da177e4 LT |
292 | }; |
293 | ||
1c45607a | 294 | static struct mxser_board mxser_boards[MXSER_BOARDS]; |
1da177e4 | 295 | static struct tty_driver *mxvar_sdriver; |
1da177e4 LT |
296 | static struct mxser_log mxvar_log; |
297 | static int mxvar_diagflag; | |
298 | static unsigned char mxser_msr[MXSER_PORTS + 1]; | |
299 | static struct mxser_mon_ext mon_data_ext; | |
300 | static int mxser_set_baud_method[MXSER_PORTS + 1]; | |
1da177e4 | 301 | |
148ff86b CH |
302 | static void mxser_enable_must_enchance_mode(unsigned long baseio) |
303 | { | |
304 | u8 oldlcr; | |
305 | u8 efr; | |
306 | ||
307 | oldlcr = inb(baseio + UART_LCR); | |
308 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
309 | ||
310 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
311 | efr |= MOXA_MUST_EFR_EFRB_ENABLE; | |
312 | ||
313 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
314 | outb(oldlcr, baseio + UART_LCR); | |
315 | } | |
316 | ||
317 | static void mxser_disable_must_enchance_mode(unsigned long baseio) | |
318 | { | |
319 | u8 oldlcr; | |
320 | u8 efr; | |
321 | ||
322 | oldlcr = inb(baseio + UART_LCR); | |
323 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
324 | ||
325 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
326 | efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; | |
327 | ||
328 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
329 | outb(oldlcr, baseio + UART_LCR); | |
330 | } | |
331 | ||
332 | static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) | |
333 | { | |
334 | u8 oldlcr; | |
335 | u8 efr; | |
336 | ||
337 | oldlcr = inb(baseio + UART_LCR); | |
338 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
339 | ||
340 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
341 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
342 | efr |= MOXA_MUST_EFR_BANK0; | |
343 | ||
344 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
345 | outb(value, baseio + MOXA_MUST_XON1_REGISTER); | |
346 | outb(oldlcr, baseio + UART_LCR); | |
347 | } | |
348 | ||
349 | static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) | |
350 | { | |
351 | u8 oldlcr; | |
352 | u8 efr; | |
353 | ||
354 | oldlcr = inb(baseio + UART_LCR); | |
355 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
356 | ||
357 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
358 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
359 | efr |= MOXA_MUST_EFR_BANK0; | |
360 | ||
361 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
362 | outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); | |
363 | outb(oldlcr, baseio + UART_LCR); | |
364 | } | |
365 | ||
366 | static void mxser_set_must_fifo_value(struct mxser_port *info) | |
367 | { | |
368 | u8 oldlcr; | |
369 | u8 efr; | |
370 | ||
371 | oldlcr = inb(info->ioaddr + UART_LCR); | |
372 | outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); | |
373 | ||
374 | efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
375 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
376 | efr |= MOXA_MUST_EFR_BANK1; | |
377 | ||
378 | outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
379 | outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); | |
380 | outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); | |
381 | outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); | |
382 | outb(oldlcr, info->ioaddr + UART_LCR); | |
383 | } | |
384 | ||
385 | static void mxser_set_must_enum_value(unsigned long baseio, u8 value) | |
386 | { | |
387 | u8 oldlcr; | |
388 | u8 efr; | |
389 | ||
390 | oldlcr = inb(baseio + UART_LCR); | |
391 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
392 | ||
393 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
394 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
395 | efr |= MOXA_MUST_EFR_BANK2; | |
396 | ||
397 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
398 | outb(value, baseio + MOXA_MUST_ENUM_REGISTER); | |
399 | outb(oldlcr, baseio + UART_LCR); | |
400 | } | |
401 | ||
402 | static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) | |
403 | { | |
404 | u8 oldlcr; | |
405 | u8 efr; | |
406 | ||
407 | oldlcr = inb(baseio + UART_LCR); | |
408 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
409 | ||
410 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
411 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
412 | efr |= MOXA_MUST_EFR_BANK2; | |
413 | ||
414 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
415 | *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); | |
416 | outb(oldlcr, baseio + UART_LCR); | |
417 | } | |
418 | ||
419 | static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) | |
420 | { | |
421 | u8 oldlcr; | |
422 | u8 efr; | |
423 | ||
424 | oldlcr = inb(baseio + UART_LCR); | |
425 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
426 | ||
427 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
428 | efr &= ~MOXA_MUST_EFR_SF_MASK; | |
429 | ||
430 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
431 | outb(oldlcr, baseio + UART_LCR); | |
432 | } | |
433 | ||
434 | static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) | |
435 | { | |
436 | u8 oldlcr; | |
437 | u8 efr; | |
438 | ||
439 | oldlcr = inb(baseio + UART_LCR); | |
440 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
441 | ||
442 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
443 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
444 | efr |= MOXA_MUST_EFR_SF_TX1; | |
445 | ||
446 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
447 | outb(oldlcr, baseio + UART_LCR); | |
448 | } | |
449 | ||
450 | static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) | |
451 | { | |
452 | u8 oldlcr; | |
453 | u8 efr; | |
454 | ||
455 | oldlcr = inb(baseio + UART_LCR); | |
456 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
457 | ||
458 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
459 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
460 | ||
461 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
462 | outb(oldlcr, baseio + UART_LCR); | |
463 | } | |
464 | ||
465 | static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) | |
466 | { | |
467 | u8 oldlcr; | |
468 | u8 efr; | |
469 | ||
470 | oldlcr = inb(baseio + UART_LCR); | |
471 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
472 | ||
473 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
474 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
475 | efr |= MOXA_MUST_EFR_SF_RX1; | |
476 | ||
477 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
478 | outb(oldlcr, baseio + UART_LCR); | |
479 | } | |
480 | ||
481 | static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) | |
482 | { | |
483 | u8 oldlcr; | |
484 | u8 efr; | |
485 | ||
486 | oldlcr = inb(baseio + UART_LCR); | |
487 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
488 | ||
489 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
490 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
491 | ||
492 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
493 | outb(oldlcr, baseio + UART_LCR); | |
494 | } | |
495 | ||
b8cc5549 | 496 | #ifdef CONFIG_PCI |
1c45607a | 497 | static int __devinit CheckIsMoxaMust(unsigned long io) |
1da177e4 LT |
498 | { |
499 | u8 oldmcr, hwid; | |
500 | int i; | |
501 | ||
502 | outb(0, io + UART_LCR); | |
148ff86b | 503 | mxser_disable_must_enchance_mode(io); |
1da177e4 LT |
504 | oldmcr = inb(io + UART_MCR); |
505 | outb(0, io + UART_MCR); | |
148ff86b | 506 | mxser_set_must_xon1_value(io, 0x11); |
1da177e4 LT |
507 | if ((hwid = inb(io + UART_MCR)) != 0) { |
508 | outb(oldmcr, io + UART_MCR); | |
8ea2c2ec | 509 | return MOXA_OTHER_UART; |
1da177e4 LT |
510 | } |
511 | ||
148ff86b | 512 | mxser_get_must_hardware_id(io, &hwid); |
1c45607a JS |
513 | for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ |
514 | if (hwid == Gpci_uart_info[i].type) | |
8ea2c2ec | 515 | return (int)hwid; |
1da177e4 LT |
516 | } |
517 | return MOXA_OTHER_UART; | |
518 | } | |
b8cc5549 | 519 | #endif |
1da177e4 | 520 | |
1c45607a | 521 | static void process_txrx_fifo(struct mxser_port *info) |
1da177e4 LT |
522 | { |
523 | int i; | |
524 | ||
525 | if ((info->type == PORT_16450) || (info->type == PORT_8250)) { | |
526 | info->rx_trigger = 1; | |
527 | info->rx_high_water = 1; | |
528 | info->rx_low_water = 1; | |
529 | info->xmit_fifo_size = 1; | |
1c45607a JS |
530 | } else |
531 | for (i = 0; i < UART_INFO_NUM; i++) | |
532 | if (info->board->chip_flag == Gpci_uart_info[i].type) { | |
1da177e4 LT |
533 | info->rx_trigger = Gpci_uart_info[i].rx_trigger; |
534 | info->rx_low_water = Gpci_uart_info[i].rx_low_water; | |
535 | info->rx_high_water = Gpci_uart_info[i].rx_high_water; | |
536 | info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; | |
537 | break; | |
538 | } | |
1da177e4 LT |
539 | } |
540 | ||
1c45607a | 541 | static unsigned char mxser_get_msr(int baseaddr, int mode, int port) |
1da177e4 | 542 | { |
1c45607a | 543 | unsigned char status = 0; |
1da177e4 | 544 | |
1c45607a | 545 | status = inb(baseaddr + UART_MSR); |
1da177e4 | 546 | |
1c45607a JS |
547 | mxser_msr[port] &= 0x0F; |
548 | mxser_msr[port] |= status; | |
549 | status = mxser_msr[port]; | |
550 | if (mode) | |
551 | mxser_msr[port] = 0; | |
1da177e4 | 552 | |
1c45607a JS |
553 | return status; |
554 | } | |
1da177e4 | 555 | |
1c45607a JS |
556 | static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, |
557 | struct mxser_port *port) | |
558 | { | |
559 | DECLARE_WAITQUEUE(wait, current); | |
560 | int retval; | |
561 | int do_clocal = 0; | |
562 | unsigned long flags; | |
1da177e4 | 563 | |
1c45607a JS |
564 | /* |
565 | * If non-blocking mode is set, or the port is not enabled, | |
566 | * then make the check up front and then exit. | |
567 | */ | |
568 | if ((filp->f_flags & O_NONBLOCK) || | |
569 | test_bit(TTY_IO_ERROR, &tty->flags)) { | |
0ad9e7d1 | 570 | port->port.flags |= ASYNC_NORMAL_ACTIVE; |
1c45607a JS |
571 | return 0; |
572 | } | |
1da177e4 | 573 | |
1c45607a JS |
574 | if (tty->termios->c_cflag & CLOCAL) |
575 | do_clocal = 1; | |
1da177e4 | 576 | |
1da177e4 | 577 | /* |
1c45607a JS |
578 | * Block waiting for the carrier detect and the line to become |
579 | * free (i.e., not in use by the callout). While we are in | |
0ad9e7d1 | 580 | * this loop, port->port.count is dropped by one, so that |
1c45607a JS |
581 | * mxser_close() knows when to free things. We restore it upon |
582 | * exit, either normal or abnormal. | |
1da177e4 | 583 | */ |
1c45607a | 584 | retval = 0; |
0ad9e7d1 | 585 | add_wait_queue(&port->port.open_wait, &wait); |
1da177e4 | 586 | |
1c45607a JS |
587 | spin_lock_irqsave(&port->slock, flags); |
588 | if (!tty_hung_up_p(filp)) | |
0ad9e7d1 | 589 | port->port.count--; |
1c45607a | 590 | spin_unlock_irqrestore(&port->slock, flags); |
0ad9e7d1 | 591 | port->port.blocked_open++; |
1c45607a JS |
592 | while (1) { |
593 | spin_lock_irqsave(&port->slock, flags); | |
594 | outb(inb(port->ioaddr + UART_MCR) | | |
595 | UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR); | |
596 | spin_unlock_irqrestore(&port->slock, flags); | |
597 | set_current_state(TASK_INTERRUPTIBLE); | |
0ad9e7d1 AC |
598 | if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) { |
599 | if (port->port.flags & ASYNC_HUP_NOTIFY) | |
1c45607a JS |
600 | retval = -EAGAIN; |
601 | else | |
602 | retval = -ERESTARTSYS; | |
603 | break; | |
604 | } | |
0ad9e7d1 | 605 | if (!(port->port.flags & ASYNC_CLOSING) && |
1c45607a JS |
606 | (do_clocal || |
607 | (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD))) | |
608 | break; | |
609 | if (signal_pending(current)) { | |
610 | retval = -ERESTARTSYS; | |
611 | break; | |
612 | } | |
613 | schedule(); | |
1da177e4 | 614 | } |
1c45607a | 615 | set_current_state(TASK_RUNNING); |
0ad9e7d1 | 616 | remove_wait_queue(&port->port.open_wait, &wait); |
1c45607a | 617 | if (!tty_hung_up_p(filp)) |
0ad9e7d1 AC |
618 | port->port.count++; |
619 | port->port.blocked_open--; | |
1c45607a | 620 | if (retval) |
1da177e4 | 621 | return retval; |
0ad9e7d1 | 622 | port->port.flags |= ASYNC_NORMAL_ACTIVE; |
1da177e4 LT |
623 | return 0; |
624 | } | |
625 | ||
1c45607a | 626 | static int mxser_set_baud(struct mxser_port *info, long newspd) |
1da177e4 | 627 | { |
1c45607a JS |
628 | int quot = 0, baud; |
629 | unsigned char cval; | |
1da177e4 | 630 | |
0ad9e7d1 | 631 | if (!info->port.tty || !info->port.tty->termios) |
1c45607a | 632 | return -1; |
1da177e4 | 633 | |
1c45607a JS |
634 | if (!(info->ioaddr)) |
635 | return -1; | |
1da177e4 | 636 | |
1c45607a JS |
637 | if (newspd > info->max_baud) |
638 | return -1; | |
1da177e4 | 639 | |
1c45607a JS |
640 | if (newspd == 134) { |
641 | quot = 2 * info->baud_base / 269; | |
0ad9e7d1 | 642 | tty_encode_baud_rate(info->port.tty, 134, 134); |
1c45607a JS |
643 | } else if (newspd) { |
644 | quot = info->baud_base / newspd; | |
645 | if (quot == 0) | |
646 | quot = 1; | |
647 | baud = info->baud_base/quot; | |
0ad9e7d1 | 648 | tty_encode_baud_rate(info->port.tty, baud, baud); |
1c45607a JS |
649 | } else { |
650 | quot = 0; | |
651 | } | |
1da177e4 | 652 | |
1c45607a JS |
653 | info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); |
654 | info->timeout += HZ / 50; /* Add .02 seconds of slop */ | |
1da177e4 | 655 | |
1c45607a JS |
656 | if (quot) { |
657 | info->MCR |= UART_MCR_DTR; | |
658 | outb(info->MCR, info->ioaddr + UART_MCR); | |
659 | } else { | |
660 | info->MCR &= ~UART_MCR_DTR; | |
661 | outb(info->MCR, info->ioaddr + UART_MCR); | |
662 | return 0; | |
663 | } | |
1da177e4 | 664 | |
1c45607a | 665 | cval = inb(info->ioaddr + UART_LCR); |
1da177e4 | 666 | |
1c45607a | 667 | outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ |
1da177e4 | 668 | |
1c45607a JS |
669 | outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ |
670 | outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ | |
671 | outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ | |
1da177e4 | 672 | |
1c45607a | 673 | #ifdef BOTHER |
0ad9e7d1 | 674 | if (C_BAUD(info->port.tty) == BOTHER) { |
1c45607a JS |
675 | quot = info->baud_base % newspd; |
676 | quot *= 8; | |
677 | if (quot % newspd > newspd / 2) { | |
678 | quot /= newspd; | |
679 | quot++; | |
680 | } else | |
681 | quot /= newspd; | |
682 | ||
148ff86b | 683 | mxser_set_must_enum_value(info->ioaddr, quot); |
1c45607a JS |
684 | } else |
685 | #endif | |
148ff86b | 686 | mxser_set_must_enum_value(info->ioaddr, 0); |
1da177e4 | 687 | |
8ea2c2ec | 688 | return 0; |
1da177e4 | 689 | } |
1da177e4 | 690 | |
1c45607a JS |
691 | /* |
692 | * This routine is called to set the UART divisor registers to match | |
693 | * the specified baud rate for a serial port. | |
694 | */ | |
695 | static int mxser_change_speed(struct mxser_port *info, | |
696 | struct ktermios *old_termios) | |
1da177e4 | 697 | { |
1c45607a JS |
698 | unsigned cflag, cval, fcr; |
699 | int ret = 0; | |
700 | unsigned char status; | |
1da177e4 | 701 | |
0ad9e7d1 | 702 | if (!info->port.tty || !info->port.tty->termios) |
1c45607a | 703 | return ret; |
0ad9e7d1 | 704 | cflag = info->port.tty->termios->c_cflag; |
1c45607a JS |
705 | if (!(info->ioaddr)) |
706 | return ret; | |
1da177e4 | 707 | |
0ad9e7d1 AC |
708 | if (mxser_set_baud_method[info->port.tty->index] == 0) |
709 | mxser_set_baud(info, tty_get_baud_rate(info->port.tty)); | |
1da177e4 | 710 | |
1c45607a JS |
711 | /* byte size and parity */ |
712 | switch (cflag & CSIZE) { | |
713 | case CS5: | |
714 | cval = 0x00; | |
715 | break; | |
716 | case CS6: | |
717 | cval = 0x01; | |
718 | break; | |
719 | case CS7: | |
720 | cval = 0x02; | |
721 | break; | |
722 | case CS8: | |
723 | cval = 0x03; | |
724 | break; | |
725 | default: | |
726 | cval = 0x00; | |
727 | break; /* too keep GCC shut... */ | |
728 | } | |
729 | if (cflag & CSTOPB) | |
730 | cval |= 0x04; | |
731 | if (cflag & PARENB) | |
732 | cval |= UART_LCR_PARITY; | |
733 | if (!(cflag & PARODD)) | |
734 | cval |= UART_LCR_EPAR; | |
735 | if (cflag & CMSPAR) | |
736 | cval |= UART_LCR_SPAR; | |
1da177e4 | 737 | |
1c45607a JS |
738 | if ((info->type == PORT_8250) || (info->type == PORT_16450)) { |
739 | if (info->board->chip_flag) { | |
740 | fcr = UART_FCR_ENABLE_FIFO; | |
741 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 742 | mxser_set_must_fifo_value(info); |
1c45607a JS |
743 | } else |
744 | fcr = 0; | |
745 | } else { | |
746 | fcr = UART_FCR_ENABLE_FIFO; | |
747 | if (info->board->chip_flag) { | |
748 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 749 | mxser_set_must_fifo_value(info); |
1c45607a JS |
750 | } else { |
751 | switch (info->rx_trigger) { | |
752 | case 1: | |
753 | fcr |= UART_FCR_TRIGGER_1; | |
754 | break; | |
755 | case 4: | |
756 | fcr |= UART_FCR_TRIGGER_4; | |
757 | break; | |
758 | case 8: | |
759 | fcr |= UART_FCR_TRIGGER_8; | |
760 | break; | |
761 | default: | |
762 | fcr |= UART_FCR_TRIGGER_14; | |
763 | break; | |
764 | } | |
1da177e4 | 765 | } |
1da177e4 LT |
766 | } |
767 | ||
1c45607a JS |
768 | /* CTS flow control flag and modem status interrupts */ |
769 | info->IER &= ~UART_IER_MSI; | |
770 | info->MCR &= ~UART_MCR_AFE; | |
771 | if (cflag & CRTSCTS) { | |
0ad9e7d1 | 772 | info->port.flags |= ASYNC_CTS_FLOW; |
1c45607a JS |
773 | info->IER |= UART_IER_MSI; |
774 | if ((info->type == PORT_16550A) || (info->board->chip_flag)) { | |
775 | info->MCR |= UART_MCR_AFE; | |
776 | } else { | |
777 | status = inb(info->ioaddr + UART_MSR); | |
0ad9e7d1 | 778 | if (info->port.tty->hw_stopped) { |
1c45607a | 779 | if (status & UART_MSR_CTS) { |
0ad9e7d1 | 780 | info->port.tty->hw_stopped = 0; |
1c45607a JS |
781 | if (info->type != PORT_16550A && |
782 | !info->board->chip_flag) { | |
783 | outb(info->IER & ~UART_IER_THRI, | |
784 | info->ioaddr + | |
785 | UART_IER); | |
786 | info->IER |= UART_IER_THRI; | |
787 | outb(info->IER, info->ioaddr + | |
788 | UART_IER); | |
789 | } | |
0ad9e7d1 | 790 | tty_wakeup(info->port.tty); |
1c45607a JS |
791 | } |
792 | } else { | |
793 | if (!(status & UART_MSR_CTS)) { | |
0ad9e7d1 | 794 | info->port.tty->hw_stopped = 1; |
1c45607a JS |
795 | if ((info->type != PORT_16550A) && |
796 | (!info->board->chip_flag)) { | |
797 | info->IER &= ~UART_IER_THRI; | |
798 | outb(info->IER, info->ioaddr + | |
799 | UART_IER); | |
800 | } | |
801 | } | |
802 | } | |
1da177e4 | 803 | } |
1c45607a | 804 | } else { |
0ad9e7d1 | 805 | info->port.flags &= ~ASYNC_CTS_FLOW; |
1c45607a JS |
806 | } |
807 | outb(info->MCR, info->ioaddr + UART_MCR); | |
808 | if (cflag & CLOCAL) { | |
0ad9e7d1 | 809 | info->port.flags &= ~ASYNC_CHECK_CD; |
1c45607a | 810 | } else { |
0ad9e7d1 | 811 | info->port.flags |= ASYNC_CHECK_CD; |
1c45607a JS |
812 | info->IER |= UART_IER_MSI; |
813 | } | |
814 | outb(info->IER, info->ioaddr + UART_IER); | |
815 | ||
816 | /* | |
817 | * Set up parity check flag | |
818 | */ | |
819 | info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; | |
0ad9e7d1 | 820 | if (I_INPCK(info->port.tty)) |
1c45607a | 821 | info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; |
0ad9e7d1 | 822 | if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty)) |
1c45607a | 823 | info->read_status_mask |= UART_LSR_BI; |
1da177e4 | 824 | |
1c45607a | 825 | info->ignore_status_mask = 0; |
1da177e4 | 826 | |
0ad9e7d1 | 827 | if (I_IGNBRK(info->port.tty)) { |
1c45607a JS |
828 | info->ignore_status_mask |= UART_LSR_BI; |
829 | info->read_status_mask |= UART_LSR_BI; | |
8ea2c2ec | 830 | /* |
1c45607a JS |
831 | * If we're ignore parity and break indicators, ignore |
832 | * overruns too. (For real raw support). | |
8ea2c2ec | 833 | */ |
0ad9e7d1 | 834 | if (I_IGNPAR(info->port.tty)) { |
1c45607a JS |
835 | info->ignore_status_mask |= |
836 | UART_LSR_OE | | |
837 | UART_LSR_PE | | |
838 | UART_LSR_FE; | |
839 | info->read_status_mask |= | |
840 | UART_LSR_OE | | |
841 | UART_LSR_PE | | |
842 | UART_LSR_FE; | |
843 | } | |
1da177e4 | 844 | } |
1c45607a | 845 | if (info->board->chip_flag) { |
0ad9e7d1 AC |
846 | mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty)); |
847 | mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty)); | |
848 | if (I_IXON(info->port.tty)) { | |
148ff86b CH |
849 | mxser_enable_must_rx_software_flow_control( |
850 | info->ioaddr); | |
1c45607a | 851 | } else { |
148ff86b CH |
852 | mxser_disable_must_rx_software_flow_control( |
853 | info->ioaddr); | |
1da177e4 | 854 | } |
0ad9e7d1 | 855 | if (I_IXOFF(info->port.tty)) { |
148ff86b CH |
856 | mxser_enable_must_tx_software_flow_control( |
857 | info->ioaddr); | |
1c45607a | 858 | } else { |
148ff86b CH |
859 | mxser_disable_must_tx_software_flow_control( |
860 | info->ioaddr); | |
1da177e4 LT |
861 | } |
862 | } | |
1da177e4 | 863 | |
1da177e4 | 864 | |
1c45607a JS |
865 | outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ |
866 | outb(cval, info->ioaddr + UART_LCR); | |
1da177e4 | 867 | |
1c45607a | 868 | return ret; |
1da177e4 LT |
869 | } |
870 | ||
1c45607a | 871 | static void mxser_check_modem_status(struct mxser_port *port, int status) |
1da177e4 | 872 | { |
1c45607a JS |
873 | /* update input line counters */ |
874 | if (status & UART_MSR_TERI) | |
875 | port->icount.rng++; | |
876 | if (status & UART_MSR_DDSR) | |
877 | port->icount.dsr++; | |
878 | if (status & UART_MSR_DDCD) | |
879 | port->icount.dcd++; | |
880 | if (status & UART_MSR_DCTS) | |
881 | port->icount.cts++; | |
882 | port->mon_data.modem_status = status; | |
883 | wake_up_interruptible(&port->delta_msr_wait); | |
1da177e4 | 884 | |
0ad9e7d1 | 885 | if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { |
1c45607a | 886 | if (status & UART_MSR_DCD) |
0ad9e7d1 | 887 | wake_up_interruptible(&port->port.open_wait); |
1c45607a | 888 | } |
1da177e4 | 889 | |
0ad9e7d1 AC |
890 | if (port->port.flags & ASYNC_CTS_FLOW) { |
891 | if (port->port.tty->hw_stopped) { | |
1c45607a | 892 | if (status & UART_MSR_CTS) { |
0ad9e7d1 | 893 | port->port.tty->hw_stopped = 0; |
1c45607a JS |
894 | |
895 | if ((port->type != PORT_16550A) && | |
896 | (!port->board->chip_flag)) { | |
897 | outb(port->IER & ~UART_IER_THRI, | |
898 | port->ioaddr + UART_IER); | |
899 | port->IER |= UART_IER_THRI; | |
900 | outb(port->IER, port->ioaddr + | |
901 | UART_IER); | |
902 | } | |
0ad9e7d1 | 903 | tty_wakeup(port->port.tty); |
1c45607a JS |
904 | } |
905 | } else { | |
906 | if (!(status & UART_MSR_CTS)) { | |
0ad9e7d1 | 907 | port->port.tty->hw_stopped = 1; |
1c45607a JS |
908 | if (port->type != PORT_16550A && |
909 | !port->board->chip_flag) { | |
910 | port->IER &= ~UART_IER_THRI; | |
911 | outb(port->IER, port->ioaddr + | |
912 | UART_IER); | |
913 | } | |
914 | } | |
915 | } | |
1da177e4 LT |
916 | } |
917 | } | |
918 | ||
1c45607a | 919 | static int mxser_startup(struct mxser_port *info) |
1da177e4 | 920 | { |
1c45607a JS |
921 | unsigned long page; |
922 | unsigned long flags; | |
1da177e4 | 923 | |
1c45607a JS |
924 | page = __get_free_page(GFP_KERNEL); |
925 | if (!page) | |
926 | return -ENOMEM; | |
1da177e4 | 927 | |
1c45607a | 928 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 929 | |
0ad9e7d1 | 930 | if (info->port.flags & ASYNC_INITIALIZED) { |
1c45607a JS |
931 | free_page(page); |
932 | spin_unlock_irqrestore(&info->slock, flags); | |
933 | return 0; | |
934 | } | |
6f08b72c | 935 | |
1c45607a | 936 | if (!info->ioaddr || !info->type) { |
0ad9e7d1 AC |
937 | if (info->port.tty) |
938 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | |
1c45607a JS |
939 | free_page(page); |
940 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 941 | return 0; |
1c45607a | 942 | } |
0ad9e7d1 | 943 | if (info->port.xmit_buf) |
1c45607a JS |
944 | free_page(page); |
945 | else | |
0ad9e7d1 | 946 | info->port.xmit_buf = (unsigned char *) page; |
1da177e4 | 947 | |
1da177e4 | 948 | /* |
1c45607a JS |
949 | * Clear the FIFO buffers and disable them |
950 | * (they will be reenabled in mxser_change_speed()) | |
1da177e4 | 951 | */ |
1c45607a JS |
952 | if (info->board->chip_flag) |
953 | outb((UART_FCR_CLEAR_RCVR | | |
954 | UART_FCR_CLEAR_XMIT | | |
955 | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); | |
956 | else | |
957 | outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
958 | info->ioaddr + UART_FCR); | |
1da177e4 | 959 | |
1c45607a JS |
960 | /* |
961 | * At this point there's no way the LSR could still be 0xFF; | |
962 | * if it is, then bail out, because there's likely no UART | |
963 | * here. | |
964 | */ | |
965 | if (inb(info->ioaddr + UART_LSR) == 0xff) { | |
966 | spin_unlock_irqrestore(&info->slock, flags); | |
967 | if (capable(CAP_SYS_ADMIN)) { | |
0ad9e7d1 AC |
968 | if (info->port.tty) |
969 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | |
1c45607a JS |
970 | return 0; |
971 | } else | |
972 | return -ENODEV; | |
973 | } | |
1da177e4 | 974 | |
1c45607a JS |
975 | /* |
976 | * Clear the interrupt registers. | |
977 | */ | |
978 | (void) inb(info->ioaddr + UART_LSR); | |
979 | (void) inb(info->ioaddr + UART_RX); | |
980 | (void) inb(info->ioaddr + UART_IIR); | |
981 | (void) inb(info->ioaddr + UART_MSR); | |
982 | ||
983 | /* | |
984 | * Now, initialize the UART | |
985 | */ | |
986 | outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ | |
987 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | |
988 | outb(info->MCR, info->ioaddr + UART_MCR); | |
989 | ||
990 | /* | |
991 | * Finally, enable interrupts | |
992 | */ | |
993 | info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; | |
994 | ||
995 | if (info->board->chip_flag) | |
996 | info->IER |= MOXA_MUST_IER_EGDAI; | |
997 | outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ | |
998 | ||
999 | /* | |
1000 | * And clear the interrupt registers again for luck. | |
1001 | */ | |
1002 | (void) inb(info->ioaddr + UART_LSR); | |
1003 | (void) inb(info->ioaddr + UART_RX); | |
1004 | (void) inb(info->ioaddr + UART_IIR); | |
1005 | (void) inb(info->ioaddr + UART_MSR); | |
1006 | ||
0ad9e7d1 AC |
1007 | if (info->port.tty) |
1008 | clear_bit(TTY_IO_ERROR, &info->port.tty->flags); | |
1c45607a JS |
1009 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
1010 | ||
1011 | /* | |
1012 | * and set the speed of the serial port | |
1013 | */ | |
1014 | mxser_change_speed(info, NULL); | |
0ad9e7d1 | 1015 | info->port.flags |= ASYNC_INITIALIZED; |
1c45607a JS |
1016 | spin_unlock_irqrestore(&info->slock, flags); |
1017 | ||
1018 | return 0; | |
1019 | } | |
1020 | ||
1021 | /* | |
1022 | * This routine will shutdown a serial port; interrupts maybe disabled, and | |
1023 | * DTR is dropped if the hangup on close termio flag is on. | |
1024 | */ | |
1025 | static void mxser_shutdown(struct mxser_port *info) | |
1026 | { | |
1027 | unsigned long flags; | |
1028 | ||
0ad9e7d1 | 1029 | if (!(info->port.flags & ASYNC_INITIALIZED)) |
1c45607a JS |
1030 | return; |
1031 | ||
1032 | spin_lock_irqsave(&info->slock, flags); | |
1033 | ||
1034 | /* | |
1035 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | |
1036 | * here so the queue might never be waken up | |
1037 | */ | |
1038 | wake_up_interruptible(&info->delta_msr_wait); | |
1039 | ||
1040 | /* | |
1041 | * Free the IRQ, if necessary | |
1042 | */ | |
0ad9e7d1 AC |
1043 | if (info->port.xmit_buf) { |
1044 | free_page((unsigned long) info->port.xmit_buf); | |
1045 | info->port.xmit_buf = NULL; | |
1da177e4 LT |
1046 | } |
1047 | ||
1c45607a JS |
1048 | info->IER = 0; |
1049 | outb(0x00, info->ioaddr + UART_IER); | |
1050 | ||
0ad9e7d1 | 1051 | if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL)) |
1c45607a JS |
1052 | info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS); |
1053 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1054 | ||
1055 | /* clear Rx/Tx FIFO's */ | |
1056 | if (info->board->chip_flag) | |
1057 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | | |
1058 | MOXA_MUST_FCR_GDA_MODE_ENABLE, | |
1059 | info->ioaddr + UART_FCR); | |
1060 | else | |
1061 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, | |
1062 | info->ioaddr + UART_FCR); | |
1063 | ||
1064 | /* read data port to reset things */ | |
1065 | (void) inb(info->ioaddr + UART_RX); | |
1066 | ||
0ad9e7d1 AC |
1067 | if (info->port.tty) |
1068 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | |
1c45607a | 1069 | |
0ad9e7d1 | 1070 | info->port.flags &= ~ASYNC_INITIALIZED; |
1c45607a JS |
1071 | |
1072 | if (info->board->chip_flag) | |
1073 | SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
1074 | ||
1075 | spin_unlock_irqrestore(&info->slock, flags); | |
1076 | } | |
1077 | ||
1078 | /* | |
1079 | * This routine is called whenever a serial port is opened. It | |
1080 | * enables interrupts for a serial port, linking in its async structure into | |
1081 | * the IRQ chain. It also performs the serial-specific | |
1082 | * initialization for the tty structure. | |
1083 | */ | |
1084 | static int mxser_open(struct tty_struct *tty, struct file *filp) | |
1085 | { | |
1086 | struct mxser_port *info; | |
1087 | unsigned long flags; | |
1088 | int retval, line; | |
1089 | ||
1090 | line = tty->index; | |
1091 | if (line == MXSER_PORTS) | |
1092 | return 0; | |
1093 | if (line < 0 || line > MXSER_PORTS) | |
1094 | return -ENODEV; | |
1095 | info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; | |
1096 | if (!info->ioaddr) | |
1097 | return -ENODEV; | |
1098 | ||
1099 | tty->driver_data = info; | |
0ad9e7d1 | 1100 | info->port.tty = tty; |
8ea2c2ec | 1101 | /* |
1c45607a JS |
1102 | * Start up serial port |
1103 | */ | |
1104 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1105 | info->port.count++; |
1c45607a JS |
1106 | spin_unlock_irqrestore(&info->slock, flags); |
1107 | retval = mxser_startup(info); | |
1108 | if (retval) | |
1109 | return retval; | |
1110 | ||
1111 | retval = mxser_block_til_ready(tty, filp, info); | |
1112 | if (retval) | |
1113 | return retval; | |
1da177e4 | 1114 | |
8cddd707 | 1115 | /* unmark here for very high baud rate (ex. 921600 bps) used */ |
1da177e4 LT |
1116 | tty->low_latency = 1; |
1117 | return 0; | |
1118 | } | |
1119 | ||
978e595f AC |
1120 | static void mxser_flush_buffer(struct tty_struct *tty) |
1121 | { | |
1122 | struct mxser_port *info = tty->driver_data; | |
1123 | char fcr; | |
1124 | unsigned long flags; | |
1125 | ||
1126 | ||
1127 | spin_lock_irqsave(&info->slock, flags); | |
1128 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
1129 | ||
1130 | fcr = inb(info->ioaddr + UART_FCR); | |
1131 | outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
1132 | info->ioaddr + UART_FCR); | |
1133 | outb(fcr, info->ioaddr + UART_FCR); | |
1134 | ||
1135 | spin_unlock_irqrestore(&info->slock, flags); | |
1136 | ||
1137 | tty_wakeup(tty); | |
1138 | } | |
1139 | ||
1140 | ||
1da177e4 LT |
1141 | /* |
1142 | * This routine is called when the serial port gets closed. First, we | |
1143 | * wait for the last remaining data to be sent. Then, we unlink its | |
1144 | * async structure from the interrupt chain if necessary, and we free | |
1145 | * that IRQ if nothing is left in the chain. | |
1146 | */ | |
1147 | static void mxser_close(struct tty_struct *tty, struct file *filp) | |
1148 | { | |
1c45607a | 1149 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1150 | |
1151 | unsigned long timeout; | |
1152 | unsigned long flags; | |
1da177e4 LT |
1153 | |
1154 | if (tty->index == MXSER_PORTS) | |
1155 | return; | |
1156 | if (!info) | |
6f08b72c | 1157 | return; |
1da177e4 LT |
1158 | |
1159 | spin_lock_irqsave(&info->slock, flags); | |
1160 | ||
1161 | if (tty_hung_up_p(filp)) { | |
1162 | spin_unlock_irqrestore(&info->slock, flags); | |
1163 | return; | |
1164 | } | |
0ad9e7d1 | 1165 | if ((tty->count == 1) && (info->port.count != 1)) { |
1da177e4 LT |
1166 | /* |
1167 | * Uh, oh. tty->count is 1, which means that the tty | |
0ad9e7d1 | 1168 | * structure will be freed. Info->port.count should always |
1da177e4 LT |
1169 | * be one in these conditions. If it's greater than |
1170 | * one, we've got real problems, since it means the | |
1171 | * serial port won't be shutdown. | |
1172 | */ | |
8ea2c2ec | 1173 | printk(KERN_ERR "mxser_close: bad serial port count; " |
0ad9e7d1 AC |
1174 | "tty->count is 1, info->port.count is %d\n", info->port.count); |
1175 | info->port.count = 1; | |
1da177e4 | 1176 | } |
0ad9e7d1 | 1177 | if (--info->port.count < 0) { |
8ea2c2ec | 1178 | printk(KERN_ERR "mxser_close: bad serial port count for " |
0ad9e7d1 AC |
1179 | "ttys%d: %d\n", tty->index, info->port.count); |
1180 | info->port.count = 0; | |
1da177e4 | 1181 | } |
0ad9e7d1 | 1182 | if (info->port.count) { |
1da177e4 LT |
1183 | spin_unlock_irqrestore(&info->slock, flags); |
1184 | return; | |
1185 | } | |
0ad9e7d1 | 1186 | info->port.flags |= ASYNC_CLOSING; |
1da177e4 LT |
1187 | spin_unlock_irqrestore(&info->slock, flags); |
1188 | /* | |
1189 | * Save the termios structure, since this port may have | |
1190 | * separate termios for callout and dialin. | |
1191 | */ | |
0ad9e7d1 | 1192 | if (info->port.flags & ASYNC_NORMAL_ACTIVE) |
1da177e4 LT |
1193 | info->normal_termios = *tty->termios; |
1194 | /* | |
1195 | * Now we wait for the transmit buffer to clear; and we notify | |
1196 | * the line discipline to only process XON/XOFF characters. | |
1197 | */ | |
1198 | tty->closing = 1; | |
44b7d1b3 AC |
1199 | if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE) |
1200 | tty_wait_until_sent(tty, info->port.closing_wait); | |
1da177e4 LT |
1201 | /* |
1202 | * At this point we stop accepting input. To do this, we | |
1203 | * disable the receive line status interrupts, and tell the | |
1204 | * interrupt driver to stop checking the data ready bit in the | |
1205 | * line status register. | |
1206 | */ | |
1207 | info->IER &= ~UART_IER_RLSI; | |
1c45607a | 1208 | if (info->board->chip_flag) |
1da177e4 | 1209 | info->IER &= ~MOXA_MUST_RECV_ISR; |
1c45607a | 1210 | |
0ad9e7d1 | 1211 | if (info->port.flags & ASYNC_INITIALIZED) { |
1c45607a | 1212 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1213 | /* |
1214 | * Before we drop DTR, make sure the UART transmitter | |
1215 | * has completely drained; this is especially | |
1216 | * important if there is a transmit FIFO! | |
1217 | */ | |
1218 | timeout = jiffies + HZ; | |
1c45607a | 1219 | while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { |
da4cd8df | 1220 | schedule_timeout_interruptible(5); |
1da177e4 LT |
1221 | if (time_after(jiffies, timeout)) |
1222 | break; | |
1223 | } | |
1224 | } | |
1225 | mxser_shutdown(info); | |
1226 | ||
978e595f | 1227 | mxser_flush_buffer(tty); |
1c45607a JS |
1228 | tty_ldisc_flush(tty); |
1229 | ||
1da177e4 | 1230 | tty->closing = 0; |
0ad9e7d1 AC |
1231 | info->port.tty = NULL; |
1232 | if (info->port.blocked_open) { | |
44b7d1b3 AC |
1233 | if (info->port.close_delay) |
1234 | schedule_timeout_interruptible(info->port.close_delay); | |
0ad9e7d1 | 1235 | wake_up_interruptible(&info->port.open_wait); |
1da177e4 LT |
1236 | } |
1237 | ||
0ad9e7d1 | 1238 | info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); |
1da177e4 LT |
1239 | } |
1240 | ||
1241 | static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
1242 | { | |
1243 | int c, total = 0; | |
1c45607a | 1244 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1245 | unsigned long flags; |
1246 | ||
0ad9e7d1 | 1247 | if (!info->port.xmit_buf) |
8ea2c2ec | 1248 | return 0; |
1da177e4 LT |
1249 | |
1250 | while (1) { | |
8ea2c2ec JJ |
1251 | c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, |
1252 | SERIAL_XMIT_SIZE - info->xmit_head)); | |
1da177e4 LT |
1253 | if (c <= 0) |
1254 | break; | |
1255 | ||
0ad9e7d1 | 1256 | memcpy(info->port.xmit_buf + info->xmit_head, buf, c); |
1da177e4 | 1257 | spin_lock_irqsave(&info->slock, flags); |
8ea2c2ec JJ |
1258 | info->xmit_head = (info->xmit_head + c) & |
1259 | (SERIAL_XMIT_SIZE - 1); | |
1da177e4 LT |
1260 | info->xmit_cnt += c; |
1261 | spin_unlock_irqrestore(&info->slock, flags); | |
1262 | ||
1263 | buf += c; | |
1264 | count -= c; | |
1265 | total += c; | |
1da177e4 LT |
1266 | } |
1267 | ||
1c45607a | 1268 | if (info->xmit_cnt && !tty->stopped) { |
8ea2c2ec JJ |
1269 | if (!tty->hw_stopped || |
1270 | (info->type == PORT_16550A) || | |
1c45607a | 1271 | (info->board->chip_flag)) { |
1da177e4 | 1272 | spin_lock_irqsave(&info->slock, flags); |
1c45607a JS |
1273 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + |
1274 | UART_IER); | |
1da177e4 | 1275 | info->IER |= UART_IER_THRI; |
1c45607a | 1276 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1277 | spin_unlock_irqrestore(&info->slock, flags); |
1278 | } | |
1279 | } | |
1280 | return total; | |
1281 | } | |
1282 | ||
0be2eade | 1283 | static int mxser_put_char(struct tty_struct *tty, unsigned char ch) |
1da177e4 | 1284 | { |
1c45607a | 1285 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1286 | unsigned long flags; |
1287 | ||
0ad9e7d1 | 1288 | if (!info->port.xmit_buf) |
0be2eade | 1289 | return 0; |
1da177e4 LT |
1290 | |
1291 | if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) | |
0be2eade | 1292 | return 0; |
1da177e4 LT |
1293 | |
1294 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1295 | info->port.xmit_buf[info->xmit_head++] = ch; |
1da177e4 LT |
1296 | info->xmit_head &= SERIAL_XMIT_SIZE - 1; |
1297 | info->xmit_cnt++; | |
1298 | spin_unlock_irqrestore(&info->slock, flags); | |
1c45607a | 1299 | if (!tty->stopped) { |
8ea2c2ec JJ |
1300 | if (!tty->hw_stopped || |
1301 | (info->type == PORT_16550A) || | |
1c45607a | 1302 | info->board->chip_flag) { |
1da177e4 | 1303 | spin_lock_irqsave(&info->slock, flags); |
1c45607a | 1304 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1305 | info->IER |= UART_IER_THRI; |
1c45607a | 1306 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1307 | spin_unlock_irqrestore(&info->slock, flags); |
1308 | } | |
1309 | } | |
0be2eade | 1310 | return 1; |
1da177e4 LT |
1311 | } |
1312 | ||
1313 | ||
1314 | static void mxser_flush_chars(struct tty_struct *tty) | |
1315 | { | |
1c45607a | 1316 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1317 | unsigned long flags; |
1318 | ||
8ea2c2ec JJ |
1319 | if (info->xmit_cnt <= 0 || |
1320 | tty->stopped || | |
0ad9e7d1 | 1321 | !info->port.xmit_buf || |
8ea2c2ec JJ |
1322 | (tty->hw_stopped && |
1323 | (info->type != PORT_16550A) && | |
1c45607a | 1324 | (!info->board->chip_flag) |
8ea2c2ec | 1325 | )) |
1da177e4 LT |
1326 | return; |
1327 | ||
1328 | spin_lock_irqsave(&info->slock, flags); | |
1329 | ||
1c45607a | 1330 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1331 | info->IER |= UART_IER_THRI; |
1c45607a | 1332 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1333 | |
1334 | spin_unlock_irqrestore(&info->slock, flags); | |
1335 | } | |
1336 | ||
1337 | static int mxser_write_room(struct tty_struct *tty) | |
1338 | { | |
1c45607a | 1339 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1340 | int ret; |
1341 | ||
1342 | ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; | |
1343 | if (ret < 0) | |
1344 | ret = 0; | |
8ea2c2ec | 1345 | return ret; |
1da177e4 LT |
1346 | } |
1347 | ||
1348 | static int mxser_chars_in_buffer(struct tty_struct *tty) | |
1349 | { | |
1c45607a | 1350 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1351 | return info->xmit_cnt; |
1352 | } | |
1353 | ||
1c45607a JS |
1354 | /* |
1355 | * ------------------------------------------------------------ | |
1356 | * friends of mxser_ioctl() | |
1357 | * ------------------------------------------------------------ | |
1358 | */ | |
1359 | static int mxser_get_serial_info(struct mxser_port *info, | |
1360 | struct serial_struct __user *retinfo) | |
1361 | { | |
1362 | struct serial_struct tmp = { | |
1363 | .type = info->type, | |
0ad9e7d1 | 1364 | .line = info->port.tty->index, |
1c45607a JS |
1365 | .port = info->ioaddr, |
1366 | .irq = info->board->irq, | |
0ad9e7d1 | 1367 | .flags = info->port.flags, |
1c45607a | 1368 | .baud_base = info->baud_base, |
44b7d1b3 AC |
1369 | .close_delay = info->port.close_delay, |
1370 | .closing_wait = info->port.closing_wait, | |
1c45607a JS |
1371 | .custom_divisor = info->custom_divisor, |
1372 | .hub6 = 0 | |
1373 | }; | |
1374 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) | |
1375 | return -EFAULT; | |
1376 | return 0; | |
1377 | } | |
1378 | ||
1379 | static int mxser_set_serial_info(struct mxser_port *info, | |
1380 | struct serial_struct __user *new_info) | |
1da177e4 | 1381 | { |
1c45607a | 1382 | struct serial_struct new_serial; |
80ff8a80 | 1383 | speed_t baud; |
1c45607a JS |
1384 | unsigned long sl_flags; |
1385 | unsigned int flags; | |
1386 | int retval = 0; | |
1da177e4 | 1387 | |
1c45607a | 1388 | if (!new_info || !info->ioaddr) |
80ff8a80 | 1389 | return -ENODEV; |
1c45607a JS |
1390 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) |
1391 | return -EFAULT; | |
1da177e4 | 1392 | |
80ff8a80 JS |
1393 | if (new_serial.irq != info->board->irq || |
1394 | new_serial.port != info->ioaddr) | |
1395 | return -EINVAL; | |
1da177e4 | 1396 | |
0ad9e7d1 | 1397 | flags = info->port.flags & ASYNC_SPD_MASK; |
1da177e4 | 1398 | |
1c45607a JS |
1399 | if (!capable(CAP_SYS_ADMIN)) { |
1400 | if ((new_serial.baud_base != info->baud_base) || | |
44b7d1b3 | 1401 | (new_serial.close_delay != info->port.close_delay) || |
0ad9e7d1 | 1402 | ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) |
1c45607a | 1403 | return -EPERM; |
0ad9e7d1 | 1404 | info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | |
1c45607a JS |
1405 | (new_serial.flags & ASYNC_USR_MASK)); |
1406 | } else { | |
1da177e4 | 1407 | /* |
1c45607a JS |
1408 | * OK, past this point, all the error checking has been done. |
1409 | * At this point, we start making changes..... | |
1da177e4 | 1410 | */ |
0ad9e7d1 | 1411 | info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) | |
1c45607a | 1412 | (new_serial.flags & ASYNC_FLAGS)); |
44b7d1b3 AC |
1413 | info->port.close_delay = new_serial.close_delay * HZ / 100; |
1414 | info->port.closing_wait = new_serial.closing_wait * HZ / 100; | |
0ad9e7d1 AC |
1415 | info->port.tty->low_latency = |
1416 | (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0; | |
1417 | info->port.tty->low_latency = 0; | |
1418 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && | |
80ff8a80 JS |
1419 | (new_serial.baud_base != info->baud_base || |
1420 | new_serial.custom_divisor != | |
1421 | info->custom_divisor)) { | |
1422 | baud = new_serial.baud_base / new_serial.custom_divisor; | |
0ad9e7d1 | 1423 | tty_encode_baud_rate(info->port.tty, baud, baud); |
80ff8a80 | 1424 | } |
1c45607a | 1425 | } |
fc83815c | 1426 | |
1c45607a | 1427 | info->type = new_serial.type; |
1da177e4 | 1428 | |
1c45607a JS |
1429 | process_txrx_fifo(info); |
1430 | ||
0ad9e7d1 AC |
1431 | if (info->port.flags & ASYNC_INITIALIZED) { |
1432 | if (flags != (info->port.flags & ASYNC_SPD_MASK)) { | |
1c45607a JS |
1433 | spin_lock_irqsave(&info->slock, sl_flags); |
1434 | mxser_change_speed(info, NULL); | |
1435 | spin_unlock_irqrestore(&info->slock, sl_flags); | |
1da177e4 | 1436 | } |
1c45607a JS |
1437 | } else |
1438 | retval = mxser_startup(info); | |
1da177e4 | 1439 | |
1c45607a JS |
1440 | return retval; |
1441 | } | |
1da177e4 | 1442 | |
1c45607a JS |
1443 | /* |
1444 | * mxser_get_lsr_info - get line status register info | |
1445 | * | |
1446 | * Purpose: Let user call ioctl() to get info when the UART physically | |
1447 | * is emptied. On bus types like RS485, the transmitter must | |
1448 | * release the bus after transmitting. This must be done when | |
1449 | * the transmit shift register is empty, not be done when the | |
1450 | * transmit holding register is empty. This functionality | |
1451 | * allows an RS485 driver to be written in user space. | |
1452 | */ | |
1453 | static int mxser_get_lsr_info(struct mxser_port *info, | |
1454 | unsigned int __user *value) | |
1455 | { | |
1456 | unsigned char status; | |
1457 | unsigned int result; | |
1458 | unsigned long flags; | |
1da177e4 | 1459 | |
1c45607a JS |
1460 | spin_lock_irqsave(&info->slock, flags); |
1461 | status = inb(info->ioaddr + UART_LSR); | |
1462 | spin_unlock_irqrestore(&info->slock, flags); | |
1463 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | |
1464 | return put_user(result, value); | |
1465 | } | |
1da177e4 | 1466 | |
1c45607a JS |
1467 | static int mxser_tiocmget(struct tty_struct *tty, struct file *file) |
1468 | { | |
1469 | struct mxser_port *info = tty->driver_data; | |
1470 | unsigned char control, status; | |
1471 | unsigned long flags; | |
1da177e4 | 1472 | |
8ea2c2ec | 1473 | |
1c45607a JS |
1474 | if (tty->index == MXSER_PORTS) |
1475 | return -ENOIOCTLCMD; | |
1476 | if (test_bit(TTY_IO_ERROR, &tty->flags)) | |
1477 | return -EIO; | |
1da177e4 | 1478 | |
1c45607a | 1479 | control = info->MCR; |
1da177e4 | 1480 | |
1c45607a JS |
1481 | spin_lock_irqsave(&info->slock, flags); |
1482 | status = inb(info->ioaddr + UART_MSR); | |
1483 | if (status & UART_MSR_ANY_DELTA) | |
1484 | mxser_check_modem_status(info, status); | |
1485 | spin_unlock_irqrestore(&info->slock, flags); | |
1486 | return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | | |
1487 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | | |
1488 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | | |
1489 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | | |
1490 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | | |
1491 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | |
1492 | } | |
1da177e4 | 1493 | |
1c45607a JS |
1494 | static int mxser_tiocmset(struct tty_struct *tty, struct file *file, |
1495 | unsigned int set, unsigned int clear) | |
1496 | { | |
1497 | struct mxser_port *info = tty->driver_data; | |
1498 | unsigned long flags; | |
1da177e4 | 1499 | |
1da177e4 | 1500 | |
1c45607a JS |
1501 | if (tty->index == MXSER_PORTS) |
1502 | return -ENOIOCTLCMD; | |
1503 | if (test_bit(TTY_IO_ERROR, &tty->flags)) | |
1504 | return -EIO; | |
1da177e4 | 1505 | |
1c45607a | 1506 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 1507 | |
1c45607a JS |
1508 | if (set & TIOCM_RTS) |
1509 | info->MCR |= UART_MCR_RTS; | |
1510 | if (set & TIOCM_DTR) | |
1511 | info->MCR |= UART_MCR_DTR; | |
1da177e4 | 1512 | |
1c45607a JS |
1513 | if (clear & TIOCM_RTS) |
1514 | info->MCR &= ~UART_MCR_RTS; | |
1515 | if (clear & TIOCM_DTR) | |
1516 | info->MCR &= ~UART_MCR_DTR; | |
8ea2c2ec | 1517 | |
1c45607a JS |
1518 | outb(info->MCR, info->ioaddr + UART_MCR); |
1519 | spin_unlock_irqrestore(&info->slock, flags); | |
1520 | return 0; | |
1521 | } | |
1da177e4 | 1522 | |
1c45607a JS |
1523 | static int __init mxser_program_mode(int port) |
1524 | { | |
1525 | int id, i, j, n; | |
1526 | ||
1527 | outb(0, port); | |
1528 | outb(0, port); | |
1529 | outb(0, port); | |
1530 | (void)inb(port); | |
1531 | (void)inb(port); | |
1532 | outb(0, port); | |
1533 | (void)inb(port); | |
1534 | ||
1535 | id = inb(port + 1) & 0x1F; | |
1536 | if ((id != C168_ASIC_ID) && | |
1537 | (id != C104_ASIC_ID) && | |
1538 | (id != C102_ASIC_ID) && | |
1539 | (id != CI132_ASIC_ID) && | |
1540 | (id != CI134_ASIC_ID) && | |
1541 | (id != CI104J_ASIC_ID)) | |
1542 | return -1; | |
1543 | for (i = 0, j = 0; i < 4; i++) { | |
1544 | n = inb(port + 2); | |
1545 | if (n == 'M') { | |
1546 | j = 1; | |
1547 | } else if ((j == 1) && (n == 1)) { | |
1548 | j = 2; | |
1549 | break; | |
1550 | } else | |
1551 | j = 0; | |
1da177e4 | 1552 | } |
1c45607a JS |
1553 | if (j != 2) |
1554 | id = -2; | |
1555 | return id; | |
1da177e4 LT |
1556 | } |
1557 | ||
1c45607a JS |
1558 | static void __init mxser_normal_mode(int port) |
1559 | { | |
1560 | int i, n; | |
1561 | ||
1562 | outb(0xA5, port + 1); | |
1563 | outb(0x80, port + 3); | |
1564 | outb(12, port + 0); /* 9600 bps */ | |
1565 | outb(0, port + 1); | |
1566 | outb(0x03, port + 3); /* 8 data bits */ | |
1567 | outb(0x13, port + 4); /* loop back mode */ | |
1568 | for (i = 0; i < 16; i++) { | |
1569 | n = inb(port + 5); | |
1570 | if ((n & 0x61) == 0x60) | |
1571 | break; | |
1572 | if ((n & 1) == 1) | |
1573 | (void)inb(port); | |
1574 | } | |
1575 | outb(0x00, port + 4); | |
1576 | } | |
1577 | ||
1578 | #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ | |
1579 | #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ | |
1580 | #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ | |
1581 | #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ | |
1582 | #define EN_CCMD 0x000 /* Chip's command register */ | |
1583 | #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ | |
1584 | #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ | |
1585 | #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ | |
1586 | #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ | |
1587 | #define EN0_DCFG 0x00E /* Data configuration reg WR */ | |
1588 | #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ | |
1589 | #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ | |
1590 | #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ | |
1591 | static int __init mxser_read_register(int port, unsigned short *regs) | |
1592 | { | |
1593 | int i, k, value, id; | |
1594 | unsigned int j; | |
1595 | ||
1596 | id = mxser_program_mode(port); | |
1597 | if (id < 0) | |
1598 | return id; | |
1599 | for (i = 0; i < 14; i++) { | |
1600 | k = (i & 0x3F) | 0x180; | |
1601 | for (j = 0x100; j > 0; j >>= 1) { | |
1602 | outb(CHIP_CS, port); | |
1603 | if (k & j) { | |
1604 | outb(CHIP_CS | CHIP_DO, port); | |
1605 | outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ | |
1606 | } else { | |
1607 | outb(CHIP_CS, port); | |
1608 | outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ | |
1609 | } | |
1610 | } | |
1611 | (void)inb(port); | |
1612 | value = 0; | |
1613 | for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { | |
1614 | outb(CHIP_CS, port); | |
1615 | outb(CHIP_CS | CHIP_SK, port); | |
1616 | if (inb(port) & CHIP_DI) | |
1617 | value |= j; | |
1618 | } | |
1619 | regs[i] = value; | |
1620 | outb(0, port); | |
1621 | } | |
1622 | mxser_normal_mode(port); | |
1623 | return id; | |
1624 | } | |
1da177e4 LT |
1625 | |
1626 | static int mxser_ioctl_special(unsigned int cmd, void __user *argp) | |
1627 | { | |
1c45607a JS |
1628 | struct mxser_port *port; |
1629 | int result, status; | |
1630 | unsigned int i, j; | |
9d6d162d | 1631 | int ret = 0; |
1da177e4 LT |
1632 | |
1633 | switch (cmd) { | |
1da177e4 | 1634 | case MOXA_GET_MAJOR: |
1c45607a | 1635 | return put_user(ttymajor, (int __user *)argp); |
1da177e4 LT |
1636 | |
1637 | case MOXA_CHKPORTENABLE: | |
1638 | result = 0; | |
9d6d162d | 1639 | lock_kernel(); |
1c45607a JS |
1640 | for (i = 0; i < MXSER_BOARDS; i++) |
1641 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) | |
1642 | if (mxser_boards[i].ports[j].ioaddr) | |
1643 | result |= (1 << i); | |
9d6d162d | 1644 | unlock_kernel(); |
8ea2c2ec | 1645 | return put_user(result, (unsigned long __user *)argp); |
1da177e4 | 1646 | case MOXA_GETDATACOUNT: |
9d6d162d | 1647 | lock_kernel(); |
1da177e4 | 1648 | if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) |
9d6d162d AC |
1649 | ret = -EFAULT; |
1650 | unlock_kernel(); | |
1651 | return ret; | |
1da177e4 | 1652 | case MOXA_GETMSTATUS: |
9d6d162d | 1653 | lock_kernel(); |
1c45607a JS |
1654 | for (i = 0; i < MXSER_BOARDS; i++) |
1655 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
1656 | port = &mxser_boards[i].ports[j]; | |
1657 | ||
1658 | GMStatus[i].ri = 0; | |
1659 | if (!port->ioaddr) { | |
1660 | GMStatus[i].dcd = 0; | |
1661 | GMStatus[i].dsr = 0; | |
1662 | GMStatus[i].cts = 0; | |
1663 | continue; | |
1664 | } | |
1da177e4 | 1665 | |
0ad9e7d1 | 1666 | if (!port->port.tty || !port->port.tty->termios) |
1c45607a JS |
1667 | GMStatus[i].cflag = |
1668 | port->normal_termios.c_cflag; | |
1669 | else | |
1670 | GMStatus[i].cflag = | |
0ad9e7d1 | 1671 | port->port.tty->termios->c_cflag; |
1da177e4 | 1672 | |
1c45607a JS |
1673 | status = inb(port->ioaddr + UART_MSR); |
1674 | if (status & 0x80 /*UART_MSR_DCD */ ) | |
1675 | GMStatus[i].dcd = 1; | |
1676 | else | |
1677 | GMStatus[i].dcd = 0; | |
1da177e4 | 1678 | |
1c45607a JS |
1679 | if (status & 0x20 /*UART_MSR_DSR */ ) |
1680 | GMStatus[i].dsr = 1; | |
1681 | else | |
1682 | GMStatus[i].dsr = 0; | |
1da177e4 LT |
1683 | |
1684 | ||
1c45607a JS |
1685 | if (status & 0x10 /*UART_MSR_CTS */ ) |
1686 | GMStatus[i].cts = 1; | |
1687 | else | |
1688 | GMStatus[i].cts = 0; | |
1689 | } | |
9d6d162d | 1690 | unlock_kernel(); |
8ea2c2ec JJ |
1691 | if (copy_to_user(argp, GMStatus, |
1692 | sizeof(struct mxser_mstatus) * MXSER_PORTS)) | |
1da177e4 LT |
1693 | return -EFAULT; |
1694 | return 0; | |
8ea2c2ec | 1695 | case MOXA_ASPP_MON_EXT: { |
1c45607a JS |
1696 | int p, shiftbit; |
1697 | unsigned long opmode; | |
1698 | unsigned cflag, iflag; | |
1699 | ||
9d6d162d AC |
1700 | lock_kernel(); |
1701 | for (i = 0; i < MXSER_BOARDS; i++) { | |
1c45607a JS |
1702 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { |
1703 | port = &mxser_boards[i].ports[j]; | |
1704 | if (!port->ioaddr) | |
1da177e4 LT |
1705 | continue; |
1706 | ||
1c45607a JS |
1707 | status = mxser_get_msr(port->ioaddr, 0, i); |
1708 | ||
1da177e4 | 1709 | if (status & UART_MSR_TERI) |
1c45607a | 1710 | port->icount.rng++; |
1da177e4 | 1711 | if (status & UART_MSR_DDSR) |
1c45607a | 1712 | port->icount.dsr++; |
1da177e4 | 1713 | if (status & UART_MSR_DDCD) |
1c45607a | 1714 | port->icount.dcd++; |
1da177e4 | 1715 | if (status & UART_MSR_DCTS) |
1c45607a JS |
1716 | port->icount.cts++; |
1717 | ||
1718 | port->mon_data.modem_status = status; | |
1719 | mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt; | |
1720 | mon_data_ext.tx_cnt[i] = port->mon_data.txcnt; | |
1721 | mon_data_ext.up_rxcnt[i] = | |
1722 | port->mon_data.up_rxcnt; | |
1723 | mon_data_ext.up_txcnt[i] = | |
1724 | port->mon_data.up_txcnt; | |
1725 | mon_data_ext.modem_status[i] = | |
1726 | port->mon_data.modem_status; | |
1727 | mon_data_ext.baudrate[i] = | |
0ad9e7d1 | 1728 | tty_get_baud_rate(port->port.tty); |
1c45607a | 1729 | |
0ad9e7d1 | 1730 | if (!port->port.tty || !port->port.tty->termios) { |
1c45607a JS |
1731 | cflag = port->normal_termios.c_cflag; |
1732 | iflag = port->normal_termios.c_iflag; | |
1da177e4 | 1733 | } else { |
0ad9e7d1 AC |
1734 | cflag = port->port.tty->termios->c_cflag; |
1735 | iflag = port->port.tty->termios->c_iflag; | |
1da177e4 LT |
1736 | } |
1737 | ||
1738 | mon_data_ext.databits[i] = cflag & CSIZE; | |
1739 | ||
1740 | mon_data_ext.stopbits[i] = cflag & CSTOPB; | |
1741 | ||
1c45607a JS |
1742 | mon_data_ext.parity[i] = |
1743 | cflag & (PARENB | PARODD | CMSPAR); | |
1da177e4 LT |
1744 | |
1745 | mon_data_ext.flowctrl[i] = 0x00; | |
1746 | ||
1747 | if (cflag & CRTSCTS) | |
1748 | mon_data_ext.flowctrl[i] |= 0x03; | |
1749 | ||
1750 | if (iflag & (IXON | IXOFF)) | |
1751 | mon_data_ext.flowctrl[i] |= 0x0C; | |
1752 | ||
1c45607a | 1753 | if (port->type == PORT_16550A) |
1da177e4 LT |
1754 | mon_data_ext.fifo[i] = 1; |
1755 | else | |
1756 | mon_data_ext.fifo[i] = 0; | |
1757 | ||
1758 | p = i % 4; | |
1759 | shiftbit = p * 2; | |
1c45607a | 1760 | opmode = inb(port->opmode_ioaddr) >> shiftbit; |
1da177e4 LT |
1761 | opmode &= OP_MODE_MASK; |
1762 | ||
1763 | mon_data_ext.iftype[i] = opmode; | |
1764 | ||
1765 | } | |
9d6d162d AC |
1766 | } |
1767 | unlock_kernel(); | |
1768 | if (copy_to_user(argp, &mon_data_ext, | |
1769 | sizeof(mon_data_ext))) | |
1770 | return -EFAULT; | |
1771 | return 0; | |
1772 | } | |
1773 | default: | |
1da177e4 LT |
1774 | return -ENOIOCTLCMD; |
1775 | } | |
1776 | return 0; | |
1777 | } | |
1778 | ||
1c45607a JS |
1779 | static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, |
1780 | struct async_icount *cprev) | |
1da177e4 | 1781 | { |
1c45607a JS |
1782 | struct async_icount cnow; |
1783 | unsigned long flags; | |
1784 | int ret; | |
1da177e4 | 1785 | |
1c45607a JS |
1786 | spin_lock_irqsave(&info->slock, flags); |
1787 | cnow = info->icount; /* atomic copy */ | |
1788 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 1789 | |
1c45607a JS |
1790 | ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || |
1791 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || | |
1792 | ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || | |
1793 | ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); | |
1da177e4 | 1794 | |
1c45607a JS |
1795 | *cprev = cnow; |
1796 | ||
1797 | return ret; | |
1798 | } | |
1799 | ||
1800 | static int mxser_ioctl(struct tty_struct *tty, struct file *file, | |
1801 | unsigned int cmd, unsigned long arg) | |
1da177e4 | 1802 | { |
1c45607a JS |
1803 | struct mxser_port *info = tty->driver_data; |
1804 | struct async_icount cnow; | |
1805 | struct serial_icounter_struct __user *p_cuser; | |
1806 | unsigned long flags; | |
1807 | void __user *argp = (void __user *)arg; | |
1808 | int retval; | |
1da177e4 | 1809 | |
1c45607a JS |
1810 | if (tty->index == MXSER_PORTS) |
1811 | return mxser_ioctl_special(cmd, argp); | |
1da177e4 | 1812 | |
1c45607a JS |
1813 | if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { |
1814 | int p; | |
1815 | unsigned long opmode; | |
1816 | static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; | |
1817 | int shiftbit; | |
1818 | unsigned char val, mask; | |
1da177e4 | 1819 | |
1c45607a JS |
1820 | p = tty->index % 4; |
1821 | if (cmd == MOXA_SET_OP_MODE) { | |
1822 | if (get_user(opmode, (int __user *) argp)) | |
1823 | return -EFAULT; | |
1824 | if (opmode != RS232_MODE && | |
1825 | opmode != RS485_2WIRE_MODE && | |
1826 | opmode != RS422_MODE && | |
1827 | opmode != RS485_4WIRE_MODE) | |
1828 | return -EFAULT; | |
9d6d162d | 1829 | lock_kernel(); |
1c45607a JS |
1830 | mask = ModeMask[p]; |
1831 | shiftbit = p * 2; | |
1832 | val = inb(info->opmode_ioaddr); | |
1833 | val &= mask; | |
1834 | val |= (opmode << shiftbit); | |
1835 | outb(val, info->opmode_ioaddr); | |
9d6d162d | 1836 | unlock_kernel(); |
1c45607a | 1837 | } else { |
9d6d162d | 1838 | lock_kernel(); |
1c45607a JS |
1839 | shiftbit = p * 2; |
1840 | opmode = inb(info->opmode_ioaddr) >> shiftbit; | |
1841 | opmode &= OP_MODE_MASK; | |
9d6d162d | 1842 | unlock_kernel(); |
1c45607a JS |
1843 | if (put_user(opmode, (int __user *)argp)) |
1844 | return -EFAULT; | |
1845 | } | |
1846 | return 0; | |
1847 | } | |
1848 | ||
1849 | if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT && | |
1850 | test_bit(TTY_IO_ERROR, &tty->flags)) | |
1851 | return -EIO; | |
1852 | ||
1853 | switch (cmd) { | |
1c45607a | 1854 | case TIOCGSERIAL: |
9d6d162d AC |
1855 | lock_kernel(); |
1856 | retval = mxser_get_serial_info(info, argp); | |
1857 | unlock_kernel(); | |
1858 | return retval; | |
1c45607a | 1859 | case TIOCSSERIAL: |
9d6d162d AC |
1860 | lock_kernel(); |
1861 | retval = mxser_set_serial_info(info, argp); | |
1862 | unlock_kernel(); | |
1863 | return retval; | |
1c45607a | 1864 | case TIOCSERGETLSR: /* Get line status register */ |
9d6d162d | 1865 | return mxser_get_lsr_info(info, argp); |
1c45607a JS |
1866 | /* |
1867 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | |
1868 | * - mask passed in arg for lines of interest | |
1869 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | |
1870 | * Caller should use TIOCGICOUNT to see which one it was | |
1871 | */ | |
1872 | case TIOCMIWAIT: | |
1873 | spin_lock_irqsave(&info->slock, flags); | |
1874 | cnow = info->icount; /* note the counters on entry */ | |
1875 | spin_unlock_irqrestore(&info->slock, flags); | |
1876 | ||
1877 | return wait_event_interruptible(info->delta_msr_wait, | |
1878 | mxser_cflags_changed(info, arg, &cnow)); | |
1879 | /* | |
1880 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | |
1881 | * Return: write counters to the user passed counter struct | |
1882 | * NB: both 1->0 and 0->1 transitions are counted except for | |
1883 | * RI where only 0->1 is counted. | |
1884 | */ | |
1885 | case TIOCGICOUNT: | |
1886 | spin_lock_irqsave(&info->slock, flags); | |
1887 | cnow = info->icount; | |
1888 | spin_unlock_irqrestore(&info->slock, flags); | |
1889 | p_cuser = argp; | |
1890 | if (put_user(cnow.frame, &p_cuser->frame)) | |
1891 | return -EFAULT; | |
1892 | if (put_user(cnow.brk, &p_cuser->brk)) | |
1893 | return -EFAULT; | |
1894 | if (put_user(cnow.overrun, &p_cuser->overrun)) | |
1895 | return -EFAULT; | |
1896 | if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun)) | |
1897 | return -EFAULT; | |
1898 | if (put_user(cnow.parity, &p_cuser->parity)) | |
1899 | return -EFAULT; | |
1900 | if (put_user(cnow.rx, &p_cuser->rx)) | |
1901 | return -EFAULT; | |
1902 | if (put_user(cnow.tx, &p_cuser->tx)) | |
1903 | return -EFAULT; | |
1904 | put_user(cnow.cts, &p_cuser->cts); | |
1905 | put_user(cnow.dsr, &p_cuser->dsr); | |
1906 | put_user(cnow.rng, &p_cuser->rng); | |
1907 | put_user(cnow.dcd, &p_cuser->dcd); | |
1908 | return 0; | |
1909 | case MOXA_HighSpeedOn: | |
1910 | return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); | |
1911 | case MOXA_SDS_RSTICOUNTER: | |
9d6d162d | 1912 | lock_kernel(); |
1c45607a JS |
1913 | info->mon_data.rxcnt = 0; |
1914 | info->mon_data.txcnt = 0; | |
9d6d162d | 1915 | unlock_kernel(); |
1c45607a JS |
1916 | return 0; |
1917 | ||
1918 | case MOXA_ASPP_OQUEUE:{ | |
1919 | int len, lsr; | |
1920 | ||
9d6d162d | 1921 | lock_kernel(); |
1c45607a | 1922 | len = mxser_chars_in_buffer(tty); |
1c45607a | 1923 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT; |
1c45607a | 1924 | len += (lsr ? 0 : 1); |
9d6d162d | 1925 | unlock_kernel(); |
1c45607a JS |
1926 | |
1927 | return put_user(len, (int __user *)argp); | |
1928 | } | |
1929 | case MOXA_ASPP_MON: { | |
1930 | int mcr, status; | |
1931 | ||
9d6d162d | 1932 | lock_kernel(); |
1c45607a JS |
1933 | status = mxser_get_msr(info->ioaddr, 1, tty->index); |
1934 | mxser_check_modem_status(info, status); | |
1935 | ||
1936 | mcr = inb(info->ioaddr + UART_MCR); | |
1937 | if (mcr & MOXA_MUST_MCR_XON_FLAG) | |
1938 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; | |
1939 | else | |
1940 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; | |
1941 | ||
1942 | if (mcr & MOXA_MUST_MCR_TX_XON) | |
1943 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; | |
1944 | else | |
1945 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; | |
1946 | ||
0ad9e7d1 | 1947 | if (info->port.tty->hw_stopped) |
1c45607a JS |
1948 | info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; |
1949 | else | |
1950 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; | |
9d6d162d | 1951 | unlock_kernel(); |
1c45607a JS |
1952 | if (copy_to_user(argp, &info->mon_data, |
1953 | sizeof(struct mxser_mon))) | |
1954 | return -EFAULT; | |
1955 | ||
1956 | return 0; | |
1957 | } | |
1958 | case MOXA_ASPP_LSTATUS: { | |
1959 | if (put_user(info->err_shadow, (unsigned char __user *)argp)) | |
1960 | return -EFAULT; | |
1961 | ||
1962 | info->err_shadow = 0; | |
1963 | return 0; | |
1964 | } | |
1965 | case MOXA_SET_BAUD_METHOD: { | |
1966 | int method; | |
1967 | ||
1968 | if (get_user(method, (int __user *)argp)) | |
1969 | return -EFAULT; | |
1970 | mxser_set_baud_method[tty->index] = method; | |
1971 | return put_user(method, (int __user *)argp); | |
1972 | } | |
1973 | default: | |
1974 | return -ENOIOCTLCMD; | |
1975 | } | |
1976 | return 0; | |
1977 | } | |
1978 | ||
1979 | static void mxser_stoprx(struct tty_struct *tty) | |
1980 | { | |
1981 | struct mxser_port *info = tty->driver_data; | |
1982 | ||
1983 | info->ldisc_stop_rx = 1; | |
1984 | if (I_IXOFF(tty)) { | |
1985 | if (info->board->chip_flag) { | |
1986 | info->IER &= ~MOXA_MUST_RECV_ISR; | |
1987 | outb(info->IER, info->ioaddr + UART_IER); | |
1988 | } else { | |
1989 | info->x_char = STOP_CHAR(tty); | |
1990 | outb(0, info->ioaddr + UART_IER); | |
1991 | info->IER |= UART_IER_THRI; | |
1992 | outb(info->IER, info->ioaddr + UART_IER); | |
1da177e4 LT |
1993 | } |
1994 | } | |
1995 | ||
0ad9e7d1 | 1996 | if (info->port.tty->termios->c_cflag & CRTSCTS) { |
1c45607a JS |
1997 | info->MCR &= ~UART_MCR_RTS; |
1998 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
1999 | } |
2000 | } | |
2001 | ||
2002 | /* | |
2003 | * This routine is called by the upper-layer tty layer to signal that | |
2004 | * incoming characters should be throttled. | |
2005 | */ | |
2006 | static void mxser_throttle(struct tty_struct *tty) | |
2007 | { | |
1da177e4 | 2008 | mxser_stoprx(tty); |
1da177e4 LT |
2009 | } |
2010 | ||
2011 | static void mxser_unthrottle(struct tty_struct *tty) | |
2012 | { | |
1c45607a | 2013 | struct mxser_port *info = tty->driver_data; |
1da177e4 | 2014 | |
1c45607a JS |
2015 | /* startrx */ |
2016 | info->ldisc_stop_rx = 0; | |
2017 | if (I_IXOFF(tty)) { | |
2018 | if (info->x_char) | |
2019 | info->x_char = 0; | |
2020 | else { | |
2021 | if (info->board->chip_flag) { | |
2022 | info->IER |= MOXA_MUST_RECV_ISR; | |
2023 | outb(info->IER, info->ioaddr + UART_IER); | |
2024 | } else { | |
2025 | info->x_char = START_CHAR(tty); | |
2026 | outb(0, info->ioaddr + UART_IER); | |
2027 | info->IER |= UART_IER_THRI; | |
2028 | outb(info->IER, info->ioaddr + UART_IER); | |
2029 | } | |
1da177e4 | 2030 | } |
1c45607a | 2031 | } |
1da177e4 | 2032 | |
0ad9e7d1 | 2033 | if (info->port.tty->termios->c_cflag & CRTSCTS) { |
1c45607a JS |
2034 | info->MCR |= UART_MCR_RTS; |
2035 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
2036 | } |
2037 | } | |
2038 | ||
2039 | /* | |
2040 | * mxser_stop() and mxser_start() | |
2041 | * | |
2042 | * This routines are called before setting or resetting tty->stopped. | |
2043 | * They enable or disable transmitter interrupts, as necessary. | |
2044 | */ | |
2045 | static void mxser_stop(struct tty_struct *tty) | |
2046 | { | |
1c45607a | 2047 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2048 | unsigned long flags; |
2049 | ||
2050 | spin_lock_irqsave(&info->slock, flags); | |
2051 | if (info->IER & UART_IER_THRI) { | |
2052 | info->IER &= ~UART_IER_THRI; | |
1c45607a | 2053 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
2054 | } |
2055 | spin_unlock_irqrestore(&info->slock, flags); | |
2056 | } | |
2057 | ||
2058 | static void mxser_start(struct tty_struct *tty) | |
2059 | { | |
1c45607a | 2060 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2061 | unsigned long flags; |
2062 | ||
2063 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 2064 | if (info->xmit_cnt && info->port.xmit_buf) { |
1c45607a | 2065 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 2066 | info->IER |= UART_IER_THRI; |
1c45607a | 2067 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
2068 | } |
2069 | spin_unlock_irqrestore(&info->slock, flags); | |
2070 | } | |
2071 | ||
1c45607a JS |
2072 | static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) |
2073 | { | |
2074 | struct mxser_port *info = tty->driver_data; | |
2075 | unsigned long flags; | |
2076 | ||
2077 | spin_lock_irqsave(&info->slock, flags); | |
2078 | mxser_change_speed(info, old_termios); | |
2079 | spin_unlock_irqrestore(&info->slock, flags); | |
2080 | ||
2081 | if ((old_termios->c_cflag & CRTSCTS) && | |
2082 | !(tty->termios->c_cflag & CRTSCTS)) { | |
2083 | tty->hw_stopped = 0; | |
2084 | mxser_start(tty); | |
2085 | } | |
2086 | ||
2087 | /* Handle sw stopped */ | |
2088 | if ((old_termios->c_iflag & IXON) && | |
2089 | !(tty->termios->c_iflag & IXON)) { | |
2090 | tty->stopped = 0; | |
2091 | ||
2092 | if (info->board->chip_flag) { | |
2093 | spin_lock_irqsave(&info->slock, flags); | |
148ff86b CH |
2094 | mxser_disable_must_rx_software_flow_control( |
2095 | info->ioaddr); | |
1c45607a JS |
2096 | spin_unlock_irqrestore(&info->slock, flags); |
2097 | } | |
2098 | ||
2099 | mxser_start(tty); | |
2100 | } | |
2101 | } | |
2102 | ||
1da177e4 LT |
2103 | /* |
2104 | * mxser_wait_until_sent() --- wait until the transmitter is empty | |
2105 | */ | |
2106 | static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) | |
2107 | { | |
1c45607a | 2108 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2109 | unsigned long orig_jiffies, char_time; |
2110 | int lsr; | |
2111 | ||
2112 | if (info->type == PORT_UNKNOWN) | |
2113 | return; | |
2114 | ||
2115 | if (info->xmit_fifo_size == 0) | |
2116 | return; /* Just in case.... */ | |
2117 | ||
2118 | orig_jiffies = jiffies; | |
2119 | /* | |
2120 | * Set the check interval to be 1/5 of the estimated time to | |
2121 | * send a single character, and make it at least 1. The check | |
2122 | * interval should also be less than the timeout. | |
2123 | * | |
2124 | * Note: we have to use pretty tight timings here to satisfy | |
2125 | * the NIST-PCTS. | |
2126 | */ | |
2127 | char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; | |
2128 | char_time = char_time / 5; | |
2129 | if (char_time == 0) | |
2130 | char_time = 1; | |
2131 | if (timeout && timeout < char_time) | |
2132 | char_time = timeout; | |
2133 | /* | |
2134 | * If the transmitter hasn't cleared in twice the approximate | |
2135 | * amount of time to send the entire FIFO, it probably won't | |
2136 | * ever clear. This assumes the UART isn't doing flow | |
2137 | * control, which is currently the case. Hence, if it ever | |
2138 | * takes longer than info->timeout, this is probably due to a | |
2139 | * UART bug of some kind. So, we clamp the timeout parameter at | |
2140 | * 2*info->timeout. | |
2141 | */ | |
2142 | if (!timeout || timeout > 2 * info->timeout) | |
2143 | timeout = 2 * info->timeout; | |
2144 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
8ea2c2ec JJ |
2145 | printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", |
2146 | timeout, char_time); | |
1da177e4 LT |
2147 | printk("jiff=%lu...", jiffies); |
2148 | #endif | |
978e595f | 2149 | lock_kernel(); |
1c45607a | 2150 | while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { |
1da177e4 LT |
2151 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
2152 | printk("lsr = %d (jiff=%lu)...", lsr, jiffies); | |
2153 | #endif | |
da4cd8df | 2154 | schedule_timeout_interruptible(char_time); |
1da177e4 | 2155 | if (signal_pending(current)) |
1c45607a JS |
2156 | break; |
2157 | if (timeout && time_after(jiffies, orig_jiffies + timeout)) | |
2158 | break; | |
1da177e4 | 2159 | } |
1c45607a | 2160 | set_current_state(TASK_RUNNING); |
978e595f | 2161 | unlock_kernel(); |
1da177e4 | 2162 | |
1c45607a JS |
2163 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
2164 | printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); | |
2165 | #endif | |
2166 | } | |
1da177e4 | 2167 | |
1c45607a JS |
2168 | /* |
2169 | * This routine is called by tty_hangup() when a hangup is signaled. | |
2170 | */ | |
2171 | static void mxser_hangup(struct tty_struct *tty) | |
2172 | { | |
2173 | struct mxser_port *info = tty->driver_data; | |
1da177e4 | 2174 | |
1c45607a JS |
2175 | mxser_flush_buffer(tty); |
2176 | mxser_shutdown(info); | |
0ad9e7d1 AC |
2177 | info->port.count = 0; |
2178 | info->port.flags &= ~ASYNC_NORMAL_ACTIVE; | |
2179 | info->port.tty = NULL; | |
2180 | wake_up_interruptible(&info->port.open_wait); | |
1da177e4 LT |
2181 | } |
2182 | ||
1c45607a JS |
2183 | /* |
2184 | * mxser_rs_break() --- routine which turns the break handling on or off | |
2185 | */ | |
9e98966c | 2186 | static int mxser_rs_break(struct tty_struct *tty, int break_state) |
1da177e4 | 2187 | { |
1c45607a | 2188 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2189 | unsigned long flags; |
2190 | ||
1c45607a JS |
2191 | spin_lock_irqsave(&info->slock, flags); |
2192 | if (break_state == -1) | |
2193 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
2194 | info->ioaddr + UART_LCR); | |
2195 | else | |
2196 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
2197 | info->ioaddr + UART_LCR); | |
2198 | spin_unlock_irqrestore(&info->slock, flags); | |
9e98966c | 2199 | return 0; |
1c45607a | 2200 | } |
1da177e4 | 2201 | |
1c45607a JS |
2202 | static void mxser_receive_chars(struct mxser_port *port, int *status) |
2203 | { | |
0ad9e7d1 | 2204 | struct tty_struct *tty = port->port.tty; |
1c45607a JS |
2205 | unsigned char ch, gdl; |
2206 | int ignored = 0; | |
2207 | int cnt = 0; | |
2208 | int recv_room; | |
2209 | int max = 256; | |
1da177e4 | 2210 | |
1c45607a JS |
2211 | recv_room = tty->receive_room; |
2212 | if ((recv_room == 0) && (!port->ldisc_stop_rx)) | |
2213 | mxser_stoprx(tty); | |
1da177e4 | 2214 | |
1c45607a | 2215 | if (port->board->chip_flag != MOXA_OTHER_UART) { |
1da177e4 | 2216 | |
1c45607a JS |
2217 | if (*status & UART_LSR_SPECIAL) |
2218 | goto intr_old; | |
2219 | if (port->board->chip_flag == MOXA_MUST_MU860_HWID && | |
2220 | (*status & MOXA_MUST_LSR_RERR)) | |
2221 | goto intr_old; | |
2222 | if (*status & MOXA_MUST_LSR_RERR) | |
2223 | goto intr_old; | |
1da177e4 | 2224 | |
1c45607a JS |
2225 | gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); |
2226 | ||
2227 | if (port->board->chip_flag == MOXA_MUST_MU150_HWID) | |
2228 | gdl &= MOXA_MUST_GDL_MASK; | |
2229 | if (gdl >= recv_room) { | |
2230 | if (!port->ldisc_stop_rx) | |
2231 | mxser_stoprx(tty); | |
2232 | } | |
2233 | while (gdl--) { | |
2234 | ch = inb(port->ioaddr + UART_RX); | |
2235 | tty_insert_flip_char(tty, ch, 0); | |
2236 | cnt++; | |
2237 | } | |
2238 | goto end_intr; | |
1da177e4 | 2239 | } |
1c45607a JS |
2240 | intr_old: |
2241 | ||
2242 | do { | |
2243 | if (max-- < 0) | |
2244 | break; | |
1da177e4 | 2245 | |
1c45607a JS |
2246 | ch = inb(port->ioaddr + UART_RX); |
2247 | if (port->board->chip_flag && (*status & UART_LSR_OE)) | |
2248 | outb(0x23, port->ioaddr + UART_FCR); | |
2249 | *status &= port->read_status_mask; | |
2250 | if (*status & port->ignore_status_mask) { | |
2251 | if (++ignored > 100) | |
2252 | break; | |
2253 | } else { | |
2254 | char flag = 0; | |
2255 | if (*status & UART_LSR_SPECIAL) { | |
2256 | if (*status & UART_LSR_BI) { | |
2257 | flag = TTY_BREAK; | |
2258 | port->icount.brk++; | |
1da177e4 | 2259 | |
0ad9e7d1 | 2260 | if (port->port.flags & ASYNC_SAK) |
1c45607a JS |
2261 | do_SAK(tty); |
2262 | } else if (*status & UART_LSR_PE) { | |
2263 | flag = TTY_PARITY; | |
2264 | port->icount.parity++; | |
2265 | } else if (*status & UART_LSR_FE) { | |
2266 | flag = TTY_FRAME; | |
2267 | port->icount.frame++; | |
2268 | } else if (*status & UART_LSR_OE) { | |
2269 | flag = TTY_OVERRUN; | |
2270 | port->icount.overrun++; | |
2271 | } else | |
2272 | flag = TTY_BREAK; | |
2273 | } | |
2274 | tty_insert_flip_char(tty, ch, flag); | |
2275 | cnt++; | |
2276 | if (cnt >= recv_room) { | |
2277 | if (!port->ldisc_stop_rx) | |
2278 | mxser_stoprx(tty); | |
2279 | break; | |
2280 | } | |
1da177e4 | 2281 | |
1c45607a | 2282 | } |
1da177e4 | 2283 | |
1c45607a JS |
2284 | if (port->board->chip_flag) |
2285 | break; | |
1da177e4 | 2286 | |
1c45607a JS |
2287 | *status = inb(port->ioaddr + UART_LSR); |
2288 | } while (*status & UART_LSR_DR); | |
1da177e4 | 2289 | |
1c45607a | 2290 | end_intr: |
0ad9e7d1 | 2291 | mxvar_log.rxcnt[port->port.tty->index] += cnt; |
1c45607a JS |
2292 | port->mon_data.rxcnt += cnt; |
2293 | port->mon_data.up_rxcnt += cnt; | |
1da177e4 | 2294 | |
1c45607a JS |
2295 | /* |
2296 | * We are called from an interrupt context with &port->slock | |
2297 | * being held. Drop it temporarily in order to prevent | |
2298 | * recursive locking. | |
2299 | */ | |
2300 | spin_unlock(&port->slock); | |
2301 | tty_flip_buffer_push(tty); | |
2302 | spin_lock(&port->slock); | |
1da177e4 LT |
2303 | } |
2304 | ||
1c45607a | 2305 | static void mxser_transmit_chars(struct mxser_port *port) |
1da177e4 | 2306 | { |
1c45607a | 2307 | int count, cnt; |
1da177e4 | 2308 | |
1c45607a JS |
2309 | if (port->x_char) { |
2310 | outb(port->x_char, port->ioaddr + UART_TX); | |
2311 | port->x_char = 0; | |
0ad9e7d1 | 2312 | mxvar_log.txcnt[port->port.tty->index]++; |
1c45607a JS |
2313 | port->mon_data.txcnt++; |
2314 | port->mon_data.up_txcnt++; | |
2315 | port->icount.tx++; | |
2316 | return; | |
2317 | } | |
1da177e4 | 2318 | |
0ad9e7d1 | 2319 | if (port->port.xmit_buf == NULL) |
1c45607a | 2320 | return; |
1da177e4 | 2321 | |
0ad9e7d1 AC |
2322 | if ((port->xmit_cnt <= 0) || port->port.tty->stopped || |
2323 | (port->port.tty->hw_stopped && | |
1c45607a JS |
2324 | (port->type != PORT_16550A) && |
2325 | (!port->board->chip_flag))) { | |
2326 | port->IER &= ~UART_IER_THRI; | |
2327 | outb(port->IER, port->ioaddr + UART_IER); | |
2328 | return; | |
1da177e4 LT |
2329 | } |
2330 | ||
1c45607a JS |
2331 | cnt = port->xmit_cnt; |
2332 | count = port->xmit_fifo_size; | |
2333 | do { | |
0ad9e7d1 | 2334 | outb(port->port.xmit_buf[port->xmit_tail++], |
1c45607a JS |
2335 | port->ioaddr + UART_TX); |
2336 | port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); | |
2337 | if (--port->xmit_cnt <= 0) | |
2338 | break; | |
2339 | } while (--count > 0); | |
0ad9e7d1 | 2340 | mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt); |
1da177e4 | 2341 | |
1c45607a JS |
2342 | port->mon_data.txcnt += (cnt - port->xmit_cnt); |
2343 | port->mon_data.up_txcnt += (cnt - port->xmit_cnt); | |
2344 | port->icount.tx += (cnt - port->xmit_cnt); | |
1da177e4 | 2345 | |
1c45607a | 2346 | if (port->xmit_cnt < WAKEUP_CHARS) |
0ad9e7d1 | 2347 | tty_wakeup(port->port.tty); |
1c45607a JS |
2348 | |
2349 | if (port->xmit_cnt <= 0) { | |
2350 | port->IER &= ~UART_IER_THRI; | |
2351 | outb(port->IER, port->ioaddr + UART_IER); | |
1da177e4 | 2352 | } |
1da177e4 LT |
2353 | } |
2354 | ||
2355 | /* | |
1c45607a | 2356 | * This is the serial driver's generic interrupt routine |
1da177e4 | 2357 | */ |
1c45607a | 2358 | static irqreturn_t mxser_interrupt(int irq, void *dev_id) |
1da177e4 | 2359 | { |
1c45607a JS |
2360 | int status, iir, i; |
2361 | struct mxser_board *brd = NULL; | |
2362 | struct mxser_port *port; | |
2363 | int max, irqbits, bits, msr; | |
2364 | unsigned int int_cnt, pass_counter = 0; | |
2365 | int handled = IRQ_NONE; | |
1da177e4 | 2366 | |
1c45607a JS |
2367 | for (i = 0; i < MXSER_BOARDS; i++) |
2368 | if (dev_id == &mxser_boards[i]) { | |
2369 | brd = dev_id; | |
2370 | break; | |
2371 | } | |
1da177e4 | 2372 | |
1c45607a JS |
2373 | if (i == MXSER_BOARDS) |
2374 | goto irq_stop; | |
2375 | if (brd == NULL) | |
2376 | goto irq_stop; | |
2377 | max = brd->info->nports; | |
2378 | while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { | |
2379 | irqbits = inb(brd->vector) & brd->vector_mask; | |
2380 | if (irqbits == brd->vector_mask) | |
2381 | break; | |
1da177e4 | 2382 | |
1c45607a JS |
2383 | handled = IRQ_HANDLED; |
2384 | for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { | |
2385 | if (irqbits == brd->vector_mask) | |
2386 | break; | |
2387 | if (bits & irqbits) | |
2388 | continue; | |
2389 | port = &brd->ports[i]; | |
2390 | ||
2391 | int_cnt = 0; | |
2392 | spin_lock(&port->slock); | |
2393 | do { | |
2394 | iir = inb(port->ioaddr + UART_IIR); | |
2395 | if (iir & UART_IIR_NO_INT) | |
2396 | break; | |
2397 | iir &= MOXA_MUST_IIR_MASK; | |
0ad9e7d1 AC |
2398 | if (!port->port.tty || |
2399 | (port->port.flags & ASYNC_CLOSING) || | |
2400 | !(port->port.flags & | |
1c45607a JS |
2401 | ASYNC_INITIALIZED)) { |
2402 | status = inb(port->ioaddr + UART_LSR); | |
2403 | outb(0x27, port->ioaddr + UART_FCR); | |
2404 | inb(port->ioaddr + UART_MSR); | |
2405 | break; | |
2406 | } | |
1da177e4 | 2407 | |
1c45607a JS |
2408 | status = inb(port->ioaddr + UART_LSR); |
2409 | ||
2410 | if (status & UART_LSR_PE) | |
2411 | port->err_shadow |= NPPI_NOTIFY_PARITY; | |
2412 | if (status & UART_LSR_FE) | |
2413 | port->err_shadow |= NPPI_NOTIFY_FRAMING; | |
2414 | if (status & UART_LSR_OE) | |
2415 | port->err_shadow |= | |
2416 | NPPI_NOTIFY_HW_OVERRUN; | |
2417 | if (status & UART_LSR_BI) | |
2418 | port->err_shadow |= NPPI_NOTIFY_BREAK; | |
2419 | ||
2420 | if (port->board->chip_flag) { | |
2421 | if (iir == MOXA_MUST_IIR_GDA || | |
2422 | iir == MOXA_MUST_IIR_RDA || | |
2423 | iir == MOXA_MUST_IIR_RTO || | |
2424 | iir == MOXA_MUST_IIR_LSR) | |
2425 | mxser_receive_chars(port, | |
2426 | &status); | |
2427 | ||
2428 | } else { | |
2429 | status &= port->read_status_mask; | |
2430 | if (status & UART_LSR_DR) | |
2431 | mxser_receive_chars(port, | |
2432 | &status); | |
2433 | } | |
2434 | msr = inb(port->ioaddr + UART_MSR); | |
2435 | if (msr & UART_MSR_ANY_DELTA) | |
2436 | mxser_check_modem_status(port, msr); | |
2437 | ||
2438 | if (port->board->chip_flag) { | |
2439 | if (iir == 0x02 && (status & | |
2440 | UART_LSR_THRE)) | |
2441 | mxser_transmit_chars(port); | |
2442 | } else { | |
2443 | if (status & UART_LSR_THRE) | |
2444 | mxser_transmit_chars(port); | |
2445 | } | |
2446 | } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); | |
2447 | spin_unlock(&port->slock); | |
2448 | } | |
2449 | } | |
1da177e4 | 2450 | |
1c45607a JS |
2451 | irq_stop: |
2452 | return handled; | |
2453 | } | |
1da177e4 | 2454 | |
1c45607a JS |
2455 | static const struct tty_operations mxser_ops = { |
2456 | .open = mxser_open, | |
2457 | .close = mxser_close, | |
2458 | .write = mxser_write, | |
2459 | .put_char = mxser_put_char, | |
2460 | .flush_chars = mxser_flush_chars, | |
2461 | .write_room = mxser_write_room, | |
2462 | .chars_in_buffer = mxser_chars_in_buffer, | |
2463 | .flush_buffer = mxser_flush_buffer, | |
2464 | .ioctl = mxser_ioctl, | |
2465 | .throttle = mxser_throttle, | |
2466 | .unthrottle = mxser_unthrottle, | |
2467 | .set_termios = mxser_set_termios, | |
2468 | .stop = mxser_stop, | |
2469 | .start = mxser_start, | |
2470 | .hangup = mxser_hangup, | |
2471 | .break_ctl = mxser_rs_break, | |
2472 | .wait_until_sent = mxser_wait_until_sent, | |
2473 | .tiocmget = mxser_tiocmget, | |
2474 | .tiocmset = mxser_tiocmset, | |
2475 | }; | |
1da177e4 | 2476 | |
1c45607a JS |
2477 | /* |
2478 | * The MOXA Smartio/Industio serial driver boot-time initialization code! | |
2479 | */ | |
1da177e4 | 2480 | |
1c45607a JS |
2481 | static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev, |
2482 | unsigned int irq) | |
2483 | { | |
2484 | if (irq) | |
2485 | free_irq(brd->irq, brd); | |
2486 | if (pdev != NULL) { /* PCI */ | |
2487 | #ifdef CONFIG_PCI | |
2488 | pci_release_region(pdev, 2); | |
2489 | pci_release_region(pdev, 3); | |
2490 | #endif | |
2491 | } else { | |
2492 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); | |
2493 | release_region(brd->vector, 1); | |
2494 | } | |
1da177e4 LT |
2495 | } |
2496 | ||
1c45607a JS |
2497 | static int __devinit mxser_initbrd(struct mxser_board *brd, |
2498 | struct pci_dev *pdev) | |
1da177e4 | 2499 | { |
1c45607a JS |
2500 | struct mxser_port *info; |
2501 | unsigned int i; | |
2502 | int retval; | |
1da177e4 | 2503 | |
1c45607a | 2504 | printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud); |
1da177e4 | 2505 | |
1c45607a JS |
2506 | for (i = 0; i < brd->info->nports; i++) { |
2507 | info = &brd->ports[i]; | |
44b7d1b3 | 2508 | tty_port_init(&info->port); |
1c45607a JS |
2509 | info->board = brd; |
2510 | info->stop_rx = 0; | |
2511 | info->ldisc_stop_rx = 0; | |
1da177e4 | 2512 | |
1c45607a JS |
2513 | /* Enhance mode enabled here */ |
2514 | if (brd->chip_flag != MOXA_OTHER_UART) | |
148ff86b | 2515 | mxser_enable_must_enchance_mode(info->ioaddr); |
1da177e4 | 2516 | |
0ad9e7d1 | 2517 | info->port.flags = ASYNC_SHARE_IRQ; |
1c45607a | 2518 | info->type = brd->uart_type; |
1da177e4 | 2519 | |
1c45607a | 2520 | process_txrx_fifo(info); |
1da177e4 | 2521 | |
1c45607a | 2522 | info->custom_divisor = info->baud_base * 16; |
44b7d1b3 AC |
2523 | info->port.close_delay = 5 * HZ / 10; |
2524 | info->port.closing_wait = 30 * HZ; | |
1c45607a | 2525 | info->normal_termios = mxvar_sdriver->init_termios; |
1c45607a JS |
2526 | init_waitqueue_head(&info->delta_msr_wait); |
2527 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); | |
2528 | info->err_shadow = 0; | |
2529 | spin_lock_init(&info->slock); | |
1da177e4 | 2530 | |
1c45607a JS |
2531 | /* before set INT ISR, disable all int */ |
2532 | outb(inb(info->ioaddr + UART_IER) & 0xf0, | |
2533 | info->ioaddr + UART_IER); | |
2534 | } | |
1da177e4 | 2535 | |
1c45607a JS |
2536 | retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", |
2537 | brd); | |
2538 | if (retval) { | |
2539 | printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " | |
2540 | "conflict with another device.\n", | |
2541 | brd->info->name, brd->irq); | |
2542 | /* We hold resources, we need to release them. */ | |
2543 | mxser_release_res(brd, pdev, 0); | |
2544 | } | |
2545 | return retval; | |
2546 | } | |
1da177e4 | 2547 | |
1c45607a | 2548 | static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) |
1da177e4 LT |
2549 | { |
2550 | int id, i, bits; | |
2551 | unsigned short regs[16], irq; | |
2552 | unsigned char scratch, scratch2; | |
2553 | ||
1c45607a | 2554 | brd->chip_flag = MOXA_OTHER_UART; |
1da177e4 LT |
2555 | |
2556 | id = mxser_read_register(cap, regs); | |
1c45607a JS |
2557 | switch (id) { |
2558 | case C168_ASIC_ID: | |
2559 | brd->info = &mxser_cards[0]; | |
2560 | break; | |
2561 | case C104_ASIC_ID: | |
2562 | brd->info = &mxser_cards[1]; | |
2563 | break; | |
2564 | case CI104J_ASIC_ID: | |
2565 | brd->info = &mxser_cards[2]; | |
2566 | break; | |
2567 | case C102_ASIC_ID: | |
2568 | brd->info = &mxser_cards[5]; | |
2569 | break; | |
2570 | case CI132_ASIC_ID: | |
2571 | brd->info = &mxser_cards[6]; | |
2572 | break; | |
2573 | case CI134_ASIC_ID: | |
2574 | brd->info = &mxser_cards[7]; | |
2575 | break; | |
2576 | default: | |
8ea2c2ec | 2577 | return 0; |
1c45607a | 2578 | } |
1da177e4 LT |
2579 | |
2580 | irq = 0; | |
1c45607a JS |
2581 | /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) |
2582 | Flag-hack checks if configuration should be read as 2-port here. */ | |
2583 | if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { | |
1da177e4 LT |
2584 | irq = regs[9] & 0xF000; |
2585 | irq = irq | (irq >> 4); | |
2586 | if (irq != (regs[9] & 0xFF00)) | |
8ea2c2ec | 2587 | return MXSER_ERR_IRQ_CONFLIT; |
1c45607a | 2588 | } else if (brd->info->nports == 4) { |
1da177e4 LT |
2589 | irq = regs[9] & 0xF000; |
2590 | irq = irq | (irq >> 4); | |
2591 | irq = irq | (irq >> 8); | |
2592 | if (irq != regs[9]) | |
8ea2c2ec | 2593 | return MXSER_ERR_IRQ_CONFLIT; |
1c45607a | 2594 | } else if (brd->info->nports == 8) { |
1da177e4 LT |
2595 | irq = regs[9] & 0xF000; |
2596 | irq = irq | (irq >> 4); | |
2597 | irq = irq | (irq >> 8); | |
2598 | if ((irq != regs[9]) || (irq != regs[10])) | |
8ea2c2ec | 2599 | return MXSER_ERR_IRQ_CONFLIT; |
1da177e4 LT |
2600 | } |
2601 | ||
8ea2c2ec JJ |
2602 | if (!irq) |
2603 | return MXSER_ERR_IRQ; | |
1c45607a | 2604 | brd->irq = ((int)(irq & 0xF000) >> 12); |
1da177e4 | 2605 | for (i = 0; i < 8; i++) |
1c45607a | 2606 | brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; |
8ea2c2ec JJ |
2607 | if ((regs[12] & 0x80) == 0) |
2608 | return MXSER_ERR_VECTOR; | |
1c45607a | 2609 | brd->vector = (int)regs[11]; /* interrupt vector */ |
1da177e4 | 2610 | if (id == 1) |
1c45607a | 2611 | brd->vector_mask = 0x00FF; |
1da177e4 | 2612 | else |
1c45607a | 2613 | brd->vector_mask = 0x000F; |
1da177e4 LT |
2614 | for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { |
2615 | if (regs[12] & bits) { | |
1c45607a JS |
2616 | brd->ports[i].baud_base = 921600; |
2617 | brd->ports[i].max_baud = 921600; | |
1da177e4 | 2618 | } else { |
1c45607a JS |
2619 | brd->ports[i].baud_base = 115200; |
2620 | brd->ports[i].max_baud = 115200; | |
1da177e4 LT |
2621 | } |
2622 | } | |
2623 | scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); | |
2624 | outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); | |
2625 | outb(0, cap + UART_EFR); /* EFR is the same as FCR */ | |
2626 | outb(scratch2, cap + UART_LCR); | |
2627 | outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); | |
2628 | scratch = inb(cap + UART_IIR); | |
2629 | ||
2630 | if (scratch & 0xC0) | |
1c45607a | 2631 | brd->uart_type = PORT_16550A; |
1da177e4 | 2632 | else |
1c45607a JS |
2633 | brd->uart_type = PORT_16450; |
2634 | if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, | |
2635 | "mxser(IO)")) | |
2636 | return MXSER_ERR_IOADDR; | |
2637 | if (!request_region(brd->vector, 1, "mxser(vector)")) { | |
2638 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); | |
2639 | return MXSER_ERR_VECTOR; | |
2640 | } | |
2641 | return brd->info->nports; | |
1da177e4 LT |
2642 | } |
2643 | ||
1c45607a JS |
2644 | static int __devinit mxser_probe(struct pci_dev *pdev, |
2645 | const struct pci_device_id *ent) | |
1da177e4 | 2646 | { |
1c45607a JS |
2647 | #ifdef CONFIG_PCI |
2648 | struct mxser_board *brd; | |
2649 | unsigned int i, j; | |
2650 | unsigned long ioaddress; | |
2651 | int retval = -EINVAL; | |
1da177e4 | 2652 | |
1c45607a JS |
2653 | for (i = 0; i < MXSER_BOARDS; i++) |
2654 | if (mxser_boards[i].info == NULL) | |
2655 | break; | |
2656 | ||
2657 | if (i >= MXSER_BOARDS) { | |
2658 | printk(KERN_ERR "Too many Smartio/Industio family boards found " | |
2659 | "(maximum %d), board not configured\n", MXSER_BOARDS); | |
2660 | goto err; | |
2661 | } | |
2662 | ||
2663 | brd = &mxser_boards[i]; | |
2664 | brd->idx = i * MXSER_PORTS_PER_BOARD; | |
2665 | printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n", | |
2666 | mxser_cards[ent->driver_data].name, | |
2667 | pdev->bus->number, PCI_SLOT(pdev->devfn)); | |
2668 | ||
2669 | retval = pci_enable_device(pdev); | |
2670 | if (retval) { | |
2671 | printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n"); | |
2672 | goto err; | |
2673 | } | |
2674 | ||
2675 | /* io address */ | |
2676 | ioaddress = pci_resource_start(pdev, 2); | |
2677 | retval = pci_request_region(pdev, 2, "mxser(IO)"); | |
2678 | if (retval) | |
2679 | goto err; | |
2680 | ||
2681 | brd->info = &mxser_cards[ent->driver_data]; | |
2682 | for (i = 0; i < brd->info->nports; i++) | |
2683 | brd->ports[i].ioaddr = ioaddress + 8 * i; | |
2684 | ||
2685 | /* vector */ | |
2686 | ioaddress = pci_resource_start(pdev, 3); | |
2687 | retval = pci_request_region(pdev, 3, "mxser(vector)"); | |
2688 | if (retval) | |
2689 | goto err_relio; | |
2690 | brd->vector = ioaddress; | |
2691 | ||
2692 | /* irq */ | |
2693 | brd->irq = pdev->irq; | |
2694 | ||
2695 | brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); | |
2696 | brd->uart_type = PORT_16550A; | |
2697 | brd->vector_mask = 0; | |
2698 | ||
2699 | for (i = 0; i < brd->info->nports; i++) { | |
2700 | for (j = 0; j < UART_INFO_NUM; j++) { | |
2701 | if (Gpci_uart_info[j].type == brd->chip_flag) { | |
2702 | brd->ports[i].max_baud = | |
2703 | Gpci_uart_info[j].max_baud; | |
2704 | ||
2705 | /* exception....CP-102 */ | |
2706 | if (brd->info->flags & MXSER_HIGHBAUD) | |
2707 | brd->ports[i].max_baud = 921600; | |
2708 | break; | |
1da177e4 LT |
2709 | } |
2710 | } | |
1c45607a JS |
2711 | } |
2712 | ||
2713 | if (brd->chip_flag == MOXA_MUST_MU860_HWID) { | |
2714 | for (i = 0; i < brd->info->nports; i++) { | |
2715 | if (i < 4) | |
2716 | brd->ports[i].opmode_ioaddr = ioaddress + 4; | |
2717 | else | |
2718 | brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; | |
1da177e4 | 2719 | } |
1c45607a JS |
2720 | outb(0, ioaddress + 4); /* default set to RS232 mode */ |
2721 | outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ | |
1da177e4 | 2722 | } |
1c45607a JS |
2723 | |
2724 | for (i = 0; i < brd->info->nports; i++) { | |
2725 | brd->vector_mask |= (1 << i); | |
2726 | brd->ports[i].baud_base = 921600; | |
2727 | } | |
2728 | ||
2729 | /* mxser_initbrd will hook ISR. */ | |
2730 | retval = mxser_initbrd(brd, pdev); | |
2731 | if (retval) | |
2732 | goto err_null; | |
2733 | ||
2734 | for (i = 0; i < brd->info->nports; i++) | |
2735 | tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev); | |
2736 | ||
2737 | pci_set_drvdata(pdev, brd); | |
2738 | ||
2739 | return 0; | |
2740 | err_relio: | |
2741 | pci_release_region(pdev, 2); | |
2742 | err_null: | |
2743 | brd->info = NULL; | |
2744 | err: | |
2745 | return retval; | |
2746 | #else | |
2747 | return -ENODEV; | |
2748 | #endif | |
1da177e4 LT |
2749 | } |
2750 | ||
1c45607a | 2751 | static void __devexit mxser_remove(struct pci_dev *pdev) |
1da177e4 | 2752 | { |
1c45607a JS |
2753 | struct mxser_board *brd = pci_get_drvdata(pdev); |
2754 | unsigned int i; | |
1da177e4 | 2755 | |
1c45607a JS |
2756 | for (i = 0; i < brd->info->nports; i++) |
2757 | tty_unregister_device(mxvar_sdriver, brd->idx + i); | |
1da177e4 | 2758 | |
1c45607a JS |
2759 | mxser_release_res(brd, pdev, 1); |
2760 | brd->info = NULL; | |
1da177e4 LT |
2761 | } |
2762 | ||
1c45607a JS |
2763 | static struct pci_driver mxser_driver = { |
2764 | .name = "mxser", | |
2765 | .id_table = mxser_pcibrds, | |
2766 | .probe = mxser_probe, | |
2767 | .remove = __devexit_p(mxser_remove) | |
2768 | }; | |
2769 | ||
2770 | static int __init mxser_module_init(void) | |
1da177e4 | 2771 | { |
1c45607a JS |
2772 | struct mxser_board *brd; |
2773 | unsigned long cap; | |
2774 | unsigned int i, m, isaloop; | |
2775 | int retval, b; | |
1da177e4 | 2776 | |
1c45607a JS |
2777 | pr_debug("Loading module mxser ...\n"); |
2778 | ||
2779 | mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); | |
2780 | if (!mxvar_sdriver) | |
2781 | return -ENOMEM; | |
2782 | ||
2783 | printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", | |
2784 | MXSER_VERSION); | |
2785 | ||
2786 | /* Initialize the tty_driver structure */ | |
2787 | mxvar_sdriver->owner = THIS_MODULE; | |
2788 | mxvar_sdriver->magic = TTY_DRIVER_MAGIC; | |
2789 | mxvar_sdriver->name = "ttyMI"; | |
2790 | mxvar_sdriver->major = ttymajor; | |
2791 | mxvar_sdriver->minor_start = 0; | |
2792 | mxvar_sdriver->num = MXSER_PORTS + 1; | |
2793 | mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; | |
2794 | mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; | |
2795 | mxvar_sdriver->init_termios = tty_std_termios; | |
2796 | mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; | |
2797 | mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; | |
2798 | tty_set_operations(mxvar_sdriver, &mxser_ops); | |
2799 | ||
2800 | retval = tty_register_driver(mxvar_sdriver); | |
2801 | if (retval) { | |
2802 | printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " | |
2803 | "tty driver !\n"); | |
2804 | goto err_put; | |
1da177e4 | 2805 | } |
1c45607a JS |
2806 | |
2807 | mxvar_diagflag = 0; | |
2808 | ||
2809 | m = 0; | |
2810 | /* Start finding ISA boards here */ | |
2811 | for (isaloop = 0; isaloop < 2; isaloop++) | |
2812 | for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) { | |
2813 | if (!isaloop) | |
2814 | cap = mxserBoardCAP[b]; /* predefined */ | |
2815 | else | |
2816 | cap = ioaddr[b]; /* module param */ | |
2817 | ||
2818 | if (!cap) | |
2819 | continue; | |
2820 | ||
2821 | brd = &mxser_boards[m]; | |
2822 | retval = mxser_get_ISA_conf(cap, brd); | |
2823 | ||
2824 | if (retval != 0) | |
2825 | printk(KERN_INFO "Found MOXA %s board " | |
2826 | "(CAP=0x%x)\n", | |
2827 | brd->info->name, ioaddr[b]); | |
2828 | ||
2829 | if (retval <= 0) { | |
2830 | if (retval == MXSER_ERR_IRQ) | |
2831 | printk(KERN_ERR "Invalid interrupt " | |
2832 | "number, board not " | |
2833 | "configured\n"); | |
2834 | else if (retval == MXSER_ERR_IRQ_CONFLIT) | |
2835 | printk(KERN_ERR "Invalid interrupt " | |
2836 | "number, board not " | |
2837 | "configured\n"); | |
2838 | else if (retval == MXSER_ERR_VECTOR) | |
2839 | printk(KERN_ERR "Invalid interrupt " | |
2840 | "vector, board not " | |
2841 | "configured\n"); | |
2842 | else if (retval == MXSER_ERR_IOADDR) | |
2843 | printk(KERN_ERR "Invalid I/O address, " | |
2844 | "board not configured\n"); | |
2845 | ||
2846 | brd->info = NULL; | |
2847 | continue; | |
2848 | } | |
2849 | ||
2850 | /* mxser_initbrd will hook ISR. */ | |
2851 | if (mxser_initbrd(brd, NULL) < 0) { | |
2852 | brd->info = NULL; | |
2853 | continue; | |
2854 | } | |
2855 | ||
2856 | brd->idx = m * MXSER_PORTS_PER_BOARD; | |
2857 | for (i = 0; i < brd->info->nports; i++) | |
2858 | tty_register_device(mxvar_sdriver, brd->idx + i, | |
2859 | NULL); | |
2860 | ||
2861 | m++; | |
2862 | } | |
2863 | ||
2864 | retval = pci_register_driver(&mxser_driver); | |
2865 | if (retval) { | |
2866 | printk(KERN_ERR "Can't register pci driver\n"); | |
2867 | if (!m) { | |
2868 | retval = -ENODEV; | |
2869 | goto err_unr; | |
2870 | } /* else: we have some ISA cards under control */ | |
2871 | } | |
2872 | ||
2873 | pr_debug("Done.\n"); | |
2874 | ||
2875 | return 0; | |
2876 | err_unr: | |
2877 | tty_unregister_driver(mxvar_sdriver); | |
2878 | err_put: | |
2879 | put_tty_driver(mxvar_sdriver); | |
2880 | return retval; | |
2881 | } | |
2882 | ||
2883 | static void __exit mxser_module_exit(void) | |
2884 | { | |
2885 | unsigned int i, j; | |
2886 | ||
2887 | pr_debug("Unloading module mxser ...\n"); | |
2888 | ||
2889 | pci_unregister_driver(&mxser_driver); | |
2890 | ||
2891 | for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ | |
2892 | if (mxser_boards[i].info != NULL) | |
2893 | for (j = 0; j < mxser_boards[i].info->nports; j++) | |
2894 | tty_unregister_device(mxvar_sdriver, | |
2895 | mxser_boards[i].idx + j); | |
2896 | tty_unregister_driver(mxvar_sdriver); | |
2897 | put_tty_driver(mxvar_sdriver); | |
2898 | ||
2899 | for (i = 0; i < MXSER_BOARDS; i++) | |
2900 | if (mxser_boards[i].info != NULL) | |
2901 | mxser_release_res(&mxser_boards[i], NULL, 1); | |
2902 | ||
2903 | pr_debug("Done.\n"); | |
1da177e4 LT |
2904 | } |
2905 | ||
2906 | module_init(mxser_module_init); | |
2907 | module_exit(mxser_module_exit); |