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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * mxser.c -- MOXA Smartio/Industio family multiport serial driver. | |
3 | * | |
80ff8a80 JS |
4 | * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). |
5 | * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> | |
1da177e4 | 6 | * |
1c45607a JS |
7 | * This code is loosely based on the 1.8 moxa driver which is based on |
8 | * Linux serial driver, written by Linus Torvalds, Theodore T'so and | |
9 | * others. | |
1da177e4 LT |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
8ea2c2ec | 14 | * (at your option) any later version. |
1da177e4 | 15 | * |
1da177e4 | 16 | * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox |
8eb04cf3 AC |
17 | * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on |
18 | * www.moxa.com. | |
1da177e4 | 19 | * - Fixed x86_64 cleanness |
1da177e4 LT |
20 | */ |
21 | ||
1da177e4 | 22 | #include <linux/module.h> |
1da177e4 LT |
23 | #include <linux/errno.h> |
24 | #include <linux/signal.h> | |
25 | #include <linux/sched.h> | |
405f5571 | 26 | #include <linux/smp_lock.h> |
1da177e4 LT |
27 | #include <linux/timer.h> |
28 | #include <linux/interrupt.h> | |
29 | #include <linux/tty.h> | |
30 | #include <linux/tty_flip.h> | |
31 | #include <linux/serial.h> | |
32 | #include <linux/serial_reg.h> | |
33 | #include <linux/major.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/fcntl.h> | |
36 | #include <linux/ptrace.h> | |
37 | #include <linux/gfp.h> | |
38 | #include <linux/ioport.h> | |
39 | #include <linux/mm.h> | |
1da177e4 LT |
40 | #include <linux/delay.h> |
41 | #include <linux/pci.h> | |
1977f032 | 42 | #include <linux/bitops.h> |
1da177e4 LT |
43 | |
44 | #include <asm/system.h> | |
45 | #include <asm/io.h> | |
46 | #include <asm/irq.h> | |
1da177e4 LT |
47 | #include <asm/uaccess.h> |
48 | ||
49 | #include "mxser.h" | |
50 | ||
e129deff | 51 | #define MXSER_VERSION "2.0.4" /* 1.12 */ |
1da177e4 | 52 | #define MXSERMAJOR 174 |
1da177e4 | 53 | |
1da177e4 | 54 | #define MXSER_BOARDS 4 /* Max. boards */ |
1da177e4 | 55 | #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ |
1c45607a JS |
56 | #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) |
57 | #define MXSER_ISR_PASS_LIMIT 100 | |
1da177e4 | 58 | |
1c45607a JS |
59 | /*CheckIsMoxaMust return value*/ |
60 | #define MOXA_OTHER_UART 0x00 | |
61 | #define MOXA_MUST_MU150_HWID 0x01 | |
62 | #define MOXA_MUST_MU860_HWID 0x02 | |
63 | ||
1da177e4 LT |
64 | #define WAKEUP_CHARS 256 |
65 | ||
66 | #define UART_MCR_AFE 0x20 | |
67 | #define UART_LSR_SPECIAL 0x1E | |
68 | ||
e129deff | 69 | #define PCI_DEVICE_ID_POS104UL 0x1044 |
1c45607a | 70 | #define PCI_DEVICE_ID_CB108 0x1080 |
e129deff | 71 | #define PCI_DEVICE_ID_CP102UF 0x1023 |
1c45607a | 72 | #define PCI_DEVICE_ID_CB114 0x1142 |
80ff8a80 | 73 | #define PCI_DEVICE_ID_CP114UL 0x1143 |
1c45607a JS |
74 | #define PCI_DEVICE_ID_CB134I 0x1341 |
75 | #define PCI_DEVICE_ID_CP138U 0x1380 | |
1da177e4 | 76 | |
1da177e4 LT |
77 | |
78 | #define C168_ASIC_ID 1 | |
79 | #define C104_ASIC_ID 2 | |
80 | #define C102_ASIC_ID 0xB | |
81 | #define CI132_ASIC_ID 4 | |
82 | #define CI134_ASIC_ID 3 | |
83 | #define CI104J_ASIC_ID 5 | |
84 | ||
1c45607a JS |
85 | #define MXSER_HIGHBAUD 1 |
86 | #define MXSER_HAS2 2 | |
1da177e4 | 87 | |
8ea2c2ec | 88 | /* This is only for PCI */ |
1c45607a | 89 | static const struct { |
1da177e4 LT |
90 | int type; |
91 | int tx_fifo; | |
92 | int rx_fifo; | |
93 | int xmit_fifo_size; | |
94 | int rx_high_water; | |
95 | int rx_trigger; | |
96 | int rx_low_water; | |
97 | long max_baud; | |
1c45607a | 98 | } Gpci_uart_info[] = { |
1da177e4 LT |
99 | {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, |
100 | {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, | |
101 | {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} | |
102 | }; | |
1c45607a | 103 | #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) |
1da177e4 | 104 | |
1c45607a JS |
105 | struct mxser_cardinfo { |
106 | char *name; | |
107 | unsigned int nports; | |
108 | unsigned int flags; | |
109 | }; | |
1da177e4 | 110 | |
1c45607a JS |
111 | static const struct mxser_cardinfo mxser_cards[] = { |
112 | /* 0*/ { "C168 series", 8, }, | |
113 | { "C104 series", 4, }, | |
114 | { "CI-104J series", 4, }, | |
115 | { "C168H/PCI series", 8, }, | |
116 | { "C104H/PCI series", 4, }, | |
117 | /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ | |
118 | { "CI-132 series", 4, MXSER_HAS2 }, | |
119 | { "CI-134 series", 4, }, | |
120 | { "CP-132 series", 2, }, | |
121 | { "CP-114 series", 4, }, | |
122 | /*10*/ { "CT-114 series", 4, }, | |
123 | { "CP-102 series", 2, MXSER_HIGHBAUD }, | |
124 | { "CP-104U series", 4, }, | |
125 | { "CP-168U series", 8, }, | |
126 | { "CP-132U series", 2, }, | |
127 | /*15*/ { "CP-134U series", 4, }, | |
128 | { "CP-104JU series", 4, }, | |
129 | { "Moxa UC7000 Serial", 8, }, /* RC7000 */ | |
130 | { "CP-118U series", 8, }, | |
131 | { "CP-102UL series", 2, }, | |
132 | /*20*/ { "CP-102U series", 2, }, | |
133 | { "CP-118EL series", 8, }, | |
134 | { "CP-168EL series", 8, }, | |
135 | { "CP-104EL series", 4, }, | |
136 | { "CB-108 series", 8, }, | |
137 | /*25*/ { "CB-114 series", 4, }, | |
138 | { "CB-134I series", 4, }, | |
139 | { "CP-138U series", 8, }, | |
80ff8a80 | 140 | { "POS-104UL series", 4, }, |
e129deff JS |
141 | { "CP-114UL series", 4, }, |
142 | /*30*/ { "CP-102UF series", 2, } | |
1c45607a | 143 | }; |
1da177e4 | 144 | |
1c45607a JS |
145 | /* driver_data correspond to the lines in the structure above |
146 | see also ISA probe function before you change something */ | |
1da177e4 | 147 | static struct pci_device_id mxser_pcibrds[] = { |
1c45607a JS |
148 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, |
149 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, | |
150 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, | |
151 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, | |
152 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, | |
153 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, | |
154 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, | |
155 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, | |
156 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, | |
157 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, | |
158 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, | |
159 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, | |
160 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, | |
161 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, | |
162 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, | |
163 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, | |
164 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, | |
165 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, | |
166 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, | |
167 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, | |
168 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, | |
169 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, | |
170 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, | |
80ff8a80 | 171 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, |
e129deff | 172 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, |
1c45607a | 173 | { } |
1da177e4 | 174 | }; |
1da177e4 LT |
175 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); |
176 | ||
1df00924 | 177 | static unsigned long ioaddr[MXSER_BOARDS]; |
1da177e4 | 178 | static int ttymajor = MXSERMAJOR; |
1da177e4 LT |
179 | |
180 | /* Variables for insmod */ | |
181 | ||
182 | MODULE_AUTHOR("Casper Yang"); | |
183 | MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); | |
1df00924 JS |
184 | module_param_array(ioaddr, ulong, NULL, 0); |
185 | MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); | |
8d3b33f6 | 186 | module_param(ttymajor, int, 0); |
1da177e4 LT |
187 | MODULE_LICENSE("GPL"); |
188 | ||
189 | struct mxser_log { | |
190 | int tick; | |
191 | unsigned long rxcnt[MXSER_PORTS]; | |
192 | unsigned long txcnt[MXSER_PORTS]; | |
193 | }; | |
194 | ||
1da177e4 LT |
195 | struct mxser_mon { |
196 | unsigned long rxcnt; | |
197 | unsigned long txcnt; | |
198 | unsigned long up_rxcnt; | |
199 | unsigned long up_txcnt; | |
200 | int modem_status; | |
201 | unsigned char hold_reason; | |
202 | }; | |
203 | ||
204 | struct mxser_mon_ext { | |
205 | unsigned long rx_cnt[32]; | |
206 | unsigned long tx_cnt[32]; | |
207 | unsigned long up_rxcnt[32]; | |
208 | unsigned long up_txcnt[32]; | |
209 | int modem_status[32]; | |
210 | ||
211 | long baudrate[32]; | |
212 | int databits[32]; | |
213 | int stopbits[32]; | |
214 | int parity[32]; | |
215 | int flowctrl[32]; | |
216 | int fifo[32]; | |
217 | int iftype[32]; | |
218 | }; | |
8ea2c2ec | 219 | |
1c45607a JS |
220 | struct mxser_board; |
221 | ||
222 | struct mxser_port { | |
0ad9e7d1 | 223 | struct tty_port port; |
1c45607a | 224 | struct mxser_board *board; |
1c45607a JS |
225 | |
226 | unsigned long ioaddr; | |
227 | unsigned long opmode_ioaddr; | |
228 | int max_baud; | |
1da177e4 | 229 | |
1da177e4 LT |
230 | int rx_high_water; |
231 | int rx_trigger; /* Rx fifo trigger level */ | |
232 | int rx_low_water; | |
233 | int baud_base; /* max. speed */ | |
1da177e4 | 234 | int type; /* UART type */ |
1c45607a | 235 | |
1da177e4 | 236 | int x_char; /* xon/xoff character */ |
1da177e4 LT |
237 | int IER; /* Interrupt Enable Register */ |
238 | int MCR; /* Modem control register */ | |
1c45607a JS |
239 | |
240 | unsigned char stop_rx; | |
241 | unsigned char ldisc_stop_rx; | |
242 | ||
243 | int custom_divisor; | |
1c45607a | 244 | unsigned char err_shadow; |
1c45607a | 245 | |
1c45607a JS |
246 | struct async_icount icount; /* kernel counters for 4 input interrupts */ |
247 | int timeout; | |
248 | ||
249 | int read_status_mask; | |
250 | int ignore_status_mask; | |
251 | int xmit_fifo_size; | |
1da177e4 LT |
252 | int xmit_head; |
253 | int xmit_tail; | |
254 | int xmit_cnt; | |
1c45607a | 255 | |
606d099c | 256 | struct ktermios normal_termios; |
1c45607a | 257 | |
1da177e4 | 258 | struct mxser_mon mon_data; |
1c45607a | 259 | |
1da177e4 | 260 | spinlock_t slock; |
1c45607a JS |
261 | }; |
262 | ||
263 | struct mxser_board { | |
264 | unsigned int idx; | |
265 | int irq; | |
266 | const struct mxser_cardinfo *info; | |
267 | unsigned long vector; | |
268 | unsigned long vector_mask; | |
269 | ||
270 | int chip_flag; | |
271 | int uart_type; | |
272 | ||
273 | struct mxser_port ports[MXSER_PORTS_PER_BOARD]; | |
1da177e4 LT |
274 | }; |
275 | ||
1da177e4 LT |
276 | struct mxser_mstatus { |
277 | tcflag_t cflag; | |
278 | int cts; | |
279 | int dsr; | |
280 | int ri; | |
281 | int dcd; | |
282 | }; | |
283 | ||
1c45607a | 284 | static struct mxser_board mxser_boards[MXSER_BOARDS]; |
1da177e4 | 285 | static struct tty_driver *mxvar_sdriver; |
1da177e4 | 286 | static struct mxser_log mxvar_log; |
1da177e4 | 287 | static int mxser_set_baud_method[MXSER_PORTS + 1]; |
1da177e4 | 288 | |
148ff86b CH |
289 | static void mxser_enable_must_enchance_mode(unsigned long baseio) |
290 | { | |
291 | u8 oldlcr; | |
292 | u8 efr; | |
293 | ||
294 | oldlcr = inb(baseio + UART_LCR); | |
295 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
296 | ||
297 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
298 | efr |= MOXA_MUST_EFR_EFRB_ENABLE; | |
299 | ||
300 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
301 | outb(oldlcr, baseio + UART_LCR); | |
302 | } | |
303 | ||
304 | static void mxser_disable_must_enchance_mode(unsigned long baseio) | |
305 | { | |
306 | u8 oldlcr; | |
307 | u8 efr; | |
308 | ||
309 | oldlcr = inb(baseio + UART_LCR); | |
310 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
311 | ||
312 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
313 | efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; | |
314 | ||
315 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
316 | outb(oldlcr, baseio + UART_LCR); | |
317 | } | |
318 | ||
319 | static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) | |
320 | { | |
321 | u8 oldlcr; | |
322 | u8 efr; | |
323 | ||
324 | oldlcr = inb(baseio + UART_LCR); | |
325 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
326 | ||
327 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
328 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
329 | efr |= MOXA_MUST_EFR_BANK0; | |
330 | ||
331 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
332 | outb(value, baseio + MOXA_MUST_XON1_REGISTER); | |
333 | outb(oldlcr, baseio + UART_LCR); | |
334 | } | |
335 | ||
336 | static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) | |
337 | { | |
338 | u8 oldlcr; | |
339 | u8 efr; | |
340 | ||
341 | oldlcr = inb(baseio + UART_LCR); | |
342 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
343 | ||
344 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
345 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
346 | efr |= MOXA_MUST_EFR_BANK0; | |
347 | ||
348 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
349 | outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); | |
350 | outb(oldlcr, baseio + UART_LCR); | |
351 | } | |
352 | ||
353 | static void mxser_set_must_fifo_value(struct mxser_port *info) | |
354 | { | |
355 | u8 oldlcr; | |
356 | u8 efr; | |
357 | ||
358 | oldlcr = inb(info->ioaddr + UART_LCR); | |
359 | outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); | |
360 | ||
361 | efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
362 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
363 | efr |= MOXA_MUST_EFR_BANK1; | |
364 | ||
365 | outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
366 | outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); | |
367 | outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); | |
368 | outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); | |
369 | outb(oldlcr, info->ioaddr + UART_LCR); | |
370 | } | |
371 | ||
372 | static void mxser_set_must_enum_value(unsigned long baseio, u8 value) | |
373 | { | |
374 | u8 oldlcr; | |
375 | u8 efr; | |
376 | ||
377 | oldlcr = inb(baseio + UART_LCR); | |
378 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
379 | ||
380 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
381 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
382 | efr |= MOXA_MUST_EFR_BANK2; | |
383 | ||
384 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
385 | outb(value, baseio + MOXA_MUST_ENUM_REGISTER); | |
386 | outb(oldlcr, baseio + UART_LCR); | |
387 | } | |
388 | ||
389 | static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) | |
390 | { | |
391 | u8 oldlcr; | |
392 | u8 efr; | |
393 | ||
394 | oldlcr = inb(baseio + UART_LCR); | |
395 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
396 | ||
397 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
398 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
399 | efr |= MOXA_MUST_EFR_BANK2; | |
400 | ||
401 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
402 | *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); | |
403 | outb(oldlcr, baseio + UART_LCR); | |
404 | } | |
405 | ||
406 | static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) | |
407 | { | |
408 | u8 oldlcr; | |
409 | u8 efr; | |
410 | ||
411 | oldlcr = inb(baseio + UART_LCR); | |
412 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
413 | ||
414 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
415 | efr &= ~MOXA_MUST_EFR_SF_MASK; | |
416 | ||
417 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
418 | outb(oldlcr, baseio + UART_LCR); | |
419 | } | |
420 | ||
421 | static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) | |
422 | { | |
423 | u8 oldlcr; | |
424 | u8 efr; | |
425 | ||
426 | oldlcr = inb(baseio + UART_LCR); | |
427 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
428 | ||
429 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
430 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
431 | efr |= MOXA_MUST_EFR_SF_TX1; | |
432 | ||
433 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
434 | outb(oldlcr, baseio + UART_LCR); | |
435 | } | |
436 | ||
437 | static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) | |
438 | { | |
439 | u8 oldlcr; | |
440 | u8 efr; | |
441 | ||
442 | oldlcr = inb(baseio + UART_LCR); | |
443 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
444 | ||
445 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
446 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
447 | ||
448 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
449 | outb(oldlcr, baseio + UART_LCR); | |
450 | } | |
451 | ||
452 | static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) | |
453 | { | |
454 | u8 oldlcr; | |
455 | u8 efr; | |
456 | ||
457 | oldlcr = inb(baseio + UART_LCR); | |
458 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
459 | ||
460 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
461 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
462 | efr |= MOXA_MUST_EFR_SF_RX1; | |
463 | ||
464 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
465 | outb(oldlcr, baseio + UART_LCR); | |
466 | } | |
467 | ||
468 | static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) | |
469 | { | |
470 | u8 oldlcr; | |
471 | u8 efr; | |
472 | ||
473 | oldlcr = inb(baseio + UART_LCR); | |
474 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
475 | ||
476 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
477 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
478 | ||
479 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
480 | outb(oldlcr, baseio + UART_LCR); | |
481 | } | |
482 | ||
b8cc5549 | 483 | #ifdef CONFIG_PCI |
1c45607a | 484 | static int __devinit CheckIsMoxaMust(unsigned long io) |
1da177e4 LT |
485 | { |
486 | u8 oldmcr, hwid; | |
487 | int i; | |
488 | ||
489 | outb(0, io + UART_LCR); | |
148ff86b | 490 | mxser_disable_must_enchance_mode(io); |
1da177e4 LT |
491 | oldmcr = inb(io + UART_MCR); |
492 | outb(0, io + UART_MCR); | |
148ff86b | 493 | mxser_set_must_xon1_value(io, 0x11); |
1da177e4 LT |
494 | if ((hwid = inb(io + UART_MCR)) != 0) { |
495 | outb(oldmcr, io + UART_MCR); | |
8ea2c2ec | 496 | return MOXA_OTHER_UART; |
1da177e4 LT |
497 | } |
498 | ||
148ff86b | 499 | mxser_get_must_hardware_id(io, &hwid); |
1c45607a JS |
500 | for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ |
501 | if (hwid == Gpci_uart_info[i].type) | |
8ea2c2ec | 502 | return (int)hwid; |
1da177e4 LT |
503 | } |
504 | return MOXA_OTHER_UART; | |
505 | } | |
b8cc5549 | 506 | #endif |
1da177e4 | 507 | |
1c45607a | 508 | static void process_txrx_fifo(struct mxser_port *info) |
1da177e4 LT |
509 | { |
510 | int i; | |
511 | ||
512 | if ((info->type == PORT_16450) || (info->type == PORT_8250)) { | |
513 | info->rx_trigger = 1; | |
514 | info->rx_high_water = 1; | |
515 | info->rx_low_water = 1; | |
516 | info->xmit_fifo_size = 1; | |
1c45607a JS |
517 | } else |
518 | for (i = 0; i < UART_INFO_NUM; i++) | |
519 | if (info->board->chip_flag == Gpci_uart_info[i].type) { | |
1da177e4 LT |
520 | info->rx_trigger = Gpci_uart_info[i].rx_trigger; |
521 | info->rx_low_water = Gpci_uart_info[i].rx_low_water; | |
522 | info->rx_high_water = Gpci_uart_info[i].rx_high_water; | |
523 | info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; | |
524 | break; | |
525 | } | |
1da177e4 LT |
526 | } |
527 | ||
1c45607a | 528 | static unsigned char mxser_get_msr(int baseaddr, int mode, int port) |
1da177e4 | 529 | { |
72800df9 | 530 | static unsigned char mxser_msr[MXSER_PORTS + 1]; |
1c45607a | 531 | unsigned char status = 0; |
1da177e4 | 532 | |
1c45607a | 533 | status = inb(baseaddr + UART_MSR); |
1da177e4 | 534 | |
1c45607a JS |
535 | mxser_msr[port] &= 0x0F; |
536 | mxser_msr[port] |= status; | |
537 | status = mxser_msr[port]; | |
538 | if (mode) | |
539 | mxser_msr[port] = 0; | |
1da177e4 | 540 | |
1c45607a JS |
541 | return status; |
542 | } | |
1da177e4 | 543 | |
31f35939 AC |
544 | static int mxser_carrier_raised(struct tty_port *port) |
545 | { | |
546 | struct mxser_port *mp = container_of(port, struct mxser_port, port); | |
547 | return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; | |
548 | } | |
549 | ||
fcc8ac18 | 550 | static void mxser_dtr_rts(struct tty_port *port, int on) |
5d951fb4 AC |
551 | { |
552 | struct mxser_port *mp = container_of(port, struct mxser_port, port); | |
553 | unsigned long flags; | |
554 | ||
555 | spin_lock_irqsave(&mp->slock, flags); | |
fcc8ac18 AC |
556 | if (on) |
557 | outb(inb(mp->ioaddr + UART_MCR) | | |
558 | UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); | |
559 | else | |
560 | outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), | |
561 | mp->ioaddr + UART_MCR); | |
5d951fb4 AC |
562 | spin_unlock_irqrestore(&mp->slock, flags); |
563 | } | |
564 | ||
216ba023 | 565 | static int mxser_set_baud(struct tty_struct *tty, long newspd) |
1da177e4 | 566 | { |
216ba023 | 567 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
568 | int quot = 0, baud; |
569 | unsigned char cval; | |
1da177e4 | 570 | |
216ba023 | 571 | if (!info->ioaddr) |
1c45607a | 572 | return -1; |
1da177e4 | 573 | |
1c45607a JS |
574 | if (newspd > info->max_baud) |
575 | return -1; | |
1da177e4 | 576 | |
1c45607a JS |
577 | if (newspd == 134) { |
578 | quot = 2 * info->baud_base / 269; | |
216ba023 | 579 | tty_encode_baud_rate(tty, 134, 134); |
1c45607a JS |
580 | } else if (newspd) { |
581 | quot = info->baud_base / newspd; | |
582 | if (quot == 0) | |
583 | quot = 1; | |
584 | baud = info->baud_base/quot; | |
216ba023 | 585 | tty_encode_baud_rate(tty, baud, baud); |
1c45607a JS |
586 | } else { |
587 | quot = 0; | |
588 | } | |
1da177e4 | 589 | |
1c45607a JS |
590 | info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); |
591 | info->timeout += HZ / 50; /* Add .02 seconds of slop */ | |
1da177e4 | 592 | |
1c45607a JS |
593 | if (quot) { |
594 | info->MCR |= UART_MCR_DTR; | |
595 | outb(info->MCR, info->ioaddr + UART_MCR); | |
596 | } else { | |
597 | info->MCR &= ~UART_MCR_DTR; | |
598 | outb(info->MCR, info->ioaddr + UART_MCR); | |
599 | return 0; | |
600 | } | |
1da177e4 | 601 | |
1c45607a | 602 | cval = inb(info->ioaddr + UART_LCR); |
1da177e4 | 603 | |
1c45607a | 604 | outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ |
1da177e4 | 605 | |
1c45607a JS |
606 | outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ |
607 | outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ | |
608 | outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ | |
1da177e4 | 609 | |
1c45607a | 610 | #ifdef BOTHER |
216ba023 | 611 | if (C_BAUD(tty) == BOTHER) { |
1c45607a JS |
612 | quot = info->baud_base % newspd; |
613 | quot *= 8; | |
614 | if (quot % newspd > newspd / 2) { | |
615 | quot /= newspd; | |
616 | quot++; | |
617 | } else | |
618 | quot /= newspd; | |
619 | ||
148ff86b | 620 | mxser_set_must_enum_value(info->ioaddr, quot); |
1c45607a JS |
621 | } else |
622 | #endif | |
148ff86b | 623 | mxser_set_must_enum_value(info->ioaddr, 0); |
1da177e4 | 624 | |
8ea2c2ec | 625 | return 0; |
1da177e4 | 626 | } |
1da177e4 | 627 | |
1c45607a JS |
628 | /* |
629 | * This routine is called to set the UART divisor registers to match | |
630 | * the specified baud rate for a serial port. | |
631 | */ | |
216ba023 AC |
632 | static int mxser_change_speed(struct tty_struct *tty, |
633 | struct ktermios *old_termios) | |
1da177e4 | 634 | { |
216ba023 | 635 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
636 | unsigned cflag, cval, fcr; |
637 | int ret = 0; | |
638 | unsigned char status; | |
1da177e4 | 639 | |
216ba023 AC |
640 | cflag = tty->termios->c_cflag; |
641 | if (!info->ioaddr) | |
1c45607a | 642 | return ret; |
1da177e4 | 643 | |
216ba023 AC |
644 | if (mxser_set_baud_method[tty->index] == 0) |
645 | mxser_set_baud(tty, tty_get_baud_rate(tty)); | |
1da177e4 | 646 | |
1c45607a JS |
647 | /* byte size and parity */ |
648 | switch (cflag & CSIZE) { | |
649 | case CS5: | |
650 | cval = 0x00; | |
651 | break; | |
652 | case CS6: | |
653 | cval = 0x01; | |
654 | break; | |
655 | case CS7: | |
656 | cval = 0x02; | |
657 | break; | |
658 | case CS8: | |
659 | cval = 0x03; | |
660 | break; | |
661 | default: | |
662 | cval = 0x00; | |
663 | break; /* too keep GCC shut... */ | |
664 | } | |
665 | if (cflag & CSTOPB) | |
666 | cval |= 0x04; | |
667 | if (cflag & PARENB) | |
668 | cval |= UART_LCR_PARITY; | |
669 | if (!(cflag & PARODD)) | |
670 | cval |= UART_LCR_EPAR; | |
671 | if (cflag & CMSPAR) | |
672 | cval |= UART_LCR_SPAR; | |
1da177e4 | 673 | |
1c45607a JS |
674 | if ((info->type == PORT_8250) || (info->type == PORT_16450)) { |
675 | if (info->board->chip_flag) { | |
676 | fcr = UART_FCR_ENABLE_FIFO; | |
677 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 678 | mxser_set_must_fifo_value(info); |
1c45607a JS |
679 | } else |
680 | fcr = 0; | |
681 | } else { | |
682 | fcr = UART_FCR_ENABLE_FIFO; | |
683 | if (info->board->chip_flag) { | |
684 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 685 | mxser_set_must_fifo_value(info); |
1c45607a JS |
686 | } else { |
687 | switch (info->rx_trigger) { | |
688 | case 1: | |
689 | fcr |= UART_FCR_TRIGGER_1; | |
690 | break; | |
691 | case 4: | |
692 | fcr |= UART_FCR_TRIGGER_4; | |
693 | break; | |
694 | case 8: | |
695 | fcr |= UART_FCR_TRIGGER_8; | |
696 | break; | |
697 | default: | |
698 | fcr |= UART_FCR_TRIGGER_14; | |
699 | break; | |
700 | } | |
1da177e4 | 701 | } |
1da177e4 LT |
702 | } |
703 | ||
1c45607a JS |
704 | /* CTS flow control flag and modem status interrupts */ |
705 | info->IER &= ~UART_IER_MSI; | |
706 | info->MCR &= ~UART_MCR_AFE; | |
707 | if (cflag & CRTSCTS) { | |
0ad9e7d1 | 708 | info->port.flags |= ASYNC_CTS_FLOW; |
1c45607a JS |
709 | info->IER |= UART_IER_MSI; |
710 | if ((info->type == PORT_16550A) || (info->board->chip_flag)) { | |
711 | info->MCR |= UART_MCR_AFE; | |
712 | } else { | |
713 | status = inb(info->ioaddr + UART_MSR); | |
216ba023 | 714 | if (tty->hw_stopped) { |
1c45607a | 715 | if (status & UART_MSR_CTS) { |
216ba023 | 716 | tty->hw_stopped = 0; |
1c45607a JS |
717 | if (info->type != PORT_16550A && |
718 | !info->board->chip_flag) { | |
719 | outb(info->IER & ~UART_IER_THRI, | |
720 | info->ioaddr + | |
721 | UART_IER); | |
722 | info->IER |= UART_IER_THRI; | |
723 | outb(info->IER, info->ioaddr + | |
724 | UART_IER); | |
725 | } | |
216ba023 | 726 | tty_wakeup(tty); |
1c45607a JS |
727 | } |
728 | } else { | |
729 | if (!(status & UART_MSR_CTS)) { | |
216ba023 | 730 | tty->hw_stopped = 1; |
1c45607a JS |
731 | if ((info->type != PORT_16550A) && |
732 | (!info->board->chip_flag)) { | |
733 | info->IER &= ~UART_IER_THRI; | |
734 | outb(info->IER, info->ioaddr + | |
735 | UART_IER); | |
736 | } | |
737 | } | |
738 | } | |
1da177e4 | 739 | } |
1c45607a | 740 | } else { |
0ad9e7d1 | 741 | info->port.flags &= ~ASYNC_CTS_FLOW; |
1c45607a JS |
742 | } |
743 | outb(info->MCR, info->ioaddr + UART_MCR); | |
744 | if (cflag & CLOCAL) { | |
0ad9e7d1 | 745 | info->port.flags &= ~ASYNC_CHECK_CD; |
1c45607a | 746 | } else { |
0ad9e7d1 | 747 | info->port.flags |= ASYNC_CHECK_CD; |
1c45607a JS |
748 | info->IER |= UART_IER_MSI; |
749 | } | |
750 | outb(info->IER, info->ioaddr + UART_IER); | |
751 | ||
752 | /* | |
753 | * Set up parity check flag | |
754 | */ | |
755 | info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; | |
216ba023 | 756 | if (I_INPCK(tty)) |
1c45607a | 757 | info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; |
216ba023 | 758 | if (I_BRKINT(tty) || I_PARMRK(tty)) |
1c45607a | 759 | info->read_status_mask |= UART_LSR_BI; |
1da177e4 | 760 | |
1c45607a | 761 | info->ignore_status_mask = 0; |
1da177e4 | 762 | |
216ba023 | 763 | if (I_IGNBRK(tty)) { |
1c45607a JS |
764 | info->ignore_status_mask |= UART_LSR_BI; |
765 | info->read_status_mask |= UART_LSR_BI; | |
8ea2c2ec | 766 | /* |
1c45607a JS |
767 | * If we're ignore parity and break indicators, ignore |
768 | * overruns too. (For real raw support). | |
8ea2c2ec | 769 | */ |
216ba023 | 770 | if (I_IGNPAR(tty)) { |
1c45607a JS |
771 | info->ignore_status_mask |= |
772 | UART_LSR_OE | | |
773 | UART_LSR_PE | | |
774 | UART_LSR_FE; | |
775 | info->read_status_mask |= | |
776 | UART_LSR_OE | | |
777 | UART_LSR_PE | | |
778 | UART_LSR_FE; | |
779 | } | |
1da177e4 | 780 | } |
1c45607a | 781 | if (info->board->chip_flag) { |
216ba023 AC |
782 | mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); |
783 | mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); | |
784 | if (I_IXON(tty)) { | |
148ff86b CH |
785 | mxser_enable_must_rx_software_flow_control( |
786 | info->ioaddr); | |
1c45607a | 787 | } else { |
148ff86b CH |
788 | mxser_disable_must_rx_software_flow_control( |
789 | info->ioaddr); | |
1da177e4 | 790 | } |
216ba023 | 791 | if (I_IXOFF(tty)) { |
148ff86b CH |
792 | mxser_enable_must_tx_software_flow_control( |
793 | info->ioaddr); | |
1c45607a | 794 | } else { |
148ff86b CH |
795 | mxser_disable_must_tx_software_flow_control( |
796 | info->ioaddr); | |
1da177e4 LT |
797 | } |
798 | } | |
1da177e4 | 799 | |
1da177e4 | 800 | |
1c45607a JS |
801 | outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ |
802 | outb(cval, info->ioaddr + UART_LCR); | |
1da177e4 | 803 | |
1c45607a | 804 | return ret; |
1da177e4 LT |
805 | } |
806 | ||
216ba023 AC |
807 | static void mxser_check_modem_status(struct tty_struct *tty, |
808 | struct mxser_port *port, int status) | |
1da177e4 | 809 | { |
1c45607a JS |
810 | /* update input line counters */ |
811 | if (status & UART_MSR_TERI) | |
812 | port->icount.rng++; | |
813 | if (status & UART_MSR_DDSR) | |
814 | port->icount.dsr++; | |
815 | if (status & UART_MSR_DDCD) | |
816 | port->icount.dcd++; | |
817 | if (status & UART_MSR_DCTS) | |
818 | port->icount.cts++; | |
819 | port->mon_data.modem_status = status; | |
bdc04e31 | 820 | wake_up_interruptible(&port->port.delta_msr_wait); |
1da177e4 | 821 | |
0ad9e7d1 | 822 | if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { |
1c45607a | 823 | if (status & UART_MSR_DCD) |
0ad9e7d1 | 824 | wake_up_interruptible(&port->port.open_wait); |
1c45607a | 825 | } |
1da177e4 | 826 | |
0ad9e7d1 | 827 | if (port->port.flags & ASYNC_CTS_FLOW) { |
216ba023 | 828 | if (tty->hw_stopped) { |
1c45607a | 829 | if (status & UART_MSR_CTS) { |
216ba023 | 830 | tty->hw_stopped = 0; |
1c45607a JS |
831 | |
832 | if ((port->type != PORT_16550A) && | |
833 | (!port->board->chip_flag)) { | |
834 | outb(port->IER & ~UART_IER_THRI, | |
835 | port->ioaddr + UART_IER); | |
836 | port->IER |= UART_IER_THRI; | |
837 | outb(port->IER, port->ioaddr + | |
838 | UART_IER); | |
839 | } | |
216ba023 | 840 | tty_wakeup(tty); |
1c45607a JS |
841 | } |
842 | } else { | |
843 | if (!(status & UART_MSR_CTS)) { | |
216ba023 | 844 | tty->hw_stopped = 1; |
1c45607a JS |
845 | if (port->type != PORT_16550A && |
846 | !port->board->chip_flag) { | |
847 | port->IER &= ~UART_IER_THRI; | |
848 | outb(port->IER, port->ioaddr + | |
849 | UART_IER); | |
850 | } | |
851 | } | |
852 | } | |
1da177e4 LT |
853 | } |
854 | } | |
855 | ||
216ba023 | 856 | static int mxser_startup(struct tty_struct *tty) |
1da177e4 | 857 | { |
216ba023 | 858 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
859 | unsigned long page; |
860 | unsigned long flags; | |
1da177e4 | 861 | |
1c45607a JS |
862 | page = __get_free_page(GFP_KERNEL); |
863 | if (!page) | |
864 | return -ENOMEM; | |
1da177e4 | 865 | |
1c45607a | 866 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 867 | |
0ad9e7d1 | 868 | if (info->port.flags & ASYNC_INITIALIZED) { |
1c45607a JS |
869 | free_page(page); |
870 | spin_unlock_irqrestore(&info->slock, flags); | |
871 | return 0; | |
872 | } | |
6f08b72c | 873 | |
1c45607a | 874 | if (!info->ioaddr || !info->type) { |
216ba023 | 875 | set_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a JS |
876 | free_page(page); |
877 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 878 | return 0; |
1c45607a | 879 | } |
0ad9e7d1 | 880 | if (info->port.xmit_buf) |
1c45607a JS |
881 | free_page(page); |
882 | else | |
0ad9e7d1 | 883 | info->port.xmit_buf = (unsigned char *) page; |
1da177e4 | 884 | |
1da177e4 | 885 | /* |
1c45607a JS |
886 | * Clear the FIFO buffers and disable them |
887 | * (they will be reenabled in mxser_change_speed()) | |
1da177e4 | 888 | */ |
1c45607a JS |
889 | if (info->board->chip_flag) |
890 | outb((UART_FCR_CLEAR_RCVR | | |
891 | UART_FCR_CLEAR_XMIT | | |
892 | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); | |
893 | else | |
894 | outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
895 | info->ioaddr + UART_FCR); | |
1da177e4 | 896 | |
1c45607a JS |
897 | /* |
898 | * At this point there's no way the LSR could still be 0xFF; | |
899 | * if it is, then bail out, because there's likely no UART | |
900 | * here. | |
901 | */ | |
902 | if (inb(info->ioaddr + UART_LSR) == 0xff) { | |
903 | spin_unlock_irqrestore(&info->slock, flags); | |
904 | if (capable(CAP_SYS_ADMIN)) { | |
216ba023 AC |
905 | if (tty) |
906 | set_bit(TTY_IO_ERROR, &tty->flags); | |
1c45607a JS |
907 | return 0; |
908 | } else | |
909 | return -ENODEV; | |
910 | } | |
1da177e4 | 911 | |
1c45607a JS |
912 | /* |
913 | * Clear the interrupt registers. | |
914 | */ | |
915 | (void) inb(info->ioaddr + UART_LSR); | |
916 | (void) inb(info->ioaddr + UART_RX); | |
917 | (void) inb(info->ioaddr + UART_IIR); | |
918 | (void) inb(info->ioaddr + UART_MSR); | |
919 | ||
920 | /* | |
921 | * Now, initialize the UART | |
922 | */ | |
923 | outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ | |
924 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | |
925 | outb(info->MCR, info->ioaddr + UART_MCR); | |
926 | ||
927 | /* | |
928 | * Finally, enable interrupts | |
929 | */ | |
930 | info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; | |
931 | ||
932 | if (info->board->chip_flag) | |
933 | info->IER |= MOXA_MUST_IER_EGDAI; | |
934 | outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ | |
935 | ||
936 | /* | |
937 | * And clear the interrupt registers again for luck. | |
938 | */ | |
939 | (void) inb(info->ioaddr + UART_LSR); | |
940 | (void) inb(info->ioaddr + UART_RX); | |
941 | (void) inb(info->ioaddr + UART_IIR); | |
942 | (void) inb(info->ioaddr + UART_MSR); | |
943 | ||
216ba023 | 944 | clear_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a JS |
945 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
946 | ||
947 | /* | |
948 | * and set the speed of the serial port | |
949 | */ | |
216ba023 | 950 | mxser_change_speed(tty, NULL); |
0ad9e7d1 | 951 | info->port.flags |= ASYNC_INITIALIZED; |
1c45607a JS |
952 | spin_unlock_irqrestore(&info->slock, flags); |
953 | ||
954 | return 0; | |
955 | } | |
956 | ||
957 | /* | |
958 | * This routine will shutdown a serial port; interrupts maybe disabled, and | |
959 | * DTR is dropped if the hangup on close termio flag is on. | |
960 | */ | |
216ba023 | 961 | static void mxser_shutdown(struct tty_struct *tty) |
1c45607a | 962 | { |
216ba023 | 963 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
964 | unsigned long flags; |
965 | ||
0ad9e7d1 | 966 | if (!(info->port.flags & ASYNC_INITIALIZED)) |
1c45607a JS |
967 | return; |
968 | ||
969 | spin_lock_irqsave(&info->slock, flags); | |
970 | ||
971 | /* | |
972 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | |
973 | * here so the queue might never be waken up | |
974 | */ | |
bdc04e31 | 975 | wake_up_interruptible(&info->port.delta_msr_wait); |
1c45607a JS |
976 | |
977 | /* | |
978 | * Free the IRQ, if necessary | |
979 | */ | |
0ad9e7d1 AC |
980 | if (info->port.xmit_buf) { |
981 | free_page((unsigned long) info->port.xmit_buf); | |
982 | info->port.xmit_buf = NULL; | |
1da177e4 LT |
983 | } |
984 | ||
1c45607a JS |
985 | info->IER = 0; |
986 | outb(0x00, info->ioaddr + UART_IER); | |
987 | ||
216ba023 | 988 | if (tty->termios->c_cflag & HUPCL) |
1c45607a JS |
989 | info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS); |
990 | outb(info->MCR, info->ioaddr + UART_MCR); | |
991 | ||
992 | /* clear Rx/Tx FIFO's */ | |
993 | if (info->board->chip_flag) | |
994 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | | |
995 | MOXA_MUST_FCR_GDA_MODE_ENABLE, | |
996 | info->ioaddr + UART_FCR); | |
997 | else | |
998 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, | |
999 | info->ioaddr + UART_FCR); | |
1000 | ||
1001 | /* read data port to reset things */ | |
1002 | (void) inb(info->ioaddr + UART_RX); | |
1003 | ||
216ba023 | 1004 | set_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a | 1005 | |
0ad9e7d1 | 1006 | info->port.flags &= ~ASYNC_INITIALIZED; |
1c45607a JS |
1007 | |
1008 | if (info->board->chip_flag) | |
1009 | SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
1010 | ||
1011 | spin_unlock_irqrestore(&info->slock, flags); | |
1012 | } | |
1013 | ||
1014 | /* | |
1015 | * This routine is called whenever a serial port is opened. It | |
1016 | * enables interrupts for a serial port, linking in its async structure into | |
1017 | * the IRQ chain. It also performs the serial-specific | |
1018 | * initialization for the tty structure. | |
1019 | */ | |
1020 | static int mxser_open(struct tty_struct *tty, struct file *filp) | |
1021 | { | |
1022 | struct mxser_port *info; | |
1023 | unsigned long flags; | |
1024 | int retval, line; | |
1025 | ||
1026 | line = tty->index; | |
1027 | if (line == MXSER_PORTS) | |
1028 | return 0; | |
1029 | if (line < 0 || line > MXSER_PORTS) | |
1030 | return -ENODEV; | |
1031 | info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; | |
1032 | if (!info->ioaddr) | |
1033 | return -ENODEV; | |
1034 | ||
1035 | tty->driver_data = info; | |
216ba023 | 1036 | tty_port_tty_set(&info->port, tty); |
8ea2c2ec | 1037 | /* |
1c45607a JS |
1038 | * Start up serial port |
1039 | */ | |
3b6826b2 | 1040 | spin_lock_irqsave(&info->port.lock, flags); |
0ad9e7d1 | 1041 | info->port.count++; |
3b6826b2 | 1042 | spin_unlock_irqrestore(&info->port.lock, flags); |
216ba023 | 1043 | retval = mxser_startup(tty); |
1c45607a JS |
1044 | if (retval) |
1045 | return retval; | |
1046 | ||
36c621d8 | 1047 | retval = tty_port_block_til_ready(&info->port, tty, filp); |
1c45607a JS |
1048 | if (retval) |
1049 | return retval; | |
1da177e4 | 1050 | |
1da177e4 LT |
1051 | return 0; |
1052 | } | |
1053 | ||
978e595f AC |
1054 | static void mxser_flush_buffer(struct tty_struct *tty) |
1055 | { | |
1056 | struct mxser_port *info = tty->driver_data; | |
1057 | char fcr; | |
1058 | unsigned long flags; | |
1059 | ||
1060 | ||
1061 | spin_lock_irqsave(&info->slock, flags); | |
1062 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
1063 | ||
1064 | fcr = inb(info->ioaddr + UART_FCR); | |
1065 | outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
1066 | info->ioaddr + UART_FCR); | |
1067 | outb(fcr, info->ioaddr + UART_FCR); | |
1068 | ||
1069 | spin_unlock_irqrestore(&info->slock, flags); | |
1070 | ||
1071 | tty_wakeup(tty); | |
1072 | } | |
1073 | ||
1074 | ||
1e2b0254 | 1075 | static void mxser_close_port(struct tty_struct *tty, struct tty_port *port) |
1da177e4 | 1076 | { |
1e2b0254 | 1077 | struct mxser_port *info = container_of(port, struct mxser_port, port); |
1da177e4 | 1078 | unsigned long timeout; |
1da177e4 LT |
1079 | /* |
1080 | * Save the termios structure, since this port may have | |
1081 | * separate termios for callout and dialin. | |
a6614999 AC |
1082 | * |
1083 | * FIXME: Can this go ? | |
1da177e4 | 1084 | */ |
1e2b0254 | 1085 | if (port->flags & ASYNC_NORMAL_ACTIVE) |
1da177e4 | 1086 | info->normal_termios = *tty->termios; |
1da177e4 LT |
1087 | /* |
1088 | * At this point we stop accepting input. To do this, we | |
1089 | * disable the receive line status interrupts, and tell the | |
1090 | * interrupt driver to stop checking the data ready bit in the | |
1091 | * line status register. | |
1092 | */ | |
1093 | info->IER &= ~UART_IER_RLSI; | |
1c45607a | 1094 | if (info->board->chip_flag) |
1da177e4 | 1095 | info->IER &= ~MOXA_MUST_RECV_ISR; |
1c45607a | 1096 | |
1e2b0254 | 1097 | if (port->flags & ASYNC_INITIALIZED) { |
1c45607a | 1098 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1099 | /* |
1100 | * Before we drop DTR, make sure the UART transmitter | |
1101 | * has completely drained; this is especially | |
1102 | * important if there is a transmit FIFO! | |
1103 | */ | |
1104 | timeout = jiffies + HZ; | |
1c45607a | 1105 | while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { |
da4cd8df | 1106 | schedule_timeout_interruptible(5); |
1da177e4 LT |
1107 | if (time_after(jiffies, timeout)) |
1108 | break; | |
1109 | } | |
1110 | } | |
216ba023 | 1111 | mxser_shutdown(tty); |
1da177e4 | 1112 | |
1e2b0254 AC |
1113 | } |
1114 | ||
1115 | /* | |
1116 | * This routine is called when the serial port gets closed. First, we | |
1117 | * wait for the last remaining data to be sent. Then, we unlink its | |
1118 | * async structure from the interrupt chain if necessary, and we free | |
1119 | * that IRQ if nothing is left in the chain. | |
1120 | */ | |
1121 | static void mxser_close(struct tty_struct *tty, struct file *filp) | |
1122 | { | |
1123 | struct mxser_port *info = tty->driver_data; | |
1124 | struct tty_port *port = &info->port; | |
1125 | ||
1126 | if (tty->index == MXSER_PORTS) | |
1127 | return; | |
1128 | if (tty_port_close_start(port, tty, filp) == 0) | |
1129 | return; | |
1130 | mxser_close_port(tty, port); | |
1131 | mxser_flush_buffer(tty); | |
a6614999 AC |
1132 | /* Right now the tty_port set is done outside of the close_end helper |
1133 | as we don't yet have everyone using refcounts */ | |
1134 | tty_port_close_end(port, tty); | |
1135 | tty_port_tty_set(port, NULL); | |
1da177e4 LT |
1136 | } |
1137 | ||
1138 | static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
1139 | { | |
1140 | int c, total = 0; | |
1c45607a | 1141 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1142 | unsigned long flags; |
1143 | ||
0ad9e7d1 | 1144 | if (!info->port.xmit_buf) |
8ea2c2ec | 1145 | return 0; |
1da177e4 LT |
1146 | |
1147 | while (1) { | |
8ea2c2ec JJ |
1148 | c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, |
1149 | SERIAL_XMIT_SIZE - info->xmit_head)); | |
1da177e4 LT |
1150 | if (c <= 0) |
1151 | break; | |
1152 | ||
0ad9e7d1 | 1153 | memcpy(info->port.xmit_buf + info->xmit_head, buf, c); |
1da177e4 | 1154 | spin_lock_irqsave(&info->slock, flags); |
8ea2c2ec JJ |
1155 | info->xmit_head = (info->xmit_head + c) & |
1156 | (SERIAL_XMIT_SIZE - 1); | |
1da177e4 LT |
1157 | info->xmit_cnt += c; |
1158 | spin_unlock_irqrestore(&info->slock, flags); | |
1159 | ||
1160 | buf += c; | |
1161 | count -= c; | |
1162 | total += c; | |
1da177e4 LT |
1163 | } |
1164 | ||
1c45607a | 1165 | if (info->xmit_cnt && !tty->stopped) { |
8ea2c2ec JJ |
1166 | if (!tty->hw_stopped || |
1167 | (info->type == PORT_16550A) || | |
1c45607a | 1168 | (info->board->chip_flag)) { |
1da177e4 | 1169 | spin_lock_irqsave(&info->slock, flags); |
1c45607a JS |
1170 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + |
1171 | UART_IER); | |
1da177e4 | 1172 | info->IER |= UART_IER_THRI; |
1c45607a | 1173 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1174 | spin_unlock_irqrestore(&info->slock, flags); |
1175 | } | |
1176 | } | |
1177 | return total; | |
1178 | } | |
1179 | ||
0be2eade | 1180 | static int mxser_put_char(struct tty_struct *tty, unsigned char ch) |
1da177e4 | 1181 | { |
1c45607a | 1182 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1183 | unsigned long flags; |
1184 | ||
0ad9e7d1 | 1185 | if (!info->port.xmit_buf) |
0be2eade | 1186 | return 0; |
1da177e4 LT |
1187 | |
1188 | if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) | |
0be2eade | 1189 | return 0; |
1da177e4 LT |
1190 | |
1191 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1192 | info->port.xmit_buf[info->xmit_head++] = ch; |
1da177e4 LT |
1193 | info->xmit_head &= SERIAL_XMIT_SIZE - 1; |
1194 | info->xmit_cnt++; | |
1195 | spin_unlock_irqrestore(&info->slock, flags); | |
1c45607a | 1196 | if (!tty->stopped) { |
8ea2c2ec JJ |
1197 | if (!tty->hw_stopped || |
1198 | (info->type == PORT_16550A) || | |
1c45607a | 1199 | info->board->chip_flag) { |
1da177e4 | 1200 | spin_lock_irqsave(&info->slock, flags); |
1c45607a | 1201 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1202 | info->IER |= UART_IER_THRI; |
1c45607a | 1203 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1204 | spin_unlock_irqrestore(&info->slock, flags); |
1205 | } | |
1206 | } | |
0be2eade | 1207 | return 1; |
1da177e4 LT |
1208 | } |
1209 | ||
1210 | ||
1211 | static void mxser_flush_chars(struct tty_struct *tty) | |
1212 | { | |
1c45607a | 1213 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1214 | unsigned long flags; |
1215 | ||
ace7dd96 JS |
1216 | if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || |
1217 | (tty->hw_stopped && info->type != PORT_16550A && | |
1218 | !info->board->chip_flag)) | |
1da177e4 LT |
1219 | return; |
1220 | ||
1221 | spin_lock_irqsave(&info->slock, flags); | |
1222 | ||
1c45607a | 1223 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1224 | info->IER |= UART_IER_THRI; |
1c45607a | 1225 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1226 | |
1227 | spin_unlock_irqrestore(&info->slock, flags); | |
1228 | } | |
1229 | ||
1230 | static int mxser_write_room(struct tty_struct *tty) | |
1231 | { | |
1c45607a | 1232 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1233 | int ret; |
1234 | ||
1235 | ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; | |
ace7dd96 | 1236 | return ret < 0 ? 0 : ret; |
1da177e4 LT |
1237 | } |
1238 | ||
1239 | static int mxser_chars_in_buffer(struct tty_struct *tty) | |
1240 | { | |
1c45607a | 1241 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1242 | return info->xmit_cnt; |
1243 | } | |
1244 | ||
1c45607a JS |
1245 | /* |
1246 | * ------------------------------------------------------------ | |
1247 | * friends of mxser_ioctl() | |
1248 | * ------------------------------------------------------------ | |
1249 | */ | |
216ba023 | 1250 | static int mxser_get_serial_info(struct tty_struct *tty, |
1c45607a JS |
1251 | struct serial_struct __user *retinfo) |
1252 | { | |
216ba023 | 1253 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
1254 | struct serial_struct tmp = { |
1255 | .type = info->type, | |
216ba023 | 1256 | .line = tty->index, |
1c45607a JS |
1257 | .port = info->ioaddr, |
1258 | .irq = info->board->irq, | |
0ad9e7d1 | 1259 | .flags = info->port.flags, |
1c45607a | 1260 | .baud_base = info->baud_base, |
44b7d1b3 AC |
1261 | .close_delay = info->port.close_delay, |
1262 | .closing_wait = info->port.closing_wait, | |
1c45607a JS |
1263 | .custom_divisor = info->custom_divisor, |
1264 | .hub6 = 0 | |
1265 | }; | |
1266 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) | |
1267 | return -EFAULT; | |
1268 | return 0; | |
1269 | } | |
1270 | ||
216ba023 | 1271 | static int mxser_set_serial_info(struct tty_struct *tty, |
1c45607a | 1272 | struct serial_struct __user *new_info) |
1da177e4 | 1273 | { |
216ba023 | 1274 | struct mxser_port *info = tty->driver_data; |
1c45607a | 1275 | struct serial_struct new_serial; |
80ff8a80 | 1276 | speed_t baud; |
1c45607a JS |
1277 | unsigned long sl_flags; |
1278 | unsigned int flags; | |
1279 | int retval = 0; | |
1da177e4 | 1280 | |
1c45607a | 1281 | if (!new_info || !info->ioaddr) |
80ff8a80 | 1282 | return -ENODEV; |
1c45607a JS |
1283 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) |
1284 | return -EFAULT; | |
1da177e4 | 1285 | |
80ff8a80 JS |
1286 | if (new_serial.irq != info->board->irq || |
1287 | new_serial.port != info->ioaddr) | |
1288 | return -EINVAL; | |
1da177e4 | 1289 | |
0ad9e7d1 | 1290 | flags = info->port.flags & ASYNC_SPD_MASK; |
1da177e4 | 1291 | |
1c45607a JS |
1292 | if (!capable(CAP_SYS_ADMIN)) { |
1293 | if ((new_serial.baud_base != info->baud_base) || | |
44b7d1b3 | 1294 | (new_serial.close_delay != info->port.close_delay) || |
0ad9e7d1 | 1295 | ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) |
1c45607a | 1296 | return -EPERM; |
0ad9e7d1 | 1297 | info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | |
1c45607a JS |
1298 | (new_serial.flags & ASYNC_USR_MASK)); |
1299 | } else { | |
1da177e4 | 1300 | /* |
1c45607a JS |
1301 | * OK, past this point, all the error checking has been done. |
1302 | * At this point, we start making changes..... | |
1da177e4 | 1303 | */ |
0ad9e7d1 | 1304 | info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) | |
1c45607a | 1305 | (new_serial.flags & ASYNC_FLAGS)); |
44b7d1b3 AC |
1306 | info->port.close_delay = new_serial.close_delay * HZ / 100; |
1307 | info->port.closing_wait = new_serial.closing_wait * HZ / 100; | |
216ba023 AC |
1308 | tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY) |
1309 | ? 1 : 0; | |
0ad9e7d1 | 1310 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && |
80ff8a80 JS |
1311 | (new_serial.baud_base != info->baud_base || |
1312 | new_serial.custom_divisor != | |
1313 | info->custom_divisor)) { | |
1314 | baud = new_serial.baud_base / new_serial.custom_divisor; | |
216ba023 | 1315 | tty_encode_baud_rate(tty, baud, baud); |
80ff8a80 | 1316 | } |
1c45607a | 1317 | } |
fc83815c | 1318 | |
1c45607a | 1319 | info->type = new_serial.type; |
1da177e4 | 1320 | |
1c45607a JS |
1321 | process_txrx_fifo(info); |
1322 | ||
0ad9e7d1 AC |
1323 | if (info->port.flags & ASYNC_INITIALIZED) { |
1324 | if (flags != (info->port.flags & ASYNC_SPD_MASK)) { | |
1c45607a | 1325 | spin_lock_irqsave(&info->slock, sl_flags); |
216ba023 | 1326 | mxser_change_speed(tty, NULL); |
1c45607a | 1327 | spin_unlock_irqrestore(&info->slock, sl_flags); |
1da177e4 | 1328 | } |
1c45607a | 1329 | } else |
216ba023 | 1330 | retval = mxser_startup(tty); |
1da177e4 | 1331 | |
1c45607a JS |
1332 | return retval; |
1333 | } | |
1da177e4 | 1334 | |
1c45607a JS |
1335 | /* |
1336 | * mxser_get_lsr_info - get line status register info | |
1337 | * | |
1338 | * Purpose: Let user call ioctl() to get info when the UART physically | |
1339 | * is emptied. On bus types like RS485, the transmitter must | |
1340 | * release the bus after transmitting. This must be done when | |
1341 | * the transmit shift register is empty, not be done when the | |
1342 | * transmit holding register is empty. This functionality | |
1343 | * allows an RS485 driver to be written in user space. | |
1344 | */ | |
1345 | static int mxser_get_lsr_info(struct mxser_port *info, | |
1346 | unsigned int __user *value) | |
1347 | { | |
1348 | unsigned char status; | |
1349 | unsigned int result; | |
1350 | unsigned long flags; | |
1da177e4 | 1351 | |
1c45607a JS |
1352 | spin_lock_irqsave(&info->slock, flags); |
1353 | status = inb(info->ioaddr + UART_LSR); | |
1354 | spin_unlock_irqrestore(&info->slock, flags); | |
1355 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | |
1356 | return put_user(result, value); | |
1357 | } | |
1da177e4 | 1358 | |
1c45607a JS |
1359 | static int mxser_tiocmget(struct tty_struct *tty, struct file *file) |
1360 | { | |
1361 | struct mxser_port *info = tty->driver_data; | |
1362 | unsigned char control, status; | |
1363 | unsigned long flags; | |
1da177e4 | 1364 | |
8ea2c2ec | 1365 | |
1c45607a JS |
1366 | if (tty->index == MXSER_PORTS) |
1367 | return -ENOIOCTLCMD; | |
1368 | if (test_bit(TTY_IO_ERROR, &tty->flags)) | |
1369 | return -EIO; | |
1da177e4 | 1370 | |
1c45607a | 1371 | control = info->MCR; |
1da177e4 | 1372 | |
1c45607a JS |
1373 | spin_lock_irqsave(&info->slock, flags); |
1374 | status = inb(info->ioaddr + UART_MSR); | |
1375 | if (status & UART_MSR_ANY_DELTA) | |
216ba023 | 1376 | mxser_check_modem_status(tty, info, status); |
1c45607a JS |
1377 | spin_unlock_irqrestore(&info->slock, flags); |
1378 | return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | | |
1379 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | | |
1380 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | | |
1381 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | | |
1382 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | | |
1383 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | |
1384 | } | |
1da177e4 | 1385 | |
1c45607a JS |
1386 | static int mxser_tiocmset(struct tty_struct *tty, struct file *file, |
1387 | unsigned int set, unsigned int clear) | |
1388 | { | |
1389 | struct mxser_port *info = tty->driver_data; | |
1390 | unsigned long flags; | |
1da177e4 | 1391 | |
1da177e4 | 1392 | |
1c45607a JS |
1393 | if (tty->index == MXSER_PORTS) |
1394 | return -ENOIOCTLCMD; | |
1395 | if (test_bit(TTY_IO_ERROR, &tty->flags)) | |
1396 | return -EIO; | |
1da177e4 | 1397 | |
1c45607a | 1398 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 1399 | |
1c45607a JS |
1400 | if (set & TIOCM_RTS) |
1401 | info->MCR |= UART_MCR_RTS; | |
1402 | if (set & TIOCM_DTR) | |
1403 | info->MCR |= UART_MCR_DTR; | |
1da177e4 | 1404 | |
1c45607a JS |
1405 | if (clear & TIOCM_RTS) |
1406 | info->MCR &= ~UART_MCR_RTS; | |
1407 | if (clear & TIOCM_DTR) | |
1408 | info->MCR &= ~UART_MCR_DTR; | |
8ea2c2ec | 1409 | |
1c45607a JS |
1410 | outb(info->MCR, info->ioaddr + UART_MCR); |
1411 | spin_unlock_irqrestore(&info->slock, flags); | |
1412 | return 0; | |
1413 | } | |
1da177e4 | 1414 | |
1c45607a JS |
1415 | static int __init mxser_program_mode(int port) |
1416 | { | |
1417 | int id, i, j, n; | |
1418 | ||
1419 | outb(0, port); | |
1420 | outb(0, port); | |
1421 | outb(0, port); | |
1422 | (void)inb(port); | |
1423 | (void)inb(port); | |
1424 | outb(0, port); | |
1425 | (void)inb(port); | |
1426 | ||
1427 | id = inb(port + 1) & 0x1F; | |
1428 | if ((id != C168_ASIC_ID) && | |
1429 | (id != C104_ASIC_ID) && | |
1430 | (id != C102_ASIC_ID) && | |
1431 | (id != CI132_ASIC_ID) && | |
1432 | (id != CI134_ASIC_ID) && | |
1433 | (id != CI104J_ASIC_ID)) | |
1434 | return -1; | |
1435 | for (i = 0, j = 0; i < 4; i++) { | |
1436 | n = inb(port + 2); | |
1437 | if (n == 'M') { | |
1438 | j = 1; | |
1439 | } else if ((j == 1) && (n == 1)) { | |
1440 | j = 2; | |
1441 | break; | |
1442 | } else | |
1443 | j = 0; | |
1da177e4 | 1444 | } |
1c45607a JS |
1445 | if (j != 2) |
1446 | id = -2; | |
1447 | return id; | |
1da177e4 LT |
1448 | } |
1449 | ||
1c45607a JS |
1450 | static void __init mxser_normal_mode(int port) |
1451 | { | |
1452 | int i, n; | |
1453 | ||
1454 | outb(0xA5, port + 1); | |
1455 | outb(0x80, port + 3); | |
1456 | outb(12, port + 0); /* 9600 bps */ | |
1457 | outb(0, port + 1); | |
1458 | outb(0x03, port + 3); /* 8 data bits */ | |
1459 | outb(0x13, port + 4); /* loop back mode */ | |
1460 | for (i = 0; i < 16; i++) { | |
1461 | n = inb(port + 5); | |
1462 | if ((n & 0x61) == 0x60) | |
1463 | break; | |
1464 | if ((n & 1) == 1) | |
1465 | (void)inb(port); | |
1466 | } | |
1467 | outb(0x00, port + 4); | |
1468 | } | |
1469 | ||
1470 | #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ | |
1471 | #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ | |
1472 | #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ | |
1473 | #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ | |
1474 | #define EN_CCMD 0x000 /* Chip's command register */ | |
1475 | #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ | |
1476 | #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ | |
1477 | #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ | |
1478 | #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ | |
1479 | #define EN0_DCFG 0x00E /* Data configuration reg WR */ | |
1480 | #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ | |
1481 | #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ | |
1482 | #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ | |
1483 | static int __init mxser_read_register(int port, unsigned short *regs) | |
1484 | { | |
1485 | int i, k, value, id; | |
1486 | unsigned int j; | |
1487 | ||
1488 | id = mxser_program_mode(port); | |
1489 | if (id < 0) | |
1490 | return id; | |
1491 | for (i = 0; i < 14; i++) { | |
1492 | k = (i & 0x3F) | 0x180; | |
1493 | for (j = 0x100; j > 0; j >>= 1) { | |
1494 | outb(CHIP_CS, port); | |
1495 | if (k & j) { | |
1496 | outb(CHIP_CS | CHIP_DO, port); | |
1497 | outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ | |
1498 | } else { | |
1499 | outb(CHIP_CS, port); | |
1500 | outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ | |
1501 | } | |
1502 | } | |
1503 | (void)inb(port); | |
1504 | value = 0; | |
1505 | for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { | |
1506 | outb(CHIP_CS, port); | |
1507 | outb(CHIP_CS | CHIP_SK, port); | |
1508 | if (inb(port) & CHIP_DI) | |
1509 | value |= j; | |
1510 | } | |
1511 | regs[i] = value; | |
1512 | outb(0, port); | |
1513 | } | |
1514 | mxser_normal_mode(port); | |
1515 | return id; | |
1516 | } | |
1da177e4 LT |
1517 | |
1518 | static int mxser_ioctl_special(unsigned int cmd, void __user *argp) | |
1519 | { | |
1c45607a | 1520 | struct mxser_port *port; |
216ba023 | 1521 | struct tty_struct *tty; |
1c45607a JS |
1522 | int result, status; |
1523 | unsigned int i, j; | |
9d6d162d | 1524 | int ret = 0; |
1da177e4 LT |
1525 | |
1526 | switch (cmd) { | |
1da177e4 | 1527 | case MOXA_GET_MAJOR: |
8f3d137e JS |
1528 | if (printk_ratelimit()) |
1529 | printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl " | |
1530 | "%x (GET_MAJOR), fix your userspace\n", | |
1531 | current->comm, cmd); | |
1c45607a | 1532 | return put_user(ttymajor, (int __user *)argp); |
1da177e4 LT |
1533 | |
1534 | case MOXA_CHKPORTENABLE: | |
1535 | result = 0; | |
9d6d162d | 1536 | lock_kernel(); |
1c45607a JS |
1537 | for (i = 0; i < MXSER_BOARDS; i++) |
1538 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) | |
1539 | if (mxser_boards[i].ports[j].ioaddr) | |
1540 | result |= (1 << i); | |
9d6d162d | 1541 | unlock_kernel(); |
8ea2c2ec | 1542 | return put_user(result, (unsigned long __user *)argp); |
1da177e4 | 1543 | case MOXA_GETDATACOUNT: |
9d6d162d | 1544 | lock_kernel(); |
1da177e4 | 1545 | if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) |
9d6d162d AC |
1546 | ret = -EFAULT; |
1547 | unlock_kernel(); | |
1548 | return ret; | |
72800df9 JS |
1549 | case MOXA_GETMSTATUS: { |
1550 | struct mxser_mstatus ms, __user *msu = argp; | |
9d6d162d | 1551 | lock_kernel(); |
1c45607a JS |
1552 | for (i = 0; i < MXSER_BOARDS; i++) |
1553 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
1554 | port = &mxser_boards[i].ports[j]; | |
72800df9 | 1555 | memset(&ms, 0, sizeof(ms)); |
1c45607a | 1556 | |
72800df9 JS |
1557 | if (!port->ioaddr) |
1558 | goto copy; | |
216ba023 AC |
1559 | |
1560 | tty = tty_port_tty_get(&port->port); | |
1da177e4 | 1561 | |
216ba023 | 1562 | if (!tty || !tty->termios) |
72800df9 | 1563 | ms.cflag = port->normal_termios.c_cflag; |
1c45607a | 1564 | else |
216ba023 AC |
1565 | ms.cflag = tty->termios->c_cflag; |
1566 | tty_kref_put(tty); | |
1c45607a | 1567 | status = inb(port->ioaddr + UART_MSR); |
72800df9 JS |
1568 | if (status & UART_MSR_DCD) |
1569 | ms.dcd = 1; | |
1570 | if (status & UART_MSR_DSR) | |
1571 | ms.dsr = 1; | |
1572 | if (status & UART_MSR_CTS) | |
1573 | ms.cts = 1; | |
1574 | copy: | |
1575 | if (copy_to_user(msu, &ms, sizeof(ms))) { | |
1576 | unlock_kernel(); | |
1577 | return -EFAULT; | |
1578 | } | |
1579 | msu++; | |
1c45607a | 1580 | } |
9d6d162d | 1581 | unlock_kernel(); |
1da177e4 | 1582 | return 0; |
72800df9 | 1583 | } |
8ea2c2ec | 1584 | case MOXA_ASPP_MON_EXT: { |
72800df9 JS |
1585 | struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ |
1586 | unsigned int cflag, iflag, p; | |
1587 | u8 opmode; | |
1588 | ||
1589 | me = kzalloc(sizeof(*me), GFP_KERNEL); | |
1590 | if (!me) | |
1591 | return -ENOMEM; | |
1c45607a | 1592 | |
9d6d162d | 1593 | lock_kernel(); |
72800df9 JS |
1594 | for (i = 0, p = 0; i < MXSER_BOARDS; i++) { |
1595 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { | |
1596 | if (p >= ARRAY_SIZE(me->rx_cnt)) { | |
1597 | i = MXSER_BOARDS; | |
1598 | break; | |
1599 | } | |
1c45607a JS |
1600 | port = &mxser_boards[i].ports[j]; |
1601 | if (!port->ioaddr) | |
1da177e4 LT |
1602 | continue; |
1603 | ||
72800df9 | 1604 | status = mxser_get_msr(port->ioaddr, 0, p); |
1c45607a | 1605 | |
1da177e4 | 1606 | if (status & UART_MSR_TERI) |
1c45607a | 1607 | port->icount.rng++; |
1da177e4 | 1608 | if (status & UART_MSR_DDSR) |
1c45607a | 1609 | port->icount.dsr++; |
1da177e4 | 1610 | if (status & UART_MSR_DDCD) |
1c45607a | 1611 | port->icount.dcd++; |
1da177e4 | 1612 | if (status & UART_MSR_DCTS) |
1c45607a JS |
1613 | port->icount.cts++; |
1614 | ||
1615 | port->mon_data.modem_status = status; | |
72800df9 JS |
1616 | me->rx_cnt[p] = port->mon_data.rxcnt; |
1617 | me->tx_cnt[p] = port->mon_data.txcnt; | |
1618 | me->up_rxcnt[p] = port->mon_data.up_rxcnt; | |
1619 | me->up_txcnt[p] = port->mon_data.up_txcnt; | |
1620 | me->modem_status[p] = | |
1c45607a | 1621 | port->mon_data.modem_status; |
216ba023 | 1622 | tty = tty_port_tty_get(&port->port); |
1c45607a | 1623 | |
216ba023 | 1624 | if (!tty || !tty->termios) { |
1c45607a JS |
1625 | cflag = port->normal_termios.c_cflag; |
1626 | iflag = port->normal_termios.c_iflag; | |
216ba023 | 1627 | me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios); |
1da177e4 | 1628 | } else { |
216ba023 AC |
1629 | cflag = tty->termios->c_cflag; |
1630 | iflag = tty->termios->c_iflag; | |
1631 | me->baudrate[p] = tty_get_baud_rate(tty); | |
1da177e4 | 1632 | } |
216ba023 | 1633 | tty_kref_put(tty); |
1da177e4 | 1634 | |
72800df9 JS |
1635 | me->databits[p] = cflag & CSIZE; |
1636 | me->stopbits[p] = cflag & CSTOPB; | |
1637 | me->parity[p] = cflag & (PARENB | PARODD | | |
1638 | CMSPAR); | |
1da177e4 LT |
1639 | |
1640 | if (cflag & CRTSCTS) | |
72800df9 | 1641 | me->flowctrl[p] |= 0x03; |
1da177e4 LT |
1642 | |
1643 | if (iflag & (IXON | IXOFF)) | |
72800df9 | 1644 | me->flowctrl[p] |= 0x0C; |
1da177e4 | 1645 | |
1c45607a | 1646 | if (port->type == PORT_16550A) |
72800df9 | 1647 | me->fifo[p] = 1; |
1da177e4 | 1648 | |
72800df9 JS |
1649 | opmode = inb(port->opmode_ioaddr) >> |
1650 | ((p % 4) * 2); | |
1da177e4 | 1651 | opmode &= OP_MODE_MASK; |
72800df9 | 1652 | me->iftype[p] = opmode; |
1da177e4 | 1653 | } |
9d6d162d AC |
1654 | } |
1655 | unlock_kernel(); | |
72800df9 JS |
1656 | if (copy_to_user(argp, me, sizeof(*me))) |
1657 | ret = -EFAULT; | |
1658 | kfree(me); | |
1659 | return ret; | |
9d6d162d AC |
1660 | } |
1661 | default: | |
1da177e4 LT |
1662 | return -ENOIOCTLCMD; |
1663 | } | |
1664 | return 0; | |
1665 | } | |
1666 | ||
1c45607a JS |
1667 | static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, |
1668 | struct async_icount *cprev) | |
1da177e4 | 1669 | { |
1c45607a JS |
1670 | struct async_icount cnow; |
1671 | unsigned long flags; | |
1672 | int ret; | |
1da177e4 | 1673 | |
1c45607a JS |
1674 | spin_lock_irqsave(&info->slock, flags); |
1675 | cnow = info->icount; /* atomic copy */ | |
1676 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 1677 | |
1c45607a JS |
1678 | ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || |
1679 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || | |
1680 | ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || | |
1681 | ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); | |
1da177e4 | 1682 | |
1c45607a JS |
1683 | *cprev = cnow; |
1684 | ||
1685 | return ret; | |
1686 | } | |
1687 | ||
1688 | static int mxser_ioctl(struct tty_struct *tty, struct file *file, | |
1689 | unsigned int cmd, unsigned long arg) | |
1da177e4 | 1690 | { |
1c45607a JS |
1691 | struct mxser_port *info = tty->driver_data; |
1692 | struct async_icount cnow; | |
1c45607a JS |
1693 | unsigned long flags; |
1694 | void __user *argp = (void __user *)arg; | |
1695 | int retval; | |
1da177e4 | 1696 | |
1c45607a JS |
1697 | if (tty->index == MXSER_PORTS) |
1698 | return mxser_ioctl_special(cmd, argp); | |
1da177e4 | 1699 | |
1c45607a JS |
1700 | if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { |
1701 | int p; | |
1702 | unsigned long opmode; | |
1703 | static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; | |
1704 | int shiftbit; | |
1705 | unsigned char val, mask; | |
1da177e4 | 1706 | |
1c45607a JS |
1707 | p = tty->index % 4; |
1708 | if (cmd == MOXA_SET_OP_MODE) { | |
1709 | if (get_user(opmode, (int __user *) argp)) | |
1710 | return -EFAULT; | |
1711 | if (opmode != RS232_MODE && | |
1712 | opmode != RS485_2WIRE_MODE && | |
1713 | opmode != RS422_MODE && | |
1714 | opmode != RS485_4WIRE_MODE) | |
1715 | return -EFAULT; | |
9d6d162d | 1716 | lock_kernel(); |
1c45607a JS |
1717 | mask = ModeMask[p]; |
1718 | shiftbit = p * 2; | |
1719 | val = inb(info->opmode_ioaddr); | |
1720 | val &= mask; | |
1721 | val |= (opmode << shiftbit); | |
1722 | outb(val, info->opmode_ioaddr); | |
9d6d162d | 1723 | unlock_kernel(); |
1c45607a | 1724 | } else { |
9d6d162d | 1725 | lock_kernel(); |
1c45607a JS |
1726 | shiftbit = p * 2; |
1727 | opmode = inb(info->opmode_ioaddr) >> shiftbit; | |
1728 | opmode &= OP_MODE_MASK; | |
9d6d162d | 1729 | unlock_kernel(); |
1c45607a JS |
1730 | if (put_user(opmode, (int __user *)argp)) |
1731 | return -EFAULT; | |
1732 | } | |
1733 | return 0; | |
1734 | } | |
1735 | ||
1736 | if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT && | |
1737 | test_bit(TTY_IO_ERROR, &tty->flags)) | |
1738 | return -EIO; | |
1739 | ||
1740 | switch (cmd) { | |
1c45607a | 1741 | case TIOCGSERIAL: |
9d6d162d | 1742 | lock_kernel(); |
216ba023 | 1743 | retval = mxser_get_serial_info(tty, argp); |
9d6d162d AC |
1744 | unlock_kernel(); |
1745 | return retval; | |
1c45607a | 1746 | case TIOCSSERIAL: |
9d6d162d | 1747 | lock_kernel(); |
216ba023 | 1748 | retval = mxser_set_serial_info(tty, argp); |
9d6d162d AC |
1749 | unlock_kernel(); |
1750 | return retval; | |
1c45607a | 1751 | case TIOCSERGETLSR: /* Get line status register */ |
9d6d162d | 1752 | return mxser_get_lsr_info(info, argp); |
1c45607a JS |
1753 | /* |
1754 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | |
1755 | * - mask passed in arg for lines of interest | |
1756 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | |
1757 | * Caller should use TIOCGICOUNT to see which one it was | |
1758 | */ | |
1759 | case TIOCMIWAIT: | |
1760 | spin_lock_irqsave(&info->slock, flags); | |
1761 | cnow = info->icount; /* note the counters on entry */ | |
1762 | spin_unlock_irqrestore(&info->slock, flags); | |
1763 | ||
bdc04e31 | 1764 | return wait_event_interruptible(info->port.delta_msr_wait, |
1c45607a JS |
1765 | mxser_cflags_changed(info, arg, &cnow)); |
1766 | /* | |
1767 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | |
1768 | * Return: write counters to the user passed counter struct | |
1769 | * NB: both 1->0 and 0->1 transitions are counted except for | |
1770 | * RI where only 0->1 is counted. | |
1771 | */ | |
41aee9a1 JS |
1772 | case TIOCGICOUNT: { |
1773 | struct serial_icounter_struct icnt = { 0 }; | |
1c45607a JS |
1774 | spin_lock_irqsave(&info->slock, flags); |
1775 | cnow = info->icount; | |
1776 | spin_unlock_irqrestore(&info->slock, flags); | |
41aee9a1 JS |
1777 | |
1778 | icnt.frame = cnow.frame; | |
1779 | icnt.brk = cnow.brk; | |
1780 | icnt.overrun = cnow.overrun; | |
1781 | icnt.buf_overrun = cnow.buf_overrun; | |
1782 | icnt.parity = cnow.parity; | |
1783 | icnt.rx = cnow.rx; | |
1784 | icnt.tx = cnow.tx; | |
1785 | icnt.cts = cnow.cts; | |
1786 | icnt.dsr = cnow.dsr; | |
1787 | icnt.rng = cnow.rng; | |
1788 | icnt.dcd = cnow.dcd; | |
1789 | ||
1790 | return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0; | |
1791 | } | |
1c45607a JS |
1792 | case MOXA_HighSpeedOn: |
1793 | return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); | |
1794 | case MOXA_SDS_RSTICOUNTER: | |
9d6d162d | 1795 | lock_kernel(); |
1c45607a JS |
1796 | info->mon_data.rxcnt = 0; |
1797 | info->mon_data.txcnt = 0; | |
9d6d162d | 1798 | unlock_kernel(); |
1c45607a JS |
1799 | return 0; |
1800 | ||
1801 | case MOXA_ASPP_OQUEUE:{ | |
1802 | int len, lsr; | |
1803 | ||
9d6d162d | 1804 | lock_kernel(); |
1c45607a | 1805 | len = mxser_chars_in_buffer(tty); |
1c45607a | 1806 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT; |
1c45607a | 1807 | len += (lsr ? 0 : 1); |
9d6d162d | 1808 | unlock_kernel(); |
1c45607a JS |
1809 | |
1810 | return put_user(len, (int __user *)argp); | |
1811 | } | |
1812 | case MOXA_ASPP_MON: { | |
1813 | int mcr, status; | |
1814 | ||
9d6d162d | 1815 | lock_kernel(); |
1c45607a | 1816 | status = mxser_get_msr(info->ioaddr, 1, tty->index); |
216ba023 | 1817 | mxser_check_modem_status(tty, info, status); |
1c45607a JS |
1818 | |
1819 | mcr = inb(info->ioaddr + UART_MCR); | |
1820 | if (mcr & MOXA_MUST_MCR_XON_FLAG) | |
1821 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; | |
1822 | else | |
1823 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; | |
1824 | ||
1825 | if (mcr & MOXA_MUST_MCR_TX_XON) | |
1826 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; | |
1827 | else | |
1828 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; | |
1829 | ||
216ba023 | 1830 | if (tty->hw_stopped) |
1c45607a JS |
1831 | info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; |
1832 | else | |
1833 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; | |
9d6d162d | 1834 | unlock_kernel(); |
1c45607a JS |
1835 | if (copy_to_user(argp, &info->mon_data, |
1836 | sizeof(struct mxser_mon))) | |
1837 | return -EFAULT; | |
1838 | ||
1839 | return 0; | |
1840 | } | |
1841 | case MOXA_ASPP_LSTATUS: { | |
1842 | if (put_user(info->err_shadow, (unsigned char __user *)argp)) | |
1843 | return -EFAULT; | |
1844 | ||
1845 | info->err_shadow = 0; | |
1846 | return 0; | |
1847 | } | |
1848 | case MOXA_SET_BAUD_METHOD: { | |
1849 | int method; | |
1850 | ||
1851 | if (get_user(method, (int __user *)argp)) | |
1852 | return -EFAULT; | |
1853 | mxser_set_baud_method[tty->index] = method; | |
1854 | return put_user(method, (int __user *)argp); | |
1855 | } | |
1856 | default: | |
1857 | return -ENOIOCTLCMD; | |
1858 | } | |
1859 | return 0; | |
1860 | } | |
1861 | ||
1862 | static void mxser_stoprx(struct tty_struct *tty) | |
1863 | { | |
1864 | struct mxser_port *info = tty->driver_data; | |
1865 | ||
1866 | info->ldisc_stop_rx = 1; | |
1867 | if (I_IXOFF(tty)) { | |
1868 | if (info->board->chip_flag) { | |
1869 | info->IER &= ~MOXA_MUST_RECV_ISR; | |
1870 | outb(info->IER, info->ioaddr + UART_IER); | |
1871 | } else { | |
1872 | info->x_char = STOP_CHAR(tty); | |
1873 | outb(0, info->ioaddr + UART_IER); | |
1874 | info->IER |= UART_IER_THRI; | |
1875 | outb(info->IER, info->ioaddr + UART_IER); | |
1da177e4 LT |
1876 | } |
1877 | } | |
1878 | ||
216ba023 | 1879 | if (tty->termios->c_cflag & CRTSCTS) { |
1c45607a JS |
1880 | info->MCR &= ~UART_MCR_RTS; |
1881 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
1882 | } |
1883 | } | |
1884 | ||
1885 | /* | |
1886 | * This routine is called by the upper-layer tty layer to signal that | |
1887 | * incoming characters should be throttled. | |
1888 | */ | |
1889 | static void mxser_throttle(struct tty_struct *tty) | |
1890 | { | |
1da177e4 | 1891 | mxser_stoprx(tty); |
1da177e4 LT |
1892 | } |
1893 | ||
1894 | static void mxser_unthrottle(struct tty_struct *tty) | |
1895 | { | |
1c45607a | 1896 | struct mxser_port *info = tty->driver_data; |
1da177e4 | 1897 | |
1c45607a JS |
1898 | /* startrx */ |
1899 | info->ldisc_stop_rx = 0; | |
1900 | if (I_IXOFF(tty)) { | |
1901 | if (info->x_char) | |
1902 | info->x_char = 0; | |
1903 | else { | |
1904 | if (info->board->chip_flag) { | |
1905 | info->IER |= MOXA_MUST_RECV_ISR; | |
1906 | outb(info->IER, info->ioaddr + UART_IER); | |
1907 | } else { | |
1908 | info->x_char = START_CHAR(tty); | |
1909 | outb(0, info->ioaddr + UART_IER); | |
1910 | info->IER |= UART_IER_THRI; | |
1911 | outb(info->IER, info->ioaddr + UART_IER); | |
1912 | } | |
1da177e4 | 1913 | } |
1c45607a | 1914 | } |
1da177e4 | 1915 | |
216ba023 | 1916 | if (tty->termios->c_cflag & CRTSCTS) { |
1c45607a JS |
1917 | info->MCR |= UART_MCR_RTS; |
1918 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
1919 | } |
1920 | } | |
1921 | ||
1922 | /* | |
1923 | * mxser_stop() and mxser_start() | |
1924 | * | |
1925 | * This routines are called before setting or resetting tty->stopped. | |
1926 | * They enable or disable transmitter interrupts, as necessary. | |
1927 | */ | |
1928 | static void mxser_stop(struct tty_struct *tty) | |
1929 | { | |
1c45607a | 1930 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1931 | unsigned long flags; |
1932 | ||
1933 | spin_lock_irqsave(&info->slock, flags); | |
1934 | if (info->IER & UART_IER_THRI) { | |
1935 | info->IER &= ~UART_IER_THRI; | |
1c45607a | 1936 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1937 | } |
1938 | spin_unlock_irqrestore(&info->slock, flags); | |
1939 | } | |
1940 | ||
1941 | static void mxser_start(struct tty_struct *tty) | |
1942 | { | |
1c45607a | 1943 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1944 | unsigned long flags; |
1945 | ||
1946 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1947 | if (info->xmit_cnt && info->port.xmit_buf) { |
1c45607a | 1948 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1949 | info->IER |= UART_IER_THRI; |
1c45607a | 1950 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1951 | } |
1952 | spin_unlock_irqrestore(&info->slock, flags); | |
1953 | } | |
1954 | ||
1c45607a JS |
1955 | static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) |
1956 | { | |
1957 | struct mxser_port *info = tty->driver_data; | |
1958 | unsigned long flags; | |
1959 | ||
1960 | spin_lock_irqsave(&info->slock, flags); | |
216ba023 | 1961 | mxser_change_speed(tty, old_termios); |
1c45607a JS |
1962 | spin_unlock_irqrestore(&info->slock, flags); |
1963 | ||
1964 | if ((old_termios->c_cflag & CRTSCTS) && | |
1965 | !(tty->termios->c_cflag & CRTSCTS)) { | |
1966 | tty->hw_stopped = 0; | |
1967 | mxser_start(tty); | |
1968 | } | |
1969 | ||
1970 | /* Handle sw stopped */ | |
1971 | if ((old_termios->c_iflag & IXON) && | |
1972 | !(tty->termios->c_iflag & IXON)) { | |
1973 | tty->stopped = 0; | |
1974 | ||
1975 | if (info->board->chip_flag) { | |
1976 | spin_lock_irqsave(&info->slock, flags); | |
148ff86b CH |
1977 | mxser_disable_must_rx_software_flow_control( |
1978 | info->ioaddr); | |
1c45607a JS |
1979 | spin_unlock_irqrestore(&info->slock, flags); |
1980 | } | |
1981 | ||
1982 | mxser_start(tty); | |
1983 | } | |
1984 | } | |
1985 | ||
1da177e4 LT |
1986 | /* |
1987 | * mxser_wait_until_sent() --- wait until the transmitter is empty | |
1988 | */ | |
1989 | static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) | |
1990 | { | |
1c45607a | 1991 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1992 | unsigned long orig_jiffies, char_time; |
1993 | int lsr; | |
1994 | ||
1995 | if (info->type == PORT_UNKNOWN) | |
1996 | return; | |
1997 | ||
1998 | if (info->xmit_fifo_size == 0) | |
1999 | return; /* Just in case.... */ | |
2000 | ||
2001 | orig_jiffies = jiffies; | |
2002 | /* | |
2003 | * Set the check interval to be 1/5 of the estimated time to | |
2004 | * send a single character, and make it at least 1. The check | |
2005 | * interval should also be less than the timeout. | |
2006 | * | |
2007 | * Note: we have to use pretty tight timings here to satisfy | |
2008 | * the NIST-PCTS. | |
2009 | */ | |
2010 | char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; | |
2011 | char_time = char_time / 5; | |
2012 | if (char_time == 0) | |
2013 | char_time = 1; | |
2014 | if (timeout && timeout < char_time) | |
2015 | char_time = timeout; | |
2016 | /* | |
2017 | * If the transmitter hasn't cleared in twice the approximate | |
2018 | * amount of time to send the entire FIFO, it probably won't | |
2019 | * ever clear. This assumes the UART isn't doing flow | |
2020 | * control, which is currently the case. Hence, if it ever | |
2021 | * takes longer than info->timeout, this is probably due to a | |
2022 | * UART bug of some kind. So, we clamp the timeout parameter at | |
2023 | * 2*info->timeout. | |
2024 | */ | |
2025 | if (!timeout || timeout > 2 * info->timeout) | |
2026 | timeout = 2 * info->timeout; | |
2027 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
8ea2c2ec JJ |
2028 | printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", |
2029 | timeout, char_time); | |
1da177e4 LT |
2030 | printk("jiff=%lu...", jiffies); |
2031 | #endif | |
978e595f | 2032 | lock_kernel(); |
1c45607a | 2033 | while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { |
1da177e4 LT |
2034 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
2035 | printk("lsr = %d (jiff=%lu)...", lsr, jiffies); | |
2036 | #endif | |
da4cd8df | 2037 | schedule_timeout_interruptible(char_time); |
1da177e4 | 2038 | if (signal_pending(current)) |
1c45607a JS |
2039 | break; |
2040 | if (timeout && time_after(jiffies, orig_jiffies + timeout)) | |
2041 | break; | |
1da177e4 | 2042 | } |
1c45607a | 2043 | set_current_state(TASK_RUNNING); |
978e595f | 2044 | unlock_kernel(); |
1da177e4 | 2045 | |
1c45607a JS |
2046 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
2047 | printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); | |
2048 | #endif | |
2049 | } | |
1da177e4 | 2050 | |
1c45607a JS |
2051 | /* |
2052 | * This routine is called by tty_hangup() when a hangup is signaled. | |
2053 | */ | |
2054 | static void mxser_hangup(struct tty_struct *tty) | |
2055 | { | |
2056 | struct mxser_port *info = tty->driver_data; | |
1da177e4 | 2057 | |
1c45607a | 2058 | mxser_flush_buffer(tty); |
216ba023 | 2059 | mxser_shutdown(tty); |
3b6826b2 | 2060 | tty_port_hangup(&info->port); |
1da177e4 LT |
2061 | } |
2062 | ||
1c45607a JS |
2063 | /* |
2064 | * mxser_rs_break() --- routine which turns the break handling on or off | |
2065 | */ | |
9e98966c | 2066 | static int mxser_rs_break(struct tty_struct *tty, int break_state) |
1da177e4 | 2067 | { |
1c45607a | 2068 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2069 | unsigned long flags; |
2070 | ||
1c45607a JS |
2071 | spin_lock_irqsave(&info->slock, flags); |
2072 | if (break_state == -1) | |
2073 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
2074 | info->ioaddr + UART_LCR); | |
2075 | else | |
2076 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
2077 | info->ioaddr + UART_LCR); | |
2078 | spin_unlock_irqrestore(&info->slock, flags); | |
9e98966c | 2079 | return 0; |
1c45607a | 2080 | } |
1da177e4 | 2081 | |
216ba023 AC |
2082 | static void mxser_receive_chars(struct tty_struct *tty, |
2083 | struct mxser_port *port, int *status) | |
1c45607a | 2084 | { |
1c45607a JS |
2085 | unsigned char ch, gdl; |
2086 | int ignored = 0; | |
2087 | int cnt = 0; | |
2088 | int recv_room; | |
2089 | int max = 256; | |
1da177e4 | 2090 | |
1c45607a | 2091 | recv_room = tty->receive_room; |
216ba023 | 2092 | if (recv_room == 0 && !port->ldisc_stop_rx) |
1c45607a | 2093 | mxser_stoprx(tty); |
1c45607a | 2094 | if (port->board->chip_flag != MOXA_OTHER_UART) { |
1da177e4 | 2095 | |
1c45607a JS |
2096 | if (*status & UART_LSR_SPECIAL) |
2097 | goto intr_old; | |
2098 | if (port->board->chip_flag == MOXA_MUST_MU860_HWID && | |
2099 | (*status & MOXA_MUST_LSR_RERR)) | |
2100 | goto intr_old; | |
2101 | if (*status & MOXA_MUST_LSR_RERR) | |
2102 | goto intr_old; | |
1da177e4 | 2103 | |
1c45607a JS |
2104 | gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); |
2105 | ||
2106 | if (port->board->chip_flag == MOXA_MUST_MU150_HWID) | |
2107 | gdl &= MOXA_MUST_GDL_MASK; | |
2108 | if (gdl >= recv_room) { | |
2109 | if (!port->ldisc_stop_rx) | |
2110 | mxser_stoprx(tty); | |
2111 | } | |
2112 | while (gdl--) { | |
2113 | ch = inb(port->ioaddr + UART_RX); | |
2114 | tty_insert_flip_char(tty, ch, 0); | |
2115 | cnt++; | |
2116 | } | |
2117 | goto end_intr; | |
1da177e4 | 2118 | } |
1c45607a JS |
2119 | intr_old: |
2120 | ||
2121 | do { | |
2122 | if (max-- < 0) | |
2123 | break; | |
1da177e4 | 2124 | |
1c45607a JS |
2125 | ch = inb(port->ioaddr + UART_RX); |
2126 | if (port->board->chip_flag && (*status & UART_LSR_OE)) | |
2127 | outb(0x23, port->ioaddr + UART_FCR); | |
2128 | *status &= port->read_status_mask; | |
2129 | if (*status & port->ignore_status_mask) { | |
2130 | if (++ignored > 100) | |
2131 | break; | |
2132 | } else { | |
2133 | char flag = 0; | |
2134 | if (*status & UART_LSR_SPECIAL) { | |
2135 | if (*status & UART_LSR_BI) { | |
2136 | flag = TTY_BREAK; | |
2137 | port->icount.brk++; | |
1da177e4 | 2138 | |
0ad9e7d1 | 2139 | if (port->port.flags & ASYNC_SAK) |
1c45607a JS |
2140 | do_SAK(tty); |
2141 | } else if (*status & UART_LSR_PE) { | |
2142 | flag = TTY_PARITY; | |
2143 | port->icount.parity++; | |
2144 | } else if (*status & UART_LSR_FE) { | |
2145 | flag = TTY_FRAME; | |
2146 | port->icount.frame++; | |
2147 | } else if (*status & UART_LSR_OE) { | |
2148 | flag = TTY_OVERRUN; | |
2149 | port->icount.overrun++; | |
2150 | } else | |
2151 | flag = TTY_BREAK; | |
2152 | } | |
2153 | tty_insert_flip_char(tty, ch, flag); | |
2154 | cnt++; | |
2155 | if (cnt >= recv_room) { | |
2156 | if (!port->ldisc_stop_rx) | |
2157 | mxser_stoprx(tty); | |
2158 | break; | |
2159 | } | |
1da177e4 | 2160 | |
1c45607a | 2161 | } |
1da177e4 | 2162 | |
1c45607a JS |
2163 | if (port->board->chip_flag) |
2164 | break; | |
1da177e4 | 2165 | |
1c45607a JS |
2166 | *status = inb(port->ioaddr + UART_LSR); |
2167 | } while (*status & UART_LSR_DR); | |
1da177e4 | 2168 | |
1c45607a | 2169 | end_intr: |
216ba023 | 2170 | mxvar_log.rxcnt[tty->index] += cnt; |
1c45607a JS |
2171 | port->mon_data.rxcnt += cnt; |
2172 | port->mon_data.up_rxcnt += cnt; | |
1da177e4 | 2173 | |
1c45607a JS |
2174 | /* |
2175 | * We are called from an interrupt context with &port->slock | |
2176 | * being held. Drop it temporarily in order to prevent | |
2177 | * recursive locking. | |
2178 | */ | |
2179 | spin_unlock(&port->slock); | |
2180 | tty_flip_buffer_push(tty); | |
2181 | spin_lock(&port->slock); | |
1da177e4 LT |
2182 | } |
2183 | ||
216ba023 | 2184 | static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) |
1da177e4 | 2185 | { |
1c45607a | 2186 | int count, cnt; |
1da177e4 | 2187 | |
1c45607a JS |
2188 | if (port->x_char) { |
2189 | outb(port->x_char, port->ioaddr + UART_TX); | |
2190 | port->x_char = 0; | |
216ba023 | 2191 | mxvar_log.txcnt[tty->index]++; |
1c45607a JS |
2192 | port->mon_data.txcnt++; |
2193 | port->mon_data.up_txcnt++; | |
2194 | port->icount.tx++; | |
2195 | return; | |
2196 | } | |
1da177e4 | 2197 | |
0ad9e7d1 | 2198 | if (port->port.xmit_buf == NULL) |
1c45607a | 2199 | return; |
1da177e4 | 2200 | |
216ba023 AC |
2201 | if (port->xmit_cnt <= 0 || tty->stopped || |
2202 | (tty->hw_stopped && | |
1c45607a JS |
2203 | (port->type != PORT_16550A) && |
2204 | (!port->board->chip_flag))) { | |
2205 | port->IER &= ~UART_IER_THRI; | |
2206 | outb(port->IER, port->ioaddr + UART_IER); | |
2207 | return; | |
1da177e4 LT |
2208 | } |
2209 | ||
1c45607a JS |
2210 | cnt = port->xmit_cnt; |
2211 | count = port->xmit_fifo_size; | |
2212 | do { | |
0ad9e7d1 | 2213 | outb(port->port.xmit_buf[port->xmit_tail++], |
1c45607a JS |
2214 | port->ioaddr + UART_TX); |
2215 | port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); | |
2216 | if (--port->xmit_cnt <= 0) | |
2217 | break; | |
2218 | } while (--count > 0); | |
216ba023 | 2219 | mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); |
1da177e4 | 2220 | |
1c45607a JS |
2221 | port->mon_data.txcnt += (cnt - port->xmit_cnt); |
2222 | port->mon_data.up_txcnt += (cnt - port->xmit_cnt); | |
2223 | port->icount.tx += (cnt - port->xmit_cnt); | |
1da177e4 | 2224 | |
216ba023 AC |
2225 | if (port->xmit_cnt < WAKEUP_CHARS && tty) |
2226 | tty_wakeup(tty); | |
1c45607a JS |
2227 | |
2228 | if (port->xmit_cnt <= 0) { | |
2229 | port->IER &= ~UART_IER_THRI; | |
2230 | outb(port->IER, port->ioaddr + UART_IER); | |
1da177e4 | 2231 | } |
1da177e4 LT |
2232 | } |
2233 | ||
2234 | /* | |
1c45607a | 2235 | * This is the serial driver's generic interrupt routine |
1da177e4 | 2236 | */ |
1c45607a | 2237 | static irqreturn_t mxser_interrupt(int irq, void *dev_id) |
1da177e4 | 2238 | { |
1c45607a JS |
2239 | int status, iir, i; |
2240 | struct mxser_board *brd = NULL; | |
2241 | struct mxser_port *port; | |
2242 | int max, irqbits, bits, msr; | |
2243 | unsigned int int_cnt, pass_counter = 0; | |
2244 | int handled = IRQ_NONE; | |
216ba023 | 2245 | struct tty_struct *tty; |
1da177e4 | 2246 | |
1c45607a JS |
2247 | for (i = 0; i < MXSER_BOARDS; i++) |
2248 | if (dev_id == &mxser_boards[i]) { | |
2249 | brd = dev_id; | |
2250 | break; | |
2251 | } | |
1da177e4 | 2252 | |
1c45607a JS |
2253 | if (i == MXSER_BOARDS) |
2254 | goto irq_stop; | |
2255 | if (brd == NULL) | |
2256 | goto irq_stop; | |
2257 | max = brd->info->nports; | |
2258 | while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { | |
2259 | irqbits = inb(brd->vector) & brd->vector_mask; | |
2260 | if (irqbits == brd->vector_mask) | |
2261 | break; | |
1da177e4 | 2262 | |
1c45607a JS |
2263 | handled = IRQ_HANDLED; |
2264 | for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { | |
2265 | if (irqbits == brd->vector_mask) | |
2266 | break; | |
2267 | if (bits & irqbits) | |
2268 | continue; | |
2269 | port = &brd->ports[i]; | |
2270 | ||
2271 | int_cnt = 0; | |
2272 | spin_lock(&port->slock); | |
2273 | do { | |
2274 | iir = inb(port->ioaddr + UART_IIR); | |
2275 | if (iir & UART_IIR_NO_INT) | |
2276 | break; | |
2277 | iir &= MOXA_MUST_IIR_MASK; | |
216ba023 AC |
2278 | tty = tty_port_tty_get(&port->port); |
2279 | if (!tty || | |
0ad9e7d1 AC |
2280 | (port->port.flags & ASYNC_CLOSING) || |
2281 | !(port->port.flags & | |
1c45607a JS |
2282 | ASYNC_INITIALIZED)) { |
2283 | status = inb(port->ioaddr + UART_LSR); | |
2284 | outb(0x27, port->ioaddr + UART_FCR); | |
2285 | inb(port->ioaddr + UART_MSR); | |
216ba023 | 2286 | tty_kref_put(tty); |
1c45607a JS |
2287 | break; |
2288 | } | |
1da177e4 | 2289 | |
1c45607a JS |
2290 | status = inb(port->ioaddr + UART_LSR); |
2291 | ||
2292 | if (status & UART_LSR_PE) | |
2293 | port->err_shadow |= NPPI_NOTIFY_PARITY; | |
2294 | if (status & UART_LSR_FE) | |
2295 | port->err_shadow |= NPPI_NOTIFY_FRAMING; | |
2296 | if (status & UART_LSR_OE) | |
2297 | port->err_shadow |= | |
2298 | NPPI_NOTIFY_HW_OVERRUN; | |
2299 | if (status & UART_LSR_BI) | |
2300 | port->err_shadow |= NPPI_NOTIFY_BREAK; | |
2301 | ||
2302 | if (port->board->chip_flag) { | |
2303 | if (iir == MOXA_MUST_IIR_GDA || | |
2304 | iir == MOXA_MUST_IIR_RDA || | |
2305 | iir == MOXA_MUST_IIR_RTO || | |
2306 | iir == MOXA_MUST_IIR_LSR) | |
216ba023 | 2307 | mxser_receive_chars(tty, port, |
1c45607a JS |
2308 | &status); |
2309 | ||
2310 | } else { | |
2311 | status &= port->read_status_mask; | |
2312 | if (status & UART_LSR_DR) | |
216ba023 | 2313 | mxser_receive_chars(tty, port, |
1c45607a JS |
2314 | &status); |
2315 | } | |
2316 | msr = inb(port->ioaddr + UART_MSR); | |
2317 | if (msr & UART_MSR_ANY_DELTA) | |
216ba023 | 2318 | mxser_check_modem_status(tty, port, msr); |
1c45607a JS |
2319 | |
2320 | if (port->board->chip_flag) { | |
2321 | if (iir == 0x02 && (status & | |
2322 | UART_LSR_THRE)) | |
216ba023 | 2323 | mxser_transmit_chars(tty, port); |
1c45607a JS |
2324 | } else { |
2325 | if (status & UART_LSR_THRE) | |
216ba023 | 2326 | mxser_transmit_chars(tty, port); |
1c45607a | 2327 | } |
216ba023 | 2328 | tty_kref_put(tty); |
1c45607a JS |
2329 | } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); |
2330 | spin_unlock(&port->slock); | |
2331 | } | |
2332 | } | |
1da177e4 | 2333 | |
1c45607a JS |
2334 | irq_stop: |
2335 | return handled; | |
2336 | } | |
1da177e4 | 2337 | |
1c45607a JS |
2338 | static const struct tty_operations mxser_ops = { |
2339 | .open = mxser_open, | |
2340 | .close = mxser_close, | |
2341 | .write = mxser_write, | |
2342 | .put_char = mxser_put_char, | |
2343 | .flush_chars = mxser_flush_chars, | |
2344 | .write_room = mxser_write_room, | |
2345 | .chars_in_buffer = mxser_chars_in_buffer, | |
2346 | .flush_buffer = mxser_flush_buffer, | |
2347 | .ioctl = mxser_ioctl, | |
2348 | .throttle = mxser_throttle, | |
2349 | .unthrottle = mxser_unthrottle, | |
2350 | .set_termios = mxser_set_termios, | |
2351 | .stop = mxser_stop, | |
2352 | .start = mxser_start, | |
2353 | .hangup = mxser_hangup, | |
2354 | .break_ctl = mxser_rs_break, | |
2355 | .wait_until_sent = mxser_wait_until_sent, | |
2356 | .tiocmget = mxser_tiocmget, | |
2357 | .tiocmset = mxser_tiocmset, | |
2358 | }; | |
1da177e4 | 2359 | |
31f35939 AC |
2360 | struct tty_port_operations mxser_port_ops = { |
2361 | .carrier_raised = mxser_carrier_raised, | |
fcc8ac18 | 2362 | .dtr_rts = mxser_dtr_rts, |
31f35939 AC |
2363 | }; |
2364 | ||
1c45607a JS |
2365 | /* |
2366 | * The MOXA Smartio/Industio serial driver boot-time initialization code! | |
2367 | */ | |
1da177e4 | 2368 | |
1c45607a JS |
2369 | static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev, |
2370 | unsigned int irq) | |
2371 | { | |
2372 | if (irq) | |
2373 | free_irq(brd->irq, brd); | |
2374 | if (pdev != NULL) { /* PCI */ | |
2375 | #ifdef CONFIG_PCI | |
2376 | pci_release_region(pdev, 2); | |
2377 | pci_release_region(pdev, 3); | |
2378 | #endif | |
2379 | } else { | |
2380 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); | |
2381 | release_region(brd->vector, 1); | |
2382 | } | |
1da177e4 LT |
2383 | } |
2384 | ||
1c45607a JS |
2385 | static int __devinit mxser_initbrd(struct mxser_board *brd, |
2386 | struct pci_dev *pdev) | |
1da177e4 | 2387 | { |
1c45607a JS |
2388 | struct mxser_port *info; |
2389 | unsigned int i; | |
2390 | int retval; | |
1da177e4 | 2391 | |
83766bc6 JS |
2392 | printk(KERN_INFO "mxser: max. baud rate = %d bps\n", |
2393 | brd->ports[0].max_baud); | |
1da177e4 | 2394 | |
1c45607a JS |
2395 | for (i = 0; i < brd->info->nports; i++) { |
2396 | info = &brd->ports[i]; | |
44b7d1b3 | 2397 | tty_port_init(&info->port); |
31f35939 | 2398 | info->port.ops = &mxser_port_ops; |
1c45607a JS |
2399 | info->board = brd; |
2400 | info->stop_rx = 0; | |
2401 | info->ldisc_stop_rx = 0; | |
1da177e4 | 2402 | |
1c45607a JS |
2403 | /* Enhance mode enabled here */ |
2404 | if (brd->chip_flag != MOXA_OTHER_UART) | |
148ff86b | 2405 | mxser_enable_must_enchance_mode(info->ioaddr); |
1da177e4 | 2406 | |
0ad9e7d1 | 2407 | info->port.flags = ASYNC_SHARE_IRQ; |
1c45607a | 2408 | info->type = brd->uart_type; |
1da177e4 | 2409 | |
1c45607a | 2410 | process_txrx_fifo(info); |
1da177e4 | 2411 | |
1c45607a | 2412 | info->custom_divisor = info->baud_base * 16; |
44b7d1b3 AC |
2413 | info->port.close_delay = 5 * HZ / 10; |
2414 | info->port.closing_wait = 30 * HZ; | |
1c45607a | 2415 | info->normal_termios = mxvar_sdriver->init_termios; |
1c45607a JS |
2416 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); |
2417 | info->err_shadow = 0; | |
2418 | spin_lock_init(&info->slock); | |
1da177e4 | 2419 | |
1c45607a JS |
2420 | /* before set INT ISR, disable all int */ |
2421 | outb(inb(info->ioaddr + UART_IER) & 0xf0, | |
2422 | info->ioaddr + UART_IER); | |
2423 | } | |
1da177e4 | 2424 | |
1c45607a JS |
2425 | retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", |
2426 | brd); | |
2427 | if (retval) { | |
2428 | printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " | |
2429 | "conflict with another device.\n", | |
2430 | brd->info->name, brd->irq); | |
2431 | /* We hold resources, we need to release them. */ | |
2432 | mxser_release_res(brd, pdev, 0); | |
2433 | } | |
2434 | return retval; | |
2435 | } | |
1da177e4 | 2436 | |
1c45607a | 2437 | static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) |
1da177e4 LT |
2438 | { |
2439 | int id, i, bits; | |
2440 | unsigned short regs[16], irq; | |
2441 | unsigned char scratch, scratch2; | |
2442 | ||
1c45607a | 2443 | brd->chip_flag = MOXA_OTHER_UART; |
1da177e4 LT |
2444 | |
2445 | id = mxser_read_register(cap, regs); | |
1c45607a JS |
2446 | switch (id) { |
2447 | case C168_ASIC_ID: | |
2448 | brd->info = &mxser_cards[0]; | |
2449 | break; | |
2450 | case C104_ASIC_ID: | |
2451 | brd->info = &mxser_cards[1]; | |
2452 | break; | |
2453 | case CI104J_ASIC_ID: | |
2454 | brd->info = &mxser_cards[2]; | |
2455 | break; | |
2456 | case C102_ASIC_ID: | |
2457 | brd->info = &mxser_cards[5]; | |
2458 | break; | |
2459 | case CI132_ASIC_ID: | |
2460 | brd->info = &mxser_cards[6]; | |
2461 | break; | |
2462 | case CI134_ASIC_ID: | |
2463 | brd->info = &mxser_cards[7]; | |
2464 | break; | |
2465 | default: | |
8ea2c2ec | 2466 | return 0; |
1c45607a | 2467 | } |
1da177e4 LT |
2468 | |
2469 | irq = 0; | |
1c45607a JS |
2470 | /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) |
2471 | Flag-hack checks if configuration should be read as 2-port here. */ | |
2472 | if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { | |
1da177e4 LT |
2473 | irq = regs[9] & 0xF000; |
2474 | irq = irq | (irq >> 4); | |
2475 | if (irq != (regs[9] & 0xFF00)) | |
83766bc6 | 2476 | goto err_irqconflict; |
1c45607a | 2477 | } else if (brd->info->nports == 4) { |
1da177e4 LT |
2478 | irq = regs[9] & 0xF000; |
2479 | irq = irq | (irq >> 4); | |
2480 | irq = irq | (irq >> 8); | |
2481 | if (irq != regs[9]) | |
83766bc6 | 2482 | goto err_irqconflict; |
1c45607a | 2483 | } else if (brd->info->nports == 8) { |
1da177e4 LT |
2484 | irq = regs[9] & 0xF000; |
2485 | irq = irq | (irq >> 4); | |
2486 | irq = irq | (irq >> 8); | |
2487 | if ((irq != regs[9]) || (irq != regs[10])) | |
83766bc6 | 2488 | goto err_irqconflict; |
1da177e4 LT |
2489 | } |
2490 | ||
83766bc6 JS |
2491 | if (!irq) { |
2492 | printk(KERN_ERR "mxser: interrupt number unset\n"); | |
2493 | return -EIO; | |
2494 | } | |
1c45607a | 2495 | brd->irq = ((int)(irq & 0xF000) >> 12); |
1da177e4 | 2496 | for (i = 0; i < 8; i++) |
1c45607a | 2497 | brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; |
83766bc6 JS |
2498 | if ((regs[12] & 0x80) == 0) { |
2499 | printk(KERN_ERR "mxser: invalid interrupt vector\n"); | |
2500 | return -EIO; | |
2501 | } | |
1c45607a | 2502 | brd->vector = (int)regs[11]; /* interrupt vector */ |
1da177e4 | 2503 | if (id == 1) |
1c45607a | 2504 | brd->vector_mask = 0x00FF; |
1da177e4 | 2505 | else |
1c45607a | 2506 | brd->vector_mask = 0x000F; |
1da177e4 LT |
2507 | for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { |
2508 | if (regs[12] & bits) { | |
1c45607a JS |
2509 | brd->ports[i].baud_base = 921600; |
2510 | brd->ports[i].max_baud = 921600; | |
1da177e4 | 2511 | } else { |
1c45607a JS |
2512 | brd->ports[i].baud_base = 115200; |
2513 | brd->ports[i].max_baud = 115200; | |
1da177e4 LT |
2514 | } |
2515 | } | |
2516 | scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); | |
2517 | outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); | |
2518 | outb(0, cap + UART_EFR); /* EFR is the same as FCR */ | |
2519 | outb(scratch2, cap + UART_LCR); | |
2520 | outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); | |
2521 | scratch = inb(cap + UART_IIR); | |
2522 | ||
2523 | if (scratch & 0xC0) | |
1c45607a | 2524 | brd->uart_type = PORT_16550A; |
1da177e4 | 2525 | else |
1c45607a JS |
2526 | brd->uart_type = PORT_16450; |
2527 | if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, | |
83766bc6 JS |
2528 | "mxser(IO)")) { |
2529 | printk(KERN_ERR "mxser: can't request ports I/O region: " | |
2530 | "0x%.8lx-0x%.8lx\n", | |
2531 | brd->ports[0].ioaddr, brd->ports[0].ioaddr + | |
2532 | 8 * brd->info->nports - 1); | |
2533 | return -EIO; | |
2534 | } | |
1c45607a JS |
2535 | if (!request_region(brd->vector, 1, "mxser(vector)")) { |
2536 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); | |
83766bc6 JS |
2537 | printk(KERN_ERR "mxser: can't request interrupt vector region: " |
2538 | "0x%.8lx-0x%.8lx\n", | |
2539 | brd->ports[0].ioaddr, brd->ports[0].ioaddr + | |
2540 | 8 * brd->info->nports - 1); | |
2541 | return -EIO; | |
1c45607a JS |
2542 | } |
2543 | return brd->info->nports; | |
83766bc6 JS |
2544 | |
2545 | err_irqconflict: | |
2546 | printk(KERN_ERR "mxser: invalid interrupt number\n"); | |
2547 | return -EIO; | |
1da177e4 LT |
2548 | } |
2549 | ||
1c45607a JS |
2550 | static int __devinit mxser_probe(struct pci_dev *pdev, |
2551 | const struct pci_device_id *ent) | |
1da177e4 | 2552 | { |
1c45607a JS |
2553 | #ifdef CONFIG_PCI |
2554 | struct mxser_board *brd; | |
2555 | unsigned int i, j; | |
2556 | unsigned long ioaddress; | |
2557 | int retval = -EINVAL; | |
1da177e4 | 2558 | |
1c45607a JS |
2559 | for (i = 0; i < MXSER_BOARDS; i++) |
2560 | if (mxser_boards[i].info == NULL) | |
2561 | break; | |
2562 | ||
2563 | if (i >= MXSER_BOARDS) { | |
83766bc6 JS |
2564 | dev_err(&pdev->dev, "too many boards found (maximum %d), board " |
2565 | "not configured\n", MXSER_BOARDS); | |
1c45607a JS |
2566 | goto err; |
2567 | } | |
2568 | ||
2569 | brd = &mxser_boards[i]; | |
2570 | brd->idx = i * MXSER_PORTS_PER_BOARD; | |
83766bc6 | 2571 | dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", |
1c45607a JS |
2572 | mxser_cards[ent->driver_data].name, |
2573 | pdev->bus->number, PCI_SLOT(pdev->devfn)); | |
2574 | ||
2575 | retval = pci_enable_device(pdev); | |
2576 | if (retval) { | |
83766bc6 | 2577 | dev_err(&pdev->dev, "PCI enable failed\n"); |
1c45607a JS |
2578 | goto err; |
2579 | } | |
2580 | ||
2581 | /* io address */ | |
2582 | ioaddress = pci_resource_start(pdev, 2); | |
2583 | retval = pci_request_region(pdev, 2, "mxser(IO)"); | |
2584 | if (retval) | |
2585 | goto err; | |
2586 | ||
2587 | brd->info = &mxser_cards[ent->driver_data]; | |
2588 | for (i = 0; i < brd->info->nports; i++) | |
2589 | brd->ports[i].ioaddr = ioaddress + 8 * i; | |
2590 | ||
2591 | /* vector */ | |
2592 | ioaddress = pci_resource_start(pdev, 3); | |
2593 | retval = pci_request_region(pdev, 3, "mxser(vector)"); | |
2594 | if (retval) | |
2595 | goto err_relio; | |
2596 | brd->vector = ioaddress; | |
2597 | ||
2598 | /* irq */ | |
2599 | brd->irq = pdev->irq; | |
2600 | ||
2601 | brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); | |
2602 | brd->uart_type = PORT_16550A; | |
2603 | brd->vector_mask = 0; | |
2604 | ||
2605 | for (i = 0; i < brd->info->nports; i++) { | |
2606 | for (j = 0; j < UART_INFO_NUM; j++) { | |
2607 | if (Gpci_uart_info[j].type == brd->chip_flag) { | |
2608 | brd->ports[i].max_baud = | |
2609 | Gpci_uart_info[j].max_baud; | |
2610 | ||
2611 | /* exception....CP-102 */ | |
2612 | if (brd->info->flags & MXSER_HIGHBAUD) | |
2613 | brd->ports[i].max_baud = 921600; | |
2614 | break; | |
1da177e4 LT |
2615 | } |
2616 | } | |
1c45607a JS |
2617 | } |
2618 | ||
2619 | if (brd->chip_flag == MOXA_MUST_MU860_HWID) { | |
2620 | for (i = 0; i < brd->info->nports; i++) { | |
2621 | if (i < 4) | |
2622 | brd->ports[i].opmode_ioaddr = ioaddress + 4; | |
2623 | else | |
2624 | brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; | |
1da177e4 | 2625 | } |
1c45607a JS |
2626 | outb(0, ioaddress + 4); /* default set to RS232 mode */ |
2627 | outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ | |
1da177e4 | 2628 | } |
1c45607a JS |
2629 | |
2630 | for (i = 0; i < brd->info->nports; i++) { | |
2631 | brd->vector_mask |= (1 << i); | |
2632 | brd->ports[i].baud_base = 921600; | |
2633 | } | |
2634 | ||
2635 | /* mxser_initbrd will hook ISR. */ | |
2636 | retval = mxser_initbrd(brd, pdev); | |
2637 | if (retval) | |
2638 | goto err_null; | |
2639 | ||
2640 | for (i = 0; i < brd->info->nports; i++) | |
2641 | tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev); | |
2642 | ||
2643 | pci_set_drvdata(pdev, brd); | |
2644 | ||
2645 | return 0; | |
2646 | err_relio: | |
2647 | pci_release_region(pdev, 2); | |
2648 | err_null: | |
2649 | brd->info = NULL; | |
2650 | err: | |
2651 | return retval; | |
2652 | #else | |
2653 | return -ENODEV; | |
2654 | #endif | |
1da177e4 LT |
2655 | } |
2656 | ||
1c45607a | 2657 | static void __devexit mxser_remove(struct pci_dev *pdev) |
1da177e4 | 2658 | { |
1c45607a JS |
2659 | struct mxser_board *brd = pci_get_drvdata(pdev); |
2660 | unsigned int i; | |
1da177e4 | 2661 | |
1c45607a JS |
2662 | for (i = 0; i < brd->info->nports; i++) |
2663 | tty_unregister_device(mxvar_sdriver, brd->idx + i); | |
1da177e4 | 2664 | |
1c45607a JS |
2665 | mxser_release_res(brd, pdev, 1); |
2666 | brd->info = NULL; | |
1da177e4 LT |
2667 | } |
2668 | ||
1c45607a JS |
2669 | static struct pci_driver mxser_driver = { |
2670 | .name = "mxser", | |
2671 | .id_table = mxser_pcibrds, | |
2672 | .probe = mxser_probe, | |
2673 | .remove = __devexit_p(mxser_remove) | |
2674 | }; | |
2675 | ||
2676 | static int __init mxser_module_init(void) | |
1da177e4 | 2677 | { |
1c45607a | 2678 | struct mxser_board *brd; |
1df00924 JS |
2679 | unsigned int b, i, m; |
2680 | int retval; | |
1da177e4 | 2681 | |
1c45607a JS |
2682 | mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); |
2683 | if (!mxvar_sdriver) | |
2684 | return -ENOMEM; | |
2685 | ||
2686 | printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", | |
2687 | MXSER_VERSION); | |
2688 | ||
2689 | /* Initialize the tty_driver structure */ | |
2690 | mxvar_sdriver->owner = THIS_MODULE; | |
2691 | mxvar_sdriver->magic = TTY_DRIVER_MAGIC; | |
2692 | mxvar_sdriver->name = "ttyMI"; | |
2693 | mxvar_sdriver->major = ttymajor; | |
2694 | mxvar_sdriver->minor_start = 0; | |
2695 | mxvar_sdriver->num = MXSER_PORTS + 1; | |
2696 | mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; | |
2697 | mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; | |
2698 | mxvar_sdriver->init_termios = tty_std_termios; | |
2699 | mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; | |
2700 | mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; | |
2701 | tty_set_operations(mxvar_sdriver, &mxser_ops); | |
2702 | ||
2703 | retval = tty_register_driver(mxvar_sdriver); | |
2704 | if (retval) { | |
2705 | printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " | |
2706 | "tty driver !\n"); | |
2707 | goto err_put; | |
1da177e4 | 2708 | } |
1c45607a | 2709 | |
1c45607a | 2710 | /* Start finding ISA boards here */ |
1df00924 JS |
2711 | for (m = 0, b = 0; b < MXSER_BOARDS; b++) { |
2712 | if (!ioaddr[b]) | |
2713 | continue; | |
2714 | ||
2715 | brd = &mxser_boards[m]; | |
96050dfb | 2716 | retval = mxser_get_ISA_conf(ioaddr[b], brd); |
1df00924 JS |
2717 | if (retval <= 0) { |
2718 | brd->info = NULL; | |
2719 | continue; | |
2720 | } | |
1c45607a | 2721 | |
1df00924 JS |
2722 | printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", |
2723 | brd->info->name, ioaddr[b]); | |
83766bc6 | 2724 | |
1df00924 JS |
2725 | /* mxser_initbrd will hook ISR. */ |
2726 | if (mxser_initbrd(brd, NULL) < 0) { | |
2727 | brd->info = NULL; | |
2728 | continue; | |
2729 | } | |
1c45607a | 2730 | |
1df00924 JS |
2731 | brd->idx = m * MXSER_PORTS_PER_BOARD; |
2732 | for (i = 0; i < brd->info->nports; i++) | |
2733 | tty_register_device(mxvar_sdriver, brd->idx + i, NULL); | |
1c45607a | 2734 | |
1df00924 JS |
2735 | m++; |
2736 | } | |
1c45607a JS |
2737 | |
2738 | retval = pci_register_driver(&mxser_driver); | |
2739 | if (retval) { | |
83766bc6 | 2740 | printk(KERN_ERR "mxser: can't register pci driver\n"); |
1c45607a JS |
2741 | if (!m) { |
2742 | retval = -ENODEV; | |
2743 | goto err_unr; | |
2744 | } /* else: we have some ISA cards under control */ | |
2745 | } | |
2746 | ||
1c45607a JS |
2747 | return 0; |
2748 | err_unr: | |
2749 | tty_unregister_driver(mxvar_sdriver); | |
2750 | err_put: | |
2751 | put_tty_driver(mxvar_sdriver); | |
2752 | return retval; | |
2753 | } | |
2754 | ||
2755 | static void __exit mxser_module_exit(void) | |
2756 | { | |
2757 | unsigned int i, j; | |
2758 | ||
1c45607a JS |
2759 | pci_unregister_driver(&mxser_driver); |
2760 | ||
2761 | for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ | |
2762 | if (mxser_boards[i].info != NULL) | |
2763 | for (j = 0; j < mxser_boards[i].info->nports; j++) | |
2764 | tty_unregister_device(mxvar_sdriver, | |
2765 | mxser_boards[i].idx + j); | |
2766 | tty_unregister_driver(mxvar_sdriver); | |
2767 | put_tty_driver(mxvar_sdriver); | |
2768 | ||
2769 | for (i = 0; i < MXSER_BOARDS; i++) | |
2770 | if (mxser_boards[i].info != NULL) | |
2771 | mxser_release_res(&mxser_boards[i], NULL, 1); | |
1da177e4 LT |
2772 | } |
2773 | ||
2774 | module_init(mxser_module_init); | |
2775 | module_exit(mxser_module_exit); |