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Char: mxser, reorder mxser_cardinfo fields
[mirror_ubuntu-artful-kernel.git] / drivers / char / mxser_new.c
CommitLineData
037ad48b
JS		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
3306ce3d 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com.tw).
f8cce2e5 5 * Copyright (C) 2006-2007 Jiri Slaby <jirislaby@gmail.com>
037ad48b 6 *
c88cb8f9
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
037ad48b
JS		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
037ad48b
JS		 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 * - Fixed sleep with spinlock held in mxser_send_break
20 */
21
037ad48b 22#include <linux/module.h>
037ad48b
JS		 23#include <linux/errno.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/timer.h>
27#include <linux/interrupt.h>
28#include <linux/tty.h>
29#include <linux/tty_flip.h>
30#include <linux/serial.h>
31#include <linux/serial_reg.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/gfp.h>
37#include <linux/ioport.h>
38#include <linux/mm.h>
037ad48b
JS		 39#include <linux/delay.h>
40#include <linux/pci.h>
1977f032 41#include <linux/bitops.h>
037ad48b
JS		 42
43#include <asm/system.h>
44#include <asm/io.h>
45#include <asm/irq.h>
037ad48b
JS		 46#include <asm/uaccess.h>
47
771f2d1a 48#include "mxser_new.h"
037ad48b 49
f8cce2e5 50#define MXSER_VERSION "2.0.2" /* 1.10 */
037ad48b
JS		 51#define MXSERMAJOR 174
52#define MXSERCUMAJOR 175
53
037ad48b 54#define MXSER_BOARDS 4 /* Max. boards */
037ad48b 55#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
a8b74de9 56#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
18b95576 57#define MXSER_ISR_PASS_LIMIT 100
037ad48b
JS		 58
59#define MXSER_ERR_IOADDR -1
60#define MXSER_ERR_IRQ -2
61#define MXSER_ERR_IRQ_CONFLIT -3
62#define MXSER_ERR_VECTOR -4
63
ed79ba12
JS		 64/*CheckIsMoxaMust return value*/
65#define MOXA_OTHER_UART 0x00
66#define MOXA_MUST_MU150_HWID 0x01
67#define MOXA_MUST_MU860_HWID 0x02
68
037ad48b
JS		 69#define WAKEUP_CHARS 256
70
71#define UART_MCR_AFE 0x20
72#define UART_LSR_SPECIAL 0x1E
73
f8cce2e5
JS		 74#define PCI_DEVICE_ID_CB108 0x1080
75#define PCI_DEVICE_ID_CB114 0x1142
76#define PCI_DEVICE_ID_CB134I 0x1341
77#define PCI_DEVICE_ID_CP138U 0x1380
78#define PCI_DEVICE_ID_POS104UL 0x1044
79
037ad48b 80
037ad48b
JS		 81#define C168_ASIC_ID 1
82#define C104_ASIC_ID 2
83#define C102_ASIC_ID 0xB
84#define CI132_ASIC_ID 4
85#define CI134_ASIC_ID 3
86#define CI104J_ASIC_ID 5
87
cd7ed64e
JS		 88#define MXSER_HIGHBAUD 1
89#define MXSER_HAS2 2
037ad48b
JS		 90
91/* This is only for PCI */
cd7ed64e 92static const struct {
037ad48b
JS		 93 int type;
94 int tx_fifo;
95 int rx_fifo;
96 int xmit_fifo_size;
97 int rx_high_water;
98 int rx_trigger;
99 int rx_low_water;
100 long max_baud;
cd7ed64e 101} Gpci_uart_info[] = {
037ad48b
JS		 102 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
103 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
104 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
105};
cd7ed64e
JS		 106#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
107
108struct mxser_cardinfo {
cd7ed64e 109 char *name;
0ecd233b 110 unsigned int nports;
cd7ed64e
JS		 111 unsigned int flags;
112};
113
114static const struct mxser_cardinfo mxser_cards[] = {
0ecd233b
JS		 115/* 0*/ { "C168 series", 8, },
116 { "C104 series", 4, },
117 { "CI-104J series", 4, },
118 { "C168H/PCI series", 8, },
119 { "C104H/PCI series", 4, },
120/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
121 { "CI-132 series", 4, MXSER_HAS2 },
122 { "CI-134 series", 4, },
123 { "CP-132 series", 2, },
124 { "CP-114 series", 4, },
125/*10*/ { "CT-114 series", 4, },
126 { "CP-102 series", 2, MXSER_HIGHBAUD },
127 { "CP-104U series", 4, },
128 { "CP-168U series", 8, },
129 { "CP-132U series", 2, },
130/*15*/ { "CP-134U series", 4, },
131 { "CP-104JU series", 4, },
132 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
133 { "CP-118U series", 8, },
134 { "CP-102UL series", 2, },
135/*20*/ { "CP-102U series", 2, },
136 { "CP-118EL series", 8, },
137 { "CP-168EL series", 8, },
138 { "CP-104EL series", 4, },
139 { "CB-108 series", 8, },
140/*25*/ { "CB-114 series", 4, },
141 { "CB-134I series", 4, },
142 { "CP-138U series", 8, },
143 { "POS-104UL series", 4, }
cd7ed64e 144};
037ad48b 145
cd7ed64e
JS		 146/* driver_data correspond to the lines in the structure above
147 see also ISA probe function before you change something */
037ad48b 148static struct pci_device_id mxser_pcibrds[] = {
931ecbbe
JS		 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
f8cce2e5
JS		 167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
3306ce3d 172 { }
037ad48b 173};
037ad48b
JS		 174MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
175
037ad48b
JS		 176static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
177static int ttymajor = MXSERMAJOR;
178static int calloutmajor = MXSERCUMAJOR;
037ad48b
JS		 179
180/* Variables for insmod */
181
182MODULE_AUTHOR("Casper Yang");
183MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
184module_param_array(ioaddr, int, NULL, 0);
185module_param(ttymajor, int, 0);
037ad48b
JS		 186MODULE_LICENSE("GPL");
187
188struct mxser_log {
189 int tick;
190 unsigned long rxcnt[MXSER_PORTS];
191 unsigned long txcnt[MXSER_PORTS];
192};
193
194
195struct mxser_mon {
196 unsigned long rxcnt;
197 unsigned long txcnt;
198 unsigned long up_rxcnt;
199 unsigned long up_txcnt;
200 int modem_status;
201 unsigned char hold_reason;
202};
203
204struct mxser_mon_ext {
205 unsigned long rx_cnt[32];
206 unsigned long tx_cnt[32];
207 unsigned long up_rxcnt[32];
208 unsigned long up_txcnt[32];
209 int modem_status[32];
210
211 long baudrate[32];
212 int databits[32];
213 int stopbits[32];
214 int parity[32];
215 int flowctrl[32];
216 int fifo[32];
217 int iftype[32];
218};
219
55b307da
JS		 220struct mxser_board;
221
222struct mxser_port {
223 struct mxser_board *board;
224 struct tty_struct *tty;
225
226 unsigned long ioaddr;
227 unsigned long opmode_ioaddr;
228 int max_baud;
037ad48b 229
037ad48b
JS		 230 int rx_high_water;
231 int rx_trigger; /* Rx fifo trigger level */
232 int rx_low_water;
233 int baud_base; /* max. speed */
037ad48b 234 int type; /* UART type */
55b307da 235 int flags; /* defined in tty.h */
55b307da 236
037ad48b 237 int x_char; /* xon/xoff character */
037ad48b
JS		 238 int IER; /* Interrupt Enable Register */
239 int MCR; /* Modem control register */
55b307da
JS		 240
241 unsigned char stop_rx;
242 unsigned char ldisc_stop_rx;
243
244 int custom_divisor;
245 int close_delay;
246 unsigned short closing_wait;
247 unsigned char err_shadow;
037ad48b 248 unsigned long event;
55b307da 249
037ad48b
JS		 250 int count; /* # of fd on device */
251 int blocked_open; /* # of blocked opens */
55b307da
JS		 252 struct async_icount icount; /* kernel counters for 4 input interrupts */
253 int timeout;
254
255 int read_status_mask;
256 int ignore_status_mask;
257 int xmit_fifo_size;
037ad48b
JS		 258 unsigned char *xmit_buf;
259 int xmit_head;
260 int xmit_tail;
261 int xmit_cnt;
55b307da 262
606d099c 263 struct ktermios normal_termios;
55b307da
JS		 264
265 struct mxser_mon mon_data;
266
267 spinlock_t slock;
037ad48b 268 wait_queue_head_t open_wait;
037ad48b 269 wait_queue_head_t delta_msr_wait;
55b307da
JS		 270};
271
272struct mxser_board {
2094e757 273 unsigned int idx;
55b307da 274 int irq;
cd7ed64e 275 const struct mxser_cardinfo *info;
55b307da
JS		 276 unsigned long vector;
277 unsigned long vector_mask;
278
279 int chip_flag;
280 int uart_type;
281
282 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
037ad48b
JS		 283};
284
285struct mxser_mstatus {
286 tcflag_t cflag;
287 int cts;
288 int dsr;
289 int ri;
290 int dcd;
291};
292
293static struct mxser_mstatus GMStatus[MXSER_PORTS];
294
295static int mxserBoardCAP[MXSER_BOARDS] = {
296 0, 0, 0, 0
297 /* 0x180, 0x280, 0x200, 0x320 */
298};
299
55b307da 300static struct mxser_board mxser_boards[MXSER_BOARDS];
037ad48b 301static struct tty_driver *mxvar_sdriver;
037ad48b
JS		 302static struct mxser_log mxvar_log;
303static int mxvar_diagflag;
304static unsigned char mxser_msr[MXSER_PORTS + 1];
305static struct mxser_mon_ext mon_data_ext;
306static int mxser_set_baud_method[MXSER_PORTS + 1];
037ad48b 307
fb0c9295 308#ifdef CONFIG_PCI
f31e6835 309static int __devinit CheckIsMoxaMust(unsigned long io)
037ad48b
JS		 310{
311 u8 oldmcr, hwid;
312 int i;
313
314 outb(0, io + UART_LCR);
315 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
316 oldmcr = inb(io + UART_MCR);
317 outb(0, io + UART_MCR);
318 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
319 if ((hwid = inb(io + UART_MCR)) != 0) {
320 outb(oldmcr, io + UART_MCR);
321 return MOXA_OTHER_UART;
322 }
323
324 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
cd7ed64e
JS		 325 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
326 if (hwid == Gpci_uart_info[i].type)
037ad48b
JS		 327 return (int)hwid;
328 }
329 return MOXA_OTHER_UART;
330}
fb0c9295 331#endif
037ad48b 332
55b307da 333static void process_txrx_fifo(struct mxser_port *info)
037ad48b
JS		 334{
335 int i;
336
337 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
338 info->rx_trigger = 1;
339 info->rx_high_water = 1;
340 info->rx_low_water = 1;
341 info->xmit_fifo_size = 1;
55b307da
JS		 342 } else
343 for (i = 0; i < UART_INFO_NUM; i++)
344 if (info->board->chip_flag == Gpci_uart_info[i].type) {
037ad48b
JS		 345 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
346 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
347 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
348 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
349 break;
350 }
037ad48b
JS		 351}
352
a8dea4ec
JS		 353static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
354{
355 unsigned char status = 0;
037ad48b 356
a8dea4ec 357 status = inb(baseaddr + UART_MSR);
037ad48b 358
a8dea4ec
JS		 359 mxser_msr[port] &= 0x0F;
360 mxser_msr[port] |= status;
361 status = mxser_msr[port];
362 if (mode)
363 mxser_msr[port] = 0;
037ad48b 364
a8dea4ec
JS		 365 return status;
366}
55b307da 367
a8dea4ec
JS		 368static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
369 struct mxser_port *port)
370{
371 DECLARE_WAITQUEUE(wait, current);
372 int retval;
373 int do_clocal = 0;
374 unsigned long flags;
375
376 /*
377 * If non-blocking mode is set, or the port is not enabled,
378 * then make the check up front and then exit.
379 */
214efebb
JS		 380 if ((filp->f_flags & O_NONBLOCK) ||
381 test_bit(TTY_IO_ERROR, &tty->flags)) {
a8dea4ec
JS		 382 port->flags |= ASYNC_NORMAL_ACTIVE;
383 return 0;
037ad48b 384 }
a8dea4ec
JS		 385
386 if (tty->termios->c_cflag & CLOCAL)
387 do_clocal = 1;
388
037ad48b 389 /*
a8dea4ec
JS		 390 * Block waiting for the carrier detect and the line to become
391 * free (i.e., not in use by the callout). While we are in
392 * this loop, port->count is dropped by one, so that
393 * mxser_close() knows when to free things. We restore it upon
394 * exit, either normal or abnormal.
037ad48b 395 */
a8dea4ec
JS		 396 retval = 0;
397 add_wait_queue(&port->open_wait, &wait);
037ad48b 398
a8dea4ec
JS		 399 spin_lock_irqsave(&port->slock, flags);
400 if (!tty_hung_up_p(filp))
401 port->count--;
402 spin_unlock_irqrestore(&port->slock, flags);
403 port->blocked_open++;
404 while (1) {
405 spin_lock_irqsave(&port->slock, flags);
406 outb(inb(port->ioaddr + UART_MCR) |
407 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
408 spin_unlock_irqrestore(&port->slock, flags);
409 set_current_state(TASK_INTERRUPTIBLE);
410 if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
411 if (port->flags & ASYNC_HUP_NOTIFY)
412 retval = -EAGAIN;
413 else
414 retval = -ERESTARTSYS;
415 break;
416 }
417 if (!(port->flags & ASYNC_CLOSING) &&
418 (do_clocal ||
419 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
420 break;
421 if (signal_pending(current)) {
422 retval = -ERESTARTSYS;
423 break;
424 }
425 schedule();
037ad48b 426 }
a8dea4ec
JS		 427 set_current_state(TASK_RUNNING);
428 remove_wait_queue(&port->open_wait, &wait);
429 if (!tty_hung_up_p(filp))
430 port->count++;
431 port->blocked_open--;
432 if (retval)
433 return retval;
434 port->flags |= ASYNC_NORMAL_ACTIVE;
037ad48b
JS		 435 return 0;
436}
437
a8dea4ec 438static int mxser_set_baud(struct mxser_port *info, long newspd)
037ad48b 439{
f29e37c0 440 int quot = 0, baud;
a8dea4ec 441 unsigned char cval;
037ad48b 442
a8dea4ec 443 if (!info->tty || !info->tty->termios)
f29e37c0 444 return -1;
037ad48b 445
a8dea4ec 446 if (!(info->ioaddr))
f29e37c0 447 return -1;
037ad48b 448
a8dea4ec 449 if (newspd > info->max_baud)
f29e37c0 450 return -1;
037ad48b 451
d7f549fa
JS		 452 if (newspd == 134) {
453 quot = 2 * info->baud_base / 269;
454 tty_encode_baud_rate(info->tty, 134, 134);
455 } else if (newspd) {
456 quot = info->baud_base / newspd;
457 if (quot == 0)
458 quot = 1;
459 baud = info->baud_base/quot;
460 tty_encode_baud_rate(info->tty, baud, baud);
a8dea4ec 461 } else {
d7f549fa 462 quot = 0;
037ad48b
JS		 463 }
464
a8dea4ec
JS		 465 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
466 info->timeout += HZ / 50; /* Add .02 seconds of slop */
037ad48b 467
a8dea4ec 468 if (quot) {
a8dea4ec
JS		 469 info->MCR |= UART_MCR_DTR;
470 outb(info->MCR, info->ioaddr + UART_MCR);
a8dea4ec 471 } else {
a8dea4ec
JS		 472 info->MCR &= ~UART_MCR_DTR;
473 outb(info->MCR, info->ioaddr + UART_MCR);
f29e37c0 474 return 0;
037ad48b 475 }
037ad48b 476
a8dea4ec 477 cval = inb(info->ioaddr + UART_LCR);
037ad48b 478
a8dea4ec 479 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
037ad48b 480
a8dea4ec
JS		 481 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
482 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
483 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
037ad48b 484
d7f549fa
JS		 485#ifdef BOTHER
486 if (C_BAUD(info->tty) == BOTHER) {
487 quot = info->baud_base % newspd;
f64c84a1 488 quot *= 8;
d7f549fa
JS		 489 if (quot % newspd > newspd / 2) {
490 quot /= newspd;
f64c84a1 491 quot++;
d7f549fa
JS		 492 } else
493 quot /= newspd;
494
f64c84a1
JS		 495 SET_MOXA_MUST_ENUM_VALUE(info->ioaddr, quot);
496 } else
d7f549fa 497#endif
f64c84a1 498 SET_MOXA_MUST_ENUM_VALUE(info->ioaddr, 0);
037ad48b 499
f29e37c0 500 return 0;
a8dea4ec 501}
037ad48b 502
a8dea4ec
JS		 503/*
504 * This routine is called to set the UART divisor registers to match
505 * the specified baud rate for a serial port.
506 */
507static int mxser_change_speed(struct mxser_port *info,
606d099c 508 struct ktermios *old_termios)
a8dea4ec
JS		 509{
510 unsigned cflag, cval, fcr;
511 int ret = 0;
512 unsigned char status;
037ad48b 513
a8dea4ec
JS		 514 if (!info->tty || !info->tty->termios)
515 return ret;
516 cflag = info->tty->termios->c_cflag;
517 if (!(info->ioaddr))
518 return ret;
037ad48b 519
d7f549fa
JS		 520 if (mxser_set_baud_method[info->tty->index] == 0)
521 mxser_set_baud(info, tty_get_baud_rate(info->tty));
037ad48b 522
a8dea4ec
JS		 523 /* byte size and parity */
524 switch (cflag & CSIZE) {
525 case CS5:
526 cval = 0x00;
527 break;
528 case CS6:
529 cval = 0x01;
530 break;
531 case CS7:
532 cval = 0x02;
533 break;
534 case CS8:
535 cval = 0x03;
536 break;
537 default:
538 cval = 0x00;
539 break; /* too keep GCC shut... */
540 }
541 if (cflag & CSTOPB)
542 cval |= 0x04;
543 if (cflag & PARENB)
544 cval |= UART_LCR_PARITY;
545 if (!(cflag & PARODD))
546 cval |= UART_LCR_EPAR;
547 if (cflag & CMSPAR)
548 cval |= UART_LCR_SPAR;
037ad48b 549
a8dea4ec
JS		 550 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
551 if (info->board->chip_flag) {
552 fcr = UART_FCR_ENABLE_FIFO;
553 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
554 SET_MOXA_MUST_FIFO_VALUE(info);
555 } else
556 fcr = 0;
557 } else {
558 fcr = UART_FCR_ENABLE_FIFO;
a8dea4ec
JS		 559 if (info->board->chip_flag) {
560 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
561 SET_MOXA_MUST_FIFO_VALUE(info);
562 } else {
a8dea4ec
JS		 563 switch (info->rx_trigger) {
564 case 1:
565 fcr |= UART_FCR_TRIGGER_1;
566 break;
567 case 4:
568 fcr |= UART_FCR_TRIGGER_4;
569 break;
570 case 8:
571 fcr |= UART_FCR_TRIGGER_8;
572 break;
573 default:
574 fcr |= UART_FCR_TRIGGER_14;
575 break;
576 }
037ad48b 577 }
037ad48b
JS		 578 }
579
a8dea4ec
JS		 580 /* CTS flow control flag and modem status interrupts */
581 info->IER &= ~UART_IER_MSI;
582 info->MCR &= ~UART_MCR_AFE;
583 if (cflag & CRTSCTS) {
584 info->flags |= ASYNC_CTS_FLOW;
585 info->IER |= UART_IER_MSI;
586 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
587 info->MCR |= UART_MCR_AFE;
a8dea4ec 588 } else {
a8dea4ec 589 status = inb(info->ioaddr + UART_MSR);
a8dea4ec
JS		 590 if (info->tty->hw_stopped) {
591 if (status & UART_MSR_CTS) {
592 info->tty->hw_stopped = 0;
593 if (info->type != PORT_16550A &&
594 !info->board->chip_flag) {
595 outb(info->IER & ~UART_IER_THRI,
596 info->ioaddr +
597 UART_IER);
598 info->IER |= UART_IER_THRI;
599 outb(info->IER, info->ioaddr +
600 UART_IER);
601 }
47c85c0d
JS		 602 tty_wakeup(info->tty);
603 }
a8dea4ec
JS		 604 } else {
605 if (!(status & UART_MSR_CTS)) {
606 info->tty->hw_stopped = 1;
607 if ((info->type != PORT_16550A) &&
608 (!info->board->chip_flag)) {
609 info->IER &= ~UART_IER_THRI;
610 outb(info->IER, info->ioaddr +
611 UART_IER);
612 }
613 }
614 }
615 }
616 } else {
617 info->flags &= ~ASYNC_CTS_FLOW;
618 }
619 outb(info->MCR, info->ioaddr + UART_MCR);
620 if (cflag & CLOCAL) {
621 info->flags &= ~ASYNC_CHECK_CD;
622 } else {
623 info->flags |= ASYNC_CHECK_CD;
624 info->IER |= UART_IER_MSI;
625 }
626 outb(info->IER, info->ioaddr + UART_IER);
037ad48b 627
a8dea4ec
JS		 628 /*
629 * Set up parity check flag
630 */
631 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
632 if (I_INPCK(info->tty))
633 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
634 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
635 info->read_status_mask |= UART_LSR_BI;
037ad48b 636
a8dea4ec 637 info->ignore_status_mask = 0;
037ad48b 638
a8dea4ec
JS		 639 if (I_IGNBRK(info->tty)) {
640 info->ignore_status_mask |= UART_LSR_BI;
641 info->read_status_mask |= UART_LSR_BI;
642 /*
643 * If we're ignore parity and break indicators, ignore
644 * overruns too. (For real raw support).
645 */
646 if (I_IGNPAR(info->tty)) {
647 info->ignore_status_mask |=
648 UART_LSR_OE |
649 UART_LSR_PE |
650 UART_LSR_FE;
651 info->read_status_mask |=
652 UART_LSR_OE |
653 UART_LSR_PE |
654 UART_LSR_FE;
037ad48b 655 }
037ad48b 656 }
a8dea4ec 657 if (info->board->chip_flag) {
a8dea4ec
JS		 658 SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty));
659 SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty));
660 if (I_IXON(info->tty)) {
661 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
662 } else {
663 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
037ad48b 664 }
a8dea4ec
JS		 665 if (I_IXOFF(info->tty)) {
666 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
667 } else {
668 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
037ad48b
JS		 669 }
670 }
037ad48b 671
037ad48b 672
a8dea4ec
JS		 673 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
674 outb(cval, info->ioaddr + UART_LCR);
037ad48b 675
a8dea4ec 676 return ret;
037ad48b
JS		 677}
678
a8dea4ec 679static void mxser_check_modem_status(struct mxser_port *port, int status)
037ad48b 680{
a8dea4ec
JS		 681 /* update input line counters */
682 if (status & UART_MSR_TERI)
683 port->icount.rng++;
684 if (status & UART_MSR_DDSR)
685 port->icount.dsr++;
686 if (status & UART_MSR_DDCD)
687 port->icount.dcd++;
688 if (status & UART_MSR_DCTS)
689 port->icount.cts++;
690 port->mon_data.modem_status = status;
691 wake_up_interruptible(&port->delta_msr_wait);
037ad48b 692
a8dea4ec
JS		 693 if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
694 if (status & UART_MSR_DCD)
695 wake_up_interruptible(&port->open_wait);
a8dea4ec 696 }
037ad48b 697
a8dea4ec
JS		 698 if (port->flags & ASYNC_CTS_FLOW) {
699 if (port->tty->hw_stopped) {
700 if (status & UART_MSR_CTS) {
701 port->tty->hw_stopped = 0;
702
703 if ((port->type != PORT_16550A) &&
704 (!port->board->chip_flag)) {
705 outb(port->IER & ~UART_IER_THRI,
706 port->ioaddr + UART_IER);
707 port->IER |= UART_IER_THRI;
708 outb(port->IER, port->ioaddr +
709 UART_IER);
710 }
47c85c0d 711 tty_wakeup(port->tty);
a8dea4ec
JS		 712 }
713 } else {
714 if (!(status & UART_MSR_CTS)) {
715 port->tty->hw_stopped = 1;
716 if (port->type != PORT_16550A &&
717 !port->board->chip_flag) {
718 port->IER &= ~UART_IER_THRI;
719 outb(port->IER, port->ioaddr +
720 UART_IER);
721 }
722 }
723 }
724 }
037ad48b
JS		 725}
726
a8dea4ec 727static int mxser_startup(struct mxser_port *info)
037ad48b 728{
a8dea4ec
JS		 729 unsigned long page;
730 unsigned long flags;
037ad48b 731
a8dea4ec
JS		 732 page = __get_free_page(GFP_KERNEL);
733 if (!page)
734 return -ENOMEM;
037ad48b 735
a8dea4ec 736 spin_lock_irqsave(&info->slock, flags);
037ad48b 737
a8dea4ec
JS		 738 if (info->flags & ASYNC_INITIALIZED) {
739 free_page(page);
740 spin_unlock_irqrestore(&info->slock, flags);
741 return 0;
742 }
037ad48b 743
a8dea4ec
JS		 744 if (!info->ioaddr || !info->type) {
745 if (info->tty)
746 set_bit(TTY_IO_ERROR, &info->tty->flags);
747 free_page(page);
748 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 749 return 0;
a8dea4ec
JS		 750 }
751 if (info->xmit_buf)
752 free_page(page);
753 else
754 info->xmit_buf = (unsigned char *) page;
037ad48b 755
037ad48b 756 /*
a8dea4ec
JS		 757 * Clear the FIFO buffers and disable them
758 * (they will be reenabled in mxser_change_speed())
037ad48b 759 */
a8dea4ec
JS		 760 if (info->board->chip_flag)
761 outb((UART_FCR_CLEAR_RCVR |
762 UART_FCR_CLEAR_XMIT |
763 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
764 else
765 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
766 info->ioaddr + UART_FCR);
767
768 /*
769 * At this point there's no way the LSR could still be 0xFF;
770 * if it is, then bail out, because there's likely no UART
771 * here.
772 */
773 if (inb(info->ioaddr + UART_LSR) == 0xff) {
774 spin_unlock_irqrestore(&info->slock, flags);
775 if (capable(CAP_SYS_ADMIN)) {
776 if (info->tty)
777 set_bit(TTY_IO_ERROR, &info->tty->flags);
778 return 0;
779 } else
780 return -ENODEV;
781 }
782
783 /*
784 * Clear the interrupt registers.
785 */
786 (void) inb(info->ioaddr + UART_LSR);
787 (void) inb(info->ioaddr + UART_RX);
788 (void) inb(info->ioaddr + UART_IIR);
789 (void) inb(info->ioaddr + UART_MSR);
790
791 /*
792 * Now, initialize the UART
793 */
794 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
795 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
796 outb(info->MCR, info->ioaddr + UART_MCR);
797
798 /*
799 * Finally, enable interrupts
800 */
801 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
a8dea4ec 802
a8dea4ec
JS		 803 if (info->board->chip_flag)
804 info->IER |= MOXA_MUST_IER_EGDAI;
a8dea4ec
JS		 805 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
806
807 /*
808 * And clear the interrupt registers again for luck.
809 */
810 (void) inb(info->ioaddr + UART_LSR);
811 (void) inb(info->ioaddr + UART_RX);
812 (void) inb(info->ioaddr + UART_IIR);
813 (void) inb(info->ioaddr + UART_MSR);
814
815 if (info->tty)
816 clear_bit(TTY_IO_ERROR, &info->tty->flags);
817 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
818
819 /*
820 * and set the speed of the serial port
821 */
a8dea4ec 822 mxser_change_speed(info, NULL);
5ff7205d 823 info->flags |= ASYNC_INITIALIZED;
f64c84a1 824 spin_unlock_irqrestore(&info->slock, flags);
a8dea4ec 825
a8dea4ec
JS		 826 return 0;
827}
828
829/*
830 * This routine will shutdown a serial port; interrupts maybe disabled, and
831 * DTR is dropped if the hangup on close termio flag is on.
832 */
833static void mxser_shutdown(struct mxser_port *info)
834{
835 unsigned long flags;
836
837 if (!(info->flags & ASYNC_INITIALIZED))
838 return;
839
840 spin_lock_irqsave(&info->slock, flags);
841
842 /*
843 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
844 * here so the queue might never be waken up
845 */
846 wake_up_interruptible(&info->delta_msr_wait);
847
848 /*
849 * Free the IRQ, if necessary
850 */
851 if (info->xmit_buf) {
852 free_page((unsigned long) info->xmit_buf);
853 info->xmit_buf = NULL;
854 }
855
856 info->IER = 0;
857 outb(0x00, info->ioaddr + UART_IER);
858
859 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
860 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
861 outb(info->MCR, info->ioaddr + UART_MCR);
862
863 /* clear Rx/Tx FIFO's */
a8dea4ec
JS		 864 if (info->board->chip_flag)
865 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
866 MOXA_MUST_FCR_GDA_MODE_ENABLE,
867 info->ioaddr + UART_FCR);
868 else
a8dea4ec
JS		 869 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
870 info->ioaddr + UART_FCR);
871
872 /* read data port to reset things */
873 (void) inb(info->ioaddr + UART_RX);
874
875 if (info->tty)
876 set_bit(TTY_IO_ERROR, &info->tty->flags);
877
878 info->flags &= ~ASYNC_INITIALIZED;
879
a8dea4ec
JS		 880 if (info->board->chip_flag)
881 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
a8dea4ec
JS		 882
883 spin_unlock_irqrestore(&info->slock, flags);
884}
885
886/*
887 * This routine is called whenever a serial port is opened. It
888 * enables interrupts for a serial port, linking in its async structure into
889 * the IRQ chain. It also performs the serial-specific
890 * initialization for the tty structure.
891 */
892static int mxser_open(struct tty_struct *tty, struct file *filp)
893{
894 struct mxser_port *info;
5ff7205d 895 unsigned long flags;
a8dea4ec
JS		 896 int retval, line;
897
a8dea4ec
JS		 898 line = tty->index;
899 if (line == MXSER_PORTS)
900 return 0;
901 if (line < 0 || line > MXSER_PORTS)
902 return -ENODEV;
903 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
904 if (!info->ioaddr)
905 return -ENODEV;
906
907 tty->driver_data = info;
908 info->tty = tty;
909 /*
910 * Start up serial port
911 */
5ff7205d 912 spin_lock_irqsave(&info->slock, flags);
a8dea4ec 913 info->count++;
5ff7205d 914 spin_unlock_irqrestore(&info->slock, flags);
a8dea4ec
JS		 915 retval = mxser_startup(info);
916 if (retval)
917 return retval;
918
919 retval = mxser_block_til_ready(tty, filp, info);
920 if (retval)
921 return retval;
922
e079f495 923 /* unmark here for very high baud rate (ex. 921600 bps) used */
037ad48b
JS		 924 tty->low_latency = 1;
925 return 0;
926}
927
928/*
929 * This routine is called when the serial port gets closed. First, we
930 * wait for the last remaining data to be sent. Then, we unlink its
931 * async structure from the interrupt chain if necessary, and we free
932 * that IRQ if nothing is left in the chain.
933 */
934static void mxser_close(struct tty_struct *tty, struct file *filp)
935{
55b307da 936 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 937
938 unsigned long timeout;
939 unsigned long flags;
037ad48b
JS		 940
941 if (tty->index == MXSER_PORTS)
942 return;
943 if (!info)
944 return;
945
946 spin_lock_irqsave(&info->slock, flags);
947
948 if (tty_hung_up_p(filp)) {
949 spin_unlock_irqrestore(&info->slock, flags);
950 return;
951 }
952 if ((tty->count == 1) && (info->count != 1)) {
953 /*
954 * Uh, oh. tty->count is 1, which means that the tty
955 * structure will be freed. Info->count should always
956 * be one in these conditions. If it's greater than
957 * one, we've got real problems, since it means the
958 * serial port won't be shutdown.
959 */
960 printk(KERN_ERR "mxser_close: bad serial port count; "
961 "tty->count is 1, info->count is %d\n", info->count);
962 info->count = 1;
963 }
964 if (--info->count < 0) {
965 printk(KERN_ERR "mxser_close: bad serial port count for "
55b307da 966 "ttys%d: %d\n", tty->index, info->count);
037ad48b
JS		 967 info->count = 0;
968 }
969 if (info->count) {
970 spin_unlock_irqrestore(&info->slock, flags);
971 return;
972 }
973 info->flags |= ASYNC_CLOSING;
974 spin_unlock_irqrestore(&info->slock, flags);
975 /*
976 * Save the termios structure, since this port may have
977 * separate termios for callout and dialin.
978 */
979 if (info->flags & ASYNC_NORMAL_ACTIVE)
980 info->normal_termios = *tty->termios;
981 /*
982 * Now we wait for the transmit buffer to clear; and we notify
983 * the line discipline to only process XON/XOFF characters.
984 */
985 tty->closing = 1;
986 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
987 tty_wait_until_sent(tty, info->closing_wait);
988 /*
989 * At this point we stop accepting input. To do this, we
990 * disable the receive line status interrupts, and tell the
991 * interrupt driver to stop checking the data ready bit in the
992 * line status register.
993 */
994 info->IER &= ~UART_IER_RLSI;
55b307da 995 if (info->board->chip_flag)
037ad48b 996 info->IER &= ~MOXA_MUST_RECV_ISR;
e079f495 997
037ad48b 998 if (info->flags & ASYNC_INITIALIZED) {
55b307da 999 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1000 /*
1001 * Before we drop DTR, make sure the UART transmitter
1002 * has completely drained; this is especially
1003 * important if there is a transmit FIFO!
1004 */
1005 timeout = jiffies + HZ;
55b307da 1006 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
037ad48b
JS		 1007 schedule_timeout_interruptible(5);
1008 if (time_after(jiffies, timeout))
1009 break;
1010 }
1011 }
1012 mxser_shutdown(info);
1013
1014 if (tty->driver->flush_buffer)
1015 tty->driver->flush_buffer(tty);
1016
7e8bcf9a 1017 tty_ldisc_flush(tty);
037ad48b
JS		 1018
1019 tty->closing = 0;
1020 info->event = 0;
1021 info->tty = NULL;
1022 if (info->blocked_open) {
1023 if (info->close_delay)
1024 schedule_timeout_interruptible(info->close_delay);
1025 wake_up_interruptible(&info->open_wait);
1026 }
1027
1028 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
037ad48b
JS		 1029}
1030
1031static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1032{
1033 int c, total = 0;
55b307da 1034 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1035 unsigned long flags;
1036
1037 if (!info->xmit_buf)
1038 return 0;
1039
1040 while (1) {
1041 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1042 SERIAL_XMIT_SIZE - info->xmit_head));
1043 if (c <= 0)
1044 break;
1045
1046 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1047 spin_lock_irqsave(&info->slock, flags);
1048 info->xmit_head = (info->xmit_head + c) &
1049 (SERIAL_XMIT_SIZE - 1);
1050 info->xmit_cnt += c;
1051 spin_unlock_irqrestore(&info->slock, flags);
1052
1053 buf += c;
1054 count -= c;
1055 total += c;
1056 }
1057
e079f495 1058 if (info->xmit_cnt && !tty->stopped) {
037ad48b
JS		 1059 if (!tty->hw_stopped ||
1060 (info->type == PORT_16550A) ||
55b307da 1061 (info->board->chip_flag)) {
037ad48b 1062 spin_lock_irqsave(&info->slock, flags);
55b307da
JS		 1063 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1064 UART_IER);
037ad48b 1065 info->IER |= UART_IER_THRI;
55b307da 1066 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1067 spin_unlock_irqrestore(&info->slock, flags);
1068 }
1069 }
1070 return total;
1071}
1072
1073static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1074{
55b307da 1075 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1076 unsigned long flags;
1077
1078 if (!info->xmit_buf)
1079 return;
1080
1081 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1082 return;
1083
1084 spin_lock_irqsave(&info->slock, flags);
1085 info->xmit_buf[info->xmit_head++] = ch;
1086 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1087 info->xmit_cnt++;
1088 spin_unlock_irqrestore(&info->slock, flags);
e079f495 1089 if (!tty->stopped) {
037ad48b
JS		 1090 if (!tty->hw_stopped ||
1091 (info->type == PORT_16550A) ||
55b307da 1092 info->board->chip_flag) {
037ad48b 1093 spin_lock_irqsave(&info->slock, flags);
55b307da 1094 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1095 info->IER |= UART_IER_THRI;
55b307da 1096 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1097 spin_unlock_irqrestore(&info->slock, flags);
1098 }
1099 }
1100}
1101
1102
1103static void mxser_flush_chars(struct tty_struct *tty)
1104{
55b307da 1105 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1106 unsigned long flags;
1107
1108 if (info->xmit_cnt <= 0 ||
1109 tty->stopped ||
1110 !info->xmit_buf ||
1111 (tty->hw_stopped &&
1112 (info->type != PORT_16550A) &&
55b307da 1113 (!info->board->chip_flag)
037ad48b
JS		 1114 ))
1115 return;
1116
1117 spin_lock_irqsave(&info->slock, flags);
1118
55b307da 1119 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1120 info->IER |= UART_IER_THRI;
55b307da 1121 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1122
1123 spin_unlock_irqrestore(&info->slock, flags);
1124}
1125
1126static int mxser_write_room(struct tty_struct *tty)
1127{
55b307da 1128 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1129 int ret;
1130
1131 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1132 if (ret < 0)
1133 ret = 0;
1134 return ret;
1135}
1136
1137static int mxser_chars_in_buffer(struct tty_struct *tty)
1138{
55b307da 1139 struct mxser_port *info = tty->driver_data;
925e9c1c 1140 return info->xmit_cnt;
037ad48b
JS		 1141}
1142
1143static void mxser_flush_buffer(struct tty_struct *tty)
1144{
55b307da 1145 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1146 char fcr;
1147 unsigned long flags;
1148
1149
1150 spin_lock_irqsave(&info->slock, flags);
1151 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1152
55b307da 1153 fcr = inb(info->ioaddr + UART_FCR);
037ad48b 1154 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
55b307da
JS		 1155 info->ioaddr + UART_FCR);
1156 outb(fcr, info->ioaddr + UART_FCR);
037ad48b
JS		 1157
1158 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1159
7e8bcf9a 1160 tty_wakeup(tty);
037ad48b
JS		 1161}
1162
a8dea4ec
JS		 1163/*
1164 * ------------------------------------------------------------
1165 * friends of mxser_ioctl()
1166 * ------------------------------------------------------------
1167 */
1168static int mxser_get_serial_info(struct mxser_port *info,
1169 struct serial_struct __user *retinfo)
037ad48b 1170{
a8dea4ec 1171 struct serial_struct tmp;
037ad48b 1172
a8dea4ec
JS		 1173 if (!retinfo)
1174 return -EFAULT;
1175 memset(&tmp, 0, sizeof(tmp));
1176 tmp.type = info->type;
1177 tmp.line = info->tty->index;
1178 tmp.port = info->ioaddr;
1179 tmp.irq = info->board->irq;
1180 tmp.flags = info->flags;
1181 tmp.baud_base = info->baud_base;
1182 tmp.close_delay = info->close_delay;
1183 tmp.closing_wait = info->closing_wait;
1184 tmp.custom_divisor = info->custom_divisor;
1185 tmp.hub6 = 0;
1186 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1187 return -EFAULT;
1188 return 0;
1189}
037ad48b 1190
a8dea4ec
JS		 1191static int mxser_set_serial_info(struct mxser_port *info,
1192 struct serial_struct __user *new_info)
1193{
1194 struct serial_struct new_serial;
f64c84a1 1195 unsigned long sl_flags;
a8dea4ec
JS		 1196 unsigned int flags;
1197 int retval = 0;
037ad48b 1198
a8dea4ec
JS		 1199 if (!new_info || !info->ioaddr)
1200 return -EFAULT;
1201 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1202 return -EFAULT;
037ad48b 1203
a8dea4ec
JS		 1204 if ((new_serial.irq != info->board->irq) ||
1205 (new_serial.port != info->ioaddr) ||
1206 (new_serial.custom_divisor != info->custom_divisor) ||
1207 (new_serial.baud_base != info->baud_base))
1208 return -EPERM;
037ad48b 1209
a8dea4ec
JS		 1210 flags = info->flags & ASYNC_SPD_MASK;
1211
1212 if (!capable(CAP_SYS_ADMIN)) {
1213 if ((new_serial.baud_base != info->baud_base) ||
1214 (new_serial.close_delay != info->close_delay) ||
1215 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
1216 return -EPERM;
1217 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1218 (new_serial.flags & ASYNC_USR_MASK));
1219 } else {
037ad48b 1220 /*
a8dea4ec
JS		 1221 * OK, past this point, all the error checking has been done.
1222 * At this point, we start making changes.....
037ad48b 1223 */
a8dea4ec
JS		 1224 info->flags = ((info->flags & ~ASYNC_FLAGS) |
1225 (new_serial.flags & ASYNC_FLAGS));
1226 info->close_delay = new_serial.close_delay * HZ / 100;
1227 info->closing_wait = new_serial.closing_wait * HZ / 100;
1228 info->tty->low_latency =
1229 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
e079f495 1230 info->tty->low_latency = 0;
a8dea4ec 1231 }
037ad48b 1232
a8dea4ec 1233 info->type = new_serial.type;
037ad48b 1234
a8dea4ec
JS		 1235 process_txrx_fifo(info);
1236
1237 if (info->flags & ASYNC_INITIALIZED) {
f64c84a1
JS		 1238 if (flags != (info->flags & ASYNC_SPD_MASK)) {
1239 spin_lock_irqsave(&info->slock, sl_flags);
a8dea4ec 1240 mxser_change_speed(info, NULL);
f64c84a1
JS		 1241 spin_unlock_irqrestore(&info->slock, sl_flags);
1242 }
a8dea4ec
JS		 1243 } else
1244 retval = mxser_startup(info);
1245
1246 return retval;
1247}
037ad48b 1248
a8dea4ec
JS		 1249/*
1250 * mxser_get_lsr_info - get line status register info
1251 *
1252 * Purpose: Let user call ioctl() to get info when the UART physically
1253 * is emptied. On bus types like RS485, the transmitter must
1254 * release the bus after transmitting. This must be done when
1255 * the transmit shift register is empty, not be done when the
1256 * transmit holding register is empty. This functionality
1257 * allows an RS485 driver to be written in user space.
1258 */
1259static int mxser_get_lsr_info(struct mxser_port *info,
1260 unsigned int __user *value)
1261{
1262 unsigned char status;
1263 unsigned int result;
1264 unsigned long flags;
037ad48b 1265
a8dea4ec
JS		 1266 spin_lock_irqsave(&info->slock, flags);
1267 status = inb(info->ioaddr + UART_LSR);
1268 spin_unlock_irqrestore(&info->slock, flags);
1269 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1270 return put_user(result, value);
1271}
037ad48b 1272
a8dea4ec
JS		 1273/*
1274 * This routine sends a break character out the serial port.
1275 */
1276static void mxser_send_break(struct mxser_port *info, int duration)
1277{
1278 unsigned long flags;
037ad48b 1279
a8dea4ec
JS		 1280 if (!info->ioaddr)
1281 return;
1282 set_current_state(TASK_INTERRUPTIBLE);
1283 spin_lock_irqsave(&info->slock, flags);
1284 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
1285 info->ioaddr + UART_LCR);
1286 spin_unlock_irqrestore(&info->slock, flags);
1287 schedule_timeout(duration);
1288 spin_lock_irqsave(&info->slock, flags);
1289 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
1290 info->ioaddr + UART_LCR);
1291 spin_unlock_irqrestore(&info->slock, flags);
1292}
037ad48b 1293
a8dea4ec
JS		 1294static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1295{
1296 struct mxser_port *info = tty->driver_data;
1297 unsigned char control, status;
1298 unsigned long flags;
037ad48b 1299
037ad48b 1300
a8dea4ec
JS		 1301 if (tty->index == MXSER_PORTS)
1302 return -ENOIOCTLCMD;
214efebb 1303 if (test_bit(TTY_IO_ERROR, &tty->flags))
a8dea4ec 1304 return -EIO;
037ad48b 1305
a8dea4ec 1306 control = info->MCR;
037ad48b 1307
a8dea4ec
JS		 1308 spin_lock_irqsave(&info->slock, flags);
1309 status = inb(info->ioaddr + UART_MSR);
1310 if (status & UART_MSR_ANY_DELTA)
1311 mxser_check_modem_status(info, status);
1312 spin_unlock_irqrestore(&info->slock, flags);
1313 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1314 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1315 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1316 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1317 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1318 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1319}
037ad48b 1320
a8dea4ec
JS		 1321static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1322 unsigned int set, unsigned int clear)
1323{
1324 struct mxser_port *info = tty->driver_data;
1325 unsigned long flags;
037ad48b 1326
037ad48b 1327
a8dea4ec
JS		 1328 if (tty->index == MXSER_PORTS)
1329 return -ENOIOCTLCMD;
214efebb 1330 if (test_bit(TTY_IO_ERROR, &tty->flags))
a8dea4ec 1331 return -EIO;
037ad48b 1332
a8dea4ec 1333 spin_lock_irqsave(&info->slock, flags);
037ad48b 1334
a8dea4ec
JS		 1335 if (set & TIOCM_RTS)
1336 info->MCR |= UART_MCR_RTS;
1337 if (set & TIOCM_DTR)
1338 info->MCR |= UART_MCR_DTR;
037ad48b 1339
a8dea4ec
JS		 1340 if (clear & TIOCM_RTS)
1341 info->MCR &= ~UART_MCR_RTS;
1342 if (clear & TIOCM_DTR)
1343 info->MCR &= ~UART_MCR_DTR;
037ad48b 1344
a8dea4ec
JS		 1345 outb(info->MCR, info->ioaddr + UART_MCR);
1346 spin_unlock_irqrestore(&info->slock, flags);
037ad48b
JS		 1347 return 0;
1348}
1349
c76b0930 1350static int __init mxser_program_mode(int port)
037ad48b 1351{
a8dea4ec 1352 int id, i, j, n;
037ad48b 1353
a8dea4ec
JS		 1354 outb(0, port);
1355 outb(0, port);
1356 outb(0, port);
1357 (void)inb(port);
1358 (void)inb(port);
1359 outb(0, port);
1360 (void)inb(port);
037ad48b 1361
a8dea4ec
JS		 1362 id = inb(port + 1) & 0x1F;
1363 if ((id != C168_ASIC_ID) &&
1364 (id != C104_ASIC_ID) &&
1365 (id != C102_ASIC_ID) &&
1366 (id != CI132_ASIC_ID) &&
1367 (id != CI134_ASIC_ID) &&
1368 (id != CI104J_ASIC_ID))
1369 return -1;
1370 for (i = 0, j = 0; i < 4; i++) {
1371 n = inb(port + 2);
1372 if (n == 'M') {
1373 j = 1;
1374 } else if ((j == 1) && (n == 1)) {
1375 j = 2;
1376 break;
1377 } else
1378 j = 0;
1379 }
1380 if (j != 2)
1381 id = -2;
1382 return id;
1383}
1384
c76b0930 1385static void __init mxser_normal_mode(int port)
a8dea4ec
JS		 1386{
1387 int i, n;
1388
1389 outb(0xA5, port + 1);
1390 outb(0x80, port + 3);
1391 outb(12, port + 0); /* 9600 bps */
1392 outb(0, port + 1);
1393 outb(0x03, port + 3); /* 8 data bits */
1394 outb(0x13, port + 4); /* loop back mode */
1395 for (i = 0; i < 16; i++) {
1396 n = inb(port + 5);
1397 if ((n & 0x61) == 0x60)
1398 break;
1399 if ((n & 1) == 1)
1400 (void)inb(port);
1401 }
1402 outb(0x00, port + 4);
1403}
1404
1405#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1406#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1407#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1408#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1409#define EN_CCMD 0x000 /* Chip's command register */
1410#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1411#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1412#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1413#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1414#define EN0_DCFG 0x00E /* Data configuration reg WR */
1415#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1416#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1417#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
c76b0930 1418static int __init mxser_read_register(int port, unsigned short *regs)
a8dea4ec
JS		 1419{
1420 int i, k, value, id;
1421 unsigned int j;
1422
1423 id = mxser_program_mode(port);
1424 if (id < 0)
1425 return id;
1426 for (i = 0; i < 14; i++) {
1427 k = (i & 0x3F) | 0x180;
1428 for (j = 0x100; j > 0; j >>= 1) {
1429 outb(CHIP_CS, port);
1430 if (k & j) {
1431 outb(CHIP_CS | CHIP_DO, port);
1432 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1433 } else {
1434 outb(CHIP_CS, port);
1435 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1436 }
1437 }
1438 (void)inb(port);
1439 value = 0;
1440 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1441 outb(CHIP_CS, port);
1442 outb(CHIP_CS | CHIP_SK, port);
1443 if (inb(port) & CHIP_DI)
1444 value |= j;
1445 }
1446 regs[i] = value;
1447 outb(0, port);
1448 }
1449 mxser_normal_mode(port);
1450 return id;
1451}
1452
a8dea4ec
JS		 1453static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1454{
1455 struct mxser_port *port;
1456 int result, status;
1457 unsigned int i, j;
1458
1459 switch (cmd) {
1460 case MOXA_GET_CONF:
1461/* if (copy_to_user(argp, mxsercfg,
1462 sizeof(struct mxser_hwconf) * 4))
1463 return -EFAULT;
1464 return 0;*/
1465 return -ENXIO;
1466 case MOXA_GET_MAJOR:
1467 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1468 return -EFAULT;
1469 return 0;
1470
1471 case MOXA_GET_CUMAJOR:
1472 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
037ad48b
JS		 1473 return -EFAULT;
1474 return 0;
1475
1476 case MOXA_CHKPORTENABLE:
1477 result = 0;
55b307da
JS		 1478
1479 for (i = 0; i < MXSER_BOARDS; i++)
1480 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1481 if (mxser_boards[i].ports[j].ioaddr)
1482 result |= (1 << i);
1483
037ad48b
JS		 1484 return put_user(result, (unsigned long __user *)argp);
1485 case MOXA_GETDATACOUNT:
1486 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1487 return -EFAULT;
1488 return 0;
1489 case MOXA_GETMSTATUS:
55b307da
JS		 1490 for (i = 0; i < MXSER_BOARDS; i++)
1491 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1492 port = &mxser_boards[i].ports[j];
1493
1494 GMStatus[i].ri = 0;
1495 if (!port->ioaddr) {
1496 GMStatus[i].dcd = 0;
1497 GMStatus[i].dsr = 0;
1498 GMStatus[i].cts = 0;
1499 continue;
1500 }
037ad48b 1501
55b307da
JS		 1502 if (!port->tty || !port->tty->termios)
1503 GMStatus[i].cflag =
1504 port->normal_termios.c_cflag;
1505 else
1506 GMStatus[i].cflag =
1507 port->tty->termios->c_cflag;
037ad48b 1508
55b307da
JS		 1509 status = inb(port->ioaddr + UART_MSR);
1510 if (status & 0x80 /*UART_MSR_DCD */ )
1511 GMStatus[i].dcd = 1;
1512 else
1513 GMStatus[i].dcd = 0;
037ad48b 1514
55b307da
JS		 1515 if (status & 0x20 /*UART_MSR_DSR */ )
1516 GMStatus[i].dsr = 1;
1517 else
1518 GMStatus[i].dsr = 0;
037ad48b
JS		 1519
1520
55b307da
JS		 1521 if (status & 0x10 /*UART_MSR_CTS */ )
1522 GMStatus[i].cts = 1;
1523 else
1524 GMStatus[i].cts = 0;
1525 }
037ad48b
JS		 1526 if (copy_to_user(argp, GMStatus,
1527 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1528 return -EFAULT;
1529 return 0;
1530 case MOXA_ASPP_MON_EXT: {
2b770b4b 1531 int p, shiftbit;
55b307da
JS		 1532 unsigned long opmode;
1533 unsigned cflag, iflag;
037ad48b 1534
55b307da
JS		 1535 for (i = 0; i < MXSER_BOARDS; i++)
1536 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1537 port = &mxser_boards[i].ports[j];
1538 if (!port->ioaddr)
037ad48b
JS		 1539 continue;
1540
55b307da 1541 status = mxser_get_msr(port->ioaddr, 0, i);
55b307da 1542
037ad48b 1543 if (status & UART_MSR_TERI)
55b307da 1544 port->icount.rng++;
037ad48b 1545 if (status & UART_MSR_DDSR)
55b307da 1546 port->icount.dsr++;
037ad48b 1547 if (status & UART_MSR_DDCD)
55b307da 1548 port->icount.dcd++;
037ad48b 1549 if (status & UART_MSR_DCTS)
55b307da
JS		 1550 port->icount.cts++;
1551
1552 port->mon_data.modem_status = status;
1553 mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
1554 mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
1555 mon_data_ext.up_rxcnt[i] =
1556 port->mon_data.up_rxcnt;
1557 mon_data_ext.up_txcnt[i] =
1558 port->mon_data.up_txcnt;
1559 mon_data_ext.modem_status[i] =
1560 port->mon_data.modem_status;
d7f549fa
JS		 1561 mon_data_ext.baudrate[i] =
1562 tty_get_baud_rate(port->tty);
55b307da
JS		 1563
1564 if (!port->tty || !port->tty->termios) {
1565 cflag = port->normal_termios.c_cflag;
1566 iflag = port->normal_termios.c_iflag;
037ad48b 1567 } else {
55b307da
JS		 1568 cflag = port->tty->termios->c_cflag;
1569 iflag = port->tty->termios->c_iflag;
037ad48b
JS		 1570 }
1571
1572 mon_data_ext.databits[i] = cflag & CSIZE;
1573
1574 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1575
55b307da
JS		 1576 mon_data_ext.parity[i] =
1577 cflag & (PARENB | PARODD | CMSPAR);
037ad48b
JS		 1578
1579 mon_data_ext.flowctrl[i] = 0x00;
1580
1581 if (cflag & CRTSCTS)
1582 mon_data_ext.flowctrl[i] |= 0x03;
1583
1584 if (iflag & (IXON | IXOFF))
1585 mon_data_ext.flowctrl[i] |= 0x0C;
1586
55b307da 1587 if (port->type == PORT_16550A)
037ad48b
JS		 1588 mon_data_ext.fifo[i] = 1;
1589 else
1590 mon_data_ext.fifo[i] = 0;
1591
1592 p = i % 4;
1593 shiftbit = p * 2;
55b307da 1594 opmode = inb(port->opmode_ioaddr) >> shiftbit;
037ad48b
JS		 1595 opmode &= OP_MODE_MASK;
1596
1597 mon_data_ext.iftype[i] = opmode;
1598
1599 }
55b307da
JS		 1600 if (copy_to_user(argp, &mon_data_ext,
1601 sizeof(mon_data_ext)))
037ad48b
JS		 1602 return -EFAULT;
1603
1604 return 0;
1605
55b307da 1606 } default:
037ad48b
JS		 1607 return -ENOIOCTLCMD;
1608 }
1609 return 0;
1610}
1611
a8dea4ec
JS		 1612static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1613 unsigned int cmd, unsigned long arg)
037ad48b 1614{
55b307da 1615 struct mxser_port *info = tty->driver_data;
a8dea4ec
JS		 1616 struct async_icount cprev, cnow; /* kernel counter temps */
1617 struct serial_icounter_struct __user *p_cuser;
1618 unsigned long templ;
1619 unsigned long flags;
1620 void __user *argp = (void __user *)arg;
1621 int retval;
037ad48b 1622
a8dea4ec
JS		 1623 if (tty->index == MXSER_PORTS)
1624 return mxser_ioctl_special(cmd, argp);
1625
a8dea4ec
JS		 1626 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1627 int p;
1628 unsigned long opmode;
1629 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1630 int shiftbit;
1631 unsigned char val, mask;
1632
1633 p = tty->index % 4;
1634 if (cmd == MOXA_SET_OP_MODE) {
1635 if (get_user(opmode, (int __user *) argp))
1636 return -EFAULT;
1637 if (opmode != RS232_MODE &&
1638 opmode != RS485_2WIRE_MODE &&
1639 opmode != RS422_MODE &&
1640 opmode != RS485_4WIRE_MODE)
1641 return -EFAULT;
1642 mask = ModeMask[p];
1643 shiftbit = p * 2;
1644 val = inb(info->opmode_ioaddr);
1645 val &= mask;
1646 val |= (opmode << shiftbit);
1647 outb(val, info->opmode_ioaddr);
1648 } else {
1649 shiftbit = p * 2;
1650 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1651 opmode &= OP_MODE_MASK;
1652 if (copy_to_user(argp, &opmode, sizeof(int)))
1653 return -EFAULT;
3306ce3d 1654 }
a8dea4ec 1655 return 0;
037ad48b
JS		 1656 }
1657
214efebb
JS		 1658 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1659 test_bit(TTY_IO_ERROR, &tty->flags))
1660 return -EIO;
1661
a8dea4ec
JS		 1662 switch (cmd) {
1663 case TCSBRK: /* SVID version: non-zero arg --> no break */
1664 retval = tty_check_change(tty);
1665 if (retval)
1666 return retval;
1667 tty_wait_until_sent(tty, 0);
1668 if (!arg)
1669 mxser_send_break(info, HZ / 4); /* 1/4 second */
1670 return 0;
1671 case TCSBRKP: /* support for POSIX tcsendbreak() */
1672 retval = tty_check_change(tty);
1673 if (retval)
1674 return retval;
1675 tty_wait_until_sent(tty, 0);
1676 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1677 return 0;
1678 case TIOCGSOFTCAR:
1679 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1680 case TIOCSSOFTCAR:
1681 if (get_user(templ, (unsigned long __user *) argp))
1682 return -EFAULT;
1683 arg = templ;
1684 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
1685 return 0;
1686 case TIOCGSERIAL:
1687 return mxser_get_serial_info(info, argp);
1688 case TIOCSSERIAL:
1689 return mxser_set_serial_info(info, argp);
1690 case TIOCSERGETLSR: /* Get line status register */
1691 return mxser_get_lsr_info(info, argp);
1692 /*
1693 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1694 * - mask passed in arg for lines of interest
1695 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1696 * Caller should use TIOCGICOUNT to see which one it was
1697 */
b446a4a5 1698 case TIOCMIWAIT:
a8dea4ec 1699 spin_lock_irqsave(&info->slock, flags);
b446a4a5 1700 cnow = info->icount; /* note the counters on entry */
a8dea4ec 1701 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1702
b446a4a5
JS		 1703 wait_event_interruptible(info->delta_msr_wait, ({
1704 cprev = cnow;
a8dea4ec
JS		 1705 spin_lock_irqsave(&info->slock, flags);
1706 cnow = info->icount; /* atomic copy */
1707 spin_unlock_irqrestore(&info->slock, flags);
037ad48b 1708
b446a4a5
JS		 1709 ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1710 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1711 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1712 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
1713 }));
a8dea4ec 1714 break;
a8dea4ec
JS		 1715 /*
1716 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1717 * Return: write counters to the user passed counter struct
1718 * NB: both 1->0 and 0->1 transitions are counted except for
1719 * RI where only 0->1 is counted.
1720 */
1721 case TIOCGICOUNT:
1722 spin_lock_irqsave(&info->slock, flags);
1723 cnow = info->icount;
1724 spin_unlock_irqrestore(&info->slock, flags);
1725 p_cuser = argp;
a8dea4ec
JS		 1726 if (put_user(cnow.frame, &p_cuser->frame))
1727 return -EFAULT;
1728 if (put_user(cnow.brk, &p_cuser->brk))
1729 return -EFAULT;
1730 if (put_user(cnow.overrun, &p_cuser->overrun))
1731 return -EFAULT;
1732 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1733 return -EFAULT;
1734 if (put_user(cnow.parity, &p_cuser->parity))
1735 return -EFAULT;
1736 if (put_user(cnow.rx, &p_cuser->rx))
1737 return -EFAULT;
1738 if (put_user(cnow.tx, &p_cuser->tx))
1739 return -EFAULT;
1740 put_user(cnow.cts, &p_cuser->cts);
1741 put_user(cnow.dsr, &p_cuser->dsr);
1742 put_user(cnow.rng, &p_cuser->rng);
1743 put_user(cnow.dcd, &p_cuser->dcd);
1744 return 0;
1745 case MOXA_HighSpeedOn:
1746 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1747 case MOXA_SDS_RSTICOUNTER:
1748 info->mon_data.rxcnt = 0;
1749 info->mon_data.txcnt = 0;
1750 return 0;
037ad48b 1751
a8dea4ec
JS		 1752 case MOXA_ASPP_OQUEUE:{
1753 int len, lsr;
037ad48b 1754
a8dea4ec
JS		 1755 len = mxser_chars_in_buffer(tty);
1756
1757 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1758
1759 len += (lsr ? 0 : 1);
1760
1761 if (copy_to_user(argp, &len, sizeof(int)))
1762 return -EFAULT;
1763
1764 return 0;
037ad48b 1765 }
a8dea4ec
JS		 1766 case MOXA_ASPP_MON: {
1767 int mcr, status;
037ad48b 1768
a8dea4ec
JS		 1769 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1770 mxser_check_modem_status(info, status);
1771
1772 mcr = inb(info->ioaddr + UART_MCR);
1773 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1774 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1775 else
1776 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1777
1778 if (mcr & MOXA_MUST_MCR_TX_XON)
1779 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1780 else
1781 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1782
1783 if (info->tty->hw_stopped)
1784 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1785 else
1786 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1787
1788 if (copy_to_user(argp, &info->mon_data,
1789 sizeof(struct mxser_mon)))
1790 return -EFAULT;
1791
1792 return 0;
1793 }
1794 case MOXA_ASPP_LSTATUS: {
1795 if (copy_to_user(argp, &info->err_shadow,
1796 sizeof(unsigned char)))
1797 return -EFAULT;
1798
1799 info->err_shadow = 0;
1800 return 0;
1801 }
1802 case MOXA_SET_BAUD_METHOD: {
1803 int method;
1804
1805 if (get_user(method, (int __user *)argp))
1806 return -EFAULT;
1807 mxser_set_baud_method[tty->index] = method;
1808 if (copy_to_user(argp, &method, sizeof(int)))
1809 return -EFAULT;
1810
1811 return 0;
1812 }
1813 default:
1814 return -ENOIOCTLCMD;
1815 }
1816 return 0;
1817}
1818
1819static void mxser_stoprx(struct tty_struct *tty)
1820{
1821 struct mxser_port *info = tty->driver_data;
037ad48b 1822
a8dea4ec
JS		 1823 info->ldisc_stop_rx = 1;
1824 if (I_IXOFF(tty)) {
55b307da 1825 if (info->board->chip_flag) {
a8dea4ec
JS		 1826 info->IER &= ~MOXA_MUST_RECV_ISR;
1827 outb(info->IER, info->ioaddr + UART_IER);
925e9c1c 1828 } else {
a8dea4ec
JS		 1829 info->x_char = STOP_CHAR(tty);
1830 outb(0, info->ioaddr + UART_IER);
1831 info->IER |= UART_IER_THRI;
1832 outb(info->IER, info->ioaddr + UART_IER);
037ad48b 1833 }
a8dea4ec 1834 }
037ad48b 1835
a8dea4ec
JS		 1836 if (info->tty->termios->c_cflag & CRTSCTS) {
1837 info->MCR &= ~UART_MCR_RTS;
1838 outb(info->MCR, info->ioaddr + UART_MCR);
1839 }
1840}
1841
1842/*
1843 * This routine is called by the upper-layer tty layer to signal that
1844 * incoming characters should be throttled.
1845 */
1846static void mxser_throttle(struct tty_struct *tty)
1847{
1848 mxser_stoprx(tty);
1849}
1850
1851static void mxser_unthrottle(struct tty_struct *tty)
1852{
1853 struct mxser_port *info = tty->driver_data;
1854
1855 /* startrx */
1856 info->ldisc_stop_rx = 0;
1857 if (I_IXOFF(tty)) {
1858 if (info->x_char)
1859 info->x_char = 0;
1860 else {
a8dea4ec
JS		 1861 if (info->board->chip_flag) {
1862 info->IER |= MOXA_MUST_RECV_ISR;
1863 outb(info->IER, info->ioaddr + UART_IER);
925e9c1c 1864 } else {
a8dea4ec
JS		 1865 info->x_char = START_CHAR(tty);
1866 outb(0, info->ioaddr + UART_IER);
1867 info->IER |= UART_IER_THRI;
1868 outb(info->IER, info->ioaddr + UART_IER);
1869 }
1870 }
1871 }
1872
1873 if (info->tty->termios->c_cflag & CRTSCTS) {
1874 info->MCR |= UART_MCR_RTS;
1875 outb(info->MCR, info->ioaddr + UART_MCR);
037ad48b
JS		 1876 }
1877}
1878
1879/*
1880 * mxser_stop() and mxser_start()
1881 *
1882 * This routines are called before setting or resetting tty->stopped.
1883 * They enable or disable transmitter interrupts, as necessary.
1884 */
1885static void mxser_stop(struct tty_struct *tty)
1886{
55b307da 1887 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1888 unsigned long flags;
1889
1890 spin_lock_irqsave(&info->slock, flags);
1891 if (info->IER & UART_IER_THRI) {
1892 info->IER &= ~UART_IER_THRI;
55b307da 1893 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1894 }
1895 spin_unlock_irqrestore(&info->slock, flags);
1896}
1897
1898static void mxser_start(struct tty_struct *tty)
1899{
55b307da 1900 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1901 unsigned long flags;
1902
1903 spin_lock_irqsave(&info->slock, flags);
e079f495 1904 if (info->xmit_cnt && info->xmit_buf) {
55b307da 1905 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
037ad48b 1906 info->IER |= UART_IER_THRI;
55b307da 1907 outb(info->IER, info->ioaddr + UART_IER);
037ad48b
JS		 1908 }
1909 spin_unlock_irqrestore(&info->slock, flags);
1910}
1911
606d099c 1912static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
a8dea4ec
JS		 1913{
1914 struct mxser_port *info = tty->driver_data;
1915 unsigned long flags;
1916
7e7d136e
AC		 1917 spin_lock_irqsave(&info->slock, flags);
1918 mxser_change_speed(info, old_termios);
1919 spin_unlock_irqrestore(&info->slock, flags);
a8dea4ec 1920
7e7d136e
AC		 1921 if ((old_termios->c_cflag & CRTSCTS) &&
1922 !(tty->termios->c_cflag & CRTSCTS)) {
1923 tty->hw_stopped = 0;
1924 mxser_start(tty);
a8dea4ec
JS		 1925 }
1926
e079f495 1927 /* Handle sw stopped */
a8dea4ec
JS		 1928 if ((old_termios->c_iflag & IXON) &&
1929 !(tty->termios->c_iflag & IXON)) {
1930 tty->stopped = 0;
1931
a8dea4ec
JS		 1932 if (info->board->chip_flag) {
1933 spin_lock_irqsave(&info->slock, flags);
1934 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1935 spin_unlock_irqrestore(&info->slock, flags);
1936 }
a8dea4ec
JS		 1937
1938 mxser_start(tty);
1939 }
1940}
1941
037ad48b
JS		 1942/*
1943 * mxser_wait_until_sent() --- wait until the transmitter is empty
1944 */
1945static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1946{
55b307da 1947 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 1948 unsigned long orig_jiffies, char_time;
1949 int lsr;
1950
1951 if (info->type == PORT_UNKNOWN)
1952 return;
1953
1954 if (info->xmit_fifo_size == 0)
1955 return; /* Just in case.... */
1956
1957 orig_jiffies = jiffies;
1958 /*
1959 * Set the check interval to be 1/5 of the estimated time to
1960 * send a single character, and make it at least 1. The check
1961 * interval should also be less than the timeout.
1962 *
1963 * Note: we have to use pretty tight timings here to satisfy
1964 * the NIST-PCTS.
1965 */
1966 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1967 char_time = char_time / 5;
1968 if (char_time == 0)
1969 char_time = 1;
1970 if (timeout && timeout < char_time)
1971 char_time = timeout;
1972 /*
1973 * If the transmitter hasn't cleared in twice the approximate
1974 * amount of time to send the entire FIFO, it probably won't
1975 * ever clear. This assumes the UART isn't doing flow
1976 * control, which is currently the case. Hence, if it ever
1977 * takes longer than info->timeout, this is probably due to a
1978 * UART bug of some kind. So, we clamp the timeout parameter at
1979 * 2*info->timeout.
1980 */
1981 if (!timeout || timeout > 2 * info->timeout)
1982 timeout = 2 * info->timeout;
1983#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1984 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1985 timeout, char_time);
1986 printk("jiff=%lu...", jiffies);
1987#endif
55b307da 1988 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
037ad48b
JS		 1989#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1990 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1991#endif
1992 schedule_timeout_interruptible(char_time);
1993 if (signal_pending(current))
1994 break;
1995 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1996 break;
1997 }
1998 set_current_state(TASK_RUNNING);
1999
2000#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2001 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
a8dea4ec
JS		 2002#endif
2003}
037ad48b 2004
a8dea4ec
JS		 2005/*
2006 * This routine is called by tty_hangup() when a hangup is signaled.
2007 */
02d3fca0 2008static void mxser_hangup(struct tty_struct *tty)
a8dea4ec
JS		 2009{
2010 struct mxser_port *info = tty->driver_data;
037ad48b 2011
a8dea4ec
JS		 2012 mxser_flush_buffer(tty);
2013 mxser_shutdown(info);
2014 info->event = 0;
2015 info->count = 0;
2016 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2017 info->tty = NULL;
2018 wake_up_interruptible(&info->open_wait);
037ad48b
JS		 2019}
2020
a8dea4ec
JS		 2021/*
2022 * mxser_rs_break() --- routine which turns the break handling on or off
2023 */
2024static void mxser_rs_break(struct tty_struct *tty, int break_state)
037ad48b 2025{
a8dea4ec 2026 struct mxser_port *info = tty->driver_data;
037ad48b
JS		 2027 unsigned long flags;
2028
a8dea4ec
JS		 2029 spin_lock_irqsave(&info->slock, flags);
2030 if (break_state == -1)
2031 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2032 info->ioaddr + UART_LCR);
2033 else
2034 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2035 info->ioaddr + UART_LCR);
2036 spin_unlock_irqrestore(&info->slock, flags);
2037}
037ad48b 2038
a8dea4ec
JS		 2039static void mxser_receive_chars(struct mxser_port *port, int *status)
2040{
2041 struct tty_struct *tty = port->tty;
2042 unsigned char ch, gdl;
2043 int ignored = 0;
2044 int cnt = 0;
2045 int recv_room;
2046 int max = 256;
a8dea4ec
JS		 2047
2048 recv_room = tty->receive_room;
e079f495 2049 if ((recv_room == 0) && (!port->ldisc_stop_rx))
a8dea4ec 2050 mxser_stoprx(tty);
037ad48b 2051
a8dea4ec 2052 if (port->board->chip_flag != MOXA_OTHER_UART) {
037ad48b 2053
a8dea4ec
JS		 2054 if (*status & UART_LSR_SPECIAL)
2055 goto intr_old;
a8dea4ec
JS		 2056 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2057 (*status & MOXA_MUST_LSR_RERR))
2058 goto intr_old;
a8dea4ec
JS		 2059 if (*status & MOXA_MUST_LSR_RERR)
2060 goto intr_old;
2061
2062 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2063
a8dea4ec
JS		 2064 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2065 gdl &= MOXA_MUST_GDL_MASK;
2066 if (gdl >= recv_room) {
e079f495 2067 if (!port->ldisc_stop_rx)
a8dea4ec 2068 mxser_stoprx(tty);
a8dea4ec
JS		 2069 }
2070 while (gdl--) {
2071 ch = inb(port->ioaddr + UART_RX);
2072 tty_insert_flip_char(tty, ch, 0);
2073 cnt++;
2074 }
2075 goto end_intr;
037ad48b 2076 }
e079f495 2077intr_old:
037ad48b 2078
a8dea4ec
JS		 2079 do {
2080 if (max-- < 0)
2081 break;
037ad48b 2082
a8dea4ec 2083 ch = inb(port->ioaddr + UART_RX);
e079f495 2084 if (port->board->chip_flag && (*status & UART_LSR_OE))
a8dea4ec
JS		 2085 outb(0x23, port->ioaddr + UART_FCR);
2086 *status &= port->read_status_mask;
a8dea4ec
JS		 2087 if (*status & port->ignore_status_mask) {
2088 if (++ignored > 100)
2089 break;
2090 } else {
2091 char flag = 0;
2092 if (*status & UART_LSR_SPECIAL) {
2093 if (*status & UART_LSR_BI) {
2094 flag = TTY_BREAK;
a8dea4ec 2095 port->icount.brk++;
037ad48b 2096
a8dea4ec
JS		 2097 if (port->flags & ASYNC_SAK)
2098 do_SAK(tty);
2099 } else if (*status & UART_LSR_PE) {
2100 flag = TTY_PARITY;
a8dea4ec
JS		 2101 port->icount.parity++;
2102 } else if (*status & UART_LSR_FE) {
2103 flag = TTY_FRAME;
a8dea4ec
JS		 2104 port->icount.frame++;
2105 } else if (*status & UART_LSR_OE) {
2106 flag = TTY_OVERRUN;
a8dea4ec 2107 port->icount.overrun++;
f64c84a1
JS		 2108 } else
2109 flag = TTY_BREAK;
925e9c1c 2110 }
a8dea4ec
JS		 2111 tty_insert_flip_char(tty, ch, flag);
2112 cnt++;
2113 if (cnt >= recv_room) {
e079f495 2114 if (!port->ldisc_stop_rx)
a8dea4ec 2115 mxser_stoprx(tty);
a8dea4ec
JS		 2116 break;
2117 }
037ad48b 2118
a8dea4ec 2119 }
037ad48b 2120
a8dea4ec
JS		 2121 if (port->board->chip_flag)
2122 break;
037ad48b 2123
a8dea4ec 2124 *status = inb(port->ioaddr + UART_LSR);
a8dea4ec 2125 } while (*status & UART_LSR_DR);
037ad48b 2126
e079f495 2127end_intr:
a8dea4ec
JS		 2128 mxvar_log.rxcnt[port->tty->index] += cnt;
2129 port->mon_data.rxcnt += cnt;
2130 port->mon_data.up_rxcnt += cnt;
a8dea4ec 2131
67d2bc58
JYK		 2132 /*
2133 * We are called from an interrupt context with &port->slock
2134 * being held. Drop it temporarily in order to prevent
2135 * recursive locking.
2136 */
2137 spin_unlock(&port->slock);
a8dea4ec 2138 tty_flip_buffer_push(tty);
67d2bc58 2139 spin_lock(&port->slock);
037ad48b
JS		 2140}
2141
a8dea4ec 2142static void mxser_transmit_chars(struct mxser_port *port)
037ad48b 2143{
a8dea4ec 2144 int count, cnt;
037ad48b 2145
a8dea4ec
JS		 2146 if (port->x_char) {
2147 outb(port->x_char, port->ioaddr + UART_TX);
2148 port->x_char = 0;
2149 mxvar_log.txcnt[port->tty->index]++;
2150 port->mon_data.txcnt++;
2151 port->mon_data.up_txcnt++;
a8dea4ec 2152 port->icount.tx++;
f574874b 2153 return;
037ad48b
JS		 2154 }
2155
c3667d5c 2156 if (port->xmit_buf == NULL)
f574874b 2157 return;
037ad48b 2158
925e9c1c
JS		 2159 if ((port->xmit_cnt <= 0) || port->tty->stopped ||
2160 (port->tty->hw_stopped &&
a8dea4ec
JS		 2161 (port->type != PORT_16550A) &&
2162 (!port->board->chip_flag))) {
2163 port->IER &= ~UART_IER_THRI;
2164 outb(port->IER, port->ioaddr + UART_IER);
f574874b 2165 return;
a8dea4ec 2166 }
037ad48b 2167
a8dea4ec
JS		 2168 cnt = port->xmit_cnt;
2169 count = port->xmit_fifo_size;
2170 do {
2171 outb(port->xmit_buf[port->xmit_tail++],
2172 port->ioaddr + UART_TX);
2173 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2174 if (--port->xmit_cnt <= 0)
2175 break;
2176 } while (--count > 0);
2177 mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt);
55b307da 2178
a8dea4ec
JS		 2179 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2180 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
a8dea4ec 2181 port->icount.tx += (cnt - port->xmit_cnt);
037ad48b 2182
47c85c0d
JS		 2183 if (port->xmit_cnt < WAKEUP_CHARS)
2184 tty_wakeup(port->tty);
2185
a8dea4ec
JS		 2186 if (port->xmit_cnt <= 0) {
2187 port->IER &= ~UART_IER_THRI;
2188 outb(port->IER, port->ioaddr + UART_IER);
2189 }
037ad48b
JS		 2190}
2191
2192/*
a8dea4ec 2193 * This is the serial driver's generic interrupt routine
037ad48b 2194 */
b1d1c8dd 2195static irqreturn_t mxser_interrupt(int irq, void *dev_id)
037ad48b 2196{
a8dea4ec
JS		 2197 int status, iir, i;
2198 struct mxser_board *brd = NULL;
2199 struct mxser_port *port;
2200 int max, irqbits, bits, msr;
18b95576 2201 unsigned int int_cnt, pass_counter = 0;
a8dea4ec 2202 int handled = IRQ_NONE;
037ad48b 2203
a8dea4ec
JS		 2204 for (i = 0; i < MXSER_BOARDS; i++)
2205 if (dev_id == &mxser_boards[i]) {
2206 brd = dev_id;
2207 break;
2208 }
037ad48b 2209
a8dea4ec
JS		 2210 if (i == MXSER_BOARDS)
2211 goto irq_stop;
2212 if (brd == NULL)
2213 goto irq_stop;
cd7ed64e 2214 max = brd->info->nports;
18b95576 2215 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
a8dea4ec
JS		 2216 irqbits = inb(brd->vector) & brd->vector_mask;
2217 if (irqbits == brd->vector_mask)
2218 break;
037ad48b 2219
a8dea4ec
JS		 2220 handled = IRQ_HANDLED;
2221 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2222 if (irqbits == brd->vector_mask)
2223 break;
2224 if (bits & irqbits)
2225 continue;
2226 port = &brd->ports[i];
037ad48b 2227
a8dea4ec 2228 int_cnt = 0;
f574874b 2229 spin_lock(&port->slock);
a8dea4ec 2230 do {
a8dea4ec
JS		 2231 iir = inb(port->ioaddr + UART_IIR);
2232 if (iir & UART_IIR_NO_INT)
2233 break;
2234 iir &= MOXA_MUST_IIR_MASK;
f574874b
JS		 2235 if (!port->tty ||
2236 (port->flags & ASYNC_CLOSING) ||
2237 !(port->flags &
2238 ASYNC_INITIALIZED)) {
a8dea4ec
JS		 2239 status = inb(port->ioaddr + UART_LSR);
2240 outb(0x27, port->ioaddr + UART_FCR);
2241 inb(port->ioaddr + UART_MSR);
2242 break;
2243 }
037ad48b 2244
a8dea4ec
JS		 2245 status = inb(port->ioaddr + UART_LSR);
2246
2247 if (status & UART_LSR_PE)
2248 port->err_shadow |= NPPI_NOTIFY_PARITY;
2249 if (status & UART_LSR_FE)
2250 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2251 if (status & UART_LSR_OE)
2252 port->err_shadow |=
2253 NPPI_NOTIFY_HW_OVERRUN;
2254 if (status & UART_LSR_BI)
2255 port->err_shadow |= NPPI_NOTIFY_BREAK;
2256
2257 if (port->board->chip_flag) {
a8dea4ec
JS		 2258 if (iir == MOXA_MUST_IIR_GDA ||
2259 iir == MOXA_MUST_IIR_RDA ||
2260 iir == MOXA_MUST_IIR_RTO ||
2261 iir == MOXA_MUST_IIR_LSR)
2262 mxser_receive_chars(port,
2263 &status);
2264
2265 } else {
a8dea4ec
JS		 2266 status &= port->read_status_mask;
2267 if (status & UART_LSR_DR)
2268 mxser_receive_chars(port,
2269 &status);
2270 }
2271 msr = inb(port->ioaddr + UART_MSR);
2272 if (msr & UART_MSR_ANY_DELTA)
2273 mxser_check_modem_status(port, msr);
2274
a8dea4ec
JS		 2275 if (port->board->chip_flag) {
2276 if (iir == 0x02 && (status &
2277 UART_LSR_THRE))
2278 mxser_transmit_chars(port);
2279 } else {
a8dea4ec
JS		 2280 if (status & UART_LSR_THRE)
2281 mxser_transmit_chars(port);
2282 }
2283 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
f574874b 2284 spin_unlock(&port->slock);
a8dea4ec 2285 }
a8dea4ec
JS		 2286 }
2287
e079f495 2288irq_stop:
a8dea4ec 2289 return handled;
037ad48b
JS		 2290}
2291
a8dea4ec
JS		 2292static const struct tty_operations mxser_ops = {
2293 .open = mxser_open,
2294 .close = mxser_close,
2295 .write = mxser_write,
2296 .put_char = mxser_put_char,
2297 .flush_chars = mxser_flush_chars,
2298 .write_room = mxser_write_room,
2299 .chars_in_buffer = mxser_chars_in_buffer,
2300 .flush_buffer = mxser_flush_buffer,
2301 .ioctl = mxser_ioctl,
2302 .throttle = mxser_throttle,
2303 .unthrottle = mxser_unthrottle,
2304 .set_termios = mxser_set_termios,
2305 .stop = mxser_stop,
2306 .start = mxser_start,
2307 .hangup = mxser_hangup,
2308 .break_ctl = mxser_rs_break,
2309 .wait_until_sent = mxser_wait_until_sent,
2310 .tiocmget = mxser_tiocmget,
2311 .tiocmset = mxser_tiocmset,
2312};
2313
2314/*
2315 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2316 */
2317
2094e757
JS		 2318static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2319 unsigned int irq)
171d3a86 2320{
171d3a86
JS		 2321 if (irq)
2322 free_irq(brd->irq, brd);
2323 if (pdev != NULL) { /* PCI */
fb0c9295 2324#ifdef CONFIG_PCI
171d3a86
JS		 2325 pci_release_region(pdev, 2);
2326 pci_release_region(pdev, 3);
fb0c9295 2327#endif
171d3a86 2328 } else {
cd7ed64e 2329 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
171d3a86
JS		 2330 release_region(brd->vector, 1);
2331 }
2332}
2333
2094e757
JS		 2334static int __devinit mxser_initbrd(struct mxser_board *brd,
2335 struct pci_dev *pdev)
037ad48b 2336{
a8dea4ec
JS		 2337 struct mxser_port *info;
2338 unsigned int i;
2339 int retval;
2340
2341 printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
2342
cd7ed64e 2343 for (i = 0; i < brd->info->nports; i++) {
a8dea4ec
JS		 2344 info = &brd->ports[i];
2345 info->board = brd;
2346 info->stop_rx = 0;
2347 info->ldisc_stop_rx = 0;
037ad48b 2348
a8dea4ec
JS		 2349 /* Enhance mode enabled here */
2350 if (brd->chip_flag != MOXA_OTHER_UART)
2351 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr);
037ad48b 2352
a8dea4ec
JS		 2353 info->flags = ASYNC_SHARE_IRQ;
2354 info->type = brd->uart_type;
037ad48b 2355
a8dea4ec 2356 process_txrx_fifo(info);
037ad48b 2357
a8dea4ec
JS		 2358 info->custom_divisor = info->baud_base * 16;
2359 info->close_delay = 5 * HZ / 10;
2360 info->closing_wait = 30 * HZ;
a8dea4ec
JS		 2361 info->normal_termios = mxvar_sdriver->init_termios;
2362 init_waitqueue_head(&info->open_wait);
a8dea4ec
JS		 2363 init_waitqueue_head(&info->delta_msr_wait);
2364 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2365 info->err_shadow = 0;
2366 spin_lock_init(&info->slock);
037ad48b 2367
a8dea4ec
JS		 2368 /* before set INT ISR, disable all int */
2369 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2370 info->ioaddr + UART_IER);
2371 }
037ad48b 2372
c493edd1
JS		 2373 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2374 brd);
a8dea4ec
JS		 2375 if (retval) {
2376 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2377 "conflict with another device.\n",
cd7ed64e 2378 brd->info->name, brd->irq);
171d3a86 2379 /* We hold resources, we need to release them. */
2094e757 2380 mxser_release_res(brd, pdev, 0);
a8dea4ec 2381 }
45257fa9 2382 return retval;
037ad48b
JS		 2383}
2384
943f2959 2385static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
037ad48b
JS		 2386{
2387 int id, i, bits;
2388 unsigned short regs[16], irq;
2389 unsigned char scratch, scratch2;
2390
55b307da 2391 brd->chip_flag = MOXA_OTHER_UART;
037ad48b
JS		 2392
2393 id = mxser_read_register(cap, regs);
cd7ed64e
JS		 2394 switch (id) {
2395 case C168_ASIC_ID:
2396 brd->info = &mxser_cards[0];
2397 break;
2398 case C104_ASIC_ID:
2399 brd->info = &mxser_cards[1];
2400 break;
2401 case CI104J_ASIC_ID:
2402 brd->info = &mxser_cards[2];
2403 break;
2404 case C102_ASIC_ID:
2405 brd->info = &mxser_cards[5];
2406 break;
2407 case CI132_ASIC_ID:
2408 brd->info = &mxser_cards[6];
2409 break;
2410 case CI134_ASIC_ID:
2411 brd->info = &mxser_cards[7];
2412 break;
2413 default:
037ad48b 2414 return 0;
cd7ed64e 2415 }
037ad48b
JS		 2416
2417 irq = 0;
cd7ed64e
JS		 2418 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2419 Flag-hack checks if configuration should be read as 2-port here. */
2420 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
037ad48b
JS		 2421 irq = regs[9] & 0xF000;
2422 irq = irq | (irq >> 4);
2423 if (irq != (regs[9] & 0xFF00))
2424 return MXSER_ERR_IRQ_CONFLIT;
cd7ed64e 2425 } else if (brd->info->nports == 4) {
037ad48b
JS		 2426 irq = regs[9] & 0xF000;
2427 irq = irq | (irq >> 4);
2428 irq = irq | (irq >> 8);
2429 if (irq != regs[9])
2430 return MXSER_ERR_IRQ_CONFLIT;
cd7ed64e 2431 } else if (brd->info->nports == 8) {
037ad48b
JS		 2432 irq = regs[9] & 0xF000;
2433 irq = irq | (irq >> 4);
2434 irq = irq | (irq >> 8);
2435 if ((irq != regs[9]) || (irq != regs[10]))
2436 return MXSER_ERR_IRQ_CONFLIT;
2437 }
2438
a8dea4ec
JS		 2439 if (!irq)
2440 return MXSER_ERR_IRQ;
2441 brd->irq = ((int)(irq & 0xF000) >> 12);
2442 for (i = 0; i < 8; i++)
2443 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2444 if ((regs[12] & 0x80) == 0)
2445 return MXSER_ERR_VECTOR;
2446 brd->vector = (int)regs[11]; /* interrupt vector */
2447 if (id == 1)
2448 brd->vector_mask = 0x00FF;
2449 else
2450 brd->vector_mask = 0x000F;
2451 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2452 if (regs[12] & bits) {
2453 brd->ports[i].baud_base = 921600;
e079f495 2454 brd->ports[i].max_baud = 921600;
a8dea4ec
JS		 2455 } else {
2456 brd->ports[i].baud_base = 115200;
e079f495 2457 brd->ports[i].max_baud = 115200;
a8dea4ec
JS		 2458 }
2459 }
2460 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2461 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2462 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2463 outb(scratch2, cap + UART_LCR);
2464 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2465 scratch = inb(cap + UART_IIR);
2466
2467 if (scratch & 0xC0)
2468 brd->uart_type = PORT_16550A;
2469 else
2470 brd->uart_type = PORT_16450;
cd7ed64e
JS		 2471 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2472 "mxser(IO)"))
a8dea4ec
JS		 2473 return MXSER_ERR_IOADDR;
2474 if (!request_region(brd->vector, 1, "mxser(vector)")) {
cd7ed64e 2475 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
a8dea4ec
JS		 2476 return MXSER_ERR_VECTOR;
2477 }
cd7ed64e 2478 return brd->info->nports;
a8dea4ec
JS		 2479}
2480
2094e757
JS		 2481static int __devinit mxser_probe(struct pci_dev *pdev,
2482 const struct pci_device_id *ent)
a8dea4ec 2483{
fb0c9295 2484#ifdef CONFIG_PCI
2094e757 2485 struct mxser_board *brd;
a8dea4ec
JS		 2486 unsigned int i, j;
2487 unsigned long ioaddress;
2094e757
JS		 2488 int retval = -EINVAL;
2489
2490 for (i = 0; i < MXSER_BOARDS; i++)
2491 if (mxser_boards[i].info == NULL)
2492 break;
2493
2494 if (i >= MXSER_BOARDS) {
2495 printk(KERN_ERR "Too many Smartio/Industio family boards found "
2496 "(maximum %d), board not configured\n", MXSER_BOARDS);
2497 goto err;
2498 }
2499
2500 brd = &mxser_boards[i];
2501 brd->idx = i * MXSER_PORTS_PER_BOARD;
2502 printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2503 mxser_cards[ent->driver_data].name,
2504 pdev->bus->number, PCI_SLOT(pdev->devfn));
2505
2506 retval = pci_enable_device(pdev);
2507 if (retval) {
2508 printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
2509 goto err;
2510 }
a8dea4ec
JS		 2511
2512 /* io address */
a8dea4ec
JS		 2513 ioaddress = pci_resource_start(pdev, 2);
2514 retval = pci_request_region(pdev, 2, "mxser(IO)");
2515 if (retval)
2516 goto err;
2517
2094e757 2518 brd->info = &mxser_cards[ent->driver_data];
cd7ed64e 2519 for (i = 0; i < brd->info->nports; i++)
a8dea4ec
JS		 2520 brd->ports[i].ioaddr = ioaddress + 8 * i;
2521
2522 /* vector */
2523 ioaddress = pci_resource_start(pdev, 3);
2524 retval = pci_request_region(pdev, 3, "mxser(vector)");
2525 if (retval)
2526 goto err_relio;
2527 brd->vector = ioaddress;
2528
2529 /* irq */
2530 brd->irq = pdev->irq;
2531
2532 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2533 brd->uart_type = PORT_16550A;
2534 brd->vector_mask = 0;
2535
cd7ed64e 2536 for (i = 0; i < brd->info->nports; i++) {
a8dea4ec
JS		 2537 for (j = 0; j < UART_INFO_NUM; j++) {
2538 if (Gpci_uart_info[j].type == brd->chip_flag) {
2539 brd->ports[i].max_baud =
2540 Gpci_uart_info[j].max_baud;
2541
2542 /* exception....CP-102 */
cd7ed64e 2543 if (brd->info->flags & MXSER_HIGHBAUD)
a8dea4ec
JS		 2544 brd->ports[i].max_baud = 921600;
2545 break;
2546 }
2547 }
2548 }
2549
2550 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
cd7ed64e 2551 for (i = 0; i < brd->info->nports; i++) {
a8dea4ec
JS		 2552 if (i < 4)
2553 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2554 else
2555 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2556 }
2557 outb(0, ioaddress + 4); /* default set to RS232 mode */
2558 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2559 }
2560
cd7ed64e 2561 for (i = 0; i < brd->info->nports; i++) {
a8dea4ec
JS		 2562 brd->vector_mask |= (1 << i);
2563 brd->ports[i].baud_base = 921600;
2564 }
2094e757
JS		 2565
2566 /* mxser_initbrd will hook ISR. */
45257fa9
JS		 2567 retval = mxser_initbrd(brd, pdev);
2568 if (retval)
2569 goto err_null;
2094e757
JS		 2570
2571 for (i = 0; i < brd->info->nports; i++)
2572 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2573
2574 pci_set_drvdata(pdev, brd);
2575
a8dea4ec
JS		 2576 return 0;
2577err_relio:
2578 pci_release_region(pdev, 2);
45257fa9 2579err_null:
2094e757 2580 brd->info = NULL;
a8dea4ec
JS		 2581err:
2582 return retval;
fb0c9295
JS		 2583#else
2584 return -ENODEV;
2585#endif
a8dea4ec
JS		 2586}
2587
2094e757
JS		 2588static void __devexit mxser_remove(struct pci_dev *pdev)
2589{
2590 struct mxser_board *brd = pci_get_drvdata(pdev);
2591 unsigned int i;
2592
2593 for (i = 0; i < brd->info->nports; i++)
2594 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2595
2596 mxser_release_res(brd, pdev, 1);
45257fa9 2597 brd->info = NULL;
2094e757
JS		 2598}
2599
2600static struct pci_driver mxser_driver = {
2601 .name = "mxser",
2602 .id_table = mxser_pcibrds,
2603 .probe = mxser_probe,
2604 .remove = __devexit_p(mxser_remove)
2605};
2606
a8dea4ec
JS		 2607static int __init mxser_module_init(void)
2608{
a8dea4ec 2609 struct mxser_board *brd;
eae4436a
JS		 2610 unsigned long cap;
2611 unsigned int i, m, isaloop;
2094e757 2612 int retval, b;
a8dea4ec
JS		 2613
2614 pr_debug("Loading module mxser ...\n");
2615
2616 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2617 if (!mxvar_sdriver)
2618 return -ENOMEM;
a8dea4ec 2619
a8dea4ec
JS		 2620 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2621 MXSER_VERSION);
2622
2623 /* Initialize the tty_driver structure */
31f87cf4 2624 mxvar_sdriver->owner = THIS_MODULE;
a8dea4ec 2625 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
e930790d 2626 mxvar_sdriver->name = "ttyMI";
a8dea4ec
JS		 2627 mxvar_sdriver->major = ttymajor;
2628 mxvar_sdriver->minor_start = 0;
2629 mxvar_sdriver->num = MXSER_PORTS + 1;
2630 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2631 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2632 mxvar_sdriver->init_termios = tty_std_termios;
2633 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
938ef180 2634 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
a8dea4ec 2635 tty_set_operations(mxvar_sdriver, &mxser_ops);
a8dea4ec 2636
938ef180
JS		 2637 retval = tty_register_driver(mxvar_sdriver);
2638 if (retval) {
2639 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2640 "tty driver !\n");
2641 goto err_put;
2642 }
2643
a8dea4ec
JS		 2644 mxvar_diagflag = 0;
2645
2646 m = 0;
2647 /* Start finding ISA boards here */
eae4436a
JS		 2648 for (isaloop = 0; isaloop < 2; isaloop++)
2649 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2650 if (!isaloop)
2651 cap = mxserBoardCAP[b]; /* predefined */
2652 else
2653 cap = ioaddr[b]; /* module param */
a8dea4ec 2654
eae4436a
JS		 2655 if (!cap)
2656 continue;
a8dea4ec 2657
eae4436a
JS		 2658 brd = &mxser_boards[m];
2659 retval = mxser_get_ISA_conf(cap, brd);
2660
2661 if (retval != 0)
2662 printk(KERN_INFO "Found MOXA %s board "
2663 "(CAP=0x%x)\n",
cd7ed64e 2664 brd->info->name, ioaddr[b]);
eae4436a
JS		 2665
2666 if (retval <= 0) {
2667 if (retval == MXSER_ERR_IRQ)
2668 printk(KERN_ERR "Invalid interrupt "
2669 "number, board not "
2670 "configured\n");
2671 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2672 printk(KERN_ERR "Invalid interrupt "
2673 "number, board not "
2674 "configured\n");
2675 else if (retval == MXSER_ERR_VECTOR)
2676 printk(KERN_ERR "Invalid interrupt "
2677 "vector, board not "
2678 "configured\n");
2679 else if (retval == MXSER_ERR_IOADDR)
2680 printk(KERN_ERR "Invalid I/O address, "
2681 "board not configured\n");
a8dea4ec 2682
2094e757 2683 brd->info = NULL;
eae4436a
JS		 2684 continue;
2685 }
a8dea4ec 2686
eae4436a 2687 /* mxser_initbrd will hook ISR. */
2094e757
JS		 2688 if (mxser_initbrd(brd, NULL) < 0) {
2689 brd->info = NULL;
a8dea4ec
JS		 2690 continue;
2691 }
2094e757
JS		 2692
2693 brd->idx = m * MXSER_PORTS_PER_BOARD;
cd7ed64e 2694 for (i = 0; i < brd->info->nports; i++)
2094e757
JS		 2695 tty_register_device(mxvar_sdriver, brd->idx + i,
2696 NULL);
938ef180 2697
a8dea4ec 2698 m++;
a8dea4ec 2699 }
037ad48b 2700
2094e757
JS		 2701 retval = pci_register_driver(&mxser_driver);
2702 if (retval) {
2703 printk(KERN_ERR "Can't register pci driver\n");
2704 if (!m) {
2705 retval = -ENODEV;
2706 goto err_unr;
2707 } /* else: we have some ISA cards under control */
037ad48b 2708 }
a8dea4ec
JS		 2709
2710 pr_debug("Done.\n");
2711
938ef180
JS		 2712 return 0;
2713err_unr:
2714 tty_unregister_driver(mxvar_sdriver);
2715err_put:
2716 put_tty_driver(mxvar_sdriver);
a8dea4ec 2717 return retval;
037ad48b
JS		 2718}
2719
a8dea4ec 2720static void __exit mxser_module_exit(void)
037ad48b 2721{
2094e757 2722 unsigned int i, j;
037ad48b 2723
a8dea4ec 2724 pr_debug("Unloading module mxser ...\n");
037ad48b 2725
2094e757
JS		 2726 pci_unregister_driver(&mxser_driver);
2727
2728 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2729 if (mxser_boards[i].info != NULL)
2730 for (j = 0; j < mxser_boards[i].info->nports; j++)
2731 tty_unregister_device(mxvar_sdriver,
2732 mxser_boards[i].idx + j);
ead568c9
JS		 2733 tty_unregister_driver(mxvar_sdriver);
2734 put_tty_driver(mxvar_sdriver);
037ad48b 2735
171d3a86 2736 for (i = 0; i < MXSER_BOARDS; i++)
cd7ed64e 2737 if (mxser_boards[i].info != NULL)
2094e757 2738 mxser_release_res(&mxser_boards[i], NULL, 1);
037ad48b 2739
a8dea4ec 2740 pr_debug("Done.\n");
037ad48b
JS		 2741}
2742
2743module_init(mxser_module_init);
2744module_exit(mxser_module_exit);
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