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Commit | Line | Data |
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681a3e7d JC |
1 | /* linux/drivers/char/pc8736x_gpio.c |
2 | ||
3 | National Semiconductor PC8736x GPIO driver. Allows a user space | |
4 | process to play with the GPIO pins. | |
5 | ||
6 | Copyright (c) 2005 Jim Cromie <jim.cromie@gmail.com> | |
7 | ||
8 | adapted from linux/drivers/char/scx200_gpio.c | |
9 | Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>, | |
10 | */ | |
11 | ||
12 | #include <linux/config.h> | |
13 | #include <linux/fs.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/ioport.h> | |
19 | #include <linux/nsc_gpio.h> | |
58b087cd | 20 | #include <linux/platform_device.h> |
681a3e7d JC |
21 | #include <asm/uaccess.h> |
22 | #include <asm/io.h> | |
23 | ||
58b087cd | 24 | #define DEVNAME "pc8736x_gpio" |
681a3e7d JC |
25 | |
26 | MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>"); | |
58b087cd | 27 | MODULE_DESCRIPTION("NatSemi PC-8736x GPIO Pin Driver"); |
681a3e7d JC |
28 | MODULE_LICENSE("GPL"); |
29 | ||
30 | static int major; /* default to dynamic major */ | |
31 | module_param(major, int, 0); | |
32 | MODULE_PARM_DESC(major, "Major device number"); | |
33 | ||
34 | static DEFINE_SPINLOCK(pc8736x_gpio_config_lock); | |
35 | static unsigned pc8736x_gpio_base; | |
36 | ||
37 | #define SIO_BASE1 0x2E /* 1st command-reg to check */ | |
38 | #define SIO_BASE2 0x4E /* alt command-reg to check */ | |
39 | #define SIO_BASE_OFFSET 0x20 | |
40 | ||
41 | #define SIO_SID 0x20 /* SuperI/O ID Register */ | |
42 | #define SIO_SID_VALUE 0xe9 /* Expected value in SuperI/O ID Register */ | |
43 | ||
44 | #define SIO_CF1 0x21 /* chip config, bit0 is chip enable */ | |
45 | ||
58b087cd JC |
46 | #define PC8736X_GPIO_SIZE 16 |
47 | ||
681a3e7d JC |
48 | #define SIO_UNIT_SEL 0x7 /* unit select reg */ |
49 | #define SIO_UNIT_ACT 0x30 /* unit enable */ | |
50 | #define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */ | |
51 | #define SIO_VLM_UNIT 0x0D | |
52 | #define SIO_TMS_UNIT 0x0E | |
53 | ||
54 | /* config-space addrs to read/write each unit's runtime addr */ | |
55 | #define SIO_BASE_HADDR 0x60 | |
56 | #define SIO_BASE_LADDR 0x61 | |
57 | ||
58 | /* GPIO config-space pin-control addresses */ | |
59 | #define SIO_GPIO_PIN_SELECT 0xF0 | |
60 | #define SIO_GPIO_PIN_CONFIG 0xF1 | |
61 | #define SIO_GPIO_PIN_EVENT 0xF2 | |
62 | ||
63 | static unsigned char superio_cmd = 0; | |
64 | static unsigned char selected_device = 0xFF; /* bogus start val */ | |
65 | ||
66 | /* GPIO port runtime access, functionality */ | |
67 | static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */ | |
68 | /* static int event_capable[] = { 1, 1, 0, 0 }; ports 2,3 are hobbled */ | |
69 | ||
70 | #define PORT_OUT 0 | |
71 | #define PORT_IN 1 | |
72 | #define PORT_EVT_EN 2 | |
73 | #define PORT_EVT_STST 3 | |
74 | ||
58b087cd JC |
75 | static struct platform_device *pdev; /* use in dev_*() */ |
76 | ||
681a3e7d JC |
77 | static inline void superio_outb(int addr, int val) |
78 | { | |
79 | outb_p(addr, superio_cmd); | |
80 | outb_p(val, superio_cmd + 1); | |
81 | } | |
82 | ||
83 | static inline int superio_inb(int addr) | |
84 | { | |
85 | outb_p(addr, superio_cmd); | |
86 | return inb_p(superio_cmd + 1); | |
87 | } | |
88 | ||
89 | static int pc8736x_superio_present(void) | |
90 | { | |
91 | /* try the 2 possible values, read a hardware reg to verify */ | |
92 | superio_cmd = SIO_BASE1; | |
93 | if (superio_inb(SIO_SID) == SIO_SID_VALUE) | |
94 | return superio_cmd; | |
95 | ||
96 | superio_cmd = SIO_BASE2; | |
97 | if (superio_inb(SIO_SID) == SIO_SID_VALUE) | |
98 | return superio_cmd; | |
99 | ||
100 | return 0; | |
101 | } | |
102 | ||
103 | static void device_select(unsigned devldn) | |
104 | { | |
105 | superio_outb(SIO_UNIT_SEL, devldn); | |
106 | selected_device = devldn; | |
107 | } | |
108 | ||
109 | static void select_pin(unsigned iminor) | |
110 | { | |
111 | /* select GPIO port/pin from device minor number */ | |
112 | device_select(SIO_GPIO_UNIT); | |
113 | superio_outb(SIO_GPIO_PIN_SELECT, | |
114 | ((iminor << 1) & 0xF0) | (iminor & 0x7)); | |
115 | } | |
116 | ||
117 | static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits, | |
118 | u32 func_slct) | |
119 | { | |
120 | u32 config, new_config; | |
121 | unsigned long flags; | |
122 | ||
123 | spin_lock_irqsave(&pc8736x_gpio_config_lock, flags); | |
124 | ||
125 | device_select(SIO_GPIO_UNIT); | |
126 | select_pin(index); | |
127 | ||
128 | /* read current config value */ | |
129 | config = superio_inb(func_slct); | |
130 | ||
131 | /* set new config */ | |
132 | new_config = (config & mask) | bits; | |
133 | superio_outb(func_slct, new_config); | |
134 | ||
135 | spin_unlock_irqrestore(&pc8736x_gpio_config_lock, flags); | |
136 | ||
137 | return config; | |
138 | } | |
139 | ||
140 | static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits) | |
141 | { | |
142 | return pc8736x_gpio_configure_fn(index, mask, bits, | |
143 | SIO_GPIO_PIN_CONFIG); | |
144 | } | |
145 | ||
146 | static int pc8736x_gpio_get(unsigned minor) | |
147 | { | |
148 | int port, bit, val; | |
149 | ||
150 | port = minor >> 3; | |
151 | bit = minor & 7; | |
152 | val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); | |
153 | val >>= bit; | |
154 | val &= 1; | |
155 | ||
58b087cd JC |
156 | dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n", |
157 | minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit, | |
158 | val); | |
681a3e7d JC |
159 | |
160 | return val; | |
161 | } | |
162 | ||
163 | static void pc8736x_gpio_set(unsigned minor, int val) | |
164 | { | |
165 | int port, bit, curval; | |
166 | ||
167 | minor &= 0x1f; | |
168 | port = minor >> 3; | |
169 | bit = minor & 7; | |
170 | curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); | |
171 | ||
58b087cd JC |
172 | dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n", |
173 | pc8736x_gpio_base + port_offset[port] + PORT_OUT, | |
174 | curval, bit, (curval & ~(1 << bit)), val, (val << bit)); | |
681a3e7d JC |
175 | |
176 | val = (curval & ~(1 << bit)) | (val << bit); | |
177 | ||
58b087cd JC |
178 | dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)" |
179 | " %2x -> %2x\n", minor, port, bit, curval, val); | |
681a3e7d JC |
180 | |
181 | outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT); | |
182 | ||
183 | curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); | |
184 | val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); | |
185 | ||
58b087cd | 186 | dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val); |
681a3e7d JC |
187 | } |
188 | ||
189 | static void pc8736x_gpio_set_high(unsigned index) | |
190 | { | |
191 | pc8736x_gpio_set(index, 1); | |
192 | } | |
193 | ||
194 | static void pc8736x_gpio_set_low(unsigned index) | |
195 | { | |
196 | pc8736x_gpio_set(index, 0); | |
197 | } | |
198 | ||
199 | static int pc8736x_gpio_current(unsigned index) | |
200 | { | |
58b087cd | 201 | dev_warn(&pdev->dev, "pc8736x_gpio_current unimplemented\n"); |
681a3e7d JC |
202 | return 0; |
203 | } | |
204 | ||
205 | static void pc8736x_gpio_change(unsigned index) | |
206 | { | |
207 | pc8736x_gpio_set(index, !pc8736x_gpio_get(index)); | |
208 | } | |
209 | ||
681a3e7d JC |
210 | static struct nsc_gpio_ops pc8736x_access = { |
211 | .owner = THIS_MODULE, | |
212 | .gpio_config = pc8736x_gpio_configure, | |
213 | .gpio_dump = nsc_gpio_dump, | |
214 | .gpio_get = pc8736x_gpio_get, | |
215 | .gpio_set = pc8736x_gpio_set, | |
216 | .gpio_set_high = pc8736x_gpio_set_high, | |
217 | .gpio_set_low = pc8736x_gpio_set_low, | |
218 | .gpio_change = pc8736x_gpio_change, | |
219 | .gpio_current = pc8736x_gpio_current | |
220 | }; | |
221 | ||
222 | static int pc8736x_gpio_open(struct inode *inode, struct file *file) | |
223 | { | |
224 | unsigned m = iminor(inode); | |
225 | file->private_data = &pc8736x_access; | |
226 | ||
58b087cd | 227 | dev_dbg(&pdev->dev, "open %d\n", m); |
681a3e7d JC |
228 | |
229 | if (m > 63) | |
230 | return -EINVAL; | |
231 | return nonseekable_open(inode, file); | |
232 | } | |
233 | ||
234 | static struct file_operations pc8736x_gpio_fops = { | |
58b087cd JC |
235 | .owner = THIS_MODULE, |
236 | .open = pc8736x_gpio_open, | |
237 | .write = nsc_gpio_write, | |
238 | .read = nsc_gpio_read, | |
681a3e7d JC |
239 | }; |
240 | ||
241 | static int __init pc8736x_gpio_init(void) | |
242 | { | |
58b087cd JC |
243 | int rc = 0; |
244 | ||
245 | pdev = platform_device_alloc(DEVNAME, 0); | |
246 | if (!pdev) | |
247 | return -ENOMEM; | |
681a3e7d | 248 | |
58b087cd JC |
249 | rc = platform_device_add(pdev); |
250 | if (rc) { | |
251 | rc = -ENODEV; | |
252 | goto undo_platform_dev_alloc; | |
253 | } | |
254 | dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n"); | |
681a3e7d JC |
255 | |
256 | if (!pc8736x_superio_present()) { | |
58b087cd JC |
257 | rc = -ENODEV; |
258 | dev_err(&pdev->dev, "no device found\n"); | |
259 | goto undo_platform_dev_add; | |
681a3e7d | 260 | } |
f31000e5 | 261 | pc8736x_access.dev = &pdev->dev; |
681a3e7d JC |
262 | |
263 | /* Verify that chip and it's GPIO unit are both enabled. | |
264 | My BIOS does this, so I take minimum action here | |
265 | */ | |
266 | rc = superio_inb(SIO_CF1); | |
267 | if (!(rc & 0x01)) { | |
58b087cd JC |
268 | rc = -ENODEV; |
269 | dev_err(&pdev->dev, "device not enabled\n"); | |
270 | goto undo_platform_dev_add; | |
681a3e7d JC |
271 | } |
272 | device_select(SIO_GPIO_UNIT); | |
273 | if (!superio_inb(SIO_UNIT_ACT)) { | |
58b087cd JC |
274 | rc = -ENODEV; |
275 | dev_err(&pdev->dev, "GPIO unit not enabled\n"); | |
276 | goto undo_platform_dev_add; | |
681a3e7d JC |
277 | } |
278 | ||
58b087cd | 279 | /* read the GPIO unit base addr that chip responds to */ |
681a3e7d JC |
280 | pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8 |
281 | | superio_inb(SIO_BASE_LADDR)); | |
282 | ||
58b087cd JC |
283 | if (!request_region(pc8736x_gpio_base, 16, DEVNAME)) { |
284 | rc = -ENODEV; | |
285 | dev_err(&pdev->dev, "GPIO ioport %x busy\n", | |
286 | pc8736x_gpio_base); | |
287 | goto undo_platform_dev_add; | |
288 | } | |
289 | dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base); | |
681a3e7d | 290 | |
58b087cd JC |
291 | rc = register_chrdev(major, DEVNAME, &pc8736x_gpio_fops); |
292 | if (rc < 0) { | |
293 | dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc); | |
294 | goto undo_platform_dev_add; | |
681a3e7d JC |
295 | } |
296 | if (!major) { | |
58b087cd JC |
297 | major = rc; |
298 | dev_dbg(&pdev->dev, "got dynamic major %d\n", major); | |
681a3e7d JC |
299 | } |
300 | ||
301 | pc8736x_init_shadow(); | |
302 | return 0; | |
58b087cd JC |
303 | |
304 | undo_platform_dev_add: | |
305 | platform_device_put(pdev); | |
306 | undo_platform_dev_alloc: | |
307 | kfree(pdev); | |
308 | return rc; | |
681a3e7d JC |
309 | } |
310 | ||
311 | static void __exit pc8736x_gpio_cleanup(void) | |
312 | { | |
58b087cd | 313 | dev_dbg(&pdev->dev, " cleanup\n"); |
681a3e7d JC |
314 | |
315 | release_region(pc8736x_gpio_base, 16); | |
316 | ||
58b087cd | 317 | unregister_chrdev(major, DEVNAME); |
681a3e7d JC |
318 | } |
319 | ||
320 | module_init(pc8736x_gpio_init); | |
321 | module_exit(pc8736x_gpio_cleanup); |