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[mirror_ubuntu-zesty-kernel.git] / drivers / char / pcmcia / cm4000_cs.c
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c1986ee9
HW		 1 /*
2 * A driver for the PCMCIA Smartcard Reader "Omnikey CardMan Mobile 4000"
3 *
4 * cm4000_cs.c support.linux@omnikey.com
5 *
6 * Tue Oct 23 11:32:43 GMT 2001 herp - cleaned up header files
7 * Sun Jan 20 10:11:15 MET 2002 herp - added modversion header files
8 * Thu Nov 14 16:34:11 GMT 2002 mh - added PPS functionality
9 * Tue Nov 19 16:36:27 GMT 2002 mh - added SUSPEND/RESUME functionailty
10 * Wed Jul 28 12:55:01 CEST 2004 mh - kernel 2.6 adjustments
11 *
12 * current version: 2.4.0gm4
13 *
14 * (C) 2000,2001,2002,2003,2004 Omnikey AG
15 *
67bc6200 16 * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
c1986ee9
HW		 17 * - Adhere to Kernel CodingStyle
18 * - Port to 2.6.13 "new" style PCMCIA
19 * - Check for copy_{from,to}_user return values
20 * - Use nonseekable_open()
67bc6200 21 * - add class interface for udev device creation
c1986ee9
HW		 22 *
23 * All rights reserved. Licensed under dual BSD/GPL license.
24 */
25
c1986ee9
HW		 26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/slab.h>
29#include <linux/init.h>
30#include <linux/fs.h>
31#include <linux/delay.h>
884c3d75 32#include <linux/bitrev.h>
613655fa 33#include <linux/mutex.h>
4cf974c5
AC		 34#include <linux/uaccess.h>
35#include <linux/io.h>
c1986ee9 36
c1986ee9
HW		 37#include <pcmcia/cistpl.h>
38#include <pcmcia/cisreg.h>
39#include <pcmcia/ciscode.h>
40#include <pcmcia/ds.h>
41
42#include <linux/cm4000_cs.h>
43
44/* #define ATR_CSUM */
45
dd2e5a15 46#define reader_to_dev(x) (&x->p_dev->dev)
cbf624f0
DB		 47
48/* n (debug level) is ignored */
49/* additional debug output may be enabled by re-compiling with
50 * CM4000_DEBUG set */
51/* #define CM4000_DEBUG */
52#define DEBUGP(n, rdr, x, args...) do { \
53 dev_dbg(reader_to_dev(rdr), "%s:" x, \
54 __func__ , ## args); \
c1986ee9 55 } while (0)
cbf624f0 56
613655fa 57static DEFINE_MUTEX(cmm_mutex);
c1986ee9
HW		 58
59#define T_1SEC (HZ)
60#define T_10MSEC msecs_to_jiffies(10)
61#define T_20MSEC msecs_to_jiffies(20)
62#define T_40MSEC msecs_to_jiffies(40)
63#define T_50MSEC msecs_to_jiffies(50)
64#define T_100MSEC msecs_to_jiffies(100)
65#define T_500MSEC msecs_to_jiffies(500)
66
fba395ee 67static void cm4000_release(struct pcmcia_device *link);
c1986ee9
HW		 68
69static int major; /* major number we get from the kernel */
70
71/* note: the first state has to have number 0 always */
72
73#define M_FETCH_ATR 0
74#define M_TIMEOUT_WAIT 1
75#define M_READ_ATR_LEN 2
76#define M_READ_ATR 3
77#define M_ATR_PRESENT 4
78#define M_BAD_CARD 5
79#define M_CARDOFF 6
80
81#define LOCK_IO 0
82#define LOCK_MONITOR 1
83
84#define IS_AUTOPPS_ACT 6
85#define IS_PROCBYTE_PRESENT 7
86#define IS_INVREV 8
87#define IS_ANY_T0 9
88#define IS_ANY_T1 10
89#define IS_ATR_PRESENT 11
90#define IS_ATR_VALID 12
91#define IS_CMM_ABSENT 13
92#define IS_BAD_LENGTH 14
93#define IS_BAD_CSUM 15
94#define IS_BAD_CARD 16
95
96#define REG_FLAGS0(x) (x + 0)
97#define REG_FLAGS1(x) (x + 1)
98#define REG_NUM_BYTES(x) (x + 2)
99#define REG_BUF_ADDR(x) (x + 3)
100#define REG_BUF_DATA(x) (x + 4)
101#define REG_NUM_SEND(x) (x + 5)
102#define REG_BAUDRATE(x) (x + 6)
103#define REG_STOPBITS(x) (x + 7)
104
105struct cm4000_dev {
fd238232 106 struct pcmcia_device *p_dev;
c1986ee9
HW		 107
108 unsigned char atr[MAX_ATR];
109 unsigned char rbuf[512];
110 unsigned char sbuf[512];
111
112 wait_queue_head_t devq; /* when removing cardman must not be
113 zeroed! */
114
115 wait_queue_head_t ioq; /* if IO is locked, wait on this Q */
116 wait_queue_head_t atrq; /* wait for ATR valid */
117 wait_queue_head_t readq; /* used by write to wake blk.read */
118
119 /* warning: do not move this fields.
120 * initialising to zero depends on it - see ZERO_DEV below. */
121 unsigned char atr_csum;
122 unsigned char atr_len_retry;
123 unsigned short atr_len;
124 unsigned short rlen; /* bytes avail. after write */
125 unsigned short rpos; /* latest read pos. write zeroes */
126 unsigned char procbyte; /* T=0 procedure byte */
127 unsigned char mstate; /* state of card monitor */
128 unsigned char cwarn; /* slow down warning */
129 unsigned char flags0; /* cardman IO-flags 0 */
130 unsigned char flags1; /* cardman IO-flags 1 */
131 unsigned int mdelay; /* variable monitor speeds, in jiffies */
132
133 unsigned int baudv; /* baud value for speed */
134 unsigned char ta1;
135 unsigned char proto; /* T=0, T=1, ... */
136 unsigned long flags; /* lock+flags (MONITOR,IO,ATR) * for concurrent
137 access */
138
139 unsigned char pts[4];
140
141 struct timer_list timer; /* used to keep monitor running */
142 int monitor_running;
143};
144
145#define ZERO_DEV(dev) \
146 memset(&dev->atr_csum,0, \
147 sizeof(struct cm4000_dev) - \
a2bcce8e 148 offsetof(struct cm4000_dev, atr_csum))
c1986ee9 149
fba395ee 150static struct pcmcia_device *dev_table[CM4000_MAX_DEV];
67bc6200 151static struct class *cmm_class;
c1986ee9
HW		 152
153/* This table doesn't use spaces after the comma between fields and thus
154 * violates CodingStyle. However, I don't really think wrapping it around will
155 * make it any clearer to read -HW */
156static unsigned char fi_di_table[10][14] = {
157/*FI 00 01 02 03 04 05 06 07 08 09 10 11 12 13 */
158/*DI */
159/* 0 */ {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
160/* 1 */ {0x01,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x91,0x11,0x11,0x11,0x11},
161/* 2 */ {0x02,0x12,0x22,0x32,0x11,0x11,0x11,0x11,0x11,0x92,0xA2,0xB2,0x11,0x11},
162/* 3 */ {0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x11,0x11,0x93,0xA3,0xB3,0xC3,0xD3},
163/* 4 */ {0x04,0x14,0x24,0x34,0x44,0x54,0x64,0x11,0x11,0x94,0xA4,0xB4,0xC4,0xD4},
164/* 5 */ {0x00,0x15,0x25,0x35,0x45,0x55,0x65,0x11,0x11,0x95,0xA5,0xB5,0xC5,0xD5},
165/* 6 */ {0x06,0x16,0x26,0x36,0x46,0x56,0x66,0x11,0x11,0x96,0xA6,0xB6,0xC6,0xD6},
166/* 7 */ {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
167/* 8 */ {0x08,0x11,0x28,0x38,0x48,0x58,0x68,0x11,0x11,0x98,0xA8,0xB8,0xC8,0xD8},
168/* 9 */ {0x09,0x19,0x29,0x39,0x49,0x59,0x69,0x11,0x11,0x99,0xA9,0xB9,0xC9,0xD9}
169};
170
cbf624f0 171#ifndef CM4000_DEBUG
c1986ee9
HW		 172#define xoutb outb
173#define xinb inb
174#else
175static inline void xoutb(unsigned char val, unsigned short port)
176{
cbf624f0 177 pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
c1986ee9
HW		 178 outb(val, port);
179}
180static inline unsigned char xinb(unsigned short port)
181{
182 unsigned char val;
183
184 val = inb(port);
cbf624f0 185 pr_debug("%.2x=inb(%.4x)\n", val, port);
c1986ee9
HW		 186
187 return val;
188}
189#endif
190
884c3d75
AM		 191static inline unsigned char invert_revert(unsigned char ch)
192{
193 return bitrev8(~ch);
194}
c1986ee9
HW		 195
196static void str_invert_revert(unsigned char *b, int len)
197{
198 int i;
199
200 for (i = 0; i < len; i++)
884c3d75 201 b[i] = invert_revert(b[i]);
c1986ee9
HW		 202}
203
204#define ATRLENCK(dev,pos) \
205 if (pos>=dev->atr_len || pos>=MAX_ATR) \
206 goto return_0;
207
208static unsigned int calc_baudv(unsigned char fidi)
209{
210 unsigned int wcrcf, wbrcf, fi_rfu, di_rfu;
211
212 fi_rfu = 372;
213 di_rfu = 1;
214
215 /* FI */
216 switch ((fidi >> 4) & 0x0F) {
217 case 0x00:
218 wcrcf = 372;
219 break;
220 case 0x01:
221 wcrcf = 372;
222 break;
223 case 0x02:
224 wcrcf = 558;
225 break;
226 case 0x03:
227 wcrcf = 744;
228 break;
229 case 0x04:
230 wcrcf = 1116;
231 break;
232 case 0x05:
233 wcrcf = 1488;
234 break;
235 case 0x06:
236 wcrcf = 1860;
237 break;
238 case 0x07:
239 wcrcf = fi_rfu;
240 break;
241 case 0x08:
242 wcrcf = fi_rfu;
243 break;
244 case 0x09:
245 wcrcf = 512;
246 break;
247 case 0x0A:
248 wcrcf = 768;
249 break;
250 case 0x0B:
251 wcrcf = 1024;
252 break;
253 case 0x0C:
254 wcrcf = 1536;
255 break;
256 case 0x0D:
257 wcrcf = 2048;
258 break;
259 default:
260 wcrcf = fi_rfu;
261 break;
262 }
263
264 /* DI */
265 switch (fidi & 0x0F) {
266 case 0x00:
267 wbrcf = di_rfu;
268 break;
269 case 0x01:
270 wbrcf = 1;
271 break;
272 case 0x02:
273 wbrcf = 2;
274 break;
275 case 0x03:
276 wbrcf = 4;
277 break;
278 case 0x04:
279 wbrcf = 8;
280 break;
281 case 0x05:
282 wbrcf = 16;
283 break;
284 case 0x06:
285 wbrcf = 32;
286 break;
287 case 0x07:
288 wbrcf = di_rfu;
289 break;
290 case 0x08:
291 wbrcf = 12;
292 break;
293 case 0x09:
294 wbrcf = 20;
295 break;
296 default:
297 wbrcf = di_rfu;
298 break;
299 }
300
301 return (wcrcf / wbrcf);
302}
303
ecb8a847
OJ		 304static unsigned short io_read_num_rec_bytes(unsigned int iobase,
305 unsigned short *s)
c1986ee9
HW		 306{
307 unsigned short tmp;
308
309 tmp = *s = 0;
310 do {
311 *s = tmp;
312 tmp = inb(REG_NUM_BYTES(iobase)) |
313 (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0);
314 } while (tmp != *s);
315
316 return *s;
317}
318
319static int parse_atr(struct cm4000_dev *dev)
320{
321 unsigned char any_t1, any_t0;
322 unsigned char ch, ifno;
323 int ix, done;
324
325 DEBUGP(3, dev, "-> parse_atr: dev->atr_len = %i\n", dev->atr_len);
326
327 if (dev->atr_len < 3) {
328 DEBUGP(5, dev, "parse_atr: atr_len < 3\n");
329 return 0;
330 }
331
332 if (dev->atr[0] == 0x3f)
333 set_bit(IS_INVREV, &dev->flags);
334 else
335 clear_bit(IS_INVREV, &dev->flags);
336 ix = 1;
337 ifno = 1;
338 ch = dev->atr[1];
339 dev->proto = 0; /* XXX PROTO */
340 any_t1 = any_t0 = done = 0;
341 dev->ta1 = 0x11; /* defaults to 9600 baud */
342 do {
343 if (ifno == 1 && (ch & 0x10)) {
344 /* read first interface byte and TA1 is present */
345 dev->ta1 = dev->atr[2];
346 DEBUGP(5, dev, "Card says FiDi is 0x%.2x\n", dev->ta1);
347 ifno++;
348 } else if ((ifno == 2) && (ch & 0x10)) { /* TA(2) */
349 dev->ta1 = 0x11;
350 ifno++;
351 }
352
353 DEBUGP(5, dev, "Yi=%.2x\n", ch & 0xf0);
354 ix += ((ch & 0x10) >> 4) /* no of int.face chars */
355 +((ch & 0x20) >> 5)
356 + ((ch & 0x40) >> 6)
357 + ((ch & 0x80) >> 7);
358 /* ATRLENCK(dev,ix); */
359 if (ch & 0x80) { /* TDi */
360 ch = dev->atr[ix];
361 if ((ch & 0x0f)) {
362 any_t1 = 1;
363 DEBUGP(5, dev, "card is capable of T=1\n");
364 } else {
365 any_t0 = 1;
366 DEBUGP(5, dev, "card is capable of T=0\n");
367 }
368 } else
369 done = 1;
370 } while (!done);
371
372 DEBUGP(5, dev, "ix=%d noHist=%d any_t1=%d\n",
373 ix, dev->atr[1] & 15, any_t1);
374 if (ix + 1 + (dev->atr[1] & 0x0f) + any_t1 != dev->atr_len) {
375 DEBUGP(5, dev, "length error\n");
376 return 0;
377 }
378 if (any_t0)
379 set_bit(IS_ANY_T0, &dev->flags);
380
381 if (any_t1) { /* compute csum */
382 dev->atr_csum = 0;
383#ifdef ATR_CSUM
384 for (i = 1; i < dev->atr_len; i++)
385 dev->atr_csum ^= dev->atr[i];
386 if (dev->atr_csum) {
387 set_bit(IS_BAD_CSUM, &dev->flags);
388 DEBUGP(5, dev, "bad checksum\n");
389 goto return_0;
390 }
391#endif
392 if (any_t0 == 0)
393 dev->proto = 1; /* XXX PROTO */
394 set_bit(IS_ANY_T1, &dev->flags);
395 }
396
397 return 1;
398}
399
400struct card_fixup {
401 char atr[12];
402 u_int8_t atr_len;
403 u_int8_t stopbits;
404};
405
406static struct card_fixup card_fixups[] = {
407 { /* ACOS */
408 .atr = { 0x3b, 0xb3, 0x11, 0x00, 0x00, 0x41, 0x01 },
409 .atr_len = 7,
410 .stopbits = 0x03,
411 },
412 { /* Motorola */
413 .atr = {0x3b, 0x76, 0x13, 0x00, 0x00, 0x80, 0x62, 0x07,
414 0x41, 0x81, 0x81 },
415 .atr_len = 11,
416 .stopbits = 0x04,
417 },
418};
419
420static void set_cardparameter(struct cm4000_dev *dev)
421{
422 int i;
9a017a91 423 unsigned int iobase = dev->p_dev->resource[0]->start;
c1986ee9
HW		 424 u_int8_t stopbits = 0x02; /* ISO default */
425
426 DEBUGP(3, dev, "-> set_cardparameter\n");
427
428 dev->flags1 = dev->flags1 | (((dev->baudv - 1) & 0x0100) >> 8);
429 xoutb(dev->flags1, REG_FLAGS1(iobase));
430 DEBUGP(5, dev, "flags1 = 0x%02x\n", dev->flags1);
431
432 /* set baudrate */
433 xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase));
434
435 DEBUGP(5, dev, "baudv = %i -> write 0x%02x\n", dev->baudv,
436 ((dev->baudv - 1) & 0xFF));
437
438 /* set stopbits */
439 for (i = 0; i < ARRAY_SIZE(card_fixups); i++) {
440 if (!memcmp(dev->atr, card_fixups[i].atr,
441 card_fixups[i].atr_len))
442 stopbits = card_fixups[i].stopbits;
443 }
444 xoutb(stopbits, REG_STOPBITS(iobase));
445
446 DEBUGP(3, dev, "<- set_cardparameter\n");
447}
448
449static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
450{
451
452 unsigned long tmp, i;
453 unsigned short num_bytes_read;
454 unsigned char pts_reply[4];
455 ssize_t rc;
9a017a91 456 unsigned int iobase = dev->p_dev->resource[0]->start;
c1986ee9
HW		 457
458 rc = 0;
459
460 DEBUGP(3, dev, "-> set_protocol\n");
461 DEBUGP(5, dev, "ptsreq->Protocol = 0x%.8x, ptsreq->Flags=0x%.8x, "
462 "ptsreq->pts1=0x%.2x, ptsreq->pts2=0x%.2x, "
463 "ptsreq->pts3=0x%.2x\n", (unsigned int)ptsreq->protocol,
464 (unsigned int)ptsreq->flags, ptsreq->pts1, ptsreq->pts2,
465 ptsreq->pts3);
466
467 /* Fill PTS structure */
468 dev->pts[0] = 0xff;
469 dev->pts[1] = 0x00;
470 tmp = ptsreq->protocol;
471 while ((tmp = (tmp >> 1)) > 0)
472 dev->pts[1]++;
473 dev->proto = dev->pts[1]; /* Set new protocol */
474 dev->pts[1] = (0x01 << 4) | (dev->pts[1]);
475
476 /* Correct Fi/Di according to CM4000 Fi/Di table */
477 DEBUGP(5, dev, "Ta(1) from ATR is 0x%.2x\n", dev->ta1);
478 /* set Fi/Di according to ATR TA(1) */
479 dev->pts[2] = fi_di_table[dev->ta1 & 0x0F][(dev->ta1 >> 4) & 0x0F];
480
481 /* Calculate PCK character */
482 dev->pts[3] = dev->pts[0] ^ dev->pts[1] ^ dev->pts[2];
483
484 DEBUGP(5, dev, "pts0=%.2x, pts1=%.2x, pts2=%.2x, pts3=%.2x\n",
485 dev->pts[0], dev->pts[1], dev->pts[2], dev->pts[3]);
486
487 /* check card convention */
488 if (test_bit(IS_INVREV, &dev->flags))
489 str_invert_revert(dev->pts, 4);
490
491 /* reset SM */
492 xoutb(0x80, REG_FLAGS0(iobase));
493
494 /* Enable access to the message buffer */
495 DEBUGP(5, dev, "Enable access to the messages buffer\n");
496 dev->flags1 = 0x20 /* T_Active */
497 | (test_bit(IS_INVREV, &dev->flags) ? 0x02 : 0x00) /* inv parity */
498 | ((dev->baudv >> 8) & 0x01); /* MSB-baud */
499 xoutb(dev->flags1, REG_FLAGS1(iobase));
500
501 DEBUGP(5, dev, "Enable message buffer -> flags1 = 0x%.2x\n",
502 dev->flags1);
503
504 /* write challenge to the buffer */
505 DEBUGP(5, dev, "Write challenge to buffer: ");
506 for (i = 0; i < 4; i++) {
507 xoutb(i, REG_BUF_ADDR(iobase));
508 xoutb(dev->pts[i], REG_BUF_DATA(iobase)); /* buf data */
cbf624f0
DB		 509#ifdef CM4000_DEBUG
510 pr_debug("0x%.2x ", dev->pts[i]);
c1986ee9 511 }
cbf624f0 512 pr_debug("\n");
c1986ee9
HW		 513#else
514 }
515#endif
516
517 /* set number of bytes to write */
518 DEBUGP(5, dev, "Set number of bytes to write\n");
519 xoutb(0x04, REG_NUM_SEND(iobase));
520
521 /* Trigger CARDMAN CONTROLLER */
522 xoutb(0x50, REG_FLAGS0(iobase));
523
524 /* Monitor progress */
525 /* wait for xmit done */
526 DEBUGP(5, dev, "Waiting for NumRecBytes getting valid\n");
527
528 for (i = 0; i < 100; i++) {
529 if (inb(REG_FLAGS0(iobase)) & 0x08) {
530 DEBUGP(5, dev, "NumRecBytes is valid\n");
531 break;
532 }
533 mdelay(10);
534 }
535 if (i == 100) {
536 DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting "
537 "valid\n");
538 rc = -EIO;
539 goto exit_setprotocol;
540 }
541
542 DEBUGP(5, dev, "Reading NumRecBytes\n");
543 for (i = 0; i < 100; i++) {
544 io_read_num_rec_bytes(iobase, &num_bytes_read);
545 if (num_bytes_read >= 4) {
546 DEBUGP(2, dev, "NumRecBytes = %i\n", num_bytes_read);
547 break;
548 }
549 mdelay(10);
550 }
551
552 /* check whether it is a short PTS reply? */
553 if (num_bytes_read == 3)
554 i = 0;
555
556 if (i == 100) {
557 DEBUGP(5, dev, "Timeout reading num_bytes_read\n");
558 rc = -EIO;
559 goto exit_setprotocol;
560 }
561
562 DEBUGP(5, dev, "Reset the CARDMAN CONTROLLER\n");
563 xoutb(0x80, REG_FLAGS0(iobase));
564
565 /* Read PPS reply */
566 DEBUGP(5, dev, "Read PPS reply\n");
567 for (i = 0; i < num_bytes_read; i++) {
568 xoutb(i, REG_BUF_ADDR(iobase));
569 pts_reply[i] = inb(REG_BUF_DATA(iobase));
570 }
571
cbf624f0 572#ifdef CM4000_DEBUG
c1986ee9
HW		 573 DEBUGP(2, dev, "PTSreply: ");
574 for (i = 0; i < num_bytes_read; i++) {
cbf624f0 575 pr_debug("0x%.2x ", pts_reply[i]);
c1986ee9 576 }
cbf624f0
DB		 577 pr_debug("\n");
578#endif /* CM4000_DEBUG */
c1986ee9
HW		 579
580 DEBUGP(5, dev, "Clear Tactive in Flags1\n");
581 xoutb(0x20, REG_FLAGS1(iobase));
582
583 /* Compare ptsreq and ptsreply */
584 if ((dev->pts[0] == pts_reply[0]) &&
585 (dev->pts[1] == pts_reply[1]) &&
586 (dev->pts[2] == pts_reply[2]) && (dev->pts[3] == pts_reply[3])) {
587 /* setcardparameter according to PPS */
588 dev->baudv = calc_baudv(dev->pts[2]);
589 set_cardparameter(dev);
590 } else if ((dev->pts[0] == pts_reply[0]) &&
591 ((dev->pts[1] & 0xef) == pts_reply[1]) &&
592 ((pts_reply[0] ^ pts_reply[1]) == pts_reply[2])) {
593 /* short PTS reply, set card parameter to default values */
594 dev->baudv = calc_baudv(0x11);
595 set_cardparameter(dev);
596 } else
597 rc = -EIO;
598
599exit_setprotocol:
600 DEBUGP(3, dev, "<- set_protocol\n");
601 return rc;
602}
603
ecb8a847 604static int io_detect_cm4000(unsigned int iobase, struct cm4000_dev *dev)
c1986ee9
HW		 605{
606
607 /* note: statemachine is assumed to be reset */
608 if (inb(REG_FLAGS0(iobase)) & 8) {
609 clear_bit(IS_ATR_VALID, &dev->flags);
610 set_bit(IS_CMM_ABSENT, &dev->flags);
611 return 0; /* detect CMM = 1 -> failure */
612 }
613 /* xoutb(0x40, REG_FLAGS1(iobase)); detectCMM */
614 xoutb(dev->flags1 | 0x40, REG_FLAGS1(iobase));
615 if ((inb(REG_FLAGS0(iobase)) & 8) == 0) {
616 clear_bit(IS_ATR_VALID, &dev->flags);
617 set_bit(IS_CMM_ABSENT, &dev->flags);
618 return 0; /* detect CMM=0 -> failure */
619 }
620 /* clear detectCMM again by restoring original flags1 */
621 xoutb(dev->flags1, REG_FLAGS1(iobase));
622 return 1;
623}
624
625static void terminate_monitor(struct cm4000_dev *dev)
626{
627
628 /* tell the monitor to stop and wait until
629 * it terminates.
630 */
631 DEBUGP(3, dev, "-> terminate_monitor\n");
632 wait_event_interruptible(dev->devq,
633 test_and_set_bit(LOCK_MONITOR,
634 (void *)&dev->flags));
635
636 /* now, LOCK_MONITOR has been set.
637 * allow a last cycle in the monitor.
638 * the monitor will indicate that it has
639 * finished by clearing this bit.
640 */
641 DEBUGP(5, dev, "Now allow last cycle of monitor!\n");
642 while (test_bit(LOCK_MONITOR, (void *)&dev->flags))
643 msleep(25);
644
645 DEBUGP(5, dev, "Delete timer\n");
646 del_timer_sync(&dev->timer);
cbf624f0 647#ifdef CM4000_DEBUG
c1986ee9
HW		 648 dev->monitor_running = 0;
649#endif
650
651 DEBUGP(3, dev, "<- terminate_monitor\n");
652}
653
654/*
655 * monitor the card every 50msec. as a side-effect, retrieve the
656 * atr once a card is inserted. another side-effect of retrieving the
657 * atr is that the card will be powered on, so there is no need to
658 * power on the card explictely from the application: the driver
659 * is already doing that for you.
660 */
661
662static void monitor_card(unsigned long p)
663{
664 struct cm4000_dev *dev = (struct cm4000_dev *) p;
9a017a91 665 unsigned int iobase = dev->p_dev->resource[0]->start;
c1986ee9
HW		 666 unsigned short s;
667 struct ptsreq ptsreq;
668 int i, atrc;
669
670 DEBUGP(7, dev, "-> monitor_card\n");
671
672 /* if someone has set the lock for us: we're done! */
673 if (test_and_set_bit(LOCK_MONITOR, &dev->flags)) {
674 DEBUGP(4, dev, "About to stop monitor\n");
675 /* no */
676 dev->rlen =
677 dev->rpos =
678 dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
679 dev->mstate = M_FETCH_ATR;
680 clear_bit(LOCK_MONITOR, &dev->flags);
681 /* close et al. are sleeping on devq, so wake it */
682 wake_up_interruptible(&dev->devq);
683 DEBUGP(2, dev, "<- monitor_card (we are done now)\n");
684 return;
685 }
686
687 /* try to lock io: if it is already locked, just add another timer */
688 if (test_and_set_bit(LOCK_IO, (void *)&dev->flags)) {
689 DEBUGP(4, dev, "Couldn't get IO lock\n");
690 goto return_with_timer;
691 }
692
693 /* is a card/a reader inserted at all ? */
694 dev->flags0 = xinb(REG_FLAGS0(iobase));
695 DEBUGP(7, dev, "dev->flags0 = 0x%2x\n", dev->flags0);
696 DEBUGP(7, dev, "smartcard present: %s\n",
697 dev->flags0 & 1 ? "yes" : "no");
698 DEBUGP(7, dev, "cardman present: %s\n",
699 dev->flags0 == 0xff ? "no" : "yes");
700
701 if ((dev->flags0 & 1) == 0 /* no smartcard inserted */
702 || dev->flags0 == 0xff) { /* no cardman inserted */
703 /* no */
704 dev->rlen =
705 dev->rpos =
706 dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
707 dev->mstate = M_FETCH_ATR;
708
709 dev->flags &= 0x000000ff; /* only keep IO and MONITOR locks */
710
711 if (dev->flags0 == 0xff) {
712 DEBUGP(4, dev, "set IS_CMM_ABSENT bit\n");
713 set_bit(IS_CMM_ABSENT, &dev->flags);
714 } else if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
715 DEBUGP(4, dev, "clear IS_CMM_ABSENT bit "
716 "(card is removed)\n");
717 clear_bit(IS_CMM_ABSENT, &dev->flags);
718 }
719
720 goto release_io;
721 } else if ((dev->flags0 & 1) && test_bit(IS_CMM_ABSENT, &dev->flags)) {
722 /* cardman and card present but cardman was absent before
723 * (after suspend with inserted card) */
724 DEBUGP(4, dev, "clear IS_CMM_ABSENT bit (card is inserted)\n");
725 clear_bit(IS_CMM_ABSENT, &dev->flags);
726 }
727
728 if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
729 DEBUGP(7, dev, "believe ATR is already valid (do nothing)\n");
730 goto release_io;
731 }
732
733 switch (dev->mstate) {
734 unsigned char flags0;
735 case M_CARDOFF:
736 DEBUGP(4, dev, "M_CARDOFF\n");
737 flags0 = inb(REG_FLAGS0(iobase));
738 if (flags0 & 0x02) {
739 /* wait until Flags0 indicate power is off */
740 dev->mdelay = T_10MSEC;
741 } else {
742 /* Flags0 indicate power off and no card inserted now;
743 * Reset CARDMAN CONTROLLER */
744 xoutb(0x80, REG_FLAGS0(iobase));
745
746 /* prepare for fetching ATR again: after card off ATR
747 * is read again automatically */
748 dev->rlen =
749 dev->rpos =
750 dev->atr_csum =
751 dev->atr_len_retry = dev->cwarn = 0;
752 dev->mstate = M_FETCH_ATR;
753
754 /* minimal gap between CARDOFF and read ATR is 50msec */
755 dev->mdelay = T_50MSEC;
756 }
757 break;
758 case M_FETCH_ATR:
759 DEBUGP(4, dev, "M_FETCH_ATR\n");
760 xoutb(0x80, REG_FLAGS0(iobase));
761 DEBUGP(4, dev, "Reset BAUDV to 9600\n");
762 dev->baudv = 0x173; /* 9600 */
763 xoutb(0x02, REG_STOPBITS(iobase)); /* stopbits=2 */
764 xoutb(0x73, REG_BAUDRATE(iobase)); /* baud value */
765 xoutb(0x21, REG_FLAGS1(iobase)); /* T_Active=1, baud
766 value */
767 /* warm start vs. power on: */
768 xoutb(dev->flags0 & 2 ? 0x46 : 0x44, REG_FLAGS0(iobase));
769 dev->mdelay = T_40MSEC;
770 dev->mstate = M_TIMEOUT_WAIT;
771 break;
772 case M_TIMEOUT_WAIT:
773 DEBUGP(4, dev, "M_TIMEOUT_WAIT\n");
774 /* numRecBytes */
775 io_read_num_rec_bytes(iobase, &dev->atr_len);
776 dev->mdelay = T_10MSEC;
777 dev->mstate = M_READ_ATR_LEN;
778 break;
779 case M_READ_ATR_LEN:
780 DEBUGP(4, dev, "M_READ_ATR_LEN\n");
781 /* infinite loop possible, since there is no timeout */
782
783#define MAX_ATR_LEN_RETRY 100
784
785 if (dev->atr_len == io_read_num_rec_bytes(iobase, &s)) {
786 if (dev->atr_len_retry++ >= MAX_ATR_LEN_RETRY) { /* + XX msec */
787 dev->mdelay = T_10MSEC;
788 dev->mstate = M_READ_ATR;
789 }
790 } else {
791 dev->atr_len = s;
792 dev->atr_len_retry = 0; /* set new timeout */
793 }
794
795 DEBUGP(4, dev, "Current ATR_LEN = %i\n", dev->atr_len);
796 break;
797 case M_READ_ATR:
798 DEBUGP(4, dev, "M_READ_ATR\n");
799 xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */
800 for (i = 0; i < dev->atr_len; i++) {
801 xoutb(i, REG_BUF_ADDR(iobase));
802 dev->atr[i] = inb(REG_BUF_DATA(iobase));
803 }
804 /* Deactivate T_Active flags */
805 DEBUGP(4, dev, "Deactivate T_Active flags\n");
806 dev->flags1 = 0x01;
807 xoutb(dev->flags1, REG_FLAGS1(iobase));
808
25985edc 809 /* atr is present (which doesn't mean it's valid) */
c1986ee9
HW		 810 set_bit(IS_ATR_PRESENT, &dev->flags);
811 if (dev->atr[0] == 0x03)
812 str_invert_revert(dev->atr, dev->atr_len);
813 atrc = parse_atr(dev);
814 if (atrc == 0) { /* atr invalid */
815 dev->mdelay = 0;
816 dev->mstate = M_BAD_CARD;
817 } else {
818 dev->mdelay = T_50MSEC;
819 dev->mstate = M_ATR_PRESENT;
820 set_bit(IS_ATR_VALID, &dev->flags);
821 }
822
823 if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
824 DEBUGP(4, dev, "monitor_card: ATR valid\n");
825 /* if ta1 == 0x11, no PPS necessary (default values) */
826 /* do not do PPS with multi protocol cards */
827 if ((test_bit(IS_AUTOPPS_ACT, &dev->flags) == 0) &&
828 (dev->ta1 != 0x11) &&
829 !(test_bit(IS_ANY_T0, &dev->flags) &&
830 test_bit(IS_ANY_T1, &dev->flags))) {
831 DEBUGP(4, dev, "Perform AUTOPPS\n");
832 set_bit(IS_AUTOPPS_ACT, &dev->flags);
644e6e4a 833 ptsreq.protocol = (0x01 << dev->proto);
c1986ee9
HW		 834 ptsreq.flags = 0x01;
835 ptsreq.pts1 = 0x00;
836 ptsreq.pts2 = 0x00;
837 ptsreq.pts3 = 0x00;
838 if (set_protocol(dev, &ptsreq) == 0) {
839 DEBUGP(4, dev, "AUTOPPS ret SUCC\n");
840 clear_bit(IS_AUTOPPS_ACT, &dev->flags);
841 wake_up_interruptible(&dev->atrq);
842 } else {
843 DEBUGP(4, dev, "AUTOPPS failed: "
844 "repower using defaults\n");
845 /* prepare for repowering */
846 clear_bit(IS_ATR_PRESENT, &dev->flags);
847 clear_bit(IS_ATR_VALID, &dev->flags);
848 dev->rlen =
849 dev->rpos =
850 dev->atr_csum =
851 dev->atr_len_retry = dev->cwarn = 0;
852 dev->mstate = M_FETCH_ATR;
853
854 dev->mdelay = T_50MSEC;
855 }
856 } else {
857 /* for cards which use slightly different
858 * params (extra guard time) */
859 set_cardparameter(dev);
860 if (test_bit(IS_AUTOPPS_ACT, &dev->flags) == 1)
861 DEBUGP(4, dev, "AUTOPPS already active "
862 "2nd try:use default values\n");
863 if (dev->ta1 == 0x11)
864 DEBUGP(4, dev, "No AUTOPPS necessary "
865 "TA(1)==0x11\n");
866 if (test_bit(IS_ANY_T0, &dev->flags)
867 && test_bit(IS_ANY_T1, &dev->flags))
868 DEBUGP(4, dev, "Do NOT perform AUTOPPS "
869 "with multiprotocol cards\n");
870 clear_bit(IS_AUTOPPS_ACT, &dev->flags);
871 wake_up_interruptible(&dev->atrq);
872 }
873 } else {
874 DEBUGP(4, dev, "ATR invalid\n");
875 wake_up_interruptible(&dev->atrq);
876 }
877 break;
878 case M_BAD_CARD:
879 DEBUGP(4, dev, "M_BAD_CARD\n");
880 /* slow down warning, but prompt immediately after insertion */
881 if (dev->cwarn == 0 || dev->cwarn == 10) {
882 set_bit(IS_BAD_CARD, &dev->flags);
ded6a1a3 883 dev_warn(&dev->p_dev->dev, MODULE_NAME ": ");
c1986ee9
HW		 884 if (test_bit(IS_BAD_CSUM, &dev->flags)) {
885 DEBUGP(4, dev, "ATR checksum (0x%.2x, should "
886 "be zero) failed\n", dev->atr_csum);
887 }
cbf624f0 888#ifdef CM4000_DEBUG
c1986ee9
HW		 889 else if (test_bit(IS_BAD_LENGTH, &dev->flags)) {
890 DEBUGP(4, dev, "ATR length error\n");
891 } else {
892 DEBUGP(4, dev, "card damaged or wrong way "
893 "inserted\n");
894 }
895#endif
896 dev->cwarn = 0;
897 wake_up_interruptible(&dev->atrq); /* wake open */
898 }
899 dev->cwarn++;
900 dev->mdelay = T_100MSEC;
901 dev->mstate = M_FETCH_ATR;
902 break;
903 default:
904 DEBUGP(7, dev, "Unknown action\n");
905 break; /* nothing */
906 }
907
908release_io:
909 DEBUGP(7, dev, "release_io\n");
910 clear_bit(LOCK_IO, &dev->flags);
911 wake_up_interruptible(&dev->ioq); /* whoever needs IO */
912
913return_with_timer:
914 DEBUGP(7, dev, "<- monitor_card (returns with timer)\n");
40565f19 915 mod_timer(&dev->timer, jiffies + dev->mdelay);
c1986ee9
HW		 916 clear_bit(LOCK_MONITOR, &dev->flags);
917}
918
919/* Interface to userland (file_operations) */
920
921static ssize_t cmm_read(struct file *filp, __user char *buf, size_t count,
922 loff_t *ppos)
923{
924 struct cm4000_dev *dev = filp->private_data;
9a017a91 925 unsigned int iobase = dev->p_dev->resource[0]->start;
c1986ee9
HW		 926 ssize_t rc;
927 int i, j, k;
928
929 DEBUGP(2, dev, "-> cmm_read(%s,%d)\n", current->comm, current->pid);
930
931 if (count == 0) /* according to manpage */
932 return 0;
933
e2d40963 934 if (!pcmcia_dev_present(dev->p_dev) || /* device removed */
c1986ee9
HW		 935 test_bit(IS_CMM_ABSENT, &dev->flags))
936 return -ENODEV;
937
938 if (test_bit(IS_BAD_CSUM, &dev->flags))
939 return -EIO;
940
941 /* also see the note about this in cmm_write */
942 if (wait_event_interruptible
943 (dev->atrq,
944 ((filp->f_flags & O_NONBLOCK)
945 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
946 if (filp->f_flags & O_NONBLOCK)
947 return -EAGAIN;
948 return -ERESTARTSYS;
949 }
950
951 if (test_bit(IS_ATR_VALID, &dev->flags) == 0)
952 return -EIO;
953
954 /* this one implements blocking IO */
955 if (wait_event_interruptible
956 (dev->readq,
957 ((filp->f_flags & O_NONBLOCK) || (dev->rpos < dev->rlen)))) {
958 if (filp->f_flags & O_NONBLOCK)
959 return -EAGAIN;
960 return -ERESTARTSYS;
961 }
962
963 /* lock io */
964 if (wait_event_interruptible
965 (dev->ioq,
966 ((filp->f_flags & O_NONBLOCK)
967 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
968 if (filp->f_flags & O_NONBLOCK)
969 return -EAGAIN;
970 return -ERESTARTSYS;
971 }
972
973 rc = 0;
974 dev->flags0 = inb(REG_FLAGS0(iobase));
975 if ((dev->flags0 & 1) == 0 /* no smartcard inserted */
976 || dev->flags0 == 0xff) { /* no cardman inserted */
977 clear_bit(IS_ATR_VALID, &dev->flags);
978 if (dev->flags0 & 1) {
979 set_bit(IS_CMM_ABSENT, &dev->flags);
980 rc = -ENODEV;
20fffee8
NK		 981 } else {
982 rc = -EIO;
c1986ee9 983 }
c1986ee9
HW		 984 goto release_io;
985 }
986
987 DEBUGP(4, dev, "begin read answer\n");
988 j = min(count, (size_t)(dev->rlen - dev->rpos));
989 k = dev->rpos;
990 if (k + j > 255)
991 j = 256 - k;
992 DEBUGP(4, dev, "read1 j=%d\n", j);
993 for (i = 0; i < j; i++) {
994 xoutb(k++, REG_BUF_ADDR(iobase));
995 dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
996 }
997 j = min(count, (size_t)(dev->rlen - dev->rpos));
998 if (k + j > 255) {
999 DEBUGP(4, dev, "read2 j=%d\n", j);
1000 dev->flags1 |= 0x10; /* MSB buf addr set */
1001 xoutb(dev->flags1, REG_FLAGS1(iobase));
1002 for (; i < j; i++) {
1003 xoutb(k++, REG_BUF_ADDR(iobase));
1004 dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
1005 }
1006 }
1007
470967dc 1008 if (dev->proto == 0 && count > dev->rlen - dev->rpos && i) {
c1986ee9
HW		 1009 DEBUGP(4, dev, "T=0 and count > buffer\n");
1010 dev->rbuf[i] = dev->rbuf[i - 1];
1011 dev->rbuf[i - 1] = dev->procbyte;
1012 j++;
1013 }
1014 count = j;
1015
1016 dev->rpos = dev->rlen + 1;
1017
1018 /* Clear T1Active */
1019 DEBUGP(4, dev, "Clear T1Active\n");
1020 dev->flags1 &= 0xdf;
1021 xoutb(dev->flags1, REG_FLAGS1(iobase));
1022
1023 xoutb(0, REG_FLAGS1(iobase)); /* clear detectCMM */
1024 /* last check before exit */
07a71415
DC		 1025 if (!io_detect_cm4000(iobase, dev)) {
1026 rc = -ENODEV;
1027 goto release_io;
1028 }
c1986ee9
HW		 1029
1030 if (test_bit(IS_INVREV, &dev->flags) && count > 0)
1031 str_invert_revert(dev->rbuf, count);
1032
1033 if (copy_to_user(buf, dev->rbuf, count))
07a71415 1034 rc = -EFAULT;
c1986ee9
HW		 1035
1036release_io:
1037 clear_bit(LOCK_IO, &dev->flags);
1038 wake_up_interruptible(&dev->ioq);
1039
1040 DEBUGP(2, dev, "<- cmm_read returns: rc = %Zi\n",
1041 (rc < 0 ? rc : count));
1042 return rc < 0 ? rc : count;
1043}
1044
1045static ssize_t cmm_write(struct file *filp, const char __user *buf,
1046 size_t count, loff_t *ppos)
1047{
c6be9c5a 1048 struct cm4000_dev *dev = filp->private_data;
9a017a91 1049 unsigned int iobase = dev->p_dev->resource[0]->start;
c1986ee9
HW		 1050 unsigned short s;
1051 unsigned char tmp;
1052 unsigned char infolen;
1053 unsigned char sendT0;
1054 unsigned short nsend;
1055 unsigned short nr;
1056 ssize_t rc;
1057 int i;
1058
1059 DEBUGP(2, dev, "-> cmm_write(%s,%d)\n", current->comm, current->pid);
1060
1061 if (count == 0) /* according to manpage */
1062 return 0;
1063
1064 if (dev->proto == 0 && count < 4) {
1065 /* T0 must have at least 4 bytes */
1066 DEBUGP(4, dev, "T0 short write\n");
1067 return -EIO;
1068 }
1069
1070 nr = count & 0x1ff; /* max bytes to write */
1071
1072 sendT0 = dev->proto ? 0 : nr > 5 ? 0x08 : 0;
1073
e2d40963 1074 if (!pcmcia_dev_present(dev->p_dev) || /* device removed */
c1986ee9
HW		 1075 test_bit(IS_CMM_ABSENT, &dev->flags))
1076 return -ENODEV;
1077
1078 if (test_bit(IS_BAD_CSUM, &dev->flags)) {
1079 DEBUGP(4, dev, "bad csum\n");
1080 return -EIO;
1081 }
1082
1083 /*
1084 * wait for atr to become valid.
1085 * note: it is important to lock this code. if we dont, the monitor
59c51591 1086 * could be run between test_bit and the call to sleep on the
c1986ee9
HW		 1087 * atr-queue. if *then* the monitor detects atr valid, it will wake up
1088 * any process on the atr-queue, *but* since we have been interrupted,
1089 * we do not yet sleep on this queue. this would result in a missed
1090 * wake_up and the calling process would sleep forever (until
1091 * interrupted). also, do *not* restore_flags before sleep_on, because
1092 * this could result in the same situation!
1093 */
1094 if (wait_event_interruptible
1095 (dev->atrq,
1096 ((filp->f_flags & O_NONBLOCK)
1097 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
1098 if (filp->f_flags & O_NONBLOCK)
1099 return -EAGAIN;
1100 return -ERESTARTSYS;
1101 }
1102
1103 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) { /* invalid atr */
1104 DEBUGP(4, dev, "invalid ATR\n");
1105 return -EIO;
1106 }
1107
1108 /* lock io */
1109 if (wait_event_interruptible
1110 (dev->ioq,
1111 ((filp->f_flags & O_NONBLOCK)
1112 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
1113 if (filp->f_flags & O_NONBLOCK)
1114 return -EAGAIN;
1115 return -ERESTARTSYS;
1116 }
1117
1118 if (copy_from_user(dev->sbuf, buf, ((count > 512) ? 512 : count)))
1119 return -EFAULT;
1120
1121 rc = 0;
1122 dev->flags0 = inb(REG_FLAGS0(iobase));
1123 if ((dev->flags0 & 1) == 0 /* no smartcard inserted */
1124 || dev->flags0 == 0xff) { /* no cardman inserted */
1125 clear_bit(IS_ATR_VALID, &dev->flags);
1126 if (dev->flags0 & 1) {
1127 set_bit(IS_CMM_ABSENT, &dev->flags);
1128 rc = -ENODEV;
1129 } else {
1130 DEBUGP(4, dev, "IO error\n");
1131 rc = -EIO;
1132 }
1133 goto release_io;
1134 }
1135
1136 xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */
1137
1138 if (!io_detect_cm4000(iobase, dev)) {
1139 rc = -ENODEV;
1140 goto release_io;
1141 }
1142
1143 /* reflect T=0 send/read mode in flags1 */
1144 dev->flags1 |= (sendT0);
1145
1146 set_cardparameter(dev);
1147
1148 /* dummy read, reset flag procedure received */
1149 tmp = inb(REG_FLAGS1(iobase));
1150
1151 dev->flags1 = 0x20 /* T_Active */
1152 | (sendT0)
1153 | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)/* inverse parity */
1154 | (((dev->baudv - 1) & 0x0100) >> 8); /* MSB-Baud */
1155 DEBUGP(1, dev, "set dev->flags1 = 0x%.2x\n", dev->flags1);
1156 xoutb(dev->flags1, REG_FLAGS1(iobase));
1157
1158 /* xmit data */
1159 DEBUGP(4, dev, "Xmit data\n");
1160 for (i = 0; i < nr; i++) {
1161 if (i >= 256) {
1162 dev->flags1 = 0x20 /* T_Active */
1163 | (sendT0) /* SendT0 */
1164 /* inverse parity: */
1165 | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)
1166 | (((dev->baudv - 1) & 0x0100) >> 8) /* MSB-Baud */
1167 | 0x10; /* set address high */
1168 DEBUGP(4, dev, "dev->flags = 0x%.2x - set address "
1169 "high\n", dev->flags1);
1170 xoutb(dev->flags1, REG_FLAGS1(iobase));
1171 }
1172 if (test_bit(IS_INVREV, &dev->flags)) {
1173 DEBUGP(4, dev, "Apply inverse convention for 0x%.2x "
1174 "-> 0x%.2x\n", (unsigned char)dev->sbuf[i],
1175 invert_revert(dev->sbuf[i]));
1176 xoutb(i, REG_BUF_ADDR(iobase));
1177 xoutb(invert_revert(dev->sbuf[i]),
1178 REG_BUF_DATA(iobase));
1179 } else {
1180 xoutb(i, REG_BUF_ADDR(iobase));
1181 xoutb(dev->sbuf[i], REG_BUF_DATA(iobase));
1182 }
1183 }
1184 DEBUGP(4, dev, "Xmit done\n");
1185
1186 if (dev->proto == 0) {
1187 /* T=0 proto: 0 byte reply */
1188 if (nr == 4) {
1189 DEBUGP(4, dev, "T=0 assumes 0 byte reply\n");
1190 xoutb(i, REG_BUF_ADDR(iobase));
1191 if (test_bit(IS_INVREV, &dev->flags))
1192 xoutb(0xff, REG_BUF_DATA(iobase));
1193 else
1194 xoutb(0x00, REG_BUF_DATA(iobase));
1195 }
1196
1197 /* numSendBytes */
1198 if (sendT0)
1199 nsend = nr;
1200 else {
1201 if (nr == 4)
1202 nsend = 5;
1203 else {
1204 nsend = 5 + (unsigned char)dev->sbuf[4];
1205 if (dev->sbuf[4] == 0)
1206 nsend += 0x100;
1207 }
1208 }
1209 } else
1210 nsend = nr;
1211
1212 /* T0: output procedure byte */
1213 if (test_bit(IS_INVREV, &dev->flags)) {
1214 DEBUGP(4, dev, "T=0 set Procedure byte (inverse-reverse) "
1215 "0x%.2x\n", invert_revert(dev->sbuf[1]));
1216 xoutb(invert_revert(dev->sbuf[1]), REG_NUM_BYTES(iobase));
1217 } else {
1218 DEBUGP(4, dev, "T=0 set Procedure byte 0x%.2x\n", dev->sbuf[1]);
1219 xoutb(dev->sbuf[1], REG_NUM_BYTES(iobase));
1220 }
1221
1222 DEBUGP(1, dev, "set NumSendBytes = 0x%.2x\n",
1223 (unsigned char)(nsend & 0xff));
1224 xoutb((unsigned char)(nsend & 0xff), REG_NUM_SEND(iobase));
1225
1226 DEBUGP(1, dev, "Trigger CARDMAN CONTROLLER (0x%.2x)\n",
1227 0x40 /* SM_Active */
1228 | (dev->flags0 & 2 ? 0 : 4) /* power on if needed */
1229 |(dev->proto ? 0x10 : 0x08) /* T=1/T=0 */
1230 |(nsend & 0x100) >> 8 /* MSB numSendBytes */ );
1231 xoutb(0x40 /* SM_Active */
1232 | (dev->flags0 & 2 ? 0 : 4) /* power on if needed */
1233 |(dev->proto ? 0x10 : 0x08) /* T=1/T=0 */
1234 |(nsend & 0x100) >> 8, /* MSB numSendBytes */
1235 REG_FLAGS0(iobase));
1236
1237 /* wait for xmit done */
1238 if (dev->proto == 1) {
1239 DEBUGP(4, dev, "Wait for xmit done\n");
1240 for (i = 0; i < 1000; i++) {
1241 if (inb(REG_FLAGS0(iobase)) & 0x08)
1242 break;
1243 msleep_interruptible(10);
1244 }
1245 if (i == 1000) {
1246 DEBUGP(4, dev, "timeout waiting for xmit done\n");
1247 rc = -EIO;
1248 goto release_io;
1249 }
1250 }
1251
1252 /* T=1: wait for infoLen */
1253
1254 infolen = 0;
1255 if (dev->proto) {
1256 /* wait until infoLen is valid */
1257 for (i = 0; i < 6000; i++) { /* max waiting time of 1 min */
1258 io_read_num_rec_bytes(iobase, &s);
1259 if (s >= 3) {
1260 infolen = inb(REG_FLAGS1(iobase));
1261 DEBUGP(4, dev, "infolen=%d\n", infolen);
1262 break;
1263 }
1264 msleep_interruptible(10);
1265 }
1266 if (i == 6000) {
1267 DEBUGP(4, dev, "timeout waiting for infoLen\n");
1268 rc = -EIO;
1269 goto release_io;
1270 }
1271 } else
1272 clear_bit(IS_PROCBYTE_PRESENT, &dev->flags);
1273
1274 /* numRecBytes | bit9 of numRecytes */
1275 io_read_num_rec_bytes(iobase, &dev->rlen);
1276 for (i = 0; i < 600; i++) { /* max waiting time of 2 sec */
1277 if (dev->proto) {
1278 if (dev->rlen >= infolen + 4)
1279 break;
1280 }
1281 msleep_interruptible(10);
1282 /* numRecBytes | bit9 of numRecytes */
1283 io_read_num_rec_bytes(iobase, &s);
1284 if (s > dev->rlen) {
1285 DEBUGP(1, dev, "NumRecBytes inc (reset timeout)\n");
1286 i = 0; /* reset timeout */
1287 dev->rlen = s;
1288 }
1289 /* T=0: we are done when numRecBytes doesn't
1290 * increment any more and NoProcedureByte
1291 * is set and numRecBytes == bytes sent + 6
1292 * (header bytes + data + 1 for sw2)
1293 * except when the card replies an error
1294 * which means, no data will be sent back.
1295 */
1296 else if (dev->proto == 0) {
1297 if ((inb(REG_BUF_ADDR(iobase)) & 0x80)) {
1298 /* no procedure byte received since last read */
1299 DEBUGP(1, dev, "NoProcedure byte set\n");
1300 /* i=0; */
1301 } else {
1302 /* procedure byte received since last read */
1303 DEBUGP(1, dev, "NoProcedure byte unset "
1304 "(reset timeout)\n");
1305 dev->procbyte = inb(REG_FLAGS1(iobase));
1306 DEBUGP(1, dev, "Read procedure byte 0x%.2x\n",
1307 dev->procbyte);
1308 i = 0; /* resettimeout */
1309 }
1310 if (inb(REG_FLAGS0(iobase)) & 0x08) {
1311 DEBUGP(1, dev, "T0Done flag (read reply)\n");
1312 break;
1313 }
1314 }
1315 if (dev->proto)
1316 infolen = inb(REG_FLAGS1(iobase));
1317 }
1318 if (i == 600) {
1319 DEBUGP(1, dev, "timeout waiting for numRecBytes\n");
1320 rc = -EIO;
1321 goto release_io;
1322 } else {
1323 if (dev->proto == 0) {
1324 DEBUGP(1, dev, "Wait for T0Done bit to be set\n");
1325 for (i = 0; i < 1000; i++) {
1326 if (inb(REG_FLAGS0(iobase)) & 0x08)
1327 break;
1328 msleep_interruptible(10);
1329 }
1330 if (i == 1000) {
1331 DEBUGP(1, dev, "timeout waiting for T0Done\n");
1332 rc = -EIO;
1333 goto release_io;
1334 }
1335
1336 dev->procbyte = inb(REG_FLAGS1(iobase));
1337 DEBUGP(4, dev, "Read procedure byte 0x%.2x\n",
1338 dev->procbyte);
1339
1340 io_read_num_rec_bytes(iobase, &dev->rlen);
1341 DEBUGP(4, dev, "Read NumRecBytes = %i\n", dev->rlen);
1342
1343 }
1344 }
1345 /* T=1: read offset=zero, T=0: read offset=after challenge */
1346 dev->rpos = dev->proto ? 0 : nr == 4 ? 5 : nr > dev->rlen ? 5 : nr;
1347 DEBUGP(4, dev, "dev->rlen = %i, dev->rpos = %i, nr = %i\n",
1348 dev->rlen, dev->rpos, nr);
1349
1350release_io:
1351 DEBUGP(4, dev, "Reset SM\n");
1352 xoutb(0x80, REG_FLAGS0(iobase)); /* reset SM */
1353
1354 if (rc < 0) {
1355 DEBUGP(4, dev, "Write failed but clear T_Active\n");
1356 dev->flags1 &= 0xdf;
1357 xoutb(dev->flags1, REG_FLAGS1(iobase));
1358 }
1359
1360 clear_bit(LOCK_IO, &dev->flags);
1361 wake_up_interruptible(&dev->ioq);
1362 wake_up_interruptible(&dev->readq); /* tell read we have data */
1363
1364 /* ITSEC E2: clear write buffer */
1365 memset((char *)dev->sbuf, 0, 512);
1366
1367 /* return error or actually written bytes */
1368 DEBUGP(2, dev, "<- cmm_write\n");
1369 return rc < 0 ? rc : nr;
1370}
1371
1372static void start_monitor(struct cm4000_dev *dev)
1373{
1374 DEBUGP(3, dev, "-> start_monitor\n");
1375 if (!dev->monitor_running) {
1376 DEBUGP(5, dev, "create, init and add timer\n");
40565f19 1377 setup_timer(&dev->timer, monitor_card, (unsigned long)dev);
c1986ee9 1378 dev->monitor_running = 1;
40565f19 1379 mod_timer(&dev->timer, jiffies);
c1986ee9
HW		 1380 } else
1381 DEBUGP(5, dev, "monitor already running\n");
1382 DEBUGP(3, dev, "<- start_monitor\n");
1383}
1384
1385static void stop_monitor(struct cm4000_dev *dev)
1386{
1387 DEBUGP(3, dev, "-> stop_monitor\n");
1388 if (dev->monitor_running) {
1389 DEBUGP(5, dev, "stopping monitor\n");
1390 terminate_monitor(dev);
1391 /* reset monitor SM */
1392 clear_bit(IS_ATR_VALID, &dev->flags);
1393 clear_bit(IS_ATR_PRESENT, &dev->flags);
1394 } else
1395 DEBUGP(5, dev, "monitor already stopped\n");
1396 DEBUGP(3, dev, "<- stop_monitor\n");
1397}
1398
4cf974c5 1399static long cmm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
c1986ee9
HW		 1400{
1401 struct cm4000_dev *dev = filp->private_data;
9a017a91 1402 unsigned int iobase = dev->p_dev->resource[0]->start;
4cf974c5 1403 struct inode *inode = filp->f_path.dentry->d_inode;
fba395ee 1404 struct pcmcia_device *link;
c1986ee9
HW		 1405 int size;
1406 int rc;
c4aa02eb 1407 void __user *argp = (void __user *)arg;
cbf624f0 1408#ifdef CM4000_DEBUG
c1986ee9
HW		 1409 char *ioctl_names[CM_IOC_MAXNR + 1] = {
1410 [_IOC_NR(CM_IOCGSTATUS)] "CM_IOCGSTATUS",
1411 [_IOC_NR(CM_IOCGATR)] "CM_IOCGATR",
1412 [_IOC_NR(CM_IOCARDOFF)] "CM_IOCARDOFF",
1413 [_IOC_NR(CM_IOCSPTS)] "CM_IOCSPTS",
1414 [_IOC_NR(CM_IOSDBGLVL)] "CM4000_DBGLVL",
1415 };
c1986ee9
HW		 1416 DEBUGP(3, dev, "cmm_ioctl(device=%d.%d) %s\n", imajor(inode),
1417 iminor(inode), ioctl_names[_IOC_NR(cmd)]);
cbf624f0 1418#endif
c1986ee9 1419
613655fa 1420 mutex_lock(&cmm_mutex);
4cf974c5 1421 rc = -ENODEV;
c1986ee9 1422 link = dev_table[iminor(inode)];
9940ec36 1423 if (!pcmcia_dev_present(link)) {
c1986ee9 1424 DEBUGP(4, dev, "DEV_OK false\n");
4cf974c5 1425 goto out;
c1986ee9
HW		 1426 }
1427
1428 if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
1429 DEBUGP(4, dev, "CMM_ABSENT flag set\n");
4cf974c5 1430 goto out;
c1986ee9 1431 }
d93c768e 1432 rc = -EINVAL;
c1986ee9
HW		 1433
1434 if (_IOC_TYPE(cmd) != CM_IOC_MAGIC) {
1435 DEBUGP(4, dev, "ioctype mismatch\n");
4cf974c5 1436 goto out;
c1986ee9
HW		 1437 }
1438 if (_IOC_NR(cmd) > CM_IOC_MAXNR) {
1439 DEBUGP(4, dev, "iocnr mismatch\n");
4cf974c5 1440 goto out;
c1986ee9
HW		 1441 }
1442 size = _IOC_SIZE(cmd);
4cf974c5 1443 rc = -EFAULT;
c1986ee9
HW		 1444 DEBUGP(4, dev, "iocdir=%.4x iocr=%.4x iocw=%.4x iocsize=%d cmd=%.4x\n",
1445 _IOC_DIR(cmd), _IOC_READ, _IOC_WRITE, size, cmd);
1446
1447 if (_IOC_DIR(cmd) & _IOC_READ) {
c4aa02eb 1448 if (!access_ok(VERIFY_WRITE, argp, size))
4cf974c5 1449 goto out;
c1986ee9
HW		 1450 }
1451 if (_IOC_DIR(cmd) & _IOC_WRITE) {
c4aa02eb 1452 if (!access_ok(VERIFY_READ, argp, size))
4cf974c5 1453 goto out;
c1986ee9 1454 }
4cf974c5 1455 rc = 0;
c1986ee9
HW		 1456
1457 switch (cmd) {
1458 case CM_IOCGSTATUS:
1459 DEBUGP(4, dev, " ... in CM_IOCGSTATUS\n");
1460 {
1461 int status;
1462
1463 /* clear other bits, but leave inserted & powered as
1464 * they are */
1465 status = dev->flags0 & 3;
1466 if (test_bit(IS_ATR_PRESENT, &dev->flags))
1467 status |= CM_ATR_PRESENT;
1468 if (test_bit(IS_ATR_VALID, &dev->flags))
1469 status |= CM_ATR_VALID;
1470 if (test_bit(IS_CMM_ABSENT, &dev->flags))
1471 status |= CM_NO_READER;
1472 if (test_bit(IS_BAD_CARD, &dev->flags))
1473 status |= CM_BAD_CARD;
c4aa02eb 1474 if (copy_to_user(argp, &status, sizeof(int)))
4cf974c5 1475 rc = -EFAULT;
c1986ee9 1476 }
4cf974c5 1477 break;
c1986ee9
HW		 1478 case CM_IOCGATR:
1479 DEBUGP(4, dev, "... in CM_IOCGATR\n");
1480 {
c4aa02eb 1481 struct atreq __user *atreq = argp;
c1986ee9
HW		 1482 int tmp;
1483 /* allow nonblocking io and being interrupted */
1484 if (wait_event_interruptible
1485 (dev->atrq,
1486 ((filp->f_flags & O_NONBLOCK)
1487 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
1488 != 0)))) {
1489 if (filp->f_flags & O_NONBLOCK)
4cf974c5
AC		 1490 rc = -EAGAIN;
1491 else
1492 rc = -ERESTARTSYS;
1493 break;
c1986ee9
HW		 1494 }
1495
4cf974c5 1496 rc = -EFAULT;
c1986ee9
HW		 1497 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) {
1498 tmp = -1;
1499 if (copy_to_user(&(atreq->atr_len), &tmp,
1500 sizeof(int)))
4cf974c5 1501 break;
c1986ee9
HW		 1502 } else {
1503 if (copy_to_user(atreq->atr, dev->atr,
1504 dev->atr_len))
4cf974c5 1505 break;
c1986ee9
HW		 1506
1507 tmp = dev->atr_len;
1508 if (copy_to_user(&(atreq->atr_len), &tmp, sizeof(int)))
4cf974c5 1509 break;
c1986ee9 1510 }
4cf974c5
AC		 1511 rc = 0;
1512 break;
c1986ee9
HW		 1513 }
1514 case CM_IOCARDOFF:
1515
cbf624f0 1516#ifdef CM4000_DEBUG
c1986ee9
HW		 1517 DEBUGP(4, dev, "... in CM_IOCARDOFF\n");
1518 if (dev->flags0 & 0x01) {
1519 DEBUGP(4, dev, " Card inserted\n");
1520 } else {
1521 DEBUGP(2, dev, " No card inserted\n");
1522 }
1523 if (dev->flags0 & 0x02) {
1524 DEBUGP(4, dev, " Card powered\n");
1525 } else {
1526 DEBUGP(2, dev, " Card not powered\n");
1527 }
1528#endif
1529
1530 /* is a card inserted and powered? */
1531 if ((dev->flags0 & 0x01) && (dev->flags0 & 0x02)) {
1532
1533 /* get IO lock */
1534 if (wait_event_interruptible
1535 (dev->ioq,
1536 ((filp->f_flags & O_NONBLOCK)
1537 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
1538 == 0)))) {
1539 if (filp->f_flags & O_NONBLOCK)
4cf974c5
AC		 1540 rc = -EAGAIN;
1541 else
1542 rc = -ERESTARTSYS;
1543 break;
c1986ee9
HW		 1544 }
1545 /* Set Flags0 = 0x42 */
1546 DEBUGP(4, dev, "Set Flags0=0x42 \n");
1547 xoutb(0x42, REG_FLAGS0(iobase));
1548 clear_bit(IS_ATR_PRESENT, &dev->flags);
1549 clear_bit(IS_ATR_VALID, &dev->flags);
1550 dev->mstate = M_CARDOFF;
1551 clear_bit(LOCK_IO, &dev->flags);
1552 if (wait_event_interruptible
1553 (dev->atrq,
1554 ((filp->f_flags & O_NONBLOCK)
1555 || (test_bit(IS_ATR_VALID, (void *)&dev->flags) !=
1556 0)))) {
1557 if (filp->f_flags & O_NONBLOCK)
4cf974c5
AC		 1558 rc = -EAGAIN;
1559 else
1560 rc = -ERESTARTSYS;
1561 break;
c1986ee9
HW		 1562 }
1563 }
1564 /* release lock */
1565 clear_bit(LOCK_IO, &dev->flags);
1566 wake_up_interruptible(&dev->ioq);
1567
69ae59d7
JS		 1568 rc = 0;
1569 break;
c1986ee9
HW		 1570 case CM_IOCSPTS:
1571 {
1572 struct ptsreq krnptsreq;
1573
c4aa02eb 1574 if (copy_from_user(&krnptsreq, argp,
4cf974c5
AC		 1575 sizeof(struct ptsreq))) {
1576 rc = -EFAULT;
1577 break;
1578 }
c1986ee9
HW		 1579
1580 rc = 0;
1581 DEBUGP(4, dev, "... in CM_IOCSPTS\n");
1582 /* wait for ATR to get valid */
1583 if (wait_event_interruptible
1584 (dev->atrq,
1585 ((filp->f_flags & O_NONBLOCK)
1586 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
1587 != 0)))) {
1588 if (filp->f_flags & O_NONBLOCK)
4cf974c5
AC		 1589 rc = -EAGAIN;
1590 else
1591 rc = -ERESTARTSYS;
1592 break;
c1986ee9
HW		 1593 }
1594 /* get IO lock */
1595 if (wait_event_interruptible
1596 (dev->ioq,
1597 ((filp->f_flags & O_NONBLOCK)
1598 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
1599 == 0)))) {
1600 if (filp->f_flags & O_NONBLOCK)
4cf974c5
AC		 1601 rc = -EAGAIN;
1602 else
1603 rc = -ERESTARTSYS;
1604 break;
c1986ee9
HW		 1605 }
1606
1607 if ((rc = set_protocol(dev, &krnptsreq)) != 0) {
1608 /* auto power_on again */
1609 dev->mstate = M_FETCH_ATR;
1610 clear_bit(IS_ATR_VALID, &dev->flags);
1611 }
1612 /* release lock */
1613 clear_bit(LOCK_IO, &dev->flags);
1614 wake_up_interruptible(&dev->ioq);
1615
1616 }
4cf974c5 1617 break;
cbf624f0
DB		 1618#ifdef CM4000_DEBUG
1619 case CM_IOSDBGLVL:
1620 rc = -ENOTTY;
4cf974c5 1621 break;
c1986ee9
HW		 1622#endif
1623 default:
1624 DEBUGP(4, dev, "... in default (unknown IOCTL code)\n");
4cf974c5 1625 rc = -ENOTTY;
c1986ee9 1626 }
4cf974c5 1627out:
613655fa 1628 mutex_unlock(&cmm_mutex);
4cf974c5 1629 return rc;
c1986ee9
HW		 1630}
1631
1632static int cmm_open(struct inode *inode, struct file *filp)
1633{
1634 struct cm4000_dev *dev;
fba395ee 1635 struct pcmcia_device *link;
925796e0 1636 int minor = iminor(inode);
8b5332f6 1637 int ret;
c1986ee9
HW		 1638
1639 if (minor >= CM4000_MAX_DEV)
1640 return -ENODEV;
1641
613655fa 1642 mutex_lock(&cmm_mutex);
c1986ee9 1643 link = dev_table[minor];
8b5332f6
JC		 1644 if (link == NULL || !pcmcia_dev_present(link)) {
1645 ret = -ENODEV;
1646 goto out;
1647 }
c1986ee9 1648
8b5332f6
JC		 1649 if (link->open) {
1650 ret = -EBUSY;
1651 goto out;
1652 }
c1986ee9
HW		 1653
1654 dev = link->priv;
1655 filp->private_data = dev;
1656
1657 DEBUGP(2, dev, "-> cmm_open(device=%d.%d process=%s,%d)\n",
1658 imajor(inode), minor, current->comm, current->pid);
1659
1660 /* init device variables, they may be "polluted" after close
1661 * or, the device may never have been closed (i.e. open failed)
1662 */
1663
1664 ZERO_DEV(dev);
1665
1666 /* opening will always block since the
1667 * monitor will be started by open, which
1668 * means we have to wait for ATR becoming
817f2c84 1669 * valid = block until valid (or card
c1986ee9
HW		 1670 * inserted)
1671 */
8b5332f6
JC		 1672 if (filp->f_flags & O_NONBLOCK) {
1673 ret = -EAGAIN;
1674 goto out;
1675 }
c1986ee9
HW		 1676
1677 dev->mdelay = T_50MSEC;
1678
1679 /* start monitoring the cardstatus */
1680 start_monitor(dev);
1681
1682 link->open = 1; /* only one open per device */
c1986ee9
HW		 1683
1684 DEBUGP(2, dev, "<- cmm_open\n");
8b5332f6
JC		 1685 ret = nonseekable_open(inode, filp);
1686out:
613655fa 1687 mutex_unlock(&cmm_mutex);
8b5332f6 1688 return ret;
c1986ee9
HW		 1689}
1690
1691static int cmm_close(struct inode *inode, struct file *filp)
1692{
1693 struct cm4000_dev *dev;
fba395ee 1694 struct pcmcia_device *link;
c1986ee9
HW		 1695 int minor = iminor(inode);
1696
1697 if (minor >= CM4000_MAX_DEV)
1698 return -ENODEV;
1699
1700 link = dev_table[minor];
1701 if (link == NULL)
1702 return -ENODEV;
1703
1704 dev = link->priv;
1705
1706 DEBUGP(2, dev, "-> cmm_close(maj/min=%d.%d)\n",
1707 imajor(inode), minor);
1708
1709 stop_monitor(dev);
1710
1711 ZERO_DEV(dev);
1712
1713 link->open = 0; /* only one open per device */
1714 wake_up(&dev->devq); /* socket removed? */
1715
1716 DEBUGP(2, dev, "cmm_close\n");
1717 return 0;
1718}
1719
fba395ee 1720static void cmm_cm4000_release(struct pcmcia_device * link)
c1986ee9
HW		 1721{
1722 struct cm4000_dev *dev = link->priv;
1723
1724 /* dont terminate the monitor, rather rely on
1725 * close doing that for us.
1726 */
1727 DEBUGP(3, dev, "-> cmm_cm4000_release\n");
1728 while (link->open) {
1729 printk(KERN_INFO MODULE_NAME ": delaying release until "
1730 "process has terminated\n");
1731 /* note: don't interrupt us:
1732 * close the applications which own
1733 * the devices _first_ !
1734 */
1735 wait_event(dev->devq, (link->open == 0));
1736 }
1737 /* dev->devq=NULL; this cannot be zeroed earlier */
1738 DEBUGP(3, dev, "<- cmm_cm4000_release\n");
1739 return;
1740}
1741
1742/*==== Interface to PCMCIA Layer =======================================*/
1743
00990e7c 1744static int cm4000_config_check(struct pcmcia_device *p_dev, void *priv_data)
84e2d340 1745{
90abdc3b 1746 return pcmcia_request_io(p_dev);
84e2d340
DB		 1747}
1748
15b99ac1 1749static int cm4000_config(struct pcmcia_device * link, int devno)
c1986ee9 1750{
c1986ee9 1751 struct cm4000_dev *dev;
c1986ee9 1752
00990e7c
DB		 1753 link->config_flags |= CONF_AUTO_SET_IO;
1754
c1986ee9 1755 /* read the config-tuples */
84e2d340 1756 if (pcmcia_loop_config(link, cm4000_config_check, NULL))
c1986ee9
HW		 1757 goto cs_release;
1758
1ac71e5a 1759 if (pcmcia_enable_device(link))
c1986ee9 1760 goto cs_release;
c1986ee9
HW		 1761
1762 dev = link->priv;
c1986ee9 1763
15b99ac1 1764 return 0;
c1986ee9 1765
c1986ee9
HW		 1766cs_release:
1767 cm4000_release(link);
15b99ac1 1768 return -ENODEV;
c1986ee9
HW		 1769}
1770
fba395ee 1771static int cm4000_suspend(struct pcmcia_device *link)
98e4c28b 1772{
98e4c28b
DB		 1773 struct cm4000_dev *dev;
1774
1775 dev = link->priv;
98e4c28b
DB		 1776 stop_monitor(dev);
1777
1778 return 0;
1779}
1780
fba395ee 1781static int cm4000_resume(struct pcmcia_device *link)
98e4c28b 1782{
98e4c28b
DB		 1783 struct cm4000_dev *dev;
1784
1785 dev = link->priv;
98e4c28b
DB		 1786 if (link->open)
1787 start_monitor(dev);
1788
1789 return 0;
1790}
1791
fba395ee 1792static void cm4000_release(struct pcmcia_device *link)
c1986ee9 1793{
925796e0 1794 cmm_cm4000_release(link); /* delay release until device closed */
fba395ee 1795 pcmcia_disable_device(link);
c1986ee9
HW		 1796}
1797
15b99ac1 1798static int cm4000_probe(struct pcmcia_device *link)
c1986ee9
HW		 1799{
1800 struct cm4000_dev *dev;
15b99ac1 1801 int i, ret;
c1986ee9
HW		 1802
1803 for (i = 0; i < CM4000_MAX_DEV; i++)
1804 if (dev_table[i] == NULL)
1805 break;
1806
1807 if (i == CM4000_MAX_DEV) {
1808 printk(KERN_NOTICE MODULE_NAME ": all devices in use\n");
f8cfa618 1809 return -ENODEV;
c1986ee9
HW		 1810 }
1811
1812 /* create a new cm4000_cs device */
1813 dev = kzalloc(sizeof(struct cm4000_dev), GFP_KERNEL);
1814 if (dev == NULL)
f8cfa618 1815 return -ENOMEM;
c1986ee9 1816
fba395ee 1817 dev->p_dev = link;
c1986ee9 1818 link->priv = dev;
c1986ee9
HW		 1819 dev_table[i] = link;
1820
c1986ee9
HW		 1821 init_waitqueue_head(&dev->devq);
1822 init_waitqueue_head(&dev->ioq);
1823 init_waitqueue_head(&dev->atrq);
1824 init_waitqueue_head(&dev->readq);
1825
15b99ac1 1826 ret = cm4000_config(link, i);
54493c10
AM		 1827 if (ret) {
1828 dev_table[i] = NULL;
1829 kfree(dev);
15b99ac1 1830 return ret;
54493c10 1831 }
f8cfa618 1832
03457cd4 1833 device_create(cmm_class, NULL, MKDEV(major, i), NULL, "cmm%d", i);
67bc6200 1834
f8cfa618 1835 return 0;
c1986ee9
HW		 1836}
1837
fba395ee 1838static void cm4000_detach(struct pcmcia_device *link)
c1986ee9
HW		 1839{
1840 struct cm4000_dev *dev = link->priv;
cc3b4866 1841 int devno;
c1986ee9 1842
cc3b4866
DB		 1843 /* find device */
1844 for (devno = 0; devno < CM4000_MAX_DEV; devno++)
1845 if (dev_table[devno] == link)
1846 break;
1847 if (devno == CM4000_MAX_DEV)
1848 return;
c1986ee9 1849
cc3b4866 1850 stop_monitor(dev);
c1986ee9 1851
e2d40963 1852 cm4000_release(link);
c1986ee9
HW		 1853
1854 dev_table[devno] = NULL;
54493c10 1855 kfree(dev);
c1986ee9 1856
07c015e7 1857 device_destroy(cmm_class, MKDEV(major, devno));
67bc6200 1858
c1986ee9
HW		 1859 return;
1860}
1861
62322d25 1862static const struct file_operations cm4000_fops = {
c1986ee9
HW		 1863 .owner = THIS_MODULE,
1864 .read = cmm_read,
1865 .write = cmm_write,
4cf974c5 1866 .unlocked_ioctl = cmm_ioctl,
c1986ee9
HW		 1867 .open = cmm_open,
1868 .release= cmm_close,
6038f373 1869 .llseek = no_llseek,
c1986ee9
HW		 1870};
1871
1872static struct pcmcia_device_id cm4000_ids[] = {
1873 PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0002),
1874 PCMCIA_DEVICE_PROD_ID12("CardMan", "4000", 0x2FB368CA, 0xA2BD8C39),
1875 PCMCIA_DEVICE_NULL,
1876};
1877MODULE_DEVICE_TABLE(pcmcia, cm4000_ids);
1878
1879static struct pcmcia_driver cm4000_driver = {
1880 .owner = THIS_MODULE,
2e9b981a 1881 .name = "cm4000_cs",
15b99ac1 1882 .probe = cm4000_probe,
cc3b4866 1883 .remove = cm4000_detach,
98e4c28b
DB		 1884 .suspend = cm4000_suspend,
1885 .resume = cm4000_resume,
c1986ee9
HW		 1886 .id_table = cm4000_ids,
1887};
1888
1889static int __init cmm_init(void)
1890{
67bc6200
HW		 1891 int rc;
1892
67bc6200 1893 cmm_class = class_create(THIS_MODULE, "cardman_4000");
5eb5fc97
AM		 1894 if (IS_ERR(cmm_class))
1895 return PTR_ERR(cmm_class);
67bc6200 1896
c1986ee9
HW		 1897 major = register_chrdev(0, DEVICE_NAME, &cm4000_fops);
1898 if (major < 0) {
1899 printk(KERN_WARNING MODULE_NAME
1900 ": could not get major number\n");
54493c10 1901 class_destroy(cmm_class);
5eb5fc97 1902 return major;
c1986ee9
HW		 1903 }
1904
7fc5b1e3
HW		 1905 rc = pcmcia_register_driver(&cm4000_driver);
1906 if (rc < 0) {
1907 unregister_chrdev(major, DEVICE_NAME);
54493c10 1908 class_destroy(cmm_class);
7fc5b1e3
HW		 1909 return rc;
1910 }
1911
c1986ee9
HW		 1912 return 0;
1913}
1914
1915static void __exit cmm_exit(void)
1916{
c1986ee9 1917 pcmcia_unregister_driver(&cm4000_driver);
c1986ee9 1918 unregister_chrdev(major, DEVICE_NAME);
67bc6200 1919 class_destroy(cmm_class);
c1986ee9
HW		 1920};
1921
1922module_init(cmm_init);
1923module_exit(cmm_exit);
1924MODULE_LICENSE("Dual BSD/GPL");
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