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Commit | Line | Data |
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77c44ab1 HW |
1 | /* |
2 | * A driver for the Omnikey PCMCIA smartcard reader CardMan 4040 | |
3 | * | |
4 | * (c) 2000-2004 Omnikey AG (http://www.omnikey.com/) | |
5 | * | |
67bc6200 | 6 | * (C) 2005-2006 Harald Welte <laforge@gnumonks.org> |
77c44ab1 HW |
7 | * - add support for poll() |
8 | * - driver cleanup | |
9 | * - add waitqueues | |
10 | * - adhere to linux kernel coding style and policies | |
11 | * - support 2.6.13 "new style" pcmcia interface | |
67bc6200 | 12 | * - add class interface for udev device creation |
77c44ab1 HW |
13 | * |
14 | * The device basically is a USB CCID compliant device that has been | |
15 | * attached to an I/O-Mapped FIFO. | |
16 | * | |
17 | * All rights reserved, Dual BSD/GPL Licensed. | |
18 | */ | |
19 | ||
77c44ab1 HW |
20 | #include <linux/kernel.h> |
21 | #include <linux/module.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/fs.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/poll.h> | |
8b5332f6 | 27 | #include <linux/smp_lock.h> |
77c44ab1 HW |
28 | #include <linux/wait.h> |
29 | #include <asm/uaccess.h> | |
30 | #include <asm/io.h> | |
31 | ||
77c44ab1 HW |
32 | #include <pcmcia/cs.h> |
33 | #include <pcmcia/cistpl.h> | |
34 | #include <pcmcia/cisreg.h> | |
35 | #include <pcmcia/ciscode.h> | |
36 | #include <pcmcia/ds.h> | |
37 | ||
38 | #include "cm4040_cs.h" | |
39 | ||
40 | ||
dd2e5a15 | 41 | #define reader_to_dev(x) (&x->p_dev->dev) |
cbf624f0 DB |
42 | |
43 | /* n (debug level) is ignored */ | |
44 | /* additional debug output may be enabled by re-compiling with | |
45 | * CM4040_DEBUG set */ | |
46 | /* #define CM4040_DEBUG */ | |
47 | #define DEBUGP(n, rdr, x, args...) do { \ | |
48 | dev_dbg(reader_to_dev(rdr), "%s:" x, \ | |
49 | __func__ , ## args); \ | |
77c44ab1 | 50 | } while (0) |
77c44ab1 HW |
51 | |
52 | static char *version = | |
67bc6200 | 53 | "OMNIKEY CardMan 4040 v1.1.0gm5 - All bugs added by Harald Welte"; |
77c44ab1 HW |
54 | |
55 | #define CCID_DRIVER_BULK_DEFAULT_TIMEOUT (150*HZ) | |
56 | #define CCID_DRIVER_ASYNC_POWERUP_TIMEOUT (35*HZ) | |
57 | #define CCID_DRIVER_MINIMUM_TIMEOUT (3*HZ) | |
58 | #define READ_WRITE_BUFFER_SIZE 512 | |
59 | #define POLL_LOOP_COUNT 1000 | |
60 | ||
61 | /* how often to poll for fifo status change */ | |
62 | #define POLL_PERIOD msecs_to_jiffies(10) | |
63 | ||
fba395ee | 64 | static void reader_release(struct pcmcia_device *link); |
77c44ab1 HW |
65 | |
66 | static int major; | |
67bc6200 | 67 | static struct class *cmx_class; |
77c44ab1 HW |
68 | |
69 | #define BS_READABLE 0x01 | |
70 | #define BS_WRITABLE 0x02 | |
71 | ||
72 | struct reader_dev { | |
fd238232 | 73 | struct pcmcia_device *p_dev; |
77c44ab1 HW |
74 | wait_queue_head_t devq; |
75 | wait_queue_head_t poll_wait; | |
76 | wait_queue_head_t read_wait; | |
77 | wait_queue_head_t write_wait; | |
78 | unsigned long buffer_status; | |
79 | unsigned long timeout; | |
80 | unsigned char s_buf[READ_WRITE_BUFFER_SIZE]; | |
81 | unsigned char r_buf[READ_WRITE_BUFFER_SIZE]; | |
82 | struct timer_list poll_timer; | |
83 | }; | |
84 | ||
fba395ee | 85 | static struct pcmcia_device *dev_table[CM_MAX_DEV]; |
77c44ab1 | 86 | |
cbf624f0 | 87 | #ifndef CM4040_DEBUG |
77c44ab1 HW |
88 | #define xoutb outb |
89 | #define xinb inb | |
90 | #else | |
91 | static inline void xoutb(unsigned char val, unsigned short port) | |
92 | { | |
cbf624f0 | 93 | pr_debug("outb(val=%.2x,port=%.4x)\n", val, port); |
77c44ab1 HW |
94 | outb(val, port); |
95 | } | |
96 | ||
97 | static inline unsigned char xinb(unsigned short port) | |
98 | { | |
99 | unsigned char val; | |
100 | ||
101 | val = inb(port); | |
cbf624f0 | 102 | pr_debug("%.2x=inb(%.4x)\n", val, port); |
77c44ab1 HW |
103 | return val; |
104 | } | |
105 | #endif | |
106 | ||
107 | /* poll the device fifo status register. not to be confused with | |
108 | * the poll syscall. */ | |
109 | static void cm4040_do_poll(unsigned long dummy) | |
110 | { | |
111 | struct reader_dev *dev = (struct reader_dev *) dummy; | |
9a017a91 | 112 | unsigned int obs = xinb(dev->p_dev->resource[0]->start |
77c44ab1 HW |
113 | + REG_OFFSET_BUFFER_STATUS); |
114 | ||
115 | if ((obs & BSR_BULK_IN_FULL)) { | |
116 | set_bit(BS_READABLE, &dev->buffer_status); | |
117 | DEBUGP(4, dev, "waking up read_wait\n"); | |
118 | wake_up_interruptible(&dev->read_wait); | |
119 | } else | |
120 | clear_bit(BS_READABLE, &dev->buffer_status); | |
121 | ||
122 | if (!(obs & BSR_BULK_OUT_FULL)) { | |
123 | set_bit(BS_WRITABLE, &dev->buffer_status); | |
124 | DEBUGP(4, dev, "waking up write_wait\n"); | |
125 | wake_up_interruptible(&dev->write_wait); | |
126 | } else | |
127 | clear_bit(BS_WRITABLE, &dev->buffer_status); | |
128 | ||
129 | if (dev->buffer_status) | |
130 | wake_up_interruptible(&dev->poll_wait); | |
131 | ||
132 | mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD); | |
133 | } | |
134 | ||
135 | static void cm4040_stop_poll(struct reader_dev *dev) | |
136 | { | |
137 | del_timer_sync(&dev->poll_timer); | |
138 | } | |
139 | ||
140 | static int wait_for_bulk_out_ready(struct reader_dev *dev) | |
141 | { | |
142 | int i, rc; | |
9a017a91 | 143 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
144 | |
145 | for (i = 0; i < POLL_LOOP_COUNT; i++) { | |
146 | if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS) | |
147 | & BSR_BULK_OUT_FULL) == 0) { | |
148 | DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i); | |
149 | return 1; | |
150 | } | |
151 | } | |
152 | ||
153 | DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n", | |
154 | dev->timeout); | |
155 | rc = wait_event_interruptible_timeout(dev->write_wait, | |
156 | test_and_clear_bit(BS_WRITABLE, | |
157 | &dev->buffer_status), | |
158 | dev->timeout); | |
159 | ||
160 | if (rc > 0) | |
161 | DEBUGP(4, dev, "woke up: BulkOut empty\n"); | |
162 | else if (rc == 0) | |
163 | DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n"); | |
164 | else if (rc < 0) | |
165 | DEBUGP(4, dev, "woke up: signal arrived\n"); | |
166 | ||
167 | return rc; | |
168 | } | |
169 | ||
170 | /* Write to Sync Control Register */ | |
171 | static int write_sync_reg(unsigned char val, struct reader_dev *dev) | |
172 | { | |
9a017a91 | 173 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
174 | int rc; |
175 | ||
176 | rc = wait_for_bulk_out_ready(dev); | |
177 | if (rc <= 0) | |
178 | return rc; | |
179 | ||
180 | xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL); | |
181 | rc = wait_for_bulk_out_ready(dev); | |
182 | if (rc <= 0) | |
183 | return rc; | |
184 | ||
185 | return 1; | |
186 | } | |
187 | ||
188 | static int wait_for_bulk_in_ready(struct reader_dev *dev) | |
189 | { | |
190 | int i, rc; | |
9a017a91 | 191 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
192 | |
193 | for (i = 0; i < POLL_LOOP_COUNT; i++) { | |
194 | if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS) | |
195 | & BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) { | |
196 | DEBUGP(3, dev, "BulkIn full (i=%d)\n", i); | |
197 | return 1; | |
198 | } | |
199 | } | |
200 | ||
201 | DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n", | |
202 | dev->timeout); | |
203 | rc = wait_event_interruptible_timeout(dev->read_wait, | |
204 | test_and_clear_bit(BS_READABLE, | |
205 | &dev->buffer_status), | |
206 | dev->timeout); | |
207 | if (rc > 0) | |
208 | DEBUGP(4, dev, "woke up: BulkIn full\n"); | |
209 | else if (rc == 0) | |
210 | DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n"); | |
211 | else if (rc < 0) | |
212 | DEBUGP(4, dev, "woke up: signal arrived\n"); | |
213 | ||
214 | return rc; | |
215 | } | |
216 | ||
217 | static ssize_t cm4040_read(struct file *filp, char __user *buf, | |
218 | size_t count, loff_t *ppos) | |
219 | { | |
220 | struct reader_dev *dev = filp->private_data; | |
9a017a91 | 221 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
222 | size_t bytes_to_read; |
223 | unsigned long i; | |
224 | size_t min_bytes_to_read; | |
225 | int rc; | |
226 | unsigned char uc; | |
227 | ||
228 | DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid); | |
229 | ||
230 | if (count == 0) | |
231 | return 0; | |
232 | ||
233 | if (count < 10) | |
234 | return -EFAULT; | |
235 | ||
236 | if (filp->f_flags & O_NONBLOCK) { | |
237 | DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); | |
238 | DEBUGP(2, dev, "<- cm4040_read (failure)\n"); | |
239 | return -EAGAIN; | |
240 | } | |
241 | ||
e2d40963 | 242 | if (!pcmcia_dev_present(dev->p_dev)) |
77c44ab1 HW |
243 | return -ENODEV; |
244 | ||
245 | for (i = 0; i < 5; i++) { | |
246 | rc = wait_for_bulk_in_ready(dev); | |
247 | if (rc <= 0) { | |
248 | DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); | |
249 | DEBUGP(2, dev, "<- cm4040_read (failed)\n"); | |
250 | if (rc == -ERESTARTSYS) | |
251 | return rc; | |
252 | return -EIO; | |
253 | } | |
254 | dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN); | |
cbf624f0 DB |
255 | #ifdef CM4040_DEBUG |
256 | pr_debug("%lu:%2x ", i, dev->r_buf[i]); | |
77c44ab1 | 257 | } |
cbf624f0 | 258 | pr_debug("\n"); |
77c44ab1 HW |
259 | #else |
260 | } | |
261 | #endif | |
262 | ||
263 | bytes_to_read = 5 + le32_to_cpu(*(__le32 *)&dev->r_buf[1]); | |
264 | ||
e657ea17 | 265 | DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read); |
77c44ab1 HW |
266 | |
267 | min_bytes_to_read = min(count, bytes_to_read + 5); | |
059819a4 | 268 | min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE); |
77c44ab1 | 269 | |
e657ea17 | 270 | DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read); |
77c44ab1 HW |
271 | |
272 | for (i = 0; i < (min_bytes_to_read-5); i++) { | |
273 | rc = wait_for_bulk_in_ready(dev); | |
274 | if (rc <= 0) { | |
275 | DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); | |
276 | DEBUGP(2, dev, "<- cm4040_read (failed)\n"); | |
277 | if (rc == -ERESTARTSYS) | |
278 | return rc; | |
279 | return -EIO; | |
280 | } | |
281 | dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN); | |
cbf624f0 DB |
282 | #ifdef CM4040_DEBUG |
283 | pr_debug("%lu:%2x ", i, dev->r_buf[i]); | |
77c44ab1 | 284 | } |
cbf624f0 | 285 | pr_debug("\n"); |
77c44ab1 HW |
286 | #else |
287 | } | |
288 | #endif | |
289 | ||
290 | *ppos = min_bytes_to_read; | |
291 | if (copy_to_user(buf, dev->r_buf, min_bytes_to_read)) | |
292 | return -EFAULT; | |
293 | ||
294 | rc = wait_for_bulk_in_ready(dev); | |
295 | if (rc <= 0) { | |
296 | DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); | |
297 | DEBUGP(2, dev, "<- cm4040_read (failed)\n"); | |
298 | if (rc == -ERESTARTSYS) | |
299 | return rc; | |
300 | return -EIO; | |
301 | } | |
302 | ||
303 | rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev); | |
304 | if (rc <= 0) { | |
305 | DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc); | |
306 | DEBUGP(2, dev, "<- cm4040_read (failed)\n"); | |
307 | if (rc == -ERESTARTSYS) | |
308 | return rc; | |
309 | else | |
310 | return -EIO; | |
311 | } | |
312 | ||
313 | uc = xinb(iobase + REG_OFFSET_BULK_IN); | |
314 | ||
315 | DEBUGP(2, dev, "<- cm4040_read (successfully)\n"); | |
316 | return min_bytes_to_read; | |
317 | } | |
318 | ||
319 | static ssize_t cm4040_write(struct file *filp, const char __user *buf, | |
320 | size_t count, loff_t *ppos) | |
321 | { | |
322 | struct reader_dev *dev = filp->private_data; | |
9a017a91 | 323 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
324 | ssize_t rc; |
325 | int i; | |
326 | unsigned int bytes_to_write; | |
327 | ||
328 | DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid); | |
329 | ||
330 | if (count == 0) { | |
331 | DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n"); | |
332 | return 0; | |
333 | } | |
334 | ||
059819a4 | 335 | if ((count < 5) || (count > READ_WRITE_BUFFER_SIZE)) { |
77c44ab1 HW |
336 | DEBUGP(2, dev, "<- cm4040_write buffersize=%Zd < 5\n", count); |
337 | return -EIO; | |
338 | } | |
339 | ||
340 | if (filp->f_flags & O_NONBLOCK) { | |
341 | DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); | |
342 | DEBUGP(4, dev, "<- cm4040_write (failure)\n"); | |
343 | return -EAGAIN; | |
344 | } | |
345 | ||
e2d40963 | 346 | if (!pcmcia_dev_present(dev->p_dev)) |
77c44ab1 HW |
347 | return -ENODEV; |
348 | ||
349 | bytes_to_write = count; | |
350 | if (copy_from_user(dev->s_buf, buf, bytes_to_write)) | |
351 | return -EFAULT; | |
352 | ||
353 | switch (dev->s_buf[0]) { | |
354 | case CMD_PC_TO_RDR_XFRBLOCK: | |
355 | case CMD_PC_TO_RDR_SECURE: | |
356 | case CMD_PC_TO_RDR_TEST_SECURE: | |
357 | case CMD_PC_TO_RDR_OK_SECURE: | |
358 | dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT; | |
359 | break; | |
360 | ||
361 | case CMD_PC_TO_RDR_ICCPOWERON: | |
362 | dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT; | |
363 | break; | |
364 | ||
365 | case CMD_PC_TO_RDR_GETSLOTSTATUS: | |
366 | case CMD_PC_TO_RDR_ICCPOWEROFF: | |
367 | case CMD_PC_TO_RDR_GETPARAMETERS: | |
368 | case CMD_PC_TO_RDR_RESETPARAMETERS: | |
369 | case CMD_PC_TO_RDR_SETPARAMETERS: | |
370 | case CMD_PC_TO_RDR_ESCAPE: | |
371 | case CMD_PC_TO_RDR_ICCCLOCK: | |
372 | default: | |
373 | dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT; | |
374 | break; | |
375 | } | |
376 | ||
377 | rc = write_sync_reg(SCR_HOST_TO_READER_START, dev); | |
378 | if (rc <= 0) { | |
379 | DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc); | |
380 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); | |
381 | if (rc == -ERESTARTSYS) | |
382 | return rc; | |
383 | else | |
384 | return -EIO; | |
385 | } | |
386 | ||
387 | DEBUGP(4, dev, "start \n"); | |
388 | ||
389 | for (i = 0; i < bytes_to_write; i++) { | |
390 | rc = wait_for_bulk_out_ready(dev); | |
391 | if (rc <= 0) { | |
392 | DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n", | |
393 | rc); | |
394 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); | |
395 | if (rc == -ERESTARTSYS) | |
396 | return rc; | |
397 | else | |
398 | return -EIO; | |
399 | } | |
400 | ||
401 | xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT); | |
402 | } | |
403 | DEBUGP(4, dev, "end\n"); | |
404 | ||
405 | rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev); | |
406 | ||
407 | if (rc <= 0) { | |
408 | DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc); | |
409 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); | |
410 | if (rc == -ERESTARTSYS) | |
411 | return rc; | |
412 | else | |
413 | return -EIO; | |
414 | } | |
415 | ||
416 | DEBUGP(2, dev, "<- cm4040_write (successfully)\n"); | |
417 | return count; | |
418 | } | |
419 | ||
420 | static unsigned int cm4040_poll(struct file *filp, poll_table *wait) | |
421 | { | |
422 | struct reader_dev *dev = filp->private_data; | |
423 | unsigned int mask = 0; | |
424 | ||
425 | poll_wait(filp, &dev->poll_wait, wait); | |
426 | ||
427 | if (test_and_clear_bit(BS_READABLE, &dev->buffer_status)) | |
428 | mask |= POLLIN | POLLRDNORM; | |
429 | if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status)) | |
430 | mask |= POLLOUT | POLLWRNORM; | |
431 | ||
432 | DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask); | |
433 | ||
434 | return mask; | |
435 | } | |
436 | ||
437 | static int cm4040_open(struct inode *inode, struct file *filp) | |
438 | { | |
439 | struct reader_dev *dev; | |
fba395ee | 440 | struct pcmcia_device *link; |
77c44ab1 | 441 | int minor = iminor(inode); |
8b5332f6 | 442 | int ret; |
77c44ab1 HW |
443 | |
444 | if (minor >= CM_MAX_DEV) | |
445 | return -ENODEV; | |
446 | ||
8b5332f6 | 447 | lock_kernel(); |
77c44ab1 | 448 | link = dev_table[minor]; |
8b5332f6 JC |
449 | if (link == NULL || !pcmcia_dev_present(link)) { |
450 | ret = -ENODEV; | |
451 | goto out; | |
452 | } | |
77c44ab1 | 453 | |
8b5332f6 JC |
454 | if (link->open) { |
455 | ret = -EBUSY; | |
456 | goto out; | |
457 | } | |
77c44ab1 HW |
458 | |
459 | dev = link->priv; | |
460 | filp->private_data = dev; | |
461 | ||
462 | if (filp->f_flags & O_NONBLOCK) { | |
463 | DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); | |
8b5332f6 JC |
464 | ret = -EAGAIN; |
465 | goto out; | |
77c44ab1 HW |
466 | } |
467 | ||
468 | link->open = 1; | |
469 | ||
470 | dev->poll_timer.data = (unsigned long) dev; | |
471 | mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD); | |
472 | ||
473 | DEBUGP(2, dev, "<- cm4040_open (successfully)\n"); | |
8b5332f6 JC |
474 | ret = nonseekable_open(inode, filp); |
475 | out: | |
476 | unlock_kernel(); | |
477 | return ret; | |
77c44ab1 HW |
478 | } |
479 | ||
480 | static int cm4040_close(struct inode *inode, struct file *filp) | |
481 | { | |
482 | struct reader_dev *dev = filp->private_data; | |
fba395ee | 483 | struct pcmcia_device *link; |
77c44ab1 HW |
484 | int minor = iminor(inode); |
485 | ||
486 | DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode), | |
487 | iminor(inode)); | |
488 | ||
489 | if (minor >= CM_MAX_DEV) | |
490 | return -ENODEV; | |
491 | ||
492 | link = dev_table[minor]; | |
493 | if (link == NULL) | |
494 | return -ENODEV; | |
495 | ||
496 | cm4040_stop_poll(dev); | |
497 | ||
498 | link->open = 0; | |
499 | wake_up(&dev->devq); | |
500 | ||
501 | DEBUGP(2, dev, "<- cm4040_close\n"); | |
502 | return 0; | |
503 | } | |
504 | ||
fba395ee | 505 | static void cm4040_reader_release(struct pcmcia_device *link) |
77c44ab1 HW |
506 | { |
507 | struct reader_dev *dev = link->priv; | |
508 | ||
509 | DEBUGP(3, dev, "-> cm4040_reader_release\n"); | |
510 | while (link->open) { | |
511 | DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release " | |
512 | "until process has terminated\n"); | |
513 | wait_event(dev->devq, (link->open == 0)); | |
514 | } | |
515 | DEBUGP(3, dev, "<- cm4040_reader_release\n"); | |
516 | return; | |
517 | } | |
518 | ||
84e2d340 DB |
519 | static int cm4040_config_check(struct pcmcia_device *p_dev, |
520 | cistpl_cftable_entry_t *cfg, | |
8e2fc39d | 521 | cistpl_cftable_entry_t *dflt, |
ad913c11 | 522 | unsigned int vcc, |
84e2d340 | 523 | void *priv_data) |
77c44ab1 | 524 | { |
77c44ab1 | 525 | int rc; |
84e2d340 DB |
526 | if (!cfg->io.nwin) |
527 | return -ENODEV; | |
77c44ab1 | 528 | |
84e2d340 | 529 | /* Get the IOaddr */ |
90abdc3b DB |
530 | p_dev->resource[0]->start = cfg->io.win[0].base; |
531 | p_dev->resource[0]->end = cfg->io.win[0].len; | |
532 | p_dev->resource[0]->flags |= pcmcia_io_cfg_data_width(cfg->io.flags); | |
533 | p_dev->io_lines = cfg->io.flags & CISTPL_IO_LINES_MASK; | |
534 | rc = pcmcia_request_io(p_dev); | |
535 | ||
dd2e5a15 | 536 | dev_printk(KERN_INFO, &p_dev->dev, |
84e2d340 DB |
537 | "pcmcia_request_io returned 0x%x\n", rc); |
538 | return rc; | |
539 | } | |
540 | ||
541 | ||
542 | static int reader_config(struct pcmcia_device *link, int devno) | |
543 | { | |
544 | struct reader_dev *dev; | |
545 | int fail_rc; | |
77c44ab1 | 546 | |
84e2d340 | 547 | if (pcmcia_loop_config(link, cm4040_config_check, NULL)) |
77c44ab1 HW |
548 | goto cs_release; |
549 | ||
550 | link->conf.IntType = 00000002; | |
551 | ||
4c89e88b DB |
552 | fail_rc = pcmcia_request_configuration(link, &link->conf); |
553 | if (fail_rc != 0) { | |
dd2e5a15 | 554 | dev_printk(KERN_INFO, &link->dev, |
77c44ab1 HW |
555 | "pcmcia_request_configuration failed 0x%x\n", |
556 | fail_rc); | |
557 | goto cs_release; | |
558 | } | |
559 | ||
560 | dev = link->priv; | |
77c44ab1 | 561 | |
9a017a91 DB |
562 | DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno, |
563 | link->resource[0]); | |
77c44ab1 HW |
564 | DEBUGP(2, dev, "<- reader_config (succ)\n"); |
565 | ||
15b99ac1 | 566 | return 0; |
77c44ab1 | 567 | |
77c44ab1 HW |
568 | cs_release: |
569 | reader_release(link); | |
15b99ac1 | 570 | return -ENODEV; |
77c44ab1 HW |
571 | } |
572 | ||
fba395ee | 573 | static void reader_release(struct pcmcia_device *link) |
77c44ab1 | 574 | { |
925796e0 | 575 | cm4040_reader_release(link); |
fba395ee | 576 | pcmcia_disable_device(link); |
77c44ab1 HW |
577 | } |
578 | ||
15b99ac1 | 579 | static int reader_probe(struct pcmcia_device *link) |
77c44ab1 HW |
580 | { |
581 | struct reader_dev *dev; | |
15b99ac1 | 582 | int i, ret; |
77c44ab1 HW |
583 | |
584 | for (i = 0; i < CM_MAX_DEV; i++) { | |
585 | if (dev_table[i] == NULL) | |
586 | break; | |
587 | } | |
588 | ||
589 | if (i == CM_MAX_DEV) | |
f8cfa618 | 590 | return -ENODEV; |
77c44ab1 HW |
591 | |
592 | dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL); | |
593 | if (dev == NULL) | |
f8cfa618 | 594 | return -ENOMEM; |
77c44ab1 HW |
595 | |
596 | dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT; | |
597 | dev->buffer_status = 0; | |
598 | ||
77c44ab1 | 599 | link->priv = dev; |
fba395ee | 600 | dev->p_dev = link; |
77c44ab1 HW |
601 | |
602 | link->conf.IntType = INT_MEMORY_AND_IO; | |
603 | dev_table[i] = link; | |
604 | ||
77c44ab1 HW |
605 | init_waitqueue_head(&dev->devq); |
606 | init_waitqueue_head(&dev->poll_wait); | |
607 | init_waitqueue_head(&dev->read_wait); | |
608 | init_waitqueue_head(&dev->write_wait); | |
40565f19 | 609 | setup_timer(&dev->poll_timer, cm4040_do_poll, 0); |
77c44ab1 | 610 | |
15b99ac1 | 611 | ret = reader_config(link, i); |
54493c10 AM |
612 | if (ret) { |
613 | dev_table[i] = NULL; | |
614 | kfree(dev); | |
15b99ac1 | 615 | return ret; |
54493c10 | 616 | } |
f8cfa618 | 617 | |
03457cd4 | 618 | device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i); |
67bc6200 | 619 | |
f8cfa618 | 620 | return 0; |
77c44ab1 HW |
621 | } |
622 | ||
fba395ee | 623 | static void reader_detach(struct pcmcia_device *link) |
77c44ab1 HW |
624 | { |
625 | struct reader_dev *dev = link->priv; | |
cc3b4866 | 626 | int devno; |
77c44ab1 HW |
627 | |
628 | /* find device */ | |
cc3b4866 DB |
629 | for (devno = 0; devno < CM_MAX_DEV; devno++) { |
630 | if (dev_table[devno] == link) | |
77c44ab1 HW |
631 | break; |
632 | } | |
cc3b4866 | 633 | if (devno == CM_MAX_DEV) |
77c44ab1 HW |
634 | return; |
635 | ||
e2d40963 | 636 | reader_release(link); |
cc3b4866 DB |
637 | |
638 | dev_table[devno] = NULL; | |
639 | kfree(dev); | |
640 | ||
07c015e7 | 641 | device_destroy(cmx_class, MKDEV(major, devno)); |
67bc6200 | 642 | |
77c44ab1 HW |
643 | return; |
644 | } | |
645 | ||
62322d25 | 646 | static const struct file_operations reader_fops = { |
77c44ab1 HW |
647 | .owner = THIS_MODULE, |
648 | .read = cm4040_read, | |
649 | .write = cm4040_write, | |
650 | .open = cm4040_open, | |
651 | .release = cm4040_close, | |
652 | .poll = cm4040_poll, | |
6038f373 | 653 | .llseek = no_llseek, |
77c44ab1 HW |
654 | }; |
655 | ||
656 | static struct pcmcia_device_id cm4040_ids[] = { | |
657 | PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200), | |
658 | PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040", | |
659 | 0xE32CDD8C, 0x8F23318B), | |
660 | PCMCIA_DEVICE_NULL, | |
661 | }; | |
662 | MODULE_DEVICE_TABLE(pcmcia, cm4040_ids); | |
663 | ||
664 | static struct pcmcia_driver reader_driver = { | |
665 | .owner = THIS_MODULE, | |
666 | .drv = { | |
667 | .name = "cm4040_cs", | |
668 | }, | |
15b99ac1 | 669 | .probe = reader_probe, |
cc3b4866 | 670 | .remove = reader_detach, |
77c44ab1 HW |
671 | .id_table = cm4040_ids, |
672 | }; | |
673 | ||
674 | static int __init cm4040_init(void) | |
675 | { | |
67bc6200 HW |
676 | int rc; |
677 | ||
77c44ab1 | 678 | printk(KERN_INFO "%s\n", version); |
67bc6200 | 679 | cmx_class = class_create(THIS_MODULE, "cardman_4040"); |
5eb5fc97 AM |
680 | if (IS_ERR(cmx_class)) |
681 | return PTR_ERR(cmx_class); | |
67bc6200 | 682 | |
77c44ab1 HW |
683 | major = register_chrdev(0, DEVICE_NAME, &reader_fops); |
684 | if (major < 0) { | |
685 | printk(KERN_WARNING MODULE_NAME | |
686 | ": could not get major number\n"); | |
54493c10 | 687 | class_destroy(cmx_class); |
5eb5fc97 | 688 | return major; |
77c44ab1 | 689 | } |
7fc5b1e3 HW |
690 | |
691 | rc = pcmcia_register_driver(&reader_driver); | |
692 | if (rc < 0) { | |
693 | unregister_chrdev(major, DEVICE_NAME); | |
54493c10 | 694 | class_destroy(cmx_class); |
7fc5b1e3 HW |
695 | return rc; |
696 | } | |
697 | ||
77c44ab1 HW |
698 | return 0; |
699 | } | |
700 | ||
701 | static void __exit cm4040_exit(void) | |
702 | { | |
77c44ab1 HW |
703 | printk(KERN_INFO MODULE_NAME ": unloading\n"); |
704 | pcmcia_unregister_driver(&reader_driver); | |
77c44ab1 | 705 | unregister_chrdev(major, DEVICE_NAME); |
67bc6200 | 706 | class_destroy(cmx_class); |
77c44ab1 HW |
707 | } |
708 | ||
709 | module_init(cm4040_init); | |
710 | module_exit(cm4040_exit); | |
711 | MODULE_LICENSE("Dual BSD/GPL"); |