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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/drivers/char/serial167.c | |
3 | * | |
4 | * Driver for MVME166/7 board serial ports, which are via a CD2401. | |
5 | * Based very much on cyclades.c. | |
6 | * | |
7 | * MVME166/7 work by Richard Hirst [richard@sleepie.demon.co.uk] | |
8 | * | |
9 | * ============================================================== | |
10 | * | |
11 | * static char rcsid[] = | |
12 | * "$Revision: 1.36.1.4 $$Date: 1995/03/29 06:14:14 $"; | |
13 | * | |
14 | * linux/kernel/cyclades.c | |
15 | * | |
16 | * Maintained by Marcio Saito (cyclades@netcom.com) and | |
17 | * Randolph Bentson (bentson@grieg.seaslug.org) | |
18 | * | |
19 | * Much of the design and some of the code came from serial.c | |
20 | * which was copyright (C) 1991, 1992 Linus Torvalds. It was | |
21 | * extensively rewritten by Theodore Ts'o, 8/16/92 -- 9/14/92, | |
22 | * and then fixed as suggested by Michael K. Johnson 12/12/92. | |
23 | * | |
24 | * This version does not support shared irq's. | |
25 | * | |
26 | * $Log: cyclades.c,v $ | |
27 | * Revision 1.36.1.4 1995/03/29 06:14:14 bentson | |
28 | * disambiguate between Cyclom-16Y and Cyclom-32Ye; | |
29 | * | |
30 | * Changes: | |
31 | * | |
32 | * 200 lines of changes record removed - RGH 11-10-95, starting work on | |
33 | * converting this to drive serial ports on mvme166 (cd2401). | |
34 | * | |
35 | * Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 2000/08/25 | |
36 | * - get rid of verify_area | |
37 | * - use get_user to access memory from userspace in set_threshold, | |
38 | * set_default_threshold and set_timeout | |
39 | * - don't use the panic function in serial167_init | |
40 | * - do resource release on failure on serial167_init | |
41 | * - include missing restore_flags in mvme167_serial_console_setup | |
42 | * | |
43 | * Kars de Jong <jongk@linux-m68k.org> - 2004/09/06 | |
44 | * - replace bottom half handler with task queue handler | |
45 | */ | |
46 | ||
1da177e4 LT |
47 | #include <linux/errno.h> |
48 | #include <linux/signal.h> | |
49 | #include <linux/sched.h> | |
50 | #include <linux/timer.h> | |
51 | #include <linux/tty.h> | |
52 | #include <linux/interrupt.h> | |
53 | #include <linux/serial.h> | |
54 | #include <linux/serialP.h> | |
405f5571 | 55 | #include <linux/smp_lock.h> |
1da177e4 LT |
56 | #include <linux/string.h> |
57 | #include <linux/fcntl.h> | |
58 | #include <linux/ptrace.h> | |
59 | #include <linux/serial167.h> | |
60 | #include <linux/delay.h> | |
61 | #include <linux/major.h> | |
62 | #include <linux/mm.h> | |
63 | #include <linux/console.h> | |
64 | #include <linux/module.h> | |
65 | #include <linux/bitops.h> | |
81e859ac | 66 | #include <linux/tty_flip.h> |
1da177e4 LT |
67 | |
68 | #include <asm/system.h> | |
69 | #include <asm/io.h> | |
70 | #include <asm/mvme16xhw.h> | |
71 | #include <asm/bootinfo.h> | |
72 | #include <asm/setup.h> | |
73 | ||
74 | #include <linux/types.h> | |
75 | #include <linux/kernel.h> | |
76 | ||
77 | #include <asm/uaccess.h> | |
78 | #include <linux/init.h> | |
79 | ||
80 | #define SERIAL_PARANOIA_CHECK | |
81 | #undef SERIAL_DEBUG_OPEN | |
82 | #undef SERIAL_DEBUG_THROTTLE | |
83 | #undef SERIAL_DEBUG_OTHER | |
84 | #undef SERIAL_DEBUG_IO | |
85 | #undef SERIAL_DEBUG_COUNT | |
86 | #undef SERIAL_DEBUG_DTR | |
87 | #undef CYCLOM_16Y_HACK | |
88 | #define CYCLOM_ENABLE_MONITORING | |
89 | ||
90 | #define WAKEUP_CHARS 256 | |
91 | ||
92 | #define STD_COM_FLAGS (0) | |
93 | ||
1da177e4 LT |
94 | static struct tty_driver *cy_serial_driver; |
95 | extern int serial_console; | |
96 | static struct cyclades_port *serial_console_info = NULL; | |
97 | static unsigned int serial_console_cflag = 0; | |
98 | u_char initial_console_speed; | |
99 | ||
100 | /* Base address of cd2401 chip on mvme166/7 */ | |
101 | ||
102 | #define BASE_ADDR (0xfff45000) | |
103 | #define pcc2chip ((volatile u_char *)0xfff42000) | |
104 | #define PccSCCMICR 0x1d | |
105 | #define PccSCCTICR 0x1e | |
106 | #define PccSCCRICR 0x1f | |
107 | #define PccTPIACKR 0x25 | |
108 | #define PccRPIACKR 0x27 | |
109 | #define PccIMLR 0x3f | |
110 | ||
111 | /* This is the per-port data structure */ | |
112 | struct cyclades_port cy_port[] = { | |
44bafdf3 JS |
113 | /* CARD# */ |
114 | {-1}, /* ttyS0 */ | |
115 | {-1}, /* ttyS1 */ | |
116 | {-1}, /* ttyS2 */ | |
117 | {-1}, /* ttyS3 */ | |
1da177e4 | 118 | }; |
44bafdf3 | 119 | |
fe971071 | 120 | #define NR_PORTS ARRAY_SIZE(cy_port) |
1da177e4 | 121 | |
1da177e4 LT |
122 | /* |
123 | * This is used to look up the divisor speeds and the timeouts | |
124 | * We're normally limited to 15 distinct baud rates. The extra | |
125 | * are accessed via settings in info->flags. | |
126 | * 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, | |
127 | * 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, | |
128 | * HI VHI | |
129 | */ | |
130 | static int baud_table[] = { | |
44bafdf3 JS |
131 | 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, |
132 | 1800, 2400, 4800, 9600, 19200, 38400, 57600, 76800, 115200, 150000, | |
133 | 0 | |
134 | }; | |
1da177e4 LT |
135 | |
136 | #if 0 | |
44bafdf3 JS |
137 | static char baud_co[] = { /* 25 MHz clock option table */ |
138 | /* value => 00 01 02 03 04 */ | |
139 | /* divide by 8 32 128 512 2048 */ | |
140 | 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, | |
141 | 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | |
142 | }; | |
1da177e4 | 143 | |
44bafdf3 JS |
144 | static char baud_bpr[] = { /* 25 MHz baud rate period table */ |
145 | 0x00, 0xf5, 0xa3, 0x6f, 0x5c, 0x51, 0xf5, 0xa3, 0x51, 0xa3, | |
146 | 0x6d, 0x51, 0xa3, 0x51, 0xa3, 0x51, 0x36, 0x29, 0x1b, 0x15 | |
147 | }; | |
1da177e4 LT |
148 | #endif |
149 | ||
150 | /* I think 166 brd clocks 2401 at 20MHz.... */ | |
151 | ||
152 | /* These values are written directly to tcor, and >> 5 for writing to rcor */ | |
44bafdf3 JS |
153 | static u_char baud_co[] = { /* 20 MHz clock option table */ |
154 | 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x60, 0x40, | |
155 | 0x40, 0x40, 0x20, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | |
156 | }; | |
1da177e4 LT |
157 | |
158 | /* These values written directly to tbpr/rbpr */ | |
44bafdf3 JS |
159 | static u_char baud_bpr[] = { /* 20 MHz baud rate period table */ |
160 | 0x00, 0xc0, 0x80, 0x58, 0x6c, 0x40, 0xc0, 0x81, 0x40, 0x81, | |
161 | 0x57, 0x40, 0x81, 0x40, 0x81, 0x40, 0x2b, 0x20, 0x15, 0x10 | |
162 | }; | |
1da177e4 | 163 | |
44bafdf3 JS |
164 | static u_char baud_cor4[] = { /* receive threshold */ |
165 | 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, | |
166 | 0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, 0x07 | |
167 | }; | |
1da177e4 LT |
168 | |
169 | static void shutdown(struct cyclades_port *); | |
44bafdf3 | 170 | static int startup(struct cyclades_port *); |
1da177e4 LT |
171 | static void cy_throttle(struct tty_struct *); |
172 | static void cy_unthrottle(struct tty_struct *); | |
173 | static void config_setup(struct cyclades_port *); | |
1da177e4 LT |
174 | #ifdef CYCLOM_SHOW_STATUS |
175 | static void show_status(int); | |
176 | #endif | |
177 | ||
178 | #ifdef CONFIG_REMOTE_DEBUG | |
179 | static void debug_setup(void); | |
44bafdf3 | 180 | void queueDebugChar(int c); |
1da177e4 LT |
181 | int getDebugChar(void); |
182 | ||
183 | #define DEBUG_PORT 1 | |
184 | #define DEBUG_LEN 256 | |
185 | ||
186 | typedef struct { | |
44bafdf3 JS |
187 | int in; |
188 | int out; | |
189 | unsigned char buf[DEBUG_LEN]; | |
1da177e4 LT |
190 | } debugq; |
191 | ||
192 | debugq debugiq; | |
193 | #endif | |
194 | ||
195 | /* | |
196 | * I have my own version of udelay(), as it is needed when initialising | |
197 | * the chip, before the delay loop has been calibrated. Should probably | |
198 | * reference one of the vmechip2 or pccchip2 counter for an accurate | |
199 | * delay, but this wild guess will do for now. | |
200 | */ | |
201 | ||
44bafdf3 | 202 | void my_udelay(long us) |
1da177e4 LT |
203 | { |
204 | u_char x; | |
205 | volatile u_char *p = &x; | |
206 | int i; | |
207 | ||
208 | while (us--) | |
209 | for (i = 100; i; i--) | |
210 | x |= *p; | |
211 | } | |
212 | ||
44bafdf3 JS |
213 | static inline int serial_paranoia_check(struct cyclades_port *info, char *name, |
214 | const char *routine) | |
1da177e4 LT |
215 | { |
216 | #ifdef SERIAL_PARANOIA_CHECK | |
44bafdf3 JS |
217 | if (!info) { |
218 | printk("Warning: null cyclades_port for (%s) in %s\n", name, | |
219 | routine); | |
220 | return 1; | |
221 | } | |
222 | ||
f23fc156 | 223 | if (info < &cy_port[0] || info >= &cy_port[NR_PORTS]) { |
44bafdf3 JS |
224 | printk("Warning: cyclades_port out of range for (%s) in %s\n", |
225 | name, routine); | |
226 | return 1; | |
227 | } | |
228 | ||
229 | if (info->magic != CYCLADES_MAGIC) { | |
230 | printk("Warning: bad magic number for serial struct (%s) in " | |
231 | "%s\n", name, routine); | |
232 | return 1; | |
233 | } | |
1da177e4 LT |
234 | #endif |
235 | return 0; | |
44bafdf3 | 236 | } /* serial_paranoia_check */ |
1da177e4 LT |
237 | |
238 | #if 0 | |
239 | /* The following diagnostic routines allow the driver to spew | |
240 | information on the screen, even (especially!) during interrupts. | |
241 | */ | |
44bafdf3 JS |
242 | void SP(char *data) |
243 | { | |
244 | unsigned long flags; | |
245 | local_irq_save(flags); | |
353f6dd2 | 246 | printk(KERN_EMERG "%s", data); |
44bafdf3 | 247 | local_irq_restore(flags); |
1da177e4 | 248 | } |
44bafdf3 | 249 | |
1da177e4 | 250 | char scrn[2]; |
44bafdf3 JS |
251 | void CP(char data) |
252 | { | |
253 | unsigned long flags; | |
254 | local_irq_save(flags); | |
255 | scrn[0] = data; | |
353f6dd2 | 256 | printk(KERN_EMERG "%c", scrn); |
44bafdf3 JS |
257 | local_irq_restore(flags); |
258 | } /* CP */ | |
1da177e4 | 259 | |
44bafdf3 JS |
260 | void CP1(int data) |
261 | { | |
262 | (data < 10) ? CP(data + '0') : CP(data + 'A' - 10); | |
263 | } /* CP1 */ | |
264 | void CP2(int data) | |
265 | { | |
266 | CP1((data >> 4) & 0x0f); | |
267 | CP1(data & 0x0f); | |
268 | } /* CP2 */ | |
269 | void CP4(int data) | |
270 | { | |
271 | CP2((data >> 8) & 0xff); | |
272 | CP2(data & 0xff); | |
273 | } /* CP4 */ | |
274 | void CP8(long data) | |
275 | { | |
276 | CP4((data >> 16) & 0xffff); | |
277 | CP4(data & 0xffff); | |
278 | } /* CP8 */ | |
1da177e4 LT |
279 | #endif |
280 | ||
281 | /* This routine waits up to 1000 micro-seconds for the previous | |
282 | command to the Cirrus chip to complete and then issues the | |
283 | new command. An error is returned if the previous command | |
284 | didn't finish within the time limit. | |
285 | */ | |
44bafdf3 | 286 | u_short write_cy_cmd(volatile u_char * base_addr, u_char cmd) |
1da177e4 | 287 | { |
44bafdf3 JS |
288 | unsigned long flags; |
289 | volatile int i; | |
1da177e4 | 290 | |
44bafdf3 | 291 | local_irq_save(flags); |
1da177e4 | 292 | /* Check to see that the previous command has completed */ |
44bafdf3 JS |
293 | for (i = 0; i < 100; i++) { |
294 | if (base_addr[CyCCR] == 0) { | |
295 | break; | |
296 | } | |
297 | my_udelay(10L); | |
1da177e4 LT |
298 | } |
299 | /* if the CCR never cleared, the previous command | |
44bafdf3 JS |
300 | didn't finish within the "reasonable time" */ |
301 | if (i == 10) { | |
302 | local_irq_restore(flags); | |
303 | return (-1); | |
1da177e4 LT |
304 | } |
305 | ||
306 | /* Issue the new command */ | |
307 | base_addr[CyCCR] = cmd; | |
44bafdf3 JS |
308 | local_irq_restore(flags); |
309 | return (0); | |
310 | } /* write_cy_cmd */ | |
1da177e4 LT |
311 | |
312 | /* cy_start and cy_stop provide software output flow control as a | |
313 | function of XON/XOFF, software CTS, and other such stuff. */ | |
314 | ||
44bafdf3 | 315 | static void cy_stop(struct tty_struct *tty) |
1da177e4 | 316 | { |
c9f19e96 | 317 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
318 | volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; |
319 | int channel; | |
320 | unsigned long flags; | |
1da177e4 LT |
321 | |
322 | #ifdef SERIAL_DEBUG_OTHER | |
44bafdf3 | 323 | printk("cy_stop %s\n", tty->name); /* */ |
1da177e4 LT |
324 | #endif |
325 | ||
44bafdf3 JS |
326 | if (serial_paranoia_check(info, tty->name, "cy_stop")) |
327 | return; | |
1da177e4 | 328 | |
44bafdf3 | 329 | channel = info->line; |
1da177e4 | 330 | |
44bafdf3 JS |
331 | local_irq_save(flags); |
332 | base_addr[CyCAR] = (u_char) (channel); /* index channel */ | |
333 | base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); | |
334 | local_irq_restore(flags); | |
335 | } /* cy_stop */ | |
1da177e4 | 336 | |
44bafdf3 | 337 | static void cy_start(struct tty_struct *tty) |
1da177e4 | 338 | { |
c9f19e96 | 339 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
340 | volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; |
341 | int channel; | |
342 | unsigned long flags; | |
1da177e4 LT |
343 | |
344 | #ifdef SERIAL_DEBUG_OTHER | |
44bafdf3 | 345 | printk("cy_start %s\n", tty->name); /* */ |
1da177e4 LT |
346 | #endif |
347 | ||
44bafdf3 JS |
348 | if (serial_paranoia_check(info, tty->name, "cy_start")) |
349 | return; | |
1da177e4 | 350 | |
44bafdf3 | 351 | channel = info->line; |
1da177e4 | 352 | |
44bafdf3 JS |
353 | local_irq_save(flags); |
354 | base_addr[CyCAR] = (u_char) (channel); | |
355 | base_addr[CyIER] |= CyTxMpty; | |
356 | local_irq_restore(flags); | |
357 | } /* cy_start */ | |
1da177e4 | 358 | |
1da177e4 LT |
359 | /* The real interrupt service routines are called |
360 | whenever the card wants its hand held--chars | |
361 | received, out buffer empty, modem change, etc. | |
362 | */ | |
44bafdf3 | 363 | static irqreturn_t cd2401_rxerr_interrupt(int irq, void *dev_id) |
1da177e4 | 364 | { |
44bafdf3 JS |
365 | struct tty_struct *tty; |
366 | struct cyclades_port *info; | |
367 | volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; | |
368 | unsigned char err, rfoc; | |
369 | int channel; | |
370 | char data; | |
371 | ||
372 | /* determine the channel and change to that context */ | |
373 | channel = (u_short) (base_addr[CyLICR] >> 2); | |
374 | info = &cy_port[channel]; | |
375 | info->last_active = jiffies; | |
376 | ||
377 | if ((err = base_addr[CyRISR]) & CyTIMEOUT) { | |
378 | /* This is a receive timeout interrupt, ignore it */ | |
379 | base_addr[CyREOIR] = CyNOTRANS; | |
380 | return IRQ_HANDLED; | |
381 | } | |
1da177e4 | 382 | |
44bafdf3 JS |
383 | /* Read a byte of data if there is any - assume the error |
384 | * is associated with this character */ | |
1da177e4 | 385 | |
44bafdf3 JS |
386 | if ((rfoc = base_addr[CyRFOC]) != 0) |
387 | data = base_addr[CyRDR]; | |
388 | else | |
389 | data = 0; | |
390 | ||
391 | /* if there is nowhere to put the data, discard it */ | |
392 | if (info->tty == 0) { | |
393 | base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS; | |
394 | return IRQ_HANDLED; | |
395 | } else { /* there is an open port for this data */ | |
396 | tty = info->tty; | |
397 | if (err & info->ignore_status_mask) { | |
398 | base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS; | |
399 | return IRQ_HANDLED; | |
400 | } | |
401 | if (tty_buffer_request_room(tty, 1) != 0) { | |
402 | if (err & info->read_status_mask) { | |
403 | if (err & CyBREAK) { | |
404 | tty_insert_flip_char(tty, data, | |
405 | TTY_BREAK); | |
406 | if (info->flags & ASYNC_SAK) { | |
407 | do_SAK(tty); | |
408 | } | |
409 | } else if (err & CyFRAME) { | |
410 | tty_insert_flip_char(tty, data, | |
411 | TTY_FRAME); | |
412 | } else if (err & CyPARITY) { | |
413 | tty_insert_flip_char(tty, data, | |
414 | TTY_PARITY); | |
415 | } else if (err & CyOVERRUN) { | |
416 | tty_insert_flip_char(tty, 0, | |
417 | TTY_OVERRUN); | |
418 | /* | |
419 | If the flip buffer itself is | |
c4f01240 | 420 | overflowing, we still lose |
44bafdf3 JS |
421 | the next incoming character. |
422 | */ | |
423 | if (tty_buffer_request_room(tty, 1) != | |
424 | 0) { | |
425 | tty_insert_flip_char(tty, data, | |
426 | TTY_FRAME); | |
427 | } | |
428 | /* These two conditions may imply */ | |
429 | /* a normal read should be done. */ | |
430 | /* else if(data & CyTIMEOUT) */ | |
431 | /* else if(data & CySPECHAR) */ | |
432 | } else { | |
433 | tty_insert_flip_char(tty, 0, | |
434 | TTY_NORMAL); | |
435 | } | |
436 | } else { | |
437 | tty_insert_flip_char(tty, data, TTY_NORMAL); | |
438 | } | |
439 | } else { | |
440 | /* there was a software buffer overrun | |
441 | and nothing could be done about it!!! */ | |
442 | } | |
443 | } | |
444 | tty_schedule_flip(tty); | |
445 | /* end of service */ | |
1da177e4 LT |
446 | base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS; |
447 | return IRQ_HANDLED; | |
44bafdf3 JS |
448 | } /* cy_rxerr_interrupt */ |
449 | ||
450 | static irqreturn_t cd2401_modem_interrupt(int irq, void *dev_id) | |
1da177e4 | 451 | { |
44bafdf3 JS |
452 | struct cyclades_port *info; |
453 | volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; | |
454 | int channel; | |
455 | int mdm_change; | |
456 | int mdm_status; | |
457 | ||
458 | /* determine the channel and change to that context */ | |
459 | channel = (u_short) (base_addr[CyLICR] >> 2); | |
460 | info = &cy_port[channel]; | |
461 | info->last_active = jiffies; | |
462 | ||
463 | mdm_change = base_addr[CyMISR]; | |
464 | mdm_status = base_addr[CyMSVR1]; | |
465 | ||
466 | if (info->tty == 0) { /* nowhere to put the data, ignore it */ | |
467 | ; | |
468 | } else { | |
469 | if ((mdm_change & CyDCD) | |
470 | && (info->flags & ASYNC_CHECK_CD)) { | |
471 | if (mdm_status & CyDCD) { | |
1da177e4 | 472 | /* CP('!'); */ |
3099bbc5 | 473 | wake_up_interruptible(&info->open_wait); |
44bafdf3 | 474 | } else { |
1da177e4 | 475 | /* CP('@'); */ |
3099bbc5 JS |
476 | tty_hangup(info->tty); |
477 | wake_up_interruptible(&info->open_wait); | |
478 | info->flags &= ~ASYNC_NORMAL_ACTIVE; | |
44bafdf3 | 479 | } |
1da177e4 | 480 | } |
44bafdf3 JS |
481 | if ((mdm_change & CyCTS) |
482 | && (info->flags & ASYNC_CTS_FLOW)) { | |
483 | if (info->tty->stopped) { | |
484 | if (mdm_status & CyCTS) { | |
485 | /* !!! cy_start isn't used because... */ | |
486 | info->tty->stopped = 0; | |
487 | base_addr[CyIER] |= CyTxMpty; | |
3099bbc5 | 488 | tty_wakeup(info->tty); |
44bafdf3 JS |
489 | } |
490 | } else { | |
491 | if (!(mdm_status & CyCTS)) { | |
492 | /* !!! cy_stop isn't used because... */ | |
493 | info->tty->stopped = 1; | |
494 | base_addr[CyIER] &= | |
495 | ~(CyTxMpty | CyTxRdy); | |
496 | } | |
497 | } | |
498 | } | |
499 | if (mdm_status & CyDSR) { | |
1da177e4 | 500 | } |
1da177e4 | 501 | } |
44bafdf3 JS |
502 | base_addr[CyMEOIR] = 0; |
503 | return IRQ_HANDLED; | |
504 | } /* cy_modem_interrupt */ | |
1da177e4 | 505 | |
44bafdf3 | 506 | static irqreturn_t cd2401_tx_interrupt(int irq, void *dev_id) |
1da177e4 | 507 | { |
44bafdf3 JS |
508 | struct cyclades_port *info; |
509 | volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; | |
510 | int channel; | |
511 | int char_count, saved_cnt; | |
512 | int outch; | |
1da177e4 | 513 | |
44bafdf3 JS |
514 | /* determine the channel and change to that context */ |
515 | channel = (u_short) (base_addr[CyLICR] >> 2); | |
1da177e4 LT |
516 | |
517 | #ifdef CONFIG_REMOTE_DEBUG | |
44bafdf3 JS |
518 | if (channel == DEBUG_PORT) { |
519 | panic("TxInt on debug port!!!"); | |
520 | } | |
1da177e4 | 521 | #endif |
44bafdf3 JS |
522 | /* validate the port number (as configured and open) */ |
523 | if ((channel < 0) || (NR_PORTS <= channel)) { | |
524 | base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); | |
525 | base_addr[CyTEOIR] = CyNOTRANS; | |
526 | return IRQ_HANDLED; | |
527 | } | |
f23fc156 | 528 | info = &cy_port[channel]; |
44bafdf3 JS |
529 | info->last_active = jiffies; |
530 | if (info->tty == 0) { | |
531 | base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); | |
44bafdf3 JS |
532 | base_addr[CyTEOIR] = CyNOTRANS; |
533 | return IRQ_HANDLED; | |
534 | } | |
535 | ||
536 | /* load the on-chip space available for outbound data */ | |
537 | saved_cnt = char_count = base_addr[CyTFTC]; | |
538 | ||
539 | if (info->x_char) { /* send special char */ | |
540 | outch = info->x_char; | |
1da177e4 | 541 | base_addr[CyTDR] = outch; |
1da177e4 | 542 | char_count--; |
44bafdf3 | 543 | info->x_char = 0; |
1da177e4 | 544 | } |
1da177e4 | 545 | |
44bafdf3 JS |
546 | if (info->x_break) { |
547 | /* The Cirrus chip requires the "Embedded Transmit | |
548 | Commands" of start break, delay, and end break | |
549 | sequences to be sent. The duration of the | |
550 | break is given in TICs, which runs at HZ | |
551 | (typically 100) and the PPR runs at 200 Hz, | |
552 | so the delay is duration * 200/HZ, and thus a | |
553 | break can run from 1/100 sec to about 5/4 sec. | |
554 | Need to check these values - RGH 141095. | |
555 | */ | |
556 | base_addr[CyTDR] = 0; /* start break */ | |
557 | base_addr[CyTDR] = 0x81; | |
558 | base_addr[CyTDR] = 0; /* delay a bit */ | |
559 | base_addr[CyTDR] = 0x82; | |
560 | base_addr[CyTDR] = info->x_break * 200 / HZ; | |
561 | base_addr[CyTDR] = 0; /* terminate break */ | |
562 | base_addr[CyTDR] = 0x83; | |
563 | char_count -= 7; | |
564 | info->x_break = 0; | |
565 | } | |
566 | ||
567 | while (char_count > 0) { | |
568 | if (!info->xmit_cnt) { | |
569 | base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); | |
570 | break; | |
571 | } | |
572 | if (info->xmit_buf == 0) { | |
573 | base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); | |
574 | break; | |
575 | } | |
576 | if (info->tty->stopped || info->tty->hw_stopped) { | |
577 | base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy); | |
578 | break; | |
579 | } | |
580 | /* Because the Embedded Transmit Commands have been | |
581 | enabled, we must check to see if the escape | |
582 | character, NULL, is being sent. If it is, we | |
583 | must ensure that there is room for it to be | |
584 | doubled in the output stream. Therefore we | |
585 | no longer advance the pointer when the character | |
586 | is fetched, but rather wait until after the check | |
587 | for a NULL output character. (This is necessary | |
588 | because there may not be room for the two chars | |
589 | needed to send a NULL. | |
590 | */ | |
591 | outch = info->xmit_buf[info->xmit_tail]; | |
592 | if (outch) { | |
593 | info->xmit_cnt--; | |
594 | info->xmit_tail = (info->xmit_tail + 1) | |
595 | & (PAGE_SIZE - 1); | |
596 | base_addr[CyTDR] = outch; | |
597 | char_count--; | |
598 | } else { | |
599 | if (char_count > 1) { | |
600 | info->xmit_cnt--; | |
601 | info->xmit_tail = (info->xmit_tail + 1) | |
602 | & (PAGE_SIZE - 1); | |
603 | base_addr[CyTDR] = outch; | |
604 | base_addr[CyTDR] = 0; | |
605 | char_count--; | |
606 | char_count--; | |
607 | } else { | |
608 | break; | |
609 | } | |
610 | } | |
611 | } | |
612 | ||
3099bbc5 JS |
613 | if (info->xmit_cnt < WAKEUP_CHARS) |
614 | tty_wakeup(info->tty); | |
615 | ||
44bafdf3 JS |
616 | base_addr[CyTEOIR] = (char_count != saved_cnt) ? 0 : CyNOTRANS; |
617 | return IRQ_HANDLED; | |
618 | } /* cy_tx_interrupt */ | |
1da177e4 | 619 | |
44bafdf3 | 620 | static irqreturn_t cd2401_rx_interrupt(int irq, void *dev_id) |
1da177e4 | 621 | { |
44bafdf3 JS |
622 | struct tty_struct *tty; |
623 | struct cyclades_port *info; | |
624 | volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; | |
625 | int channel; | |
626 | char data; | |
627 | int char_count; | |
628 | int save_cnt; | |
629 | int len; | |
630 | ||
631 | /* determine the channel and change to that context */ | |
632 | channel = (u_short) (base_addr[CyLICR] >> 2); | |
633 | info = &cy_port[channel]; | |
634 | info->last_active = jiffies; | |
635 | save_cnt = char_count = base_addr[CyRFOC]; | |
1da177e4 LT |
636 | |
637 | #ifdef CONFIG_REMOTE_DEBUG | |
44bafdf3 JS |
638 | if (channel == DEBUG_PORT) { |
639 | while (char_count--) { | |
640 | data = base_addr[CyRDR]; | |
641 | queueDebugChar(data); | |
642 | } | |
643 | } else | |
1da177e4 | 644 | #endif |
44bafdf3 JS |
645 | /* if there is nowhere to put the data, discard it */ |
646 | if (info->tty == 0) { | |
647 | while (char_count--) { | |
648 | data = base_addr[CyRDR]; | |
649 | } | |
650 | } else { /* there is an open port for this data */ | |
651 | tty = info->tty; | |
652 | /* load # characters available from the chip */ | |
1da177e4 LT |
653 | |
654 | #ifdef CYCLOM_ENABLE_MONITORING | |
44bafdf3 JS |
655 | ++info->mon.int_count; |
656 | info->mon.char_count += char_count; | |
657 | if (char_count > info->mon.char_max) | |
658 | info->mon.char_max = char_count; | |
659 | info->mon.char_last = char_count; | |
660 | #endif | |
661 | len = tty_buffer_request_room(tty, char_count); | |
662 | while (len--) { | |
663 | data = base_addr[CyRDR]; | |
664 | tty_insert_flip_char(tty, data, TTY_NORMAL); | |
1da177e4 | 665 | #ifdef CYCLOM_16Y_HACK |
44bafdf3 | 666 | udelay(10L); |
1da177e4 | 667 | #endif |
44bafdf3 JS |
668 | } |
669 | tty_schedule_flip(tty); | |
670 | } | |
671 | /* end of service */ | |
672 | base_addr[CyREOIR] = save_cnt ? 0 : CyNOTRANS; | |
673 | return IRQ_HANDLED; | |
674 | } /* cy_rx_interrupt */ | |
1da177e4 | 675 | |
1da177e4 LT |
676 | /* This is called whenever a port becomes active; |
677 | interrupts are enabled and DTR & RTS are turned on. | |
678 | */ | |
44bafdf3 | 679 | static int startup(struct cyclades_port *info) |
1da177e4 | 680 | { |
44bafdf3 JS |
681 | unsigned long flags; |
682 | volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR; | |
683 | int channel; | |
1da177e4 | 684 | |
44bafdf3 JS |
685 | if (info->flags & ASYNC_INITIALIZED) { |
686 | return 0; | |
687 | } | |
1da177e4 | 688 | |
44bafdf3 JS |
689 | if (!info->type) { |
690 | if (info->tty) { | |
691 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
692 | } | |
693 | return 0; | |
1da177e4 | 694 | } |
44bafdf3 JS |
695 | if (!info->xmit_buf) { |
696 | info->xmit_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL); | |
697 | if (!info->xmit_buf) { | |
698 | return -ENOMEM; | |
699 | } | |
1da177e4 | 700 | } |
1da177e4 | 701 | |
44bafdf3 | 702 | config_setup(info); |
1da177e4 | 703 | |
44bafdf3 | 704 | channel = info->line; |
1da177e4 LT |
705 | |
706 | #ifdef SERIAL_DEBUG_OPEN | |
44bafdf3 | 707 | printk("startup channel %d\n", channel); |
1da177e4 LT |
708 | #endif |
709 | ||
44bafdf3 JS |
710 | local_irq_save(flags); |
711 | base_addr[CyCAR] = (u_char) channel; | |
712 | write_cy_cmd(base_addr, CyENB_RCVR | CyENB_XMTR); | |
1da177e4 | 713 | |
44bafdf3 | 714 | base_addr[CyCAR] = (u_char) channel; /* !!! Is this needed? */ |
1da177e4 LT |
715 | base_addr[CyMSVR1] = CyRTS; |
716 | /* CP('S');CP('1'); */ | |
717 | base_addr[CyMSVR2] = CyDTR; | |
718 | ||
719 | #ifdef SERIAL_DEBUG_DTR | |
44bafdf3 JS |
720 | printk("cyc: %d: raising DTR\n", __LINE__); |
721 | printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], | |
722 | base_addr[CyMSVR2]); | |
1da177e4 LT |
723 | #endif |
724 | ||
725 | base_addr[CyIER] |= CyRxData; | |
726 | info->flags |= ASYNC_INITIALIZED; | |
727 | ||
44bafdf3 JS |
728 | if (info->tty) { |
729 | clear_bit(TTY_IO_ERROR, &info->tty->flags); | |
1da177e4 LT |
730 | } |
731 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
732 | ||
44bafdf3 | 733 | local_irq_restore(flags); |
1da177e4 LT |
734 | |
735 | #ifdef SERIAL_DEBUG_OPEN | |
44bafdf3 | 736 | printk(" done\n"); |
1da177e4 | 737 | #endif |
44bafdf3 JS |
738 | return 0; |
739 | } /* startup */ | |
1da177e4 | 740 | |
44bafdf3 | 741 | void start_xmit(struct cyclades_port *info) |
1da177e4 | 742 | { |
44bafdf3 JS |
743 | unsigned long flags; |
744 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
745 | int channel; | |
1da177e4 | 746 | |
44bafdf3 JS |
747 | channel = info->line; |
748 | local_irq_save(flags); | |
1da177e4 LT |
749 | base_addr[CyCAR] = channel; |
750 | base_addr[CyIER] |= CyTxMpty; | |
44bafdf3 JS |
751 | local_irq_restore(flags); |
752 | } /* start_xmit */ | |
1da177e4 LT |
753 | |
754 | /* | |
755 | * This routine shuts down a serial port; interrupts are disabled, | |
756 | * and DTR is dropped if the hangup on close termio flag is on. | |
757 | */ | |
44bafdf3 | 758 | static void shutdown(struct cyclades_port *info) |
1da177e4 | 759 | { |
44bafdf3 JS |
760 | unsigned long flags; |
761 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
762 | int channel; | |
1da177e4 | 763 | |
44bafdf3 | 764 | if (!(info->flags & ASYNC_INITIALIZED)) { |
1da177e4 | 765 | /* CP('$'); */ |
44bafdf3 JS |
766 | return; |
767 | } | |
1da177e4 | 768 | |
44bafdf3 | 769 | channel = info->line; |
1da177e4 LT |
770 | |
771 | #ifdef SERIAL_DEBUG_OPEN | |
44bafdf3 | 772 | printk("shutdown channel %d\n", channel); |
1da177e4 LT |
773 | #endif |
774 | ||
44bafdf3 JS |
775 | /* !!! REALLY MUST WAIT FOR LAST CHARACTER TO BE |
776 | SENT BEFORE DROPPING THE LINE !!! (Perhaps | |
777 | set some flag that is read when XMTY happens.) | |
778 | Other choices are to delay some fixed interval | |
779 | or schedule some later processing. | |
780 | */ | |
781 | local_irq_save(flags); | |
782 | if (info->xmit_buf) { | |
783 | free_page((unsigned long)info->xmit_buf); | |
784 | info->xmit_buf = NULL; | |
1da177e4 LT |
785 | } |
786 | ||
44bafdf3 | 787 | base_addr[CyCAR] = (u_char) channel; |
1da177e4 | 788 | if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) { |
44bafdf3 | 789 | base_addr[CyMSVR1] = 0; |
1da177e4 | 790 | /* CP('C');CP('1'); */ |
44bafdf3 | 791 | base_addr[CyMSVR2] = 0; |
1da177e4 | 792 | #ifdef SERIAL_DEBUG_DTR |
44bafdf3 JS |
793 | printk("cyc: %d: dropping DTR\n", __LINE__); |
794 | printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], | |
795 | base_addr[CyMSVR2]); | |
1da177e4 | 796 | #endif |
44bafdf3 JS |
797 | } |
798 | write_cy_cmd(base_addr, CyDIS_RCVR); | |
799 | /* it may be appropriate to clear _XMIT at | |
800 | some later date (after testing)!!! */ | |
1da177e4 | 801 | |
44bafdf3 JS |
802 | if (info->tty) { |
803 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
1da177e4 LT |
804 | } |
805 | info->flags &= ~ASYNC_INITIALIZED; | |
44bafdf3 | 806 | local_irq_restore(flags); |
1da177e4 LT |
807 | |
808 | #ifdef SERIAL_DEBUG_OPEN | |
44bafdf3 | 809 | printk(" done\n"); |
1da177e4 | 810 | #endif |
44bafdf3 | 811 | } /* shutdown */ |
1da177e4 LT |
812 | |
813 | /* | |
814 | * This routine finds or computes the various line characteristics. | |
815 | */ | |
44bafdf3 | 816 | static void config_setup(struct cyclades_port *info) |
1da177e4 | 817 | { |
44bafdf3 JS |
818 | unsigned long flags; |
819 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
820 | int channel; | |
821 | unsigned cflag; | |
822 | int i; | |
823 | unsigned char ti, need_init_chan = 0; | |
824 | ||
825 | if (!info->tty || !info->tty->termios) { | |
826 | return; | |
827 | } | |
828 | if (info->line == -1) { | |
829 | return; | |
830 | } | |
831 | cflag = info->tty->termios->c_cflag; | |
832 | ||
833 | /* baud rate */ | |
834 | i = cflag & CBAUD; | |
1da177e4 LT |
835 | #ifdef CBAUDEX |
836 | /* Starting with kernel 1.1.65, there is direct support for | |
837 | higher baud rates. The following code supports those | |
838 | changes. The conditional aspect allows this driver to be | |
839 | used for earlier as well as later kernel versions. (The | |
840 | mapping is slightly different from serial.c because there | |
841 | is still the possibility of supporting 75 kbit/sec with | |
842 | the Cyclades board.) | |
843 | */ | |
44bafdf3 JS |
844 | if (i & CBAUDEX) { |
845 | if (i == B57600) | |
846 | i = 16; | |
847 | else if (i == B115200) | |
848 | i = 18; | |
1da177e4 | 849 | #ifdef B78600 |
44bafdf3 JS |
850 | else if (i == B78600) |
851 | i = 17; | |
1da177e4 | 852 | #endif |
44bafdf3 JS |
853 | else |
854 | info->tty->termios->c_cflag &= ~CBAUDEX; | |
855 | } | |
856 | #endif | |
857 | if (i == 15) { | |
858 | if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) | |
859 | i += 1; | |
860 | if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) | |
861 | i += 3; | |
862 | } | |
863 | /* Don't ever change the speed of the console port. It will | |
864 | * run at the speed specified in bootinfo, or at 19.2K */ | |
865 | /* Actually, it should run at whatever speed 166Bug was using */ | |
866 | /* Note info->timeout isn't used at present */ | |
867 | if (info != serial_console_info) { | |
868 | info->tbpr = baud_bpr[i]; /* Tx BPR */ | |
869 | info->tco = baud_co[i]; /* Tx CO */ | |
870 | info->rbpr = baud_bpr[i]; /* Rx BPR */ | |
871 | info->rco = baud_co[i] >> 5; /* Rx CO */ | |
872 | if (baud_table[i] == 134) { | |
873 | info->timeout = | |
874 | (info->xmit_fifo_size * HZ * 30 / 269) + 2; | |
875 | /* get it right for 134.5 baud */ | |
876 | } else if (baud_table[i]) { | |
877 | info->timeout = | |
878 | (info->xmit_fifo_size * HZ * 15 / baud_table[i]) + | |
879 | 2; | |
880 | /* this needs to be propagated into the card info */ | |
881 | } else { | |
882 | info->timeout = 0; | |
883 | } | |
884 | } | |
885 | /* By tradition (is it a standard?) a baud rate of zero | |
886 | implies the line should be/has been closed. A bit | |
887 | later in this routine such a test is performed. */ | |
888 | ||
889 | /* byte size and parity */ | |
890 | info->cor7 = 0; | |
891 | info->cor6 = 0; | |
892 | info->cor5 = 0; | |
893 | info->cor4 = (info->default_threshold ? info->default_threshold : baud_cor4[i]); /* receive threshold */ | |
894 | /* Following two lines added 101295, RGH. */ | |
895 | /* It is obviously wrong to access CyCORx, and not info->corx here, | |
896 | * try and remember to fix it later! */ | |
897 | channel = info->line; | |
898 | base_addr[CyCAR] = (u_char) channel; | |
899 | if (C_CLOCAL(info->tty)) { | |
900 | if (base_addr[CyIER] & CyMdmCh) | |
901 | base_addr[CyIER] &= ~CyMdmCh; /* without modem intr */ | |
902 | /* ignore 1->0 modem transitions */ | |
903 | if (base_addr[CyCOR4] & (CyDSR | CyCTS | CyDCD)) | |
904 | base_addr[CyCOR4] &= ~(CyDSR | CyCTS | CyDCD); | |
905 | /* ignore 0->1 modem transitions */ | |
906 | if (base_addr[CyCOR5] & (CyDSR | CyCTS | CyDCD)) | |
907 | base_addr[CyCOR5] &= ~(CyDSR | CyCTS | CyDCD); | |
1da177e4 | 908 | } else { |
44bafdf3 JS |
909 | if ((base_addr[CyIER] & CyMdmCh) != CyMdmCh) |
910 | base_addr[CyIER] |= CyMdmCh; /* with modem intr */ | |
911 | /* act on 1->0 modem transitions */ | |
912 | if ((base_addr[CyCOR4] & (CyDSR | CyCTS | CyDCD)) != | |
913 | (CyDSR | CyCTS | CyDCD)) | |
914 | base_addr[CyCOR4] |= CyDSR | CyCTS | CyDCD; | |
915 | /* act on 0->1 modem transitions */ | |
916 | if ((base_addr[CyCOR5] & (CyDSR | CyCTS | CyDCD)) != | |
917 | (CyDSR | CyCTS | CyDCD)) | |
918 | base_addr[CyCOR5] |= CyDSR | CyCTS | CyDCD; | |
919 | } | |
920 | info->cor3 = (cflag & CSTOPB) ? Cy_2_STOP : Cy_1_STOP; | |
921 | info->cor2 = CyETC; | |
922 | switch (cflag & CSIZE) { | |
923 | case CS5: | |
924 | info->cor1 = Cy_5_BITS; | |
925 | break; | |
926 | case CS6: | |
927 | info->cor1 = Cy_6_BITS; | |
928 | break; | |
929 | case CS7: | |
930 | info->cor1 = Cy_7_BITS; | |
931 | break; | |
932 | case CS8: | |
933 | info->cor1 = Cy_8_BITS; | |
934 | break; | |
935 | } | |
936 | if (cflag & PARENB) { | |
937 | if (cflag & PARODD) { | |
938 | info->cor1 |= CyPARITY_O; | |
939 | } else { | |
940 | info->cor1 |= CyPARITY_E; | |
941 | } | |
942 | } else { | |
943 | info->cor1 |= CyPARITY_NONE; | |
944 | } | |
945 | ||
946 | /* CTS flow control flag */ | |
1da177e4 | 947 | #if 0 |
44bafdf3 JS |
948 | /* Don't complcate matters for now! RGH 141095 */ |
949 | if (cflag & CRTSCTS) { | |
950 | info->flags |= ASYNC_CTS_FLOW; | |
951 | info->cor2 |= CyCtsAE; | |
952 | } else { | |
953 | info->flags &= ~ASYNC_CTS_FLOW; | |
954 | info->cor2 &= ~CyCtsAE; | |
955 | } | |
956 | #endif | |
957 | if (cflag & CLOCAL) | |
958 | info->flags &= ~ASYNC_CHECK_CD; | |
959 | else | |
960 | info->flags |= ASYNC_CHECK_CD; | |
1da177e4 LT |
961 | |
962 | /*********************************************** | |
963 | The hardware option, CyRtsAO, presents RTS when | |
964 | the chip has characters to send. Since most modems | |
965 | use RTS as reverse (inbound) flow control, this | |
966 | option is not used. If inbound flow control is | |
967 | necessary, DTR can be programmed to provide the | |
968 | appropriate signals for use with a non-standard | |
969 | cable. Contact Marcio Saito for details. | |
970 | ***********************************************/ | |
971 | ||
44bafdf3 | 972 | channel = info->line; |
1da177e4 | 973 | |
44bafdf3 JS |
974 | local_irq_save(flags); |
975 | base_addr[CyCAR] = (u_char) channel; | |
1da177e4 LT |
976 | |
977 | /* CyCMR set once only in mvme167_init_serial() */ | |
978 | if (base_addr[CyLICR] != channel << 2) | |
44bafdf3 | 979 | base_addr[CyLICR] = channel << 2; |
1da177e4 | 980 | if (base_addr[CyLIVR] != 0x5c) |
44bafdf3 | 981 | base_addr[CyLIVR] = 0x5c; |
1da177e4 | 982 | |
44bafdf3 | 983 | /* tx and rx baud rate */ |
1da177e4 LT |
984 | |
985 | if (base_addr[CyCOR1] != info->cor1) | |
44bafdf3 | 986 | need_init_chan = 1; |
1da177e4 | 987 | if (base_addr[CyTCOR] != info->tco) |
44bafdf3 | 988 | base_addr[CyTCOR] = info->tco; |
1da177e4 | 989 | if (base_addr[CyTBPR] != info->tbpr) |
44bafdf3 | 990 | base_addr[CyTBPR] = info->tbpr; |
1da177e4 | 991 | if (base_addr[CyRCOR] != info->rco) |
44bafdf3 | 992 | base_addr[CyRCOR] = info->rco; |
1da177e4 | 993 | if (base_addr[CyRBPR] != info->rbpr) |
44bafdf3 | 994 | base_addr[CyRBPR] = info->rbpr; |
1da177e4 LT |
995 | |
996 | /* set line characteristics according configuration */ | |
997 | ||
998 | if (base_addr[CySCHR1] != START_CHAR(info->tty)) | |
44bafdf3 | 999 | base_addr[CySCHR1] = START_CHAR(info->tty); |
1da177e4 | 1000 | if (base_addr[CySCHR2] != STOP_CHAR(info->tty)) |
44bafdf3 | 1001 | base_addr[CySCHR2] = STOP_CHAR(info->tty); |
1da177e4 | 1002 | if (base_addr[CySCRL] != START_CHAR(info->tty)) |
44bafdf3 | 1003 | base_addr[CySCRL] = START_CHAR(info->tty); |
1da177e4 | 1004 | if (base_addr[CySCRH] != START_CHAR(info->tty)) |
44bafdf3 | 1005 | base_addr[CySCRH] = START_CHAR(info->tty); |
1da177e4 | 1006 | if (base_addr[CyCOR1] != info->cor1) |
44bafdf3 | 1007 | base_addr[CyCOR1] = info->cor1; |
1da177e4 | 1008 | if (base_addr[CyCOR2] != info->cor2) |
44bafdf3 | 1009 | base_addr[CyCOR2] = info->cor2; |
1da177e4 | 1010 | if (base_addr[CyCOR3] != info->cor3) |
44bafdf3 | 1011 | base_addr[CyCOR3] = info->cor3; |
1da177e4 | 1012 | if (base_addr[CyCOR4] != info->cor4) |
44bafdf3 | 1013 | base_addr[CyCOR4] = info->cor4; |
1da177e4 | 1014 | if (base_addr[CyCOR5] != info->cor5) |
44bafdf3 | 1015 | base_addr[CyCOR5] = info->cor5; |
1da177e4 | 1016 | if (base_addr[CyCOR6] != info->cor6) |
44bafdf3 | 1017 | base_addr[CyCOR6] = info->cor6; |
1da177e4 | 1018 | if (base_addr[CyCOR7] != info->cor7) |
44bafdf3 | 1019 | base_addr[CyCOR7] = info->cor7; |
1da177e4 LT |
1020 | |
1021 | if (need_init_chan) | |
44bafdf3 | 1022 | write_cy_cmd(base_addr, CyINIT_CHAN); |
1da177e4 | 1023 | |
44bafdf3 | 1024 | base_addr[CyCAR] = (u_char) channel; /* !!! Is this needed? */ |
1da177e4 LT |
1025 | |
1026 | /* 2ms default rx timeout */ | |
1027 | ti = info->default_timeout ? info->default_timeout : 0x02; | |
1028 | if (base_addr[CyRTPRL] != ti) | |
44bafdf3 | 1029 | base_addr[CyRTPRL] = ti; |
1da177e4 | 1030 | if (base_addr[CyRTPRH] != 0) |
44bafdf3 | 1031 | base_addr[CyRTPRH] = 0; |
1da177e4 LT |
1032 | |
1033 | /* Set up RTS here also ????? RGH 141095 */ | |
44bafdf3 JS |
1034 | if (i == 0) { /* baud rate is zero, turn off line */ |
1035 | if ((base_addr[CyMSVR2] & CyDTR) == CyDTR) | |
1036 | base_addr[CyMSVR2] = 0; | |
1da177e4 | 1037 | #ifdef SERIAL_DEBUG_DTR |
44bafdf3 JS |
1038 | printk("cyc: %d: dropping DTR\n", __LINE__); |
1039 | printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], | |
1040 | base_addr[CyMSVR2]); | |
1da177e4 | 1041 | #endif |
44bafdf3 JS |
1042 | } else { |
1043 | if ((base_addr[CyMSVR2] & CyDTR) != CyDTR) | |
1044 | base_addr[CyMSVR2] = CyDTR; | |
1da177e4 | 1045 | #ifdef SERIAL_DEBUG_DTR |
44bafdf3 JS |
1046 | printk("cyc: %d: raising DTR\n", __LINE__); |
1047 | printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], | |
1048 | base_addr[CyMSVR2]); | |
1da177e4 LT |
1049 | #endif |
1050 | } | |
1051 | ||
44bafdf3 JS |
1052 | if (info->tty) { |
1053 | clear_bit(TTY_IO_ERROR, &info->tty->flags); | |
1da177e4 LT |
1054 | } |
1055 | ||
44bafdf3 | 1056 | local_irq_restore(flags); |
1da177e4 | 1057 | |
44bafdf3 | 1058 | } /* config_setup */ |
1da177e4 | 1059 | |
a5b08c66 | 1060 | static int cy_put_char(struct tty_struct *tty, unsigned char ch) |
1da177e4 | 1061 | { |
c9f19e96 | 1062 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 | 1063 | unsigned long flags; |
1da177e4 LT |
1064 | |
1065 | #ifdef SERIAL_DEBUG_IO | |
44bafdf3 | 1066 | printk("cy_put_char %s(0x%02x)\n", tty->name, ch); |
1da177e4 LT |
1067 | #endif |
1068 | ||
44bafdf3 | 1069 | if (serial_paranoia_check(info, tty->name, "cy_put_char")) |
a5b08c66 | 1070 | return 0; |
1da177e4 | 1071 | |
44bafdf3 | 1072 | if (!info->xmit_buf) |
63a59fa7 | 1073 | return 0; |
1da177e4 | 1074 | |
44bafdf3 | 1075 | local_irq_save(flags); |
1da177e4 | 1076 | if (info->xmit_cnt >= PAGE_SIZE - 1) { |
44bafdf3 | 1077 | local_irq_restore(flags); |
a5b08c66 | 1078 | return 0; |
1da177e4 LT |
1079 | } |
1080 | ||
1081 | info->xmit_buf[info->xmit_head++] = ch; | |
1082 | info->xmit_head &= PAGE_SIZE - 1; | |
1083 | info->xmit_cnt++; | |
44bafdf3 | 1084 | local_irq_restore(flags); |
a5b08c66 | 1085 | return 1; |
44bafdf3 | 1086 | } /* cy_put_char */ |
1da177e4 | 1087 | |
44bafdf3 | 1088 | static void cy_flush_chars(struct tty_struct *tty) |
1da177e4 | 1089 | { |
c9f19e96 | 1090 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1091 | unsigned long flags; |
1092 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
1093 | int channel; | |
1094 | ||
1da177e4 | 1095 | #ifdef SERIAL_DEBUG_IO |
44bafdf3 | 1096 | printk("cy_flush_chars %s\n", tty->name); /* */ |
1da177e4 LT |
1097 | #endif |
1098 | ||
44bafdf3 JS |
1099 | if (serial_paranoia_check(info, tty->name, "cy_flush_chars")) |
1100 | return; | |
1da177e4 | 1101 | |
44bafdf3 JS |
1102 | if (info->xmit_cnt <= 0 || tty->stopped |
1103 | || tty->hw_stopped || !info->xmit_buf) | |
1104 | return; | |
1da177e4 | 1105 | |
44bafdf3 | 1106 | channel = info->line; |
1da177e4 | 1107 | |
44bafdf3 | 1108 | local_irq_save(flags); |
1da177e4 LT |
1109 | base_addr[CyCAR] = channel; |
1110 | base_addr[CyIER] |= CyTxMpty; | |
44bafdf3 JS |
1111 | local_irq_restore(flags); |
1112 | } /* cy_flush_chars */ | |
1da177e4 LT |
1113 | |
1114 | /* This routine gets called when tty_write has put something into | |
1115 | the write_queue. If the port is not already transmitting stuff, | |
1116 | start it off by enabling interrupts. The interrupt service | |
1117 | routine will then ensure that the characters are sent. If the | |
1118 | port is already active, there is no need to kick it. | |
1119 | */ | |
44bafdf3 | 1120 | static int cy_write(struct tty_struct *tty, const unsigned char *buf, int count) |
1da177e4 | 1121 | { |
c9f19e96 | 1122 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1123 | unsigned long flags; |
1124 | int c, total = 0; | |
1da177e4 LT |
1125 | |
1126 | #ifdef SERIAL_DEBUG_IO | |
44bafdf3 | 1127 | printk("cy_write %s\n", tty->name); /* */ |
1da177e4 LT |
1128 | #endif |
1129 | ||
44bafdf3 JS |
1130 | if (serial_paranoia_check(info, tty->name, "cy_write")) { |
1131 | return 0; | |
1132 | } | |
1da177e4 | 1133 | |
44bafdf3 JS |
1134 | if (!info->xmit_buf) { |
1135 | return 0; | |
1136 | } | |
1da177e4 | 1137 | |
44bafdf3 JS |
1138 | while (1) { |
1139 | local_irq_save(flags); | |
1140 | c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, | |
1141 | SERIAL_XMIT_SIZE - info->xmit_head)); | |
1142 | if (c <= 0) { | |
1143 | local_irq_restore(flags); | |
1144 | break; | |
1145 | } | |
1146 | ||
1147 | memcpy(info->xmit_buf + info->xmit_head, buf, c); | |
1148 | info->xmit_head = | |
1149 | (info->xmit_head + c) & (SERIAL_XMIT_SIZE - 1); | |
1150 | info->xmit_cnt += c; | |
1151 | local_irq_restore(flags); | |
1152 | ||
1153 | buf += c; | |
1154 | count -= c; | |
1155 | total += c; | |
1156 | } | |
1157 | ||
1158 | if (info->xmit_cnt && !tty->stopped && !tty->hw_stopped) { | |
1159 | start_xmit(info); | |
1160 | } | |
1161 | return total; | |
1162 | } /* cy_write */ | |
1163 | ||
1164 | static int cy_write_room(struct tty_struct *tty) | |
1da177e4 | 1165 | { |
c9f19e96 | 1166 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1167 | int ret; |
1168 | ||
1da177e4 | 1169 | #ifdef SERIAL_DEBUG_IO |
44bafdf3 | 1170 | printk("cy_write_room %s\n", tty->name); /* */ |
1da177e4 LT |
1171 | #endif |
1172 | ||
44bafdf3 JS |
1173 | if (serial_paranoia_check(info, tty->name, "cy_write_room")) |
1174 | return 0; | |
1175 | ret = PAGE_SIZE - info->xmit_cnt - 1; | |
1176 | if (ret < 0) | |
1177 | ret = 0; | |
1178 | return ret; | |
1179 | } /* cy_write_room */ | |
1da177e4 | 1180 | |
44bafdf3 | 1181 | static int cy_chars_in_buffer(struct tty_struct *tty) |
1da177e4 | 1182 | { |
c9f19e96 | 1183 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 | 1184 | |
1da177e4 | 1185 | #ifdef SERIAL_DEBUG_IO |
44bafdf3 | 1186 | printk("cy_chars_in_buffer %s %d\n", tty->name, info->xmit_cnt); /* */ |
1da177e4 LT |
1187 | #endif |
1188 | ||
44bafdf3 JS |
1189 | if (serial_paranoia_check(info, tty->name, "cy_chars_in_buffer")) |
1190 | return 0; | |
1da177e4 | 1191 | |
44bafdf3 JS |
1192 | return info->xmit_cnt; |
1193 | } /* cy_chars_in_buffer */ | |
1da177e4 | 1194 | |
44bafdf3 | 1195 | static void cy_flush_buffer(struct tty_struct *tty) |
1da177e4 | 1196 | { |
c9f19e96 | 1197 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1198 | unsigned long flags; |
1199 | ||
1da177e4 | 1200 | #ifdef SERIAL_DEBUG_IO |
44bafdf3 | 1201 | printk("cy_flush_buffer %s\n", tty->name); /* */ |
1da177e4 LT |
1202 | #endif |
1203 | ||
44bafdf3 JS |
1204 | if (serial_paranoia_check(info, tty->name, "cy_flush_buffer")) |
1205 | return; | |
1206 | local_irq_save(flags); | |
1da177e4 | 1207 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
44bafdf3 JS |
1208 | local_irq_restore(flags); |
1209 | tty_wakeup(tty); | |
1210 | } /* cy_flush_buffer */ | |
1da177e4 LT |
1211 | |
1212 | /* This routine is called by the upper-layer tty layer to signal | |
1213 | that incoming characters should be throttled or that the | |
1214 | throttle should be released. | |
1215 | */ | |
44bafdf3 | 1216 | static void cy_throttle(struct tty_struct *tty) |
1da177e4 | 1217 | { |
c9f19e96 | 1218 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1219 | unsigned long flags; |
1220 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
1221 | int channel; | |
1da177e4 LT |
1222 | |
1223 | #ifdef SERIAL_DEBUG_THROTTLE | |
44bafdf3 JS |
1224 | char buf[64]; |
1225 | ||
1226 | printk("throttle %s: %d....\n", tty_name(tty, buf), | |
1227 | tty->ldisc.chars_in_buffer(tty)); | |
1228 | printk("cy_throttle %s\n", tty->name); | |
1da177e4 LT |
1229 | #endif |
1230 | ||
44bafdf3 JS |
1231 | if (serial_paranoia_check(info, tty->name, "cy_nthrottle")) { |
1232 | return; | |
1233 | } | |
1da177e4 | 1234 | |
44bafdf3 JS |
1235 | if (I_IXOFF(tty)) { |
1236 | info->x_char = STOP_CHAR(tty); | |
1237 | /* Should use the "Send Special Character" feature!!! */ | |
1238 | } | |
1da177e4 | 1239 | |
44bafdf3 | 1240 | channel = info->line; |
1da177e4 | 1241 | |
44bafdf3 JS |
1242 | local_irq_save(flags); |
1243 | base_addr[CyCAR] = (u_char) channel; | |
1da177e4 | 1244 | base_addr[CyMSVR1] = 0; |
44bafdf3 JS |
1245 | local_irq_restore(flags); |
1246 | } /* cy_throttle */ | |
1da177e4 | 1247 | |
44bafdf3 | 1248 | static void cy_unthrottle(struct tty_struct *tty) |
1da177e4 | 1249 | { |
c9f19e96 | 1250 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1251 | unsigned long flags; |
1252 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
1253 | int channel; | |
1da177e4 LT |
1254 | |
1255 | #ifdef SERIAL_DEBUG_THROTTLE | |
44bafdf3 JS |
1256 | char buf[64]; |
1257 | ||
1258 | printk("throttle %s: %d....\n", tty_name(tty, buf), | |
1259 | tty->ldisc.chars_in_buffer(tty)); | |
1260 | printk("cy_unthrottle %s\n", tty->name); | |
1da177e4 LT |
1261 | #endif |
1262 | ||
44bafdf3 JS |
1263 | if (serial_paranoia_check(info, tty->name, "cy_nthrottle")) { |
1264 | return; | |
1265 | } | |
1da177e4 | 1266 | |
44bafdf3 JS |
1267 | if (I_IXOFF(tty)) { |
1268 | info->x_char = START_CHAR(tty); | |
1269 | /* Should use the "Send Special Character" feature!!! */ | |
1270 | } | |
1da177e4 | 1271 | |
44bafdf3 | 1272 | channel = info->line; |
1da177e4 | 1273 | |
44bafdf3 JS |
1274 | local_irq_save(flags); |
1275 | base_addr[CyCAR] = (u_char) channel; | |
1da177e4 | 1276 | base_addr[CyMSVR1] = CyRTS; |
44bafdf3 JS |
1277 | local_irq_restore(flags); |
1278 | } /* cy_unthrottle */ | |
1da177e4 LT |
1279 | |
1280 | static int | |
44bafdf3 JS |
1281 | get_serial_info(struct cyclades_port *info, |
1282 | struct serial_struct __user * retinfo) | |
1da177e4 | 1283 | { |
44bafdf3 | 1284 | struct serial_struct tmp; |
1da177e4 LT |
1285 | |
1286 | /* CP('g'); */ | |
44bafdf3 JS |
1287 | if (!retinfo) |
1288 | return -EFAULT; | |
1289 | memset(&tmp, 0, sizeof(tmp)); | |
1290 | tmp.type = info->type; | |
1291 | tmp.line = info->line; | |
1292 | tmp.port = info->line; | |
1293 | tmp.irq = 0; | |
1294 | tmp.flags = info->flags; | |
1295 | tmp.baud_base = 0; /*!!! */ | |
1296 | tmp.close_delay = info->close_delay; | |
1297 | tmp.custom_divisor = 0; /*!!! */ | |
1298 | tmp.hub6 = 0; /*!!! */ | |
1299 | return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0; | |
1300 | } /* get_serial_info */ | |
1da177e4 LT |
1301 | |
1302 | static int | |
44bafdf3 JS |
1303 | set_serial_info(struct cyclades_port *info, |
1304 | struct serial_struct __user * new_info) | |
1da177e4 | 1305 | { |
44bafdf3 JS |
1306 | struct serial_struct new_serial; |
1307 | struct cyclades_port old_info; | |
1da177e4 LT |
1308 | |
1309 | /* CP('s'); */ | |
44bafdf3 JS |
1310 | if (!new_info) |
1311 | return -EFAULT; | |
1312 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) | |
1313 | return -EFAULT; | |
1314 | old_info = *info; | |
1315 | ||
1316 | if (!capable(CAP_SYS_ADMIN)) { | |
1317 | if ((new_serial.close_delay != info->close_delay) || | |
1318 | ((new_serial.flags & ASYNC_FLAGS & ~ASYNC_USR_MASK) != | |
1319 | (info->flags & ASYNC_FLAGS & ~ASYNC_USR_MASK))) | |
1320 | return -EPERM; | |
1321 | info->flags = ((info->flags & ~ASYNC_USR_MASK) | | |
1322 | (new_serial.flags & ASYNC_USR_MASK)); | |
1323 | goto check_and_exit; | |
1324 | } | |
1da177e4 | 1325 | |
44bafdf3 JS |
1326 | /* |
1327 | * OK, past this point, all the error checking has been done. | |
1328 | * At this point, we start making changes..... | |
1329 | */ | |
1da177e4 | 1330 | |
44bafdf3 JS |
1331 | info->flags = ((info->flags & ~ASYNC_FLAGS) | |
1332 | (new_serial.flags & ASYNC_FLAGS)); | |
1333 | info->close_delay = new_serial.close_delay; | |
1da177e4 | 1334 | |
44bafdf3 JS |
1335 | check_and_exit: |
1336 | if (info->flags & ASYNC_INITIALIZED) { | |
1337 | config_setup(info); | |
1338 | return 0; | |
1339 | } | |
1340 | return startup(info); | |
1341 | } /* set_serial_info */ | |
1da177e4 | 1342 | |
44bafdf3 JS |
1343 | static int cy_tiocmget(struct tty_struct *tty, struct file *file) |
1344 | { | |
c9f19e96 | 1345 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1346 | int channel; |
1347 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
1348 | unsigned long flags; | |
1349 | unsigned char status; | |
1da177e4 | 1350 | |
44bafdf3 | 1351 | channel = info->line; |
1da177e4 | 1352 | |
44bafdf3 JS |
1353 | local_irq_save(flags); |
1354 | base_addr[CyCAR] = (u_char) channel; | |
1355 | status = base_addr[CyMSVR1] | base_addr[CyMSVR2]; | |
1356 | local_irq_restore(flags); | |
1da177e4 | 1357 | |
44bafdf3 JS |
1358 | return ((status & CyRTS) ? TIOCM_RTS : 0) |
1359 | | ((status & CyDTR) ? TIOCM_DTR : 0) | |
1360 | | ((status & CyDCD) ? TIOCM_CAR : 0) | |
1361 | | ((status & CyDSR) ? TIOCM_DSR : 0) | |
1362 | | ((status & CyCTS) ? TIOCM_CTS : 0); | |
1363 | } /* cy_tiocmget */ | |
1da177e4 LT |
1364 | |
1365 | static int | |
1366 | cy_tiocmset(struct tty_struct *tty, struct file *file, | |
1367 | unsigned int set, unsigned int clear) | |
1368 | { | |
c9f19e96 | 1369 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1370 | int channel; |
1371 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
1372 | unsigned long flags; | |
1373 | ||
1374 | channel = info->line; | |
1375 | ||
1376 | if (set & TIOCM_RTS) { | |
1377 | local_irq_save(flags); | |
1378 | base_addr[CyCAR] = (u_char) channel; | |
1da177e4 | 1379 | base_addr[CyMSVR1] = CyRTS; |
44bafdf3 | 1380 | local_irq_restore(flags); |
1da177e4 | 1381 | } |
44bafdf3 JS |
1382 | if (set & TIOCM_DTR) { |
1383 | local_irq_save(flags); | |
1384 | base_addr[CyCAR] = (u_char) channel; | |
1da177e4 | 1385 | /* CP('S');CP('2'); */ |
44bafdf3 | 1386 | base_addr[CyMSVR2] = CyDTR; |
1da177e4 | 1387 | #ifdef SERIAL_DEBUG_DTR |
44bafdf3 JS |
1388 | printk("cyc: %d: raising DTR\n", __LINE__); |
1389 | printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], | |
1390 | base_addr[CyMSVR2]); | |
1da177e4 | 1391 | #endif |
44bafdf3 | 1392 | local_irq_restore(flags); |
1da177e4 LT |
1393 | } |
1394 | ||
44bafdf3 JS |
1395 | if (clear & TIOCM_RTS) { |
1396 | local_irq_save(flags); | |
1397 | base_addr[CyCAR] = (u_char) channel; | |
1da177e4 | 1398 | base_addr[CyMSVR1] = 0; |
44bafdf3 | 1399 | local_irq_restore(flags); |
1da177e4 | 1400 | } |
44bafdf3 JS |
1401 | if (clear & TIOCM_DTR) { |
1402 | local_irq_save(flags); | |
1403 | base_addr[CyCAR] = (u_char) channel; | |
1da177e4 | 1404 | /* CP('C');CP('2'); */ |
44bafdf3 | 1405 | base_addr[CyMSVR2] = 0; |
1da177e4 | 1406 | #ifdef SERIAL_DEBUG_DTR |
44bafdf3 JS |
1407 | printk("cyc: %d: dropping DTR\n", __LINE__); |
1408 | printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], | |
1409 | base_addr[CyMSVR2]); | |
1da177e4 | 1410 | #endif |
44bafdf3 | 1411 | local_irq_restore(flags); |
1da177e4 LT |
1412 | } |
1413 | ||
44bafdf3 JS |
1414 | return 0; |
1415 | } /* set_modem_info */ | |
1416 | ||
1417 | static void send_break(struct cyclades_port *info, int duration) | |
1418 | { /* Let the transmit ISR take care of this (since it | |
1419 | requires stuffing characters into the output stream). | |
1420 | */ | |
1421 | info->x_break = duration; | |
1422 | if (!info->xmit_cnt) { | |
1423 | start_xmit(info); | |
1424 | } | |
1425 | } /* send_break */ | |
1da177e4 LT |
1426 | |
1427 | static int | |
44bafdf3 | 1428 | get_mon_info(struct cyclades_port *info, struct cyclades_monitor __user * mon) |
1da177e4 LT |
1429 | { |
1430 | ||
44bafdf3 JS |
1431 | if (copy_to_user(mon, &info->mon, sizeof(struct cyclades_monitor))) |
1432 | return -EFAULT; | |
1433 | info->mon.int_count = 0; | |
1434 | info->mon.char_count = 0; | |
1435 | info->mon.char_max = 0; | |
1436 | info->mon.char_last = 0; | |
1437 | return 0; | |
1da177e4 LT |
1438 | } |
1439 | ||
44bafdf3 | 1440 | static int set_threshold(struct cyclades_port *info, unsigned long __user * arg) |
1da177e4 | 1441 | { |
44bafdf3 JS |
1442 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
1443 | unsigned long value; | |
1444 | int channel; | |
1445 | ||
1446 | if (get_user(value, arg)) | |
1447 | return -EFAULT; | |
1448 | ||
1449 | channel = info->line; | |
1450 | info->cor4 &= ~CyREC_FIFO; | |
1451 | info->cor4 |= value & CyREC_FIFO; | |
1452 | base_addr[CyCOR4] = info->cor4; | |
1453 | return 0; | |
1da177e4 LT |
1454 | } |
1455 | ||
1456 | static int | |
44bafdf3 | 1457 | get_threshold(struct cyclades_port *info, unsigned long __user * value) |
1da177e4 | 1458 | { |
44bafdf3 JS |
1459 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
1460 | int channel; | |
1461 | unsigned long tmp; | |
1462 | ||
1463 | channel = info->line; | |
1464 | ||
1465 | tmp = base_addr[CyCOR4] & CyREC_FIFO; | |
1466 | return put_user(tmp, value); | |
1da177e4 LT |
1467 | } |
1468 | ||
1469 | static int | |
44bafdf3 | 1470 | set_default_threshold(struct cyclades_port *info, unsigned long __user * arg) |
1da177e4 | 1471 | { |
44bafdf3 | 1472 | unsigned long value; |
1da177e4 | 1473 | |
44bafdf3 JS |
1474 | if (get_user(value, arg)) |
1475 | return -EFAULT; | |
1da177e4 | 1476 | |
44bafdf3 JS |
1477 | info->default_threshold = value & 0x0f; |
1478 | return 0; | |
1da177e4 LT |
1479 | } |
1480 | ||
1481 | static int | |
44bafdf3 | 1482 | get_default_threshold(struct cyclades_port *info, unsigned long __user * value) |
1da177e4 | 1483 | { |
44bafdf3 | 1484 | return put_user(info->default_threshold, value); |
1da177e4 LT |
1485 | } |
1486 | ||
44bafdf3 | 1487 | static int set_timeout(struct cyclades_port *info, unsigned long __user * arg) |
1da177e4 | 1488 | { |
44bafdf3 JS |
1489 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
1490 | int channel; | |
1491 | unsigned long value; | |
1492 | ||
1493 | if (get_user(value, arg)) | |
1494 | return -EFAULT; | |
1495 | ||
1496 | channel = info->line; | |
1497 | ||
1498 | base_addr[CyRTPRL] = value & 0xff; | |
1499 | base_addr[CyRTPRH] = (value >> 8) & 0xff; | |
1500 | return 0; | |
1da177e4 LT |
1501 | } |
1502 | ||
44bafdf3 | 1503 | static int get_timeout(struct cyclades_port *info, unsigned long __user * value) |
1da177e4 | 1504 | { |
44bafdf3 JS |
1505 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
1506 | int channel; | |
1507 | unsigned long tmp; | |
1508 | ||
1509 | channel = info->line; | |
1510 | ||
1511 | tmp = base_addr[CyRTPRL]; | |
1512 | return put_user(tmp, value); | |
1da177e4 LT |
1513 | } |
1514 | ||
44bafdf3 | 1515 | static int set_default_timeout(struct cyclades_port *info, unsigned long value) |
1da177e4 | 1516 | { |
44bafdf3 JS |
1517 | info->default_timeout = value & 0xff; |
1518 | return 0; | |
1da177e4 LT |
1519 | } |
1520 | ||
1521 | static int | |
44bafdf3 | 1522 | get_default_timeout(struct cyclades_port *info, unsigned long __user * value) |
1da177e4 | 1523 | { |
44bafdf3 | 1524 | return put_user(info->default_timeout, value); |
1da177e4 LT |
1525 | } |
1526 | ||
1527 | static int | |
44bafdf3 JS |
1528 | cy_ioctl(struct tty_struct *tty, struct file *file, |
1529 | unsigned int cmd, unsigned long arg) | |
1da177e4 | 1530 | { |
44bafdf3 | 1531 | unsigned long val; |
c9f19e96 | 1532 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 JS |
1533 | int ret_val = 0; |
1534 | void __user *argp = (void __user *)arg; | |
1da177e4 LT |
1535 | |
1536 | #ifdef SERIAL_DEBUG_OTHER | |
44bafdf3 JS |
1537 | printk("cy_ioctl %s, cmd = %x arg = %lx\n", tty->name, cmd, arg); /* */ |
1538 | #endif | |
1539 | ||
638157bc AC |
1540 | lock_kernel(); |
1541 | ||
44bafdf3 JS |
1542 | switch (cmd) { |
1543 | case CYGETMON: | |
1544 | ret_val = get_mon_info(info, argp); | |
1545 | break; | |
1546 | case CYGETTHRESH: | |
1547 | ret_val = get_threshold(info, argp); | |
1548 | break; | |
1549 | case CYSETTHRESH: | |
1550 | ret_val = set_threshold(info, argp); | |
1551 | break; | |
1552 | case CYGETDEFTHRESH: | |
1553 | ret_val = get_default_threshold(info, argp); | |
1554 | break; | |
1555 | case CYSETDEFTHRESH: | |
1556 | ret_val = set_default_threshold(info, argp); | |
1557 | break; | |
1558 | case CYGETTIMEOUT: | |
1559 | ret_val = get_timeout(info, argp); | |
1560 | break; | |
1561 | case CYSETTIMEOUT: | |
1562 | ret_val = set_timeout(info, argp); | |
1563 | break; | |
1564 | case CYGETDEFTIMEOUT: | |
1565 | ret_val = get_default_timeout(info, argp); | |
1566 | break; | |
1567 | case CYSETDEFTIMEOUT: | |
1568 | ret_val = set_default_timeout(info, (unsigned long)arg); | |
1569 | break; | |
1570 | case TCSBRK: /* SVID version: non-zero arg --> no break */ | |
1571 | ret_val = tty_check_change(tty); | |
1572 | if (ret_val) | |
1573 | break; | |
1574 | tty_wait_until_sent(tty, 0); | |
1575 | if (!arg) | |
1576 | send_break(info, HZ / 4); /* 1/4 second */ | |
1577 | break; | |
1578 | case TCSBRKP: /* support for POSIX tcsendbreak() */ | |
1579 | ret_val = tty_check_change(tty); | |
1580 | if (ret_val) | |
1581 | break; | |
1582 | tty_wait_until_sent(tty, 0); | |
1583 | send_break(info, arg ? arg * (HZ / 10) : HZ / 4); | |
1da177e4 | 1584 | break; |
1da177e4 LT |
1585 | |
1586 | /* The following commands are incompletely implemented!!! */ | |
44bafdf3 JS |
1587 | case TIOCGSERIAL: |
1588 | ret_val = get_serial_info(info, argp); | |
1589 | break; | |
1590 | case TIOCSSERIAL: | |
1591 | ret_val = set_serial_info(info, argp); | |
1592 | break; | |
1593 | default: | |
1594 | ret_val = -ENOIOCTLCMD; | |
1595 | } | |
638157bc | 1596 | unlock_kernel(); |
1da177e4 LT |
1597 | |
1598 | #ifdef SERIAL_DEBUG_OTHER | |
44bafdf3 | 1599 | printk("cy_ioctl done\n"); |
1da177e4 LT |
1600 | #endif |
1601 | ||
44bafdf3 JS |
1602 | return ret_val; |
1603 | } /* cy_ioctl */ | |
1da177e4 | 1604 | |
44bafdf3 | 1605 | static void cy_set_termios(struct tty_struct *tty, struct ktermios *old_termios) |
1da177e4 | 1606 | { |
c9f19e96 | 1607 | struct cyclades_port *info = tty->driver_data; |
1da177e4 LT |
1608 | |
1609 | #ifdef SERIAL_DEBUG_OTHER | |
44bafdf3 | 1610 | printk("cy_set_termios %s\n", tty->name); |
1da177e4 LT |
1611 | #endif |
1612 | ||
44bafdf3 JS |
1613 | if (tty->termios->c_cflag == old_termios->c_cflag) |
1614 | return; | |
1615 | config_setup(info); | |
1da177e4 | 1616 | |
44bafdf3 JS |
1617 | if ((old_termios->c_cflag & CRTSCTS) && |
1618 | !(tty->termios->c_cflag & CRTSCTS)) { | |
1619 | tty->stopped = 0; | |
1620 | cy_start(tty); | |
1621 | } | |
1da177e4 | 1622 | #ifdef tytso_patch_94Nov25_1726 |
44bafdf3 JS |
1623 | if (!(old_termios->c_cflag & CLOCAL) && |
1624 | (tty->termios->c_cflag & CLOCAL)) | |
1625 | wake_up_interruptible(&info->open_wait); | |
1da177e4 | 1626 | #endif |
44bafdf3 | 1627 | } /* cy_set_termios */ |
1da177e4 | 1628 | |
44bafdf3 | 1629 | static void cy_close(struct tty_struct *tty, struct file *filp) |
1da177e4 | 1630 | { |
c9f19e96 | 1631 | struct cyclades_port *info = tty->driver_data; |
1da177e4 LT |
1632 | |
1633 | /* CP('C'); */ | |
1634 | #ifdef SERIAL_DEBUG_OTHER | |
44bafdf3 | 1635 | printk("cy_close %s\n", tty->name); |
1da177e4 LT |
1636 | #endif |
1637 | ||
44bafdf3 JS |
1638 | if (!info || serial_paranoia_check(info, tty->name, "cy_close")) { |
1639 | return; | |
1640 | } | |
1da177e4 | 1641 | #ifdef SERIAL_DEBUG_OPEN |
44bafdf3 JS |
1642 | printk("cy_close %s, count = %d\n", tty->name, info->count); |
1643 | #endif | |
1644 | ||
1645 | if ((tty->count == 1) && (info->count != 1)) { | |
1646 | /* | |
1647 | * Uh, oh. tty->count is 1, which means that the tty | |
1648 | * structure will be freed. Info->count should always | |
1649 | * be one in these conditions. If it's greater than | |
1650 | * one, we've got real problems, since it means the | |
1651 | * serial port won't be shutdown. | |
1652 | */ | |
1653 | printk("cy_close: bad serial port count; tty->count is 1, " | |
1654 | "info->count is %d\n", info->count); | |
1655 | info->count = 1; | |
1656 | } | |
1da177e4 | 1657 | #ifdef SERIAL_DEBUG_COUNT |
44bafdf3 JS |
1658 | printk("cyc: %d: decrementing count to %d\n", __LINE__, |
1659 | info->count - 1); | |
1da177e4 | 1660 | #endif |
44bafdf3 JS |
1661 | if (--info->count < 0) { |
1662 | printk("cy_close: bad serial port count for ttys%d: %d\n", | |
1663 | info->line, info->count); | |
1da177e4 | 1664 | #ifdef SERIAL_DEBUG_COUNT |
44bafdf3 | 1665 | printk("cyc: %d: setting count to 0\n", __LINE__); |
1da177e4 | 1666 | #endif |
44bafdf3 | 1667 | info->count = 0; |
1da177e4 | 1668 | } |
44bafdf3 JS |
1669 | if (info->count) |
1670 | return; | |
1671 | info->flags |= ASYNC_CLOSING; | |
1672 | if (info->flags & ASYNC_INITIALIZED) | |
1673 | tty_wait_until_sent(tty, 3000); /* 30 seconds timeout */ | |
1674 | shutdown(info); | |
978e595f | 1675 | cy_flush_buffer(tty); |
44bafdf3 | 1676 | tty_ldisc_flush(tty); |
44bafdf3 JS |
1677 | info->tty = NULL; |
1678 | if (info->blocked_open) { | |
1679 | if (info->close_delay) { | |
1680 | msleep_interruptible(jiffies_to_msecs | |
1681 | (info->close_delay)); | |
1682 | } | |
1683 | wake_up_interruptible(&info->open_wait); | |
1684 | } | |
1685 | info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); | |
1686 | wake_up_interruptible(&info->close_wait); | |
1da177e4 LT |
1687 | |
1688 | #ifdef SERIAL_DEBUG_OTHER | |
44bafdf3 | 1689 | printk("cy_close done\n"); |
1da177e4 | 1690 | #endif |
44bafdf3 | 1691 | } /* cy_close */ |
1da177e4 LT |
1692 | |
1693 | /* | |
1694 | * cy_hangup() --- called by tty_hangup() when a hangup is signaled. | |
1695 | */ | |
44bafdf3 | 1696 | void cy_hangup(struct tty_struct *tty) |
1da177e4 | 1697 | { |
c9f19e96 | 1698 | struct cyclades_port *info = tty->driver_data; |
44bafdf3 | 1699 | |
1da177e4 | 1700 | #ifdef SERIAL_DEBUG_OTHER |
44bafdf3 | 1701 | printk("cy_hangup %s\n", tty->name); /* */ |
1da177e4 LT |
1702 | #endif |
1703 | ||
44bafdf3 JS |
1704 | if (serial_paranoia_check(info, tty->name, "cy_hangup")) |
1705 | return; | |
1706 | ||
1707 | shutdown(info); | |
1da177e4 | 1708 | #if 0 |
44bafdf3 JS |
1709 | info->event = 0; |
1710 | info->count = 0; | |
1da177e4 | 1711 | #ifdef SERIAL_DEBUG_COUNT |
44bafdf3 | 1712 | printk("cyc: %d: setting count to 0\n", __LINE__); |
1da177e4 | 1713 | #endif |
44bafdf3 | 1714 | info->tty = 0; |
1da177e4 | 1715 | #endif |
44bafdf3 JS |
1716 | info->flags &= ~ASYNC_NORMAL_ACTIVE; |
1717 | wake_up_interruptible(&info->open_wait); | |
1718 | } /* cy_hangup */ | |
1da177e4 LT |
1719 | |
1720 | /* | |
1721 | * ------------------------------------------------------------ | |
1722 | * cy_open() and friends | |
1723 | * ------------------------------------------------------------ | |
1724 | */ | |
1725 | ||
1726 | static int | |
44bafdf3 JS |
1727 | block_til_ready(struct tty_struct *tty, struct file *filp, |
1728 | struct cyclades_port *info) | |
1da177e4 | 1729 | { |
44bafdf3 JS |
1730 | DECLARE_WAITQUEUE(wait, current); |
1731 | unsigned long flags; | |
1732 | int channel; | |
1733 | int retval; | |
1734 | volatile u_char *base_addr = (u_char *) BASE_ADDR; | |
1735 | ||
1736 | /* | |
1737 | * If the device is in the middle of being closed, then block | |
1738 | * until it's done, and then try again. | |
1739 | */ | |
1740 | if (info->flags & ASYNC_CLOSING) { | |
1741 | interruptible_sleep_on(&info->close_wait); | |
1742 | if (info->flags & ASYNC_HUP_NOTIFY) { | |
1743 | return -EAGAIN; | |
1744 | } else { | |
1745 | return -ERESTARTSYS; | |
1746 | } | |
1747 | } | |
1748 | ||
1749 | /* | |
1750 | * If non-blocking mode is set, then make the check up front | |
1751 | * and then exit. | |
1752 | */ | |
1753 | if (filp->f_flags & O_NONBLOCK) { | |
1754 | info->flags |= ASYNC_NORMAL_ACTIVE; | |
1755 | return 0; | |
1756 | } | |
1757 | ||
1758 | /* | |
1759 | * Block waiting for the carrier detect and the line to become | |
1760 | * free (i.e., not in use by the callout). While we are in | |
1761 | * this loop, info->count is dropped by one, so that | |
1762 | * cy_close() knows when to free things. We restore it upon | |
1763 | * exit, either normal or abnormal. | |
1764 | */ | |
1765 | retval = 0; | |
1766 | add_wait_queue(&info->open_wait, &wait); | |
1da177e4 | 1767 | #ifdef SERIAL_DEBUG_OPEN |
44bafdf3 JS |
1768 | printk("block_til_ready before block: %s, count = %d\n", |
1769 | tty->name, info->count); | |
1770 | /**/ | |
1da177e4 | 1771 | #endif |
44bafdf3 | 1772 | info->count--; |
1da177e4 | 1773 | #ifdef SERIAL_DEBUG_COUNT |
44bafdf3 | 1774 | printk("cyc: %d: decrementing count to %d\n", __LINE__, info->count); |
1da177e4 | 1775 | #endif |
44bafdf3 | 1776 | info->blocked_open++; |
1da177e4 | 1777 | |
44bafdf3 | 1778 | channel = info->line; |
1da177e4 | 1779 | |
44bafdf3 JS |
1780 | while (1) { |
1781 | local_irq_save(flags); | |
1782 | base_addr[CyCAR] = (u_char) channel; | |
1783 | base_addr[CyMSVR1] = CyRTS; | |
1da177e4 | 1784 | /* CP('S');CP('4'); */ |
44bafdf3 | 1785 | base_addr[CyMSVR2] = CyDTR; |
1da177e4 | 1786 | #ifdef SERIAL_DEBUG_DTR |
44bafdf3 JS |
1787 | printk("cyc: %d: raising DTR\n", __LINE__); |
1788 | printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1], | |
1789 | base_addr[CyMSVR2]); | |
1790 | #endif | |
1791 | local_irq_restore(flags); | |
1792 | set_current_state(TASK_INTERRUPTIBLE); | |
1793 | if (tty_hung_up_p(filp) | |
1794 | || !(info->flags & ASYNC_INITIALIZED)) { | |
1795 | if (info->flags & ASYNC_HUP_NOTIFY) { | |
1796 | retval = -EAGAIN; | |
1797 | } else { | |
1798 | retval = -ERESTARTSYS; | |
1799 | } | |
1800 | break; | |
1801 | } | |
1802 | local_irq_save(flags); | |
1803 | base_addr[CyCAR] = (u_char) channel; | |
1da177e4 | 1804 | /* CP('L');CP1(1 && C_CLOCAL(tty)); CP1(1 && (base_addr[CyMSVR1] & CyDCD) ); */ |
44bafdf3 JS |
1805 | if (!(info->flags & ASYNC_CLOSING) |
1806 | && (C_CLOCAL(tty) | |
1807 | || (base_addr[CyMSVR1] & CyDCD))) { | |
1808 | local_irq_restore(flags); | |
1809 | break; | |
1810 | } | |
1811 | local_irq_restore(flags); | |
1812 | if (signal_pending(current)) { | |
1813 | retval = -ERESTARTSYS; | |
1814 | break; | |
1815 | } | |
1da177e4 | 1816 | #ifdef SERIAL_DEBUG_OPEN |
44bafdf3 JS |
1817 | printk("block_til_ready blocking: %s, count = %d\n", |
1818 | tty->name, info->count); | |
1819 | /**/ | |
1820 | #endif | |
1821 | schedule(); | |
1822 | } | |
cc0a8fbb | 1823 | __set_current_state(TASK_RUNNING); |
44bafdf3 JS |
1824 | remove_wait_queue(&info->open_wait, &wait); |
1825 | if (!tty_hung_up_p(filp)) { | |
1826 | info->count++; | |
1da177e4 | 1827 | #ifdef SERIAL_DEBUG_COUNT |
44bafdf3 JS |
1828 | printk("cyc: %d: incrementing count to %d\n", __LINE__, |
1829 | info->count); | |
1da177e4 | 1830 | #endif |
44bafdf3 JS |
1831 | } |
1832 | info->blocked_open--; | |
1da177e4 | 1833 | #ifdef SERIAL_DEBUG_OPEN |
44bafdf3 JS |
1834 | printk("block_til_ready after blocking: %s, count = %d\n", |
1835 | tty->name, info->count); | |
1836 | /**/ | |
1da177e4 | 1837 | #endif |
44bafdf3 JS |
1838 | if (retval) |
1839 | return retval; | |
1840 | info->flags |= ASYNC_NORMAL_ACTIVE; | |
1841 | return 0; | |
1842 | } /* block_til_ready */ | |
1da177e4 LT |
1843 | |
1844 | /* | |
1845 | * This routine is called whenever a serial port is opened. It | |
1846 | * performs the serial-specific initialization for the tty structure. | |
1847 | */ | |
44bafdf3 | 1848 | int cy_open(struct tty_struct *tty, struct file *filp) |
1da177e4 | 1849 | { |
44bafdf3 JS |
1850 | struct cyclades_port *info; |
1851 | int retval, line; | |
1da177e4 LT |
1852 | |
1853 | /* CP('O'); */ | |
44bafdf3 JS |
1854 | line = tty->index; |
1855 | if ((line < 0) || (NR_PORTS <= line)) { | |
1856 | return -ENODEV; | |
1857 | } | |
1858 | info = &cy_port[line]; | |
1859 | if (info->line < 0) { | |
1860 | return -ENODEV; | |
1861 | } | |
1da177e4 | 1862 | #ifdef SERIAL_DEBUG_OTHER |
44bafdf3 | 1863 | printk("cy_open %s\n", tty->name); /* */ |
1da177e4 | 1864 | #endif |
44bafdf3 JS |
1865 | if (serial_paranoia_check(info, tty->name, "cy_open")) { |
1866 | return -ENODEV; | |
1867 | } | |
1da177e4 | 1868 | #ifdef SERIAL_DEBUG_OPEN |
44bafdf3 JS |
1869 | printk("cy_open %s, count = %d\n", tty->name, info->count); |
1870 | /**/ | |
1da177e4 | 1871 | #endif |
44bafdf3 | 1872 | info->count++; |
1da177e4 | 1873 | #ifdef SERIAL_DEBUG_COUNT |
44bafdf3 | 1874 | printk("cyc: %d: incrementing count to %d\n", __LINE__, info->count); |
1da177e4 | 1875 | #endif |
44bafdf3 JS |
1876 | tty->driver_data = info; |
1877 | info->tty = tty; | |
1da177e4 | 1878 | |
44bafdf3 JS |
1879 | /* |
1880 | * Start up serial port | |
1881 | */ | |
1882 | retval = startup(info); | |
1883 | if (retval) { | |
1884 | return retval; | |
1885 | } | |
1da177e4 | 1886 | |
44bafdf3 JS |
1887 | retval = block_til_ready(tty, filp, info); |
1888 | if (retval) { | |
1da177e4 | 1889 | #ifdef SERIAL_DEBUG_OPEN |
44bafdf3 JS |
1890 | printk("cy_open returning after block_til_ready with %d\n", |
1891 | retval); | |
1da177e4 | 1892 | #endif |
44bafdf3 JS |
1893 | return retval; |
1894 | } | |
1da177e4 | 1895 | #ifdef SERIAL_DEBUG_OPEN |
44bafdf3 JS |
1896 | printk("cy_open done\n"); |
1897 | /**/ | |
1da177e4 | 1898 | #endif |
44bafdf3 JS |
1899 | return 0; |
1900 | } /* cy_open */ | |
1da177e4 LT |
1901 | |
1902 | /* | |
1903 | * --------------------------------------------------------------------- | |
1904 | * serial167_init() and friends | |
1905 | * | |
1906 | * serial167_init() is called at boot-time to initialize the serial driver. | |
1907 | * --------------------------------------------------------------------- | |
1908 | */ | |
1909 | ||
1910 | /* | |
1911 | * This routine prints out the appropriate serial driver version | |
1912 | * number, and identifies which options were configured into this | |
1913 | * driver. | |
1914 | */ | |
44bafdf3 | 1915 | static void show_version(void) |
1da177e4 | 1916 | { |
44bafdf3 JS |
1917 | printk("MVME166/167 cd2401 driver\n"); |
1918 | } /* show_version */ | |
1da177e4 LT |
1919 | |
1920 | /* initialize chips on card -- return number of valid | |
1921 | chips (which is number of ports/4) */ | |
1922 | ||
1923 | /* | |
1924 | * This initialises the hardware to a reasonable state. It should | |
1925 | * probe the chip first so as to copy 166-Bug setup as a default for | |
1926 | * port 0. It initialises CMR to CyASYNC; that is never done again, so | |
1927 | * as to limit the number of CyINIT_CHAN commands in normal running. | |
1928 | * | |
1929 | * ... I wonder what I should do if this fails ... | |
1930 | */ | |
1931 | ||
44bafdf3 | 1932 | void mvme167_serial_console_setup(int cflag) |
1da177e4 | 1933 | { |
44bafdf3 | 1934 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
1da177e4 LT |
1935 | int ch; |
1936 | u_char spd; | |
1937 | u_char rcor, rbpr, badspeed = 0; | |
1938 | unsigned long flags; | |
1939 | ||
1940 | local_irq_save(flags); | |
1941 | ||
1942 | /* | |
1943 | * First probe channel zero of the chip, to see what speed has | |
1944 | * been selected. | |
1945 | */ | |
1946 | ||
1947 | base_addr[CyCAR] = 0; | |
1948 | ||
1949 | rcor = base_addr[CyRCOR] << 5; | |
1950 | rbpr = base_addr[CyRBPR]; | |
1951 | ||
1952 | for (spd = 0; spd < sizeof(baud_bpr); spd++) | |
1953 | if (rbpr == baud_bpr[spd] && rcor == baud_co[spd]) | |
1954 | break; | |
1955 | if (spd >= sizeof(baud_bpr)) { | |
1956 | spd = 14; /* 19200 */ | |
1957 | badspeed = 1; /* Failed to identify speed */ | |
1958 | } | |
1959 | initial_console_speed = spd; | |
1960 | ||
1961 | /* OK, we have chosen a speed, now reset and reinitialise */ | |
1962 | ||
44bafdf3 JS |
1963 | my_udelay(20000L); /* Allow time for any active o/p to complete */ |
1964 | if (base_addr[CyCCR] != 0x00) { | |
1965 | local_irq_restore(flags); | |
1966 | /* printk(" chip is never idle (CCR != 0)\n"); */ | |
1967 | return; | |
1968 | } | |
1da177e4 | 1969 | |
44bafdf3 JS |
1970 | base_addr[CyCCR] = CyCHIP_RESET; /* Reset the chip */ |
1971 | my_udelay(1000L); | |
1da177e4 | 1972 | |
44bafdf3 JS |
1973 | if (base_addr[CyGFRCR] == 0x00) { |
1974 | local_irq_restore(flags); | |
1975 | /* printk(" chip is not responding (GFRCR stayed 0)\n"); */ | |
1976 | return; | |
1977 | } | |
1da177e4 LT |
1978 | |
1979 | /* | |
1980 | * System clock is 20Mhz, divided by 2048, so divide by 10 for a 1.0ms | |
1981 | * tick | |
1982 | */ | |
1983 | ||
1984 | base_addr[CyTPR] = 10; | |
1985 | ||
44bafdf3 JS |
1986 | base_addr[CyPILR1] = 0x01; /* Interrupt level for modem change */ |
1987 | base_addr[CyPILR2] = 0x02; /* Interrupt level for tx ints */ | |
1988 | base_addr[CyPILR3] = 0x03; /* Interrupt level for rx ints */ | |
1da177e4 LT |
1989 | |
1990 | /* | |
1991 | * Attempt to set up all channels to something reasonable, and | |
1992 | * bang out a INIT_CHAN command. We should then be able to limit | |
1993 | * the ammount of fiddling we have to do in normal running. | |
1994 | */ | |
1995 | ||
44bafdf3 JS |
1996 | for (ch = 3; ch >= 0; ch--) { |
1997 | base_addr[CyCAR] = (u_char) ch; | |
1da177e4 LT |
1998 | base_addr[CyIER] = 0; |
1999 | base_addr[CyCMR] = CyASYNC; | |
44bafdf3 | 2000 | base_addr[CyLICR] = (u_char) ch << 2; |
1da177e4 LT |
2001 | base_addr[CyLIVR] = 0x5c; |
2002 | base_addr[CyTCOR] = baud_co[spd]; | |
2003 | base_addr[CyTBPR] = baud_bpr[spd]; | |
2004 | base_addr[CyRCOR] = baud_co[spd] >> 5; | |
2005 | base_addr[CyRBPR] = baud_bpr[spd]; | |
2006 | base_addr[CySCHR1] = 'Q' & 0x1f; | |
2007 | base_addr[CySCHR2] = 'X' & 0x1f; | |
2008 | base_addr[CySCRL] = 0; | |
2009 | base_addr[CySCRH] = 0; | |
2010 | base_addr[CyCOR1] = Cy_8_BITS | CyPARITY_NONE; | |
2011 | base_addr[CyCOR2] = 0; | |
2012 | base_addr[CyCOR3] = Cy_1_STOP; | |
2013 | base_addr[CyCOR4] = baud_cor4[spd]; | |
2014 | base_addr[CyCOR5] = 0; | |
2015 | base_addr[CyCOR6] = 0; | |
2016 | base_addr[CyCOR7] = 0; | |
2017 | base_addr[CyRTPRL] = 2; | |
2018 | base_addr[CyRTPRH] = 0; | |
44bafdf3 JS |
2019 | base_addr[CyMSVR1] = 0; |
2020 | base_addr[CyMSVR2] = 0; | |
2021 | write_cy_cmd(base_addr, CyINIT_CHAN | CyDIS_RCVR | CyDIS_XMTR); | |
1da177e4 LT |
2022 | } |
2023 | ||
2024 | /* | |
2025 | * Now do specials for channel zero.... | |
2026 | */ | |
2027 | ||
44bafdf3 JS |
2028 | base_addr[CyMSVR1] = CyRTS; |
2029 | base_addr[CyMSVR2] = CyDTR; | |
1da177e4 | 2030 | base_addr[CyIER] = CyRxData; |
44bafdf3 | 2031 | write_cy_cmd(base_addr, CyENB_RCVR | CyENB_XMTR); |
1da177e4 LT |
2032 | |
2033 | local_irq_restore(flags); | |
2034 | ||
2035 | my_udelay(20000L); /* Let it all settle down */ | |
2036 | ||
44bafdf3 | 2037 | printk("CD2401 initialised, chip is rev 0x%02x\n", base_addr[CyGFRCR]); |
1da177e4 | 2038 | if (badspeed) |
44bafdf3 JS |
2039 | printk |
2040 | (" WARNING: Failed to identify line speed, rcor=%02x,rbpr=%02x\n", | |
2041 | rcor >> 5, rbpr); | |
2042 | } /* serial_console_init */ | |
1da177e4 | 2043 | |
b68e31d0 | 2044 | static const struct tty_operations cy_ops = { |
1da177e4 LT |
2045 | .open = cy_open, |
2046 | .close = cy_close, | |
2047 | .write = cy_write, | |
2048 | .put_char = cy_put_char, | |
2049 | .flush_chars = cy_flush_chars, | |
2050 | .write_room = cy_write_room, | |
2051 | .chars_in_buffer = cy_chars_in_buffer, | |
2052 | .flush_buffer = cy_flush_buffer, | |
2053 | .ioctl = cy_ioctl, | |
2054 | .throttle = cy_throttle, | |
2055 | .unthrottle = cy_unthrottle, | |
2056 | .set_termios = cy_set_termios, | |
2057 | .stop = cy_stop, | |
2058 | .start = cy_start, | |
2059 | .hangup = cy_hangup, | |
2060 | .tiocmget = cy_tiocmget, | |
2061 | .tiocmset = cy_tiocmset, | |
2062 | }; | |
44bafdf3 | 2063 | |
1da177e4 LT |
2064 | /* The serial driver boot-time initialization code! |
2065 | Hardware I/O ports are mapped to character special devices on a | |
2066 | first found, first allocated manner. That is, this code searches | |
2067 | for Cyclom cards in the system. As each is found, it is probed | |
2068 | to discover how many chips (and thus how many ports) are present. | |
2069 | These ports are mapped to the tty ports 64 and upward in monotonic | |
2070 | fashion. If an 8-port card is replaced with a 16-port card, the | |
2071 | port mapping on a following card will shift. | |
2072 | ||
2073 | This approach is different from what is used in the other serial | |
2074 | device driver because the Cyclom is more properly a multiplexer, | |
2075 | not just an aggregation of serial ports on one card. | |
2076 | ||
2077 | If there are more cards with more ports than have been statically | |
2078 | allocated above, a warning is printed and the extra ports are ignored. | |
2079 | */ | |
44bafdf3 | 2080 | static int __init serial167_init(void) |
1da177e4 | 2081 | { |
44bafdf3 JS |
2082 | struct cyclades_port *info; |
2083 | int ret = 0; | |
2084 | int good_ports = 0; | |
2085 | int port_num = 0; | |
2086 | int index; | |
2087 | int DefSpeed; | |
1da177e4 | 2088 | #ifdef notyet |
44bafdf3 | 2089 | struct sigaction sa; |
1da177e4 LT |
2090 | #endif |
2091 | ||
44bafdf3 JS |
2092 | if (!(mvme16x_config & MVME16x_CONFIG_GOT_CD2401)) |
2093 | return 0; | |
1da177e4 | 2094 | |
44bafdf3 JS |
2095 | cy_serial_driver = alloc_tty_driver(NR_PORTS); |
2096 | if (!cy_serial_driver) | |
2097 | return -ENOMEM; | |
1da177e4 LT |
2098 | |
2099 | #if 0 | |
44bafdf3 | 2100 | scrn[1] = '\0'; |
1da177e4 LT |
2101 | #endif |
2102 | ||
44bafdf3 | 2103 | show_version(); |
1da177e4 | 2104 | |
44bafdf3 JS |
2105 | /* Has "console=0,9600n8" been used in bootinfo to change speed? */ |
2106 | if (serial_console_cflag) | |
2107 | DefSpeed = serial_console_cflag & 0017; | |
2108 | else { | |
2109 | DefSpeed = initial_console_speed; | |
2110 | serial_console_info = &cy_port[0]; | |
2111 | serial_console_cflag = DefSpeed | CS8; | |
1da177e4 | 2112 | #if 0 |
44bafdf3 JS |
2113 | serial_console = 64; /*callout_driver.minor_start */ |
2114 | #endif | |
2115 | } | |
1da177e4 | 2116 | |
44bafdf3 | 2117 | /* Initialize the tty_driver structure */ |
1da177e4 | 2118 | |
44bafdf3 JS |
2119 | cy_serial_driver->owner = THIS_MODULE; |
2120 | cy_serial_driver->name = "ttyS"; | |
2121 | cy_serial_driver->major = TTY_MAJOR; | |
2122 | cy_serial_driver->minor_start = 64; | |
2123 | cy_serial_driver->type = TTY_DRIVER_TYPE_SERIAL; | |
2124 | cy_serial_driver->subtype = SERIAL_TYPE_NORMAL; | |
2125 | cy_serial_driver->init_termios = tty_std_termios; | |
2126 | cy_serial_driver->init_termios.c_cflag = | |
2127 | B9600 | CS8 | CREAD | HUPCL | CLOCAL; | |
2128 | cy_serial_driver->flags = TTY_DRIVER_REAL_RAW; | |
2129 | tty_set_operations(cy_serial_driver, &cy_ops); | |
2130 | ||
2131 | ret = tty_register_driver(cy_serial_driver); | |
2132 | if (ret) { | |
2133 | printk(KERN_ERR "Couldn't register MVME166/7 serial driver\n"); | |
2134 | put_tty_driver(cy_serial_driver); | |
2135 | return ret; | |
2136 | } | |
1da177e4 | 2137 | |
44bafdf3 JS |
2138 | port_num = 0; |
2139 | info = cy_port; | |
2140 | for (index = 0; index < 1; index++) { | |
1da177e4 | 2141 | |
44bafdf3 JS |
2142 | good_ports = 4; |
2143 | ||
2144 | if (port_num < NR_PORTS) { | |
2145 | while (good_ports-- && port_num < NR_PORTS) { | |
1da177e4 | 2146 | /*** initialize port ***/ |
44bafdf3 JS |
2147 | info->magic = CYCLADES_MAGIC; |
2148 | info->type = PORT_CIRRUS; | |
2149 | info->card = index; | |
2150 | info->line = port_num; | |
2151 | info->flags = STD_COM_FLAGS; | |
2152 | info->tty = NULL; | |
2153 | info->xmit_fifo_size = 12; | |
2154 | info->cor1 = CyPARITY_NONE | Cy_8_BITS; | |
2155 | info->cor2 = CyETC; | |
2156 | info->cor3 = Cy_1_STOP; | |
2157 | info->cor4 = 0x08; /* _very_ small receive threshold */ | |
2158 | info->cor5 = 0; | |
2159 | info->cor6 = 0; | |
2160 | info->cor7 = 0; | |
2161 | info->tbpr = baud_bpr[DefSpeed]; /* Tx BPR */ | |
2162 | info->tco = baud_co[DefSpeed]; /* Tx CO */ | |
2163 | info->rbpr = baud_bpr[DefSpeed]; /* Rx BPR */ | |
2164 | info->rco = baud_co[DefSpeed] >> 5; /* Rx CO */ | |
2165 | info->close_delay = 0; | |
2166 | info->x_char = 0; | |
44bafdf3 | 2167 | info->count = 0; |
1da177e4 | 2168 | #ifdef SERIAL_DEBUG_COUNT |
44bafdf3 JS |
2169 | printk("cyc: %d: setting count to 0\n", |
2170 | __LINE__); | |
2171 | #endif | |
2172 | info->blocked_open = 0; | |
2173 | info->default_threshold = 0; | |
2174 | info->default_timeout = 0; | |
44bafdf3 JS |
2175 | init_waitqueue_head(&info->open_wait); |
2176 | init_waitqueue_head(&info->close_wait); | |
2177 | /* info->session */ | |
2178 | /* info->pgrp */ | |
1da177e4 | 2179 | /*** !!!!!!!! this may expose new bugs !!!!!!!!! *********/ |
44bafdf3 JS |
2180 | info->read_status_mask = |
2181 | CyTIMEOUT | CySPECHAR | CyBREAK | CyPARITY | | |
2182 | CyFRAME | CyOVERRUN; | |
2183 | /* info->timeout */ | |
2184 | ||
2185 | printk("ttyS%d ", info->line); | |
2186 | port_num++; | |
2187 | info++; | |
2188 | if (!(port_num & 7)) { | |
2189 | printk("\n "); | |
2190 | } | |
2191 | } | |
1da177e4 | 2192 | } |
44bafdf3 JS |
2193 | printk("\n"); |
2194 | } | |
2195 | while (port_num < NR_PORTS) { | |
2196 | info->line = -1; | |
2197 | port_num++; | |
2198 | info++; | |
2199 | } | |
1da177e4 | 2200 | #ifdef CONFIG_REMOTE_DEBUG |
44bafdf3 JS |
2201 | debug_setup(); |
2202 | #endif | |
2203 | ret = request_irq(MVME167_IRQ_SER_ERR, cd2401_rxerr_interrupt, 0, | |
2204 | "cd2401_errors", cd2401_rxerr_interrupt); | |
2205 | if (ret) { | |
2206 | printk(KERN_ERR "Could't get cd2401_errors IRQ"); | |
2207 | goto cleanup_serial_driver; | |
2208 | } | |
2209 | ||
2210 | ret = request_irq(MVME167_IRQ_SER_MODEM, cd2401_modem_interrupt, 0, | |
2211 | "cd2401_modem", cd2401_modem_interrupt); | |
2212 | if (ret) { | |
2213 | printk(KERN_ERR "Could't get cd2401_modem IRQ"); | |
2214 | goto cleanup_irq_cd2401_errors; | |
2215 | } | |
2216 | ||
2217 | ret = request_irq(MVME167_IRQ_SER_TX, cd2401_tx_interrupt, 0, | |
2218 | "cd2401_txints", cd2401_tx_interrupt); | |
2219 | if (ret) { | |
2220 | printk(KERN_ERR "Could't get cd2401_txints IRQ"); | |
2221 | goto cleanup_irq_cd2401_modem; | |
2222 | } | |
2223 | ||
2224 | ret = request_irq(MVME167_IRQ_SER_RX, cd2401_rx_interrupt, 0, | |
2225 | "cd2401_rxints", cd2401_rx_interrupt); | |
2226 | if (ret) { | |
2227 | printk(KERN_ERR "Could't get cd2401_rxints IRQ"); | |
2228 | goto cleanup_irq_cd2401_txints; | |
2229 | } | |
2230 | ||
2231 | /* Now we have registered the interrupt handlers, allow the interrupts */ | |
2232 | ||
2233 | pcc2chip[PccSCCMICR] = 0x15; /* Serial ints are level 5 */ | |
2234 | pcc2chip[PccSCCTICR] = 0x15; | |
2235 | pcc2chip[PccSCCRICR] = 0x15; | |
2236 | ||
2237 | pcc2chip[PccIMLR] = 3; /* Allow PCC2 ints above 3!? */ | |
2238 | ||
2239 | return 0; | |
1da177e4 | 2240 | cleanup_irq_cd2401_txints: |
44bafdf3 | 2241 | free_irq(MVME167_IRQ_SER_TX, cd2401_tx_interrupt); |
1da177e4 | 2242 | cleanup_irq_cd2401_modem: |
44bafdf3 | 2243 | free_irq(MVME167_IRQ_SER_MODEM, cd2401_modem_interrupt); |
1da177e4 | 2244 | cleanup_irq_cd2401_errors: |
44bafdf3 | 2245 | free_irq(MVME167_IRQ_SER_ERR, cd2401_rxerr_interrupt); |
1da177e4 | 2246 | cleanup_serial_driver: |
44bafdf3 JS |
2247 | if (tty_unregister_driver(cy_serial_driver)) |
2248 | printk(KERN_ERR | |
2249 | "Couldn't unregister MVME166/7 serial driver\n"); | |
2250 | put_tty_driver(cy_serial_driver); | |
2251 | return ret; | |
2252 | } /* serial167_init */ | |
1da177e4 LT |
2253 | |
2254 | module_init(serial167_init); | |
2255 | ||
1da177e4 | 2256 | #ifdef CYCLOM_SHOW_STATUS |
44bafdf3 | 2257 | static void show_status(int line_num) |
1da177e4 | 2258 | { |
44bafdf3 JS |
2259 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
2260 | int channel; | |
2261 | struct cyclades_port *info; | |
2262 | unsigned long flags; | |
2263 | ||
2264 | info = &cy_port[line_num]; | |
2265 | channel = info->line; | |
2266 | printk(" channel %d\n", channel); | |
2267 | /**/ printk(" cy_port\n"); | |
2268 | printk(" card line flags = %d %d %x\n", | |
2269 | info->card, info->line, info->flags); | |
2270 | printk | |
2271 | (" *tty read_status_mask timeout xmit_fifo_size = %lx %x %x %x\n", | |
2272 | (long)info->tty, info->read_status_mask, info->timeout, | |
2273 | info->xmit_fifo_size); | |
2274 | printk(" cor1,cor2,cor3,cor4,cor5,cor6,cor7 = %x %x %x %x %x %x %x\n", | |
2275 | info->cor1, info->cor2, info->cor3, info->cor4, info->cor5, | |
2276 | info->cor6, info->cor7); | |
2277 | printk(" tbpr,tco,rbpr,rco = %d %d %d %d\n", info->tbpr, info->tco, | |
2278 | info->rbpr, info->rco); | |
2279 | printk(" close_delay event count = %d %d %d\n", info->close_delay, | |
2280 | info->event, info->count); | |
2281 | printk(" x_char blocked_open = %x %x\n", info->x_char, | |
2282 | info->blocked_open); | |
2283 | printk(" open_wait = %lx %lx %lx\n", (long)info->open_wait); | |
2284 | ||
2285 | local_irq_save(flags); | |
1da177e4 LT |
2286 | |
2287 | /* Global Registers */ | |
2288 | ||
2289 | printk(" CyGFRCR %x\n", base_addr[CyGFRCR]); | |
2290 | printk(" CyCAR %x\n", base_addr[CyCAR]); | |
2291 | printk(" CyRISR %x\n", base_addr[CyRISR]); | |
2292 | printk(" CyTISR %x\n", base_addr[CyTISR]); | |
2293 | printk(" CyMISR %x\n", base_addr[CyMISR]); | |
2294 | printk(" CyRIR %x\n", base_addr[CyRIR]); | |
2295 | printk(" CyTIR %x\n", base_addr[CyTIR]); | |
2296 | printk(" CyMIR %x\n", base_addr[CyMIR]); | |
2297 | printk(" CyTPR %x\n", base_addr[CyTPR]); | |
2298 | ||
44bafdf3 | 2299 | base_addr[CyCAR] = (u_char) channel; |
1da177e4 LT |
2300 | |
2301 | /* Virtual Registers */ | |
2302 | ||
2303 | #if 0 | |
2304 | printk(" CyRIVR %x\n", base_addr[CyRIVR]); | |
2305 | printk(" CyTIVR %x\n", base_addr[CyTIVR]); | |
2306 | printk(" CyMIVR %x\n", base_addr[CyMIVR]); | |
2307 | printk(" CyMISR %x\n", base_addr[CyMISR]); | |
2308 | #endif | |
2309 | ||
2310 | /* Channel Registers */ | |
2311 | ||
2312 | printk(" CyCCR %x\n", base_addr[CyCCR]); | |
2313 | printk(" CyIER %x\n", base_addr[CyIER]); | |
2314 | printk(" CyCOR1 %x\n", base_addr[CyCOR1]); | |
2315 | printk(" CyCOR2 %x\n", base_addr[CyCOR2]); | |
2316 | printk(" CyCOR3 %x\n", base_addr[CyCOR3]); | |
2317 | printk(" CyCOR4 %x\n", base_addr[CyCOR4]); | |
2318 | printk(" CyCOR5 %x\n", base_addr[CyCOR5]); | |
2319 | #if 0 | |
2320 | printk(" CyCCSR %x\n", base_addr[CyCCSR]); | |
2321 | printk(" CyRDCR %x\n", base_addr[CyRDCR]); | |
2322 | #endif | |
2323 | printk(" CySCHR1 %x\n", base_addr[CySCHR1]); | |
2324 | printk(" CySCHR2 %x\n", base_addr[CySCHR2]); | |
2325 | #if 0 | |
2326 | printk(" CySCHR3 %x\n", base_addr[CySCHR3]); | |
2327 | printk(" CySCHR4 %x\n", base_addr[CySCHR4]); | |
2328 | printk(" CySCRL %x\n", base_addr[CySCRL]); | |
2329 | printk(" CySCRH %x\n", base_addr[CySCRH]); | |
2330 | printk(" CyLNC %x\n", base_addr[CyLNC]); | |
2331 | printk(" CyMCOR1 %x\n", base_addr[CyMCOR1]); | |
2332 | printk(" CyMCOR2 %x\n", base_addr[CyMCOR2]); | |
2333 | #endif | |
2334 | printk(" CyRTPRL %x\n", base_addr[CyRTPRL]); | |
2335 | printk(" CyRTPRH %x\n", base_addr[CyRTPRH]); | |
2336 | printk(" CyMSVR1 %x\n", base_addr[CyMSVR1]); | |
2337 | printk(" CyMSVR2 %x\n", base_addr[CyMSVR2]); | |
2338 | printk(" CyRBPR %x\n", base_addr[CyRBPR]); | |
2339 | printk(" CyRCOR %x\n", base_addr[CyRCOR]); | |
2340 | printk(" CyTBPR %x\n", base_addr[CyTBPR]); | |
2341 | printk(" CyTCOR %x\n", base_addr[CyTCOR]); | |
2342 | ||
44bafdf3 JS |
2343 | local_irq_restore(flags); |
2344 | } /* show_status */ | |
1da177e4 LT |
2345 | #endif |
2346 | ||
1da177e4 LT |
2347 | #if 0 |
2348 | /* Dummy routine in mvme16x/config.c for now */ | |
2349 | ||
2350 | /* Serial console setup. Called from linux/init/main.c */ | |
2351 | ||
2352 | void console_setup(char *str, int *ints) | |
2353 | { | |
2354 | char *s; | |
2355 | int baud, bits, parity; | |
2356 | int cflag = 0; | |
2357 | ||
2358 | /* Sanity check. */ | |
44bafdf3 JS |
2359 | if (ints[0] > 3 || ints[1] > 3) |
2360 | return; | |
1da177e4 LT |
2361 | |
2362 | /* Get baud, bits and parity */ | |
2363 | baud = 2400; | |
2364 | bits = 8; | |
2365 | parity = 'n'; | |
44bafdf3 JS |
2366 | if (ints[2]) |
2367 | baud = ints[2]; | |
1da177e4 LT |
2368 | if ((s = strchr(str, ','))) { |
2369 | do { | |
2370 | s++; | |
44bafdf3 JS |
2371 | } while (*s >= '0' && *s <= '9'); |
2372 | if (*s) | |
2373 | parity = *s++; | |
2374 | if (*s) | |
2375 | bits = *s - '0'; | |
1da177e4 LT |
2376 | } |
2377 | ||
2378 | /* Now construct a cflag setting. */ | |
44bafdf3 JS |
2379 | switch (baud) { |
2380 | case 1200: | |
2381 | cflag |= B1200; | |
2382 | break; | |
2383 | case 9600: | |
2384 | cflag |= B9600; | |
2385 | break; | |
2386 | case 19200: | |
2387 | cflag |= B19200; | |
2388 | break; | |
2389 | case 38400: | |
2390 | cflag |= B38400; | |
2391 | break; | |
2392 | case 2400: | |
2393 | default: | |
2394 | cflag |= B2400; | |
2395 | break; | |
1da177e4 | 2396 | } |
44bafdf3 JS |
2397 | switch (bits) { |
2398 | case 7: | |
2399 | cflag |= CS7; | |
2400 | break; | |
2401 | default: | |
2402 | case 8: | |
2403 | cflag |= CS8; | |
2404 | break; | |
1da177e4 | 2405 | } |
44bafdf3 JS |
2406 | switch (parity) { |
2407 | case 'o': | |
2408 | case 'O': | |
2409 | cflag |= PARODD; | |
2410 | break; | |
2411 | case 'e': | |
2412 | case 'E': | |
2413 | cflag |= PARENB; | |
2414 | break; | |
1da177e4 LT |
2415 | } |
2416 | ||
2417 | serial_console_info = &cy_port[ints[1]]; | |
2418 | serial_console_cflag = cflag; | |
44bafdf3 | 2419 | serial_console = ints[1] + 64; /*callout_driver.minor_start */ |
1da177e4 LT |
2420 | } |
2421 | #endif | |
2422 | ||
2423 | /* | |
2424 | * The following is probably out of date for 2.1.x serial console stuff. | |
2425 | * | |
2426 | * The console is registered early on from arch/m68k/kernel/setup.c, and | |
2427 | * it therefore relies on the chip being setup correctly by 166-Bug. This | |
2428 | * seems reasonable, as the serial port has been used to invoke the system | |
2429 | * boot. It also means that this function must not rely on any data | |
2430 | * initialisation performed by serial167_init() etc. | |
2431 | * | |
2432 | * Of course, once the console has been registered, we had better ensure | |
2433 | * that serial167_init() doesn't leave the chip non-functional. | |
2434 | * | |
2435 | * The console must be locked when we get here. | |
2436 | */ | |
2437 | ||
44bafdf3 JS |
2438 | void serial167_console_write(struct console *co, const char *str, |
2439 | unsigned count) | |
1da177e4 | 2440 | { |
44bafdf3 | 2441 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
1da177e4 LT |
2442 | unsigned long flags; |
2443 | volatile u_char sink; | |
2444 | u_char ier; | |
2445 | int port; | |
2446 | u_char do_lf = 0; | |
2447 | int i = 0; | |
2448 | ||
2449 | local_irq_save(flags); | |
2450 | ||
2451 | /* Ensure transmitter is enabled! */ | |
2452 | ||
2453 | port = 0; | |
44bafdf3 | 2454 | base_addr[CyCAR] = (u_char) port; |
1da177e4 LT |
2455 | while (base_addr[CyCCR]) |
2456 | ; | |
2457 | base_addr[CyCCR] = CyENB_XMTR; | |
2458 | ||
2459 | ier = base_addr[CyIER]; | |
2460 | base_addr[CyIER] = CyTxMpty; | |
2461 | ||
2462 | while (1) { | |
44bafdf3 | 2463 | if (pcc2chip[PccSCCTICR] & 0x20) { |
1da177e4 LT |
2464 | /* We have a Tx int. Acknowledge it */ |
2465 | sink = pcc2chip[PccTPIACKR]; | |
2466 | if ((base_addr[CyLICR] >> 2) == port) { | |
2467 | if (i == count) { | |
2468 | /* Last char of string is now output */ | |
2469 | base_addr[CyTEOIR] = CyNOTRANS; | |
2470 | break; | |
2471 | } | |
2472 | if (do_lf) { | |
2473 | base_addr[CyTDR] = '\n'; | |
2474 | str++; | |
2475 | i++; | |
2476 | do_lf = 0; | |
44bafdf3 | 2477 | } else if (*str == '\n') { |
1da177e4 LT |
2478 | base_addr[CyTDR] = '\r'; |
2479 | do_lf = 1; | |
44bafdf3 | 2480 | } else { |
1da177e4 LT |
2481 | base_addr[CyTDR] = *str++; |
2482 | i++; | |
2483 | } | |
2484 | base_addr[CyTEOIR] = 0; | |
44bafdf3 | 2485 | } else |
1da177e4 LT |
2486 | base_addr[CyTEOIR] = CyNOTRANS; |
2487 | } | |
2488 | } | |
2489 | ||
2490 | base_addr[CyIER] = ier; | |
2491 | ||
2492 | local_irq_restore(flags); | |
2493 | } | |
2494 | ||
44bafdf3 JS |
2495 | static struct tty_driver *serial167_console_device(struct console *c, |
2496 | int *index) | |
1da177e4 LT |
2497 | { |
2498 | *index = c->index; | |
2499 | return cy_serial_driver; | |
2500 | } | |
2501 | ||
1da177e4 | 2502 | static struct console sercons = { |
44bafdf3 JS |
2503 | .name = "ttyS", |
2504 | .write = serial167_console_write, | |
2505 | .device = serial167_console_device, | |
44bafdf3 JS |
2506 | .flags = CON_PRINTBUFFER, |
2507 | .index = -1, | |
1da177e4 LT |
2508 | }; |
2509 | ||
1da177e4 LT |
2510 | static int __init serial167_console_init(void) |
2511 | { | |
2512 | if (vme_brdtype == VME_TYPE_MVME166 || | |
44bafdf3 JS |
2513 | vme_brdtype == VME_TYPE_MVME167 || |
2514 | vme_brdtype == VME_TYPE_MVME177) { | |
1da177e4 LT |
2515 | mvme167_serial_console_setup(0); |
2516 | register_console(&sercons); | |
2517 | } | |
2518 | return 0; | |
2519 | } | |
44bafdf3 | 2520 | |
1da177e4 LT |
2521 | console_initcall(serial167_console_init); |
2522 | ||
2523 | #ifdef CONFIG_REMOTE_DEBUG | |
44bafdf3 | 2524 | void putDebugChar(int c) |
1da177e4 | 2525 | { |
44bafdf3 | 2526 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
1da177e4 LT |
2527 | unsigned long flags; |
2528 | volatile u_char sink; | |
2529 | u_char ier; | |
2530 | int port; | |
2531 | ||
2532 | local_irq_save(flags); | |
2533 | ||
2534 | /* Ensure transmitter is enabled! */ | |
2535 | ||
2536 | port = DEBUG_PORT; | |
44bafdf3 | 2537 | base_addr[CyCAR] = (u_char) port; |
1da177e4 LT |
2538 | while (base_addr[CyCCR]) |
2539 | ; | |
2540 | base_addr[CyCCR] = CyENB_XMTR; | |
2541 | ||
2542 | ier = base_addr[CyIER]; | |
2543 | base_addr[CyIER] = CyTxMpty; | |
2544 | ||
2545 | while (1) { | |
44bafdf3 | 2546 | if (pcc2chip[PccSCCTICR] & 0x20) { |
1da177e4 LT |
2547 | /* We have a Tx int. Acknowledge it */ |
2548 | sink = pcc2chip[PccTPIACKR]; | |
2549 | if ((base_addr[CyLICR] >> 2) == port) { | |
2550 | base_addr[CyTDR] = c; | |
2551 | base_addr[CyTEOIR] = 0; | |
2552 | break; | |
44bafdf3 | 2553 | } else |
1da177e4 LT |
2554 | base_addr[CyTEOIR] = CyNOTRANS; |
2555 | } | |
2556 | } | |
2557 | ||
2558 | base_addr[CyIER] = ier; | |
2559 | ||
2560 | local_irq_restore(flags); | |
2561 | } | |
2562 | ||
2563 | int getDebugChar() | |
2564 | { | |
44bafdf3 | 2565 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; |
1da177e4 LT |
2566 | unsigned long flags; |
2567 | volatile u_char sink; | |
2568 | u_char ier; | |
2569 | int port; | |
2570 | int i, c; | |
2571 | ||
2572 | i = debugiq.out; | |
2573 | if (i != debugiq.in) { | |
2574 | c = debugiq.buf[i]; | |
2575 | if (++i == DEBUG_LEN) | |
2576 | i = 0; | |
2577 | debugiq.out = i; | |
2578 | return c; | |
2579 | } | |
2580 | /* OK, nothing in queue, wait in poll loop */ | |
2581 | ||
2582 | local_irq_save(flags); | |
2583 | ||
2584 | /* Ensure receiver is enabled! */ | |
2585 | ||
2586 | port = DEBUG_PORT; | |
44bafdf3 | 2587 | base_addr[CyCAR] = (u_char) port; |
1da177e4 LT |
2588 | #if 0 |
2589 | while (base_addr[CyCCR]) | |
2590 | ; | |
2591 | base_addr[CyCCR] = CyENB_RCVR; | |
2592 | #endif | |
2593 | ier = base_addr[CyIER]; | |
2594 | base_addr[CyIER] = CyRxData; | |
2595 | ||
2596 | while (1) { | |
44bafdf3 | 2597 | if (pcc2chip[PccSCCRICR] & 0x20) { |
1da177e4 LT |
2598 | /* We have a Rx int. Acknowledge it */ |
2599 | sink = pcc2chip[PccRPIACKR]; | |
2600 | if ((base_addr[CyLICR] >> 2) == port) { | |
2601 | int cnt = base_addr[CyRFOC]; | |
44bafdf3 | 2602 | while (cnt-- > 0) { |
1da177e4 LT |
2603 | c = base_addr[CyRDR]; |
2604 | if (c == 0) | |
44bafdf3 JS |
2605 | printk |
2606 | ("!! debug char is null (cnt=%d) !!", | |
2607 | cnt); | |
1da177e4 | 2608 | else |
44bafdf3 | 2609 | queueDebugChar(c); |
1da177e4 LT |
2610 | } |
2611 | base_addr[CyREOIR] = 0; | |
2612 | i = debugiq.out; | |
2613 | if (i == debugiq.in) | |
44bafdf3 | 2614 | panic("Debug input queue empty!"); |
1da177e4 LT |
2615 | c = debugiq.buf[i]; |
2616 | if (++i == DEBUG_LEN) | |
2617 | i = 0; | |
2618 | debugiq.out = i; | |
2619 | break; | |
44bafdf3 | 2620 | } else |
1da177e4 LT |
2621 | base_addr[CyREOIR] = CyNOTRANS; |
2622 | } | |
2623 | } | |
2624 | ||
2625 | base_addr[CyIER] = ier; | |
2626 | ||
2627 | local_irq_restore(flags); | |
2628 | ||
2629 | return (c); | |
2630 | } | |
2631 | ||
44bafdf3 | 2632 | void queueDebugChar(int c) |
1da177e4 LT |
2633 | { |
2634 | int i; | |
2635 | ||
2636 | i = debugiq.in; | |
2637 | debugiq.buf[i] = c; | |
2638 | if (++i == DEBUG_LEN) | |
2639 | i = 0; | |
2640 | if (i != debugiq.out) | |
2641 | debugiq.in = i; | |
2642 | } | |
2643 | ||
44bafdf3 | 2644 | static void debug_setup() |
1da177e4 | 2645 | { |
44bafdf3 JS |
2646 | unsigned long flags; |
2647 | volatile unsigned char *base_addr = (u_char *) BASE_ADDR; | |
2648 | int i, cflag; | |
1da177e4 | 2649 | |
44bafdf3 | 2650 | cflag = B19200; |
1da177e4 | 2651 | |
44bafdf3 | 2652 | local_irq_save(flags); |
1da177e4 | 2653 | |
44bafdf3 JS |
2654 | for (i = 0; i < 4; i++) { |
2655 | base_addr[CyCAR] = i; | |
2656 | base_addr[CyLICR] = i << 2; | |
2657 | } | |
1da177e4 | 2658 | |
44bafdf3 | 2659 | debugiq.in = debugiq.out = 0; |
1da177e4 | 2660 | |
44bafdf3 | 2661 | base_addr[CyCAR] = DEBUG_PORT; |
1da177e4 | 2662 | |
44bafdf3 JS |
2663 | /* baud rate */ |
2664 | i = cflag & CBAUD; | |
1da177e4 | 2665 | |
44bafdf3 | 2666 | base_addr[CyIER] = 0; |
1da177e4 | 2667 | |
44bafdf3 JS |
2668 | base_addr[CyCMR] = CyASYNC; |
2669 | base_addr[CyLICR] = DEBUG_PORT << 2; | |
2670 | base_addr[CyLIVR] = 0x5c; | |
1da177e4 | 2671 | |
44bafdf3 | 2672 | /* tx and rx baud rate */ |
1da177e4 | 2673 | |
44bafdf3 JS |
2674 | base_addr[CyTCOR] = baud_co[i]; |
2675 | base_addr[CyTBPR] = baud_bpr[i]; | |
2676 | base_addr[CyRCOR] = baud_co[i] >> 5; | |
2677 | base_addr[CyRBPR] = baud_bpr[i]; | |
1da177e4 | 2678 | |
44bafdf3 | 2679 | /* set line characteristics according configuration */ |
1da177e4 | 2680 | |
44bafdf3 JS |
2681 | base_addr[CySCHR1] = 0; |
2682 | base_addr[CySCHR2] = 0; | |
2683 | base_addr[CySCRL] = 0; | |
2684 | base_addr[CySCRH] = 0; | |
2685 | base_addr[CyCOR1] = Cy_8_BITS | CyPARITY_NONE; | |
2686 | base_addr[CyCOR2] = 0; | |
2687 | base_addr[CyCOR3] = Cy_1_STOP; | |
2688 | base_addr[CyCOR4] = baud_cor4[i]; | |
2689 | base_addr[CyCOR5] = 0; | |
2690 | base_addr[CyCOR6] = 0; | |
2691 | base_addr[CyCOR7] = 0; | |
1da177e4 | 2692 | |
44bafdf3 JS |
2693 | write_cy_cmd(base_addr, CyINIT_CHAN); |
2694 | write_cy_cmd(base_addr, CyENB_RCVR); | |
1da177e4 | 2695 | |
44bafdf3 | 2696 | base_addr[CyCAR] = DEBUG_PORT; /* !!! Is this needed? */ |
1da177e4 | 2697 | |
44bafdf3 JS |
2698 | base_addr[CyRTPRL] = 2; |
2699 | base_addr[CyRTPRH] = 0; | |
1da177e4 | 2700 | |
44bafdf3 JS |
2701 | base_addr[CyMSVR1] = CyRTS; |
2702 | base_addr[CyMSVR2] = CyDTR; | |
1da177e4 | 2703 | |
44bafdf3 | 2704 | base_addr[CyIER] = CyRxData; |
1da177e4 | 2705 | |
44bafdf3 | 2706 | local_irq_restore(flags); |
1da177e4 | 2707 | |
44bafdf3 | 2708 | } /* debug_setup */ |
1da177e4 LT |
2709 | |
2710 | #endif | |
2711 | ||
2712 | MODULE_LICENSE("GPL"); |