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CommitLineData
1da177e4
LT
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
9 *
8e81cc13 10 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
1da177e4
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11 *
12 * Device driver for TCG/TCPA TPM (trusted platform module).
3b09825d 13 * Specifications at www.trustedcomputinggroup.org
1da177e4
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14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation, version 2 of the
18 * License.
3b09825d 19 *
1da177e4
LT
20 */
21#include <linux/module.h>
1da177e4
LT
22#include <linux/delay.h>
23#include <linux/fs.h>
d081d470 24#include <linux/mutex.h>
914e2637 25#include <linux/sched.h>
bbc5b212 26#include <linux/platform_device.h>
276ad0c1 27#include <linux/io.h>
659aaf2b 28#include <linux/tpm.h>
0dc55365 29#include <linux/acpi.h>
313d21ee 30#include <linux/cdev.h>
1da177e4 31
41ab999c
KY
32enum tpm_const {
33 TPM_MINOR = 224, /* officially assigned */
34 TPM_BUFSIZE = 4096,
35 TPM_NUM_DEVICES = 256,
32d33b29 36 TPM_RETRY = 50, /* 5 seconds */
41ab999c
KY
37};
38
3122a88a
KH
39enum tpm_timeout {
40 TPM_TIMEOUT = 5, /* msecs */
32d33b29 41 TPM_TIMEOUT_RETRY = 100 /* msecs */
3122a88a 42};
1da177e4
LT
43
44/* TPM addresses */
3122a88a 45enum tpm_addr {
daacdfa6 46 TPM_SUPERIO_ADDR = 0x2E,
3122a88a 47 TPM_ADDR = 0x4E,
3122a88a
KH
48};
49
000a07b0
JG
50/* Indexes the duration array */
51enum tpm_duration {
52 TPM_SHORT = 0,
53 TPM_MEDIUM = 1,
54 TPM_LONG = 2,
55 TPM_UNDEFINED,
56};
57
32d33b29 58#define TPM_WARN_RETRY 0x800
68d6e671 59#define TPM_WARN_DOING_SELFTEST 0x802
be405411
SB
60#define TPM_ERR_DEACTIVATED 0x6
61#define TPM_ERR_DISABLED 0x7
c584af19 62#define TPM_ERR_INVALID_POSTINIT 38
be405411 63
b9e3238a 64#define TPM_HEADER_SIZE 10
7a1d7e6d
JS
65
66enum tpm2_const {
67 TPM2_PLATFORM_PCR = 24,
68 TPM2_PCR_SELECT_MIN = ((TPM2_PLATFORM_PCR + 7) / 8),
69 TPM2_TIMEOUT_A = 750,
70 TPM2_TIMEOUT_B = 2000,
71 TPM2_TIMEOUT_C = 200,
72 TPM2_TIMEOUT_D = 30,
73 TPM2_DURATION_SHORT = 20,
74 TPM2_DURATION_MEDIUM = 750,
75 TPM2_DURATION_LONG = 2000,
76};
77
78enum tpm2_structures {
79 TPM2_ST_NO_SESSIONS = 0x8001,
80 TPM2_ST_SESSIONS = 0x8002,
81};
82
83enum tpm2_return_codes {
84 TPM2_RC_INITIALIZE = 0x0100,
85 TPM2_RC_TESTING = 0x090A,
86 TPM2_RC_DISABLED = 0x0120,
87};
88
89enum tpm2_algorithms {
90 TPM2_ALG_SHA1 = 0x0004,
91};
92
93enum tpm2_command_codes {
94 TPM2_CC_FIRST = 0x011F,
95 TPM2_CC_SELF_TEST = 0x0143,
96 TPM2_CC_STARTUP = 0x0144,
97 TPM2_CC_SHUTDOWN = 0x0145,
98 TPM2_CC_GET_CAPABILITY = 0x017A,
99 TPM2_CC_GET_RANDOM = 0x017B,
100 TPM2_CC_PCR_READ = 0x017E,
101 TPM2_CC_PCR_EXTEND = 0x0182,
102 TPM2_CC_LAST = 0x018F,
103};
104
105enum tpm2_permanent_handles {
106 TPM2_RS_PW = 0x40000009,
107};
108
109enum tpm2_capabilities {
110 TPM2_CAP_TPM_PROPERTIES = 6,
111};
112
113enum tpm2_startup_types {
114 TPM2_SU_CLEAR = 0x0000,
115 TPM2_SU_STATE = 0x0001,
116};
117
399235dc
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118enum tpm2_start_method {
119 TPM2_START_ACPI = 2,
120 TPM2_START_FIFO = 6,
121 TPM2_START_CRB = 7,
122 TPM2_START_CRB_WITH_ACPI = 8,
123};
124
1da177e4
LT
125struct tpm_chip;
126
127struct tpm_vendor_specific {
ad5ea3cc
KJH
128 void __iomem *iobase; /* ioremapped address */
129 unsigned long base; /* TPM base address */
130
27084efe 131 int irq;
a7b66822 132 int probed_irq;
27084efe 133
ad5ea3cc
KJH
134 int region_size;
135 int have_region;
1da177e4 136
27084efe
LD
137 struct list_head list;
138 int locality;
36b20020 139 unsigned long timeout_a, timeout_b, timeout_c, timeout_d; /* jiffies */
62592101 140 bool timeout_adjusted;
36b20020 141 unsigned long duration[3]; /* jiffies */
04ab2293 142 bool duration_adjusted;
775585e4 143 void *priv;
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LD
144
145 wait_queue_head_t read_queue;
146 wait_queue_head_t int_queue;
3e3a5e90
SB
147
148 u16 manufacturer_id;
1da177e4
LT
149};
150
3b09825d 151#define TPM_VPRIV(c) ((c)->vendor.priv)
775585e4 152
4e401fb0 153#define TPM_VID_INTEL 0x8086
1f866057
SB
154#define TPM_VID_WINBOND 0x1050
155#define TPM_VID_STM 0x104A
4e401fb0 156
0dc55365
JS
157#define TPM_PPI_VERSION_LEN 3
158
afb5abc2
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159enum tpm_chip_flags {
160 TPM_CHIP_FLAG_REGISTERED = BIT(0),
0dc55365 161 TPM_CHIP_FLAG_PPI = BIT(1),
7a1d7e6d 162 TPM_CHIP_FLAG_TPM2 = BIT(2),
afb5abc2
JS
163};
164
1da177e4 165struct tpm_chip {
71ed848f 166 struct device *pdev; /* Device stuff */
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JS
167 struct device dev;
168 struct cdev cdev;
169
5f82e9f0 170 const struct tpm_class_ops *ops;
afb5abc2 171 unsigned int flags;
1da177e4
LT
172
173 int dev_num; /* /dev/tpm# */
6aff1fdc 174 char devname[7];
dc36d32c 175 unsigned long is_open; /* only one allowed */
1da177e4
LT
176 int time_expired;
177
d081d470 178 struct mutex tpm_mutex; /* tpm is processing */
1da177e4 179
90dda520 180 struct tpm_vendor_specific vendor;
1da177e4 181
55a82ab3
KJH
182 struct dentry **bios_dir;
183
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JS
184#ifdef CONFIG_ACPI
185 acpi_handle acpi_dev_handle;
186 char ppi_version[TPM_PPI_VERSION_LEN + 1];
187#endif /* CONFIG_ACPI */
188
1da177e4
LT
189 struct list_head list;
190};
191
27084efe
LD
192#define to_tpm_chip(n) container_of(n, struct tpm_chip, vendor)
193
a0e39349
MZ
194static inline void tpm_chip_put(struct tpm_chip *chip)
195{
71ed848f 196 module_put(chip->pdev->driver->owner);
a0e39349
MZ
197}
198
daacdfa6 199static inline int tpm_read_index(int base, int index)
1da177e4 200{
daacdfa6
KJH
201 outb(index, base);
202 return inb(base+1) & 0xFF;
1da177e4
LT
203}
204
daacdfa6 205static inline void tpm_write_index(int base, int index, int value)
1da177e4 206{
daacdfa6
KJH
207 outb(index, base);
208 outb(value & 0xFF, base+1);
1da177e4 209}
08837438
RA
210struct tpm_input_header {
211 __be16 tag;
212 __be32 length;
213 __be32 ordinal;
348df8db 214} __packed;
08837438
RA
215
216struct tpm_output_header {
217 __be16 tag;
218 __be32 length;
219 __be32 return_code;
348df8db 220} __packed;
08837438 221
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222#define TPM_TAG_RQU_COMMAND cpu_to_be16(193)
223
08837438
RA
224struct stclear_flags_t {
225 __be16 tag;
226 u8 deactivated;
227 u8 disableForceClear;
228 u8 physicalPresence;
229 u8 physicalPresenceLock;
230 u8 bGlobalLock;
348df8db 231} __packed;
08837438
RA
232
233struct tpm_version_t {
234 u8 Major;
235 u8 Minor;
236 u8 revMajor;
237 u8 revMinor;
348df8db 238} __packed;
08837438
RA
239
240struct tpm_version_1_2_t {
241 __be16 tag;
242 u8 Major;
243 u8 Minor;
244 u8 revMajor;
245 u8 revMinor;
348df8db 246} __packed;
08837438
RA
247
248struct timeout_t {
249 __be32 a;
250 __be32 b;
251 __be32 c;
252 __be32 d;
348df8db 253} __packed;
08837438
RA
254
255struct duration_t {
256 __be32 tpm_short;
257 __be32 tpm_medium;
258 __be32 tpm_long;
348df8db 259} __packed;
08837438
RA
260
261struct permanent_flags_t {
262 __be16 tag;
263 u8 disable;
264 u8 ownership;
265 u8 deactivated;
266 u8 readPubek;
267 u8 disableOwnerClear;
268 u8 allowMaintenance;
269 u8 physicalPresenceLifetimeLock;
270 u8 physicalPresenceHWEnable;
271 u8 physicalPresenceCMDEnable;
272 u8 CEKPUsed;
273 u8 TPMpost;
274 u8 TPMpostLock;
275 u8 FIPS;
276 u8 operator;
277 u8 enableRevokeEK;
278 u8 nvLocked;
279 u8 readSRKPub;
280 u8 tpmEstablished;
281 u8 maintenanceDone;
282 u8 disableFullDALogicInfo;
348df8db 283} __packed;
08837438
RA
284
285typedef union {
286 struct permanent_flags_t perm_flags;
287 struct stclear_flags_t stclear_flags;
288 bool owned;
289 __be32 num_pcrs;
290 struct tpm_version_t tpm_version;
291 struct tpm_version_1_2_t tpm_version_1_2;
292 __be32 manufacturer_id;
293 struct timeout_t timeout;
294 struct duration_t duration;
295} cap_t;
296
000a07b0
JG
297enum tpm_capabilities {
298 TPM_CAP_FLAG = cpu_to_be32(4),
299 TPM_CAP_PROP = cpu_to_be32(5),
300 CAP_VERSION_1_1 = cpu_to_be32(0x06),
301 CAP_VERSION_1_2 = cpu_to_be32(0x1A)
302};
303
304enum tpm_sub_capabilities {
305 TPM_CAP_PROP_PCR = cpu_to_be32(0x101),
306 TPM_CAP_PROP_MANUFACTURER = cpu_to_be32(0x103),
307 TPM_CAP_FLAG_PERM = cpu_to_be32(0x108),
308 TPM_CAP_FLAG_VOL = cpu_to_be32(0x109),
309 TPM_CAP_PROP_OWNER = cpu_to_be32(0x111),
310 TPM_CAP_PROP_TIS_TIMEOUT = cpu_to_be32(0x115),
311 TPM_CAP_PROP_TIS_DURATION = cpu_to_be32(0x120),
312
313};
314
08837438
RA
315struct tpm_getcap_params_in {
316 __be32 cap;
317 __be32 subcap_size;
318 __be32 subcap;
348df8db 319} __packed;
08837438
RA
320
321struct tpm_getcap_params_out {
322 __be32 cap_size;
323 cap_t cap;
348df8db 324} __packed;
08837438
RA
325
326struct tpm_readpubek_params_out {
327 u8 algorithm[4];
328 u8 encscheme[2];
329 u8 sigscheme[2];
02a077c5 330 __be32 paramsize;
08837438
RA
331 u8 parameters[12]; /*assuming RSA*/
332 __be32 keysize;
333 u8 modulus[256];
334 u8 checksum[20];
348df8db 335} __packed;
08837438
RA
336
337typedef union {
338 struct tpm_input_header in;
339 struct tpm_output_header out;
340} tpm_cmd_header;
341
659aaf2b
RA
342struct tpm_pcrread_out {
343 u8 pcr_result[TPM_DIGEST_SIZE];
348df8db 344} __packed;
659aaf2b
RA
345
346struct tpm_pcrread_in {
347 __be32 pcr_idx;
348df8db 348} __packed;
659aaf2b
RA
349
350struct tpm_pcrextend_in {
351 __be32 pcr_idx;
352 u8 hash[TPM_DIGEST_SIZE];
348df8db 353} __packed;
659aaf2b 354
41ab999c
KY
355/* 128 bytes is an arbitrary cap. This could be as large as TPM_BUFSIZE - 18
356 * bytes, but 128 is still a relatively large number of random bytes and
357 * anything much bigger causes users of struct tpm_cmd_t to start getting
358 * compiler warnings about stack frame size. */
359#define TPM_MAX_RNG_DATA 128
360
361struct tpm_getrandom_out {
362 __be32 rng_data_len;
363 u8 rng_data[TPM_MAX_RNG_DATA];
348df8db 364} __packed;
41ab999c
KY
365
366struct tpm_getrandom_in {
367 __be32 num_bytes;
348df8db 368} __packed;
41ab999c 369
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370struct tpm_startup_in {
371 __be16 startup_type;
372} __packed;
373
08837438
RA
374typedef union {
375 struct tpm_getcap_params_out getcap_out;
376 struct tpm_readpubek_params_out readpubek_out;
377 u8 readpubek_out_buffer[sizeof(struct tpm_readpubek_params_out)];
378 struct tpm_getcap_params_in getcap_in;
659aaf2b
RA
379 struct tpm_pcrread_in pcrread_in;
380 struct tpm_pcrread_out pcrread_out;
381 struct tpm_pcrextend_in pcrextend_in;
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KY
382 struct tpm_getrandom_in getrandom_in;
383 struct tpm_getrandom_out getrandom_out;
c584af19 384 struct tpm_startup_in startup_in;
08837438
RA
385} tpm_cmd_params;
386
387struct tpm_cmd_t {
388 tpm_cmd_header header;
389 tpm_cmd_params params;
348df8db 390} __packed;
08837438 391
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JS
392extern struct class *tpm_class;
393extern dev_t tpm_devt;
394extern const struct file_operations tpm_fops;
395
08837438 396ssize_t tpm_getcap(struct device *, __be32, cap_t *, const char *);
afdba32e
JG
397ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf,
398 size_t bufsiz);
87155b73
JS
399ssize_t tpm_transmit_cmd(struct tpm_chip *chip, void *cmd, int len,
400 const char *desc);
2b30a90f 401extern int tpm_get_timeouts(struct tpm_chip *);
08e96e48 402extern void tpm_gen_interrupt(struct tpm_chip *);
68d6e671 403extern int tpm_do_selftest(struct tpm_chip *);
9e18ee19 404extern unsigned long tpm_calc_ordinal_duration(struct tpm_chip *, u32);
035e2ce8 405extern int tpm_pm_suspend(struct device *);
ce2c87d4 406extern int tpm_pm_resume(struct device *);
fd048866 407extern int wait_for_tpm_stat(struct tpm_chip *, u8, unsigned long,
78f09cc2 408 wait_queue_head_t *, bool);
f84fdff0 409
afb5abc2
JS
410struct tpm_chip *tpm_chip_find_get(int chip_num);
411extern struct tpm_chip *tpmm_chip_alloc(struct device *dev,
412 const struct tpm_class_ops *ops);
413extern int tpm_chip_register(struct tpm_chip *chip);
414extern void tpm_chip_unregister(struct tpm_chip *chip);
415
1e3b73a9
JG
416int tpm_sysfs_add_device(struct tpm_chip *chip);
417void tpm_sysfs_del_device(struct tpm_chip *chip);
afdba32e 418
000a07b0
JG
419int tpm_pcr_read_dev(struct tpm_chip *chip, int pcr_idx, u8 *res_buf);
420
f84fdff0 421#ifdef CONFIG_ACPI
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422extern int tpm_add_ppi(struct tpm_chip *chip);
423extern void tpm_remove_ppi(struct tpm_chip *chip);
f84fdff0 424#else
0dc55365 425static inline int tpm_add_ppi(struct tpm_chip *chip)
f84fdff0
XZ
426{
427 return 0;
428}
1631cfb7 429
0dc55365 430static inline void tpm_remove_ppi(struct tpm_chip *chip)
1631cfb7
GW
431{
432}
f84fdff0 433#endif
7a1d7e6d
JS
434
435int tpm2_pcr_read(struct tpm_chip *chip, int pcr_idx, u8 *res_buf);
436int tpm2_pcr_extend(struct tpm_chip *chip, int pcr_idx, const u8 *hash);
437int tpm2_get_random(struct tpm_chip *chip, u8 *out, size_t max);
438ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id,
439 u32 *value, const char *desc);
440
441extern int tpm2_startup(struct tpm_chip *chip, u16 startup_type);
74d6b3ce 442extern void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type);
7a1d7e6d
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443extern unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *, u32);
444extern int tpm2_do_selftest(struct tpm_chip *chip);
4d5f2051
JS
445extern int tpm2_gen_interrupt(struct tpm_chip *chip);
446extern int tpm2_probe(struct tpm_chip *chip);