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b886d83c 1/* SPDX-License-Identifier: GPL-2.0-only */
1da177e4
LT
2/*
3 * Copyright (C) 2004 IBM Corporation
a74f8b36 4 * Copyright (C) 2015 Intel Corporation
1da177e4
LT
5 *
6 * Authors:
7 * Leendert van Doorn <leendert@watson.ibm.com>
8 * Dave Safford <safford@watson.ibm.com>
9 * Reiner Sailer <sailer@watson.ibm.com>
10 * Kylene Hall <kjhall@us.ibm.com>
11 *
8e81cc13 12 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
1da177e4
LT
13 *
14 * Device driver for TCG/TCPA TPM (trusted platform module).
3b09825d 15 * Specifications at www.trustedcomputinggroup.org
1da177e4 16 */
d2efee6e
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17
18#ifndef __TPM_H__
19#define __TPM_H__
20
1da177e4 21#include <linux/module.h>
1da177e4 22#include <linux/delay.h>
d081d470 23#include <linux/mutex.h>
914e2637 24#include <linux/sched.h>
bbc5b212 25#include <linux/platform_device.h>
276ad0c1 26#include <linux/io.h>
659aaf2b 27#include <linux/tpm.h>
a74f8b36 28#include <linux/highmem.h>
fd3ec366 29#include <linux/tpm_eventlog.h>
1da177e4 30
5e572cab
AS
31#ifdef CONFIG_X86
32#include <asm/intel-family.h>
33#endif
34
901615cb
RS
35#define TPM_MINOR 224 /* officially assigned */
36#define TPM_BUFSIZE 4096
37#define TPM_NUM_DEVICES 65536
38#define TPM_RETRY 50
41ab999c 39
3122a88a
KH
40enum tpm_timeout {
41 TPM_TIMEOUT = 5, /* msecs */
9f3fc7bc 42 TPM_TIMEOUT_RETRY = 100, /* msecs */
59f5a6b0 43 TPM_TIMEOUT_RANGE_US = 300, /* usecs */
424eaf91
NJ
44 TPM_TIMEOUT_POLL = 1, /* msecs */
45 TPM_TIMEOUT_USECS_MIN = 100, /* usecs */
46 TPM_TIMEOUT_USECS_MAX = 500 /* usecs */
3122a88a 47};
1da177e4
LT
48
49/* TPM addresses */
3122a88a 50enum tpm_addr {
daacdfa6 51 TPM_SUPERIO_ADDR = 0x2E,
3122a88a 52 TPM_ADDR = 0x4E,
3122a88a
KH
53};
54
32d33b29 55#define TPM_WARN_RETRY 0x800
68d6e671 56#define TPM_WARN_DOING_SELFTEST 0x802
be405411
SB
57#define TPM_ERR_DEACTIVATED 0x6
58#define TPM_ERR_DISABLED 0x7
c584af19 59#define TPM_ERR_INVALID_POSTINIT 38
be405411 60
b9e3238a 61#define TPM_HEADER_SIZE 10
7a1d7e6d
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62
63enum tpm2_const {
076d3564
TW
64 TPM2_PLATFORM_PCR = 24,
65 TPM2_PCR_SELECT_MIN = ((TPM2_PLATFORM_PCR + 7) / 8),
66};
67
68enum tpm2_timeouts {
69 TPM2_TIMEOUT_A = 750,
70 TPM2_TIMEOUT_B = 2000,
71 TPM2_TIMEOUT_C = 200,
72 TPM2_TIMEOUT_D = 30,
73 TPM2_DURATION_SHORT = 20,
74 TPM2_DURATION_MEDIUM = 750,
75 TPM2_DURATION_LONG = 2000,
76 TPM2_DURATION_LONG_LONG = 300000,
77 TPM2_DURATION_DEFAULT = 120000,
7a1d7e6d
JS
78};
79
80enum tpm2_structures {
81 TPM2_ST_NO_SESSIONS = 0x8001,
82 TPM2_ST_SESSIONS = 0x8002,
83};
84
095531f8
JMC
85/* Indicates from what layer of the software stack the error comes from */
86#define TSS2_RC_LAYER_SHIFT 16
87#define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT)
88
7a1d7e6d 89enum tpm2_return_codes {
745b361e 90 TPM2_RC_SUCCESS = 0x0000,
5ca4c20c 91 TPM2_RC_HASH = 0x0083, /* RC_FMT1 */
745b361e 92 TPM2_RC_HANDLE = 0x008B,
5ca4c20c 93 TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */
2be8ffed 94 TPM2_RC_FAILURE = 0x0101,
7a1d7e6d 95 TPM2_RC_DISABLED = 0x0120,
095531f8 96 TPM2_RC_COMMAND_CODE = 0x0143,
5ca4c20c 97 TPM2_RC_TESTING = 0x090A, /* RC_WARN */
745b361e 98 TPM2_RC_REFERENCE_H0 = 0x0910,
e2fb992d 99 TPM2_RC_RETRY = 0x0922,
7a1d7e6d
JS
100};
101
7a1d7e6d 102enum tpm2_command_codes {
899102bc
TW
103 TPM2_CC_FIRST = 0x011F,
104 TPM2_CC_HIERARCHY_CONTROL = 0x0121,
105 TPM2_CC_HIERARCHY_CHANGE_AUTH = 0x0129,
106 TPM2_CC_CREATE_PRIMARY = 0x0131,
107 TPM2_CC_SEQUENCE_COMPLETE = 0x013E,
108 TPM2_CC_SELF_TEST = 0x0143,
109 TPM2_CC_STARTUP = 0x0144,
110 TPM2_CC_SHUTDOWN = 0x0145,
111 TPM2_CC_NV_READ = 0x014E,
112 TPM2_CC_CREATE = 0x0153,
113 TPM2_CC_LOAD = 0x0157,
114 TPM2_CC_SEQUENCE_UPDATE = 0x015C,
115 TPM2_CC_UNSEAL = 0x015E,
116 TPM2_CC_CONTEXT_LOAD = 0x0161,
117 TPM2_CC_CONTEXT_SAVE = 0x0162,
118 TPM2_CC_FLUSH_CONTEXT = 0x0165,
119 TPM2_CC_VERIFY_SIGNATURE = 0x0177,
120 TPM2_CC_GET_CAPABILITY = 0x017A,
121 TPM2_CC_GET_RANDOM = 0x017B,
122 TPM2_CC_PCR_READ = 0x017E,
123 TPM2_CC_PCR_EXTEND = 0x0182,
124 TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185,
125 TPM2_CC_HASH_SEQUENCE_START = 0x0186,
126 TPM2_CC_CREATE_LOADED = 0x0191,
127 TPM2_CC_LAST = 0x0193, /* Spec 1.36 */
7a1d7e6d
JS
128};
129
130enum tpm2_permanent_handles {
131 TPM2_RS_PW = 0x40000009,
132};
133
134enum tpm2_capabilities {
745b361e 135 TPM2_CAP_HANDLES = 1,
58472f5c 136 TPM2_CAP_COMMANDS = 2,
1db15344 137 TPM2_CAP_PCRS = 5,
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JS
138 TPM2_CAP_TPM_PROPERTIES = 6,
139};
140
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JS
141enum tpm2_properties {
142 TPM_PT_TOTAL_COMMANDS = 0x0129,
143};
144
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145enum tpm2_startup_types {
146 TPM2_SU_CLEAR = 0x0000,
147 TPM2_SU_STATE = 0x0001,
148};
149
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JS
150enum tpm2_cc_attrs {
151 TPM2_CC_ATTR_CHANDLES = 25,
152 TPM2_CC_ATTR_RHANDLE = 28,
153};
154
4e401fb0 155#define TPM_VID_INTEL 0x8086
1f866057
SB
156#define TPM_VID_WINBOND 0x1050
157#define TPM_VID_STM 0x104A
4e401fb0 158
afb5abc2 159enum tpm_chip_flags {
9b774d5c 160 TPM_CHIP_FLAG_TPM2 = BIT(1),
570a3609 161 TPM_CHIP_FLAG_IRQ = BIT(2),
2f9f5377 162 TPM_CHIP_FLAG_VIRTUAL = BIT(3),
d1d253cf 163 TPM_CHIP_FLAG_HAVE_TIMEOUTS = BIT(4),
b5d0ebc9 164 TPM_CHIP_FLAG_ALWAYS_POWERED = BIT(5),
afb5abc2
JS
165};
166
9b774d5c 167#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)
27084efe 168
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JS
169struct tpm_header {
170 __be16 tag;
171 __be32 length;
172 union {
173 __be32 ordinal;
174 __be32 return_code;
175 };
348df8db 176} __packed;
08837438 177
06e93279 178#define TPM_TAG_RQU_COMMAND 193
000a07b0 179
08837438
RA
180struct stclear_flags_t {
181 __be16 tag;
182 u8 deactivated;
183 u8 disableForceClear;
184 u8 physicalPresence;
185 u8 physicalPresenceLock;
186 u8 bGlobalLock;
348df8db 187} __packed;
08837438
RA
188
189struct tpm_version_t {
190 u8 Major;
191 u8 Minor;
192 u8 revMajor;
193 u8 revMinor;
348df8db 194} __packed;
08837438
RA
195
196struct tpm_version_1_2_t {
197 __be16 tag;
198 u8 Major;
199 u8 Minor;
200 u8 revMajor;
201 u8 revMinor;
348df8db 202} __packed;
08837438
RA
203
204struct timeout_t {
205 __be32 a;
206 __be32 b;
207 __be32 c;
208 __be32 d;
348df8db 209} __packed;
08837438
RA
210
211struct duration_t {
212 __be32 tpm_short;
213 __be32 tpm_medium;
214 __be32 tpm_long;
348df8db 215} __packed;
08837438
RA
216
217struct permanent_flags_t {
218 __be16 tag;
219 u8 disable;
220 u8 ownership;
221 u8 deactivated;
222 u8 readPubek;
223 u8 disableOwnerClear;
224 u8 allowMaintenance;
225 u8 physicalPresenceLifetimeLock;
226 u8 physicalPresenceHWEnable;
227 u8 physicalPresenceCMDEnable;
228 u8 CEKPUsed;
229 u8 TPMpost;
230 u8 TPMpostLock;
231 u8 FIPS;
232 u8 operator;
233 u8 enableRevokeEK;
234 u8 nvLocked;
235 u8 readSRKPub;
236 u8 tpmEstablished;
237 u8 maintenanceDone;
238 u8 disableFullDALogicInfo;
348df8db 239} __packed;
08837438
RA
240
241typedef union {
242 struct permanent_flags_t perm_flags;
243 struct stclear_flags_t stclear_flags;
a118cf2a 244 __u8 owned;
08837438
RA
245 __be32 num_pcrs;
246 struct tpm_version_t tpm_version;
247 struct tpm_version_1_2_t tpm_version_1_2;
248 __be32 manufacturer_id;
249 struct timeout_t timeout;
250 struct duration_t duration;
251} cap_t;
252
000a07b0 253enum tpm_capabilities {
84fda152
JS
254 TPM_CAP_FLAG = 4,
255 TPM_CAP_PROP = 5,
256 TPM_CAP_VERSION_1_1 = 0x06,
257 TPM_CAP_VERSION_1_2 = 0x1A,
000a07b0
JG
258};
259
260enum tpm_sub_capabilities {
84fda152
JS
261 TPM_CAP_PROP_PCR = 0x101,
262 TPM_CAP_PROP_MANUFACTURER = 0x103,
263 TPM_CAP_FLAG_PERM = 0x108,
264 TPM_CAP_FLAG_VOL = 0x109,
265 TPM_CAP_PROP_OWNER = 0x111,
266 TPM_CAP_PROP_TIS_TIMEOUT = 0x115,
267 TPM_CAP_PROP_TIS_DURATION = 0x120,
000a07b0
JG
268};
269
659aaf2b 270
41ab999c
KY
271/* 128 bytes is an arbitrary cap. This could be as large as TPM_BUFSIZE - 18
272 * bytes, but 128 is still a relatively large number of random bytes and
273 * anything much bigger causes users of struct tpm_cmd_t to start getting
274 * compiler warnings about stack frame size. */
275#define TPM_MAX_RNG_DATA 128
276
a74f8b36
JS
277/* A string buffer type for constructing TPM commands. This is based on the
278 * ideas of string buffer code in security/keys/trusted.h but is heap based
279 * in order to keep the stack usage minimal.
280 */
281
282enum tpm_buf_flags {
283 TPM_BUF_OVERFLOW = BIT(0),
284};
285
286struct tpm_buf {
287 struct page *data_page;
288 unsigned int flags;
289 u8 *data;
290};
291
ce63c05b 292static inline void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal)
a74f8b36 293{
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JS
294 struct tpm_header *head = (struct tpm_header *)buf->data;
295
ce63c05b
JS
296 head->tag = cpu_to_be16(tag);
297 head->length = cpu_to_be32(sizeof(*head));
298 head->ordinal = cpu_to_be32(ordinal);
299}
a74f8b36 300
ce63c05b
JS
301static inline int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal)
302{
a74f8b36
JS
303 buf->data_page = alloc_page(GFP_HIGHUSER);
304 if (!buf->data_page)
305 return -ENOMEM;
306
307 buf->flags = 0;
308 buf->data = kmap(buf->data_page);
ce63c05b 309 tpm_buf_reset(buf, tag, ordinal);
a74f8b36
JS
310 return 0;
311}
312
313static inline void tpm_buf_destroy(struct tpm_buf *buf)
314{
315 kunmap(buf->data_page);
316 __free_page(buf->data_page);
317}
318
319static inline u32 tpm_buf_length(struct tpm_buf *buf)
320{
b34b77a9 321 struct tpm_header *head = (struct tpm_header *)buf->data;
a74f8b36
JS
322
323 return be32_to_cpu(head->length);
324}
325
326static inline u16 tpm_buf_tag(struct tpm_buf *buf)
327{
b34b77a9 328 struct tpm_header *head = (struct tpm_header *)buf->data;
a74f8b36
JS
329
330 return be16_to_cpu(head->tag);
331}
332
333static inline void tpm_buf_append(struct tpm_buf *buf,
334 const unsigned char *new_data,
335 unsigned int new_len)
336{
b34b77a9 337 struct tpm_header *head = (struct tpm_header *)buf->data;
a74f8b36
JS
338 u32 len = tpm_buf_length(buf);
339
340 /* Return silently if overflow has already happened. */
341 if (buf->flags & TPM_BUF_OVERFLOW)
342 return;
343
344 if ((len + new_len) > PAGE_SIZE) {
345 WARN(1, "tpm_buf: overflow\n");
346 buf->flags |= TPM_BUF_OVERFLOW;
347 return;
348 }
349
350 memcpy(&buf->data[len], new_data, new_len);
351 head->length = cpu_to_be32(len + new_len);
352}
353
354static inline void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value)
355{
356 tpm_buf_append(buf, &value, 1);
357}
358
359static inline void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value)
360{
361 __be16 value2 = cpu_to_be16(value);
362
363 tpm_buf_append(buf, (u8 *) &value2, 2);
364}
365
366static inline void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value)
367{
368 __be32 value2 = cpu_to_be32(value);
369
370 tpm_buf_append(buf, (u8 *) &value2, 4);
371}
372
313d21ee 373extern struct class *tpm_class;
fdc915f7 374extern struct class *tpmrm_class;
313d21ee
JS
375extern dev_t tpm_devt;
376extern const struct file_operations tpm_fops;
fdc915f7 377extern const struct file_operations tpmrm_fops;
15516788 378extern struct idr dev_nums_idr;
313d21ee 379
47a6c28b 380ssize_t tpm_transmit(struct tpm_chip *chip, u8 *buf, size_t bufsiz);
5faafbab 381ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf,
47a6c28b 382 size_t min_rsp_body_length, const char *desc);
d4abd956 383int tpm_get_timeouts(struct tpm_chip *);
b03c4370 384int tpm_auto_startup(struct tpm_chip *chip);
c82a330c 385
95adc6b4 386int tpm1_pm_suspend(struct tpm_chip *chip, u32 tpm_suspend_pcr);
cae8b441 387int tpm1_auto_startup(struct tpm_chip *chip);
d4a31756 388int tpm1_do_selftest(struct tpm_chip *chip);
70a3199a 389int tpm1_get_timeouts(struct tpm_chip *chip);
b2d6e6de 390unsigned long tpm1_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal);
95adc6b4 391int tpm1_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, const u8 *hash,
1ad6640c 392 const char *log_msg);
95adc6b4 393int tpm1_pcr_read(struct tpm_chip *chip, u32 pcr_idx, u8 *res_buf);
f4d916b7
TW
394ssize_t tpm1_getcap(struct tpm_chip *chip, u32 subcap_id, cap_t *cap,
395 const char *desc, size_t min_cap_length);
433d390f 396int tpm1_get_random(struct tpm_chip *chip, u8 *out, size_t max);
d856c00f 397unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal);
d4abd956
JS
398int tpm_pm_suspend(struct device *dev);
399int tpm_pm_resume(struct device *dev);
f84fdff0 400
9f3fc7bc
HA
401static inline void tpm_msleep(unsigned int delay_msec)
402{
5ef924d9
NJ
403 usleep_range((delay_msec * 1000) - TPM_TIMEOUT_RANGE_US,
404 delay_msec * 1000);
9f3fc7bc
HA
405};
406
47a6c28b
JS
407int tpm_chip_start(struct tpm_chip *chip);
408void tpm_chip_stop(struct tpm_chip *chip);
fc1d52b7 409struct tpm_chip *tpm_find_get_ops(struct tpm_chip *chip);
4e26195f
JG
410__must_check int tpm_try_get_ops(struct tpm_chip *chip);
411void tpm_put_ops(struct tpm_chip *chip);
412
d4abd956
JS
413struct tpm_chip *tpm_chip_alloc(struct device *dev,
414 const struct tpm_class_ops *ops);
415struct tpm_chip *tpmm_chip_alloc(struct device *pdev,
416 const struct tpm_class_ops *ops);
417int tpm_chip_register(struct tpm_chip *chip);
418void tpm_chip_unregister(struct tpm_chip *chip);
afb5abc2 419
062807f2 420void tpm_sysfs_add_device(struct tpm_chip *chip);
afdba32e 421
000a07b0 422
f84fdff0 423#ifdef CONFIG_ACPI
9b774d5c 424extern void tpm_add_ppi(struct tpm_chip *chip);
f84fdff0 425#else
9b774d5c 426static inline void tpm_add_ppi(struct tpm_chip *chip)
1631cfb7
GW
427{
428}
f84fdff0 429#endif
7a1d7e6d 430
2d56c718 431static inline u32 tpm2_rc_value(u32 rc)
7d761119
JS
432{
433 return (rc & BIT(7)) ? rc & 0xff : rc;
434}
435
70a3199a 436int tpm2_get_timeouts(struct tpm_chip *chip);
879b5892
RS
437int tpm2_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
438 struct tpm_digest *digest, u16 *digest_size_ptr);
0b6cf6b9 439int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
aa042475 440 struct tpm_digest *digests);
ce63c05b 441int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max);
47a6c28b 442void tpm2_flush_context(struct tpm_chip *chip, u32 handle);
954650ef
JS
443int tpm2_seal_trusted(struct tpm_chip *chip,
444 struct trusted_key_payload *payload,
445 struct trusted_key_options *options);
446int tpm2_unseal_trusted(struct tpm_chip *chip,
447 struct trusted_key_payload *payload,
448 struct trusted_key_options *options);
7a1d7e6d
JS
449ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id,
450 u32 *value, const char *desc);
451
cae8b441 452int tpm2_auto_startup(struct tpm_chip *chip);
d4abd956
JS
453void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type);
454unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal);
d4abd956 455int tpm2_probe(struct tpm_chip *chip);
58472f5c 456int tpm2_find_cc(struct tpm_chip *chip, u32 cc);
745b361e 457int tpm2_init_space(struct tpm_space *space);
4d57856a 458void tpm2_del_space(struct tpm_chip *chip, struct tpm_space *space);
304ff672 459void tpm2_flush_space(struct tpm_chip *chip);
c3465a37
JS
460int tpm2_prepare_space(struct tpm_chip *chip, struct tpm_space *space, u8 *cmd,
461 size_t cmdsiz);
462int tpm2_commit_space(struct tpm_chip *chip, struct tpm_space *space, void *buf,
463 size_t *bufsiz);
fd3ec366 464
fd3ec366
TW
465int tpm_bios_log_setup(struct tpm_chip *chip);
466void tpm_bios_log_teardown(struct tpm_chip *chip);
9e1b74a6
TS
467int tpm_dev_common_init(void);
468void tpm_dev_common_exit(void);
d2efee6e 469#endif