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Commit | Line | Data |
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6d803ba7 JCPV |
1 | |
2 | config CLKDEV_LOOKUP | |
3 | bool | |
4 | select HAVE_CLK | |
aa3831cf | 5 | |
5c77f560 SG |
6 | config HAVE_CLK_PREPARE |
7 | bool | |
8 | ||
8fb61e33 AB |
9 | config COMMON_CLK |
10 | bool | |
b2476490 | 11 | select HAVE_CLK_PREPARE |
01033be1 | 12 | select CLKDEV_LOOKUP |
83fe27ea | 13 | select SRCU |
0777591e | 14 | select RATIONAL |
b2476490 MT |
15 | ---help--- |
16 | The common clock framework is a single definition of struct | |
17 | clk, useful across many platforms, as well as an | |
18 | implementation of the clock API in include/linux/clk.h. | |
19 | Architectures utilizing the common struct clk should select | |
8fb61e33 | 20 | this option. |
b2476490 | 21 | |
8fb61e33 AB |
22 | menu "Common Clock Framework" |
23 | depends on COMMON_CLK | |
b2476490 | 24 | |
f05259a6 MB |
25 | config COMMON_CLK_WM831X |
26 | tristate "Clock driver for WM831x/2x PMICs" | |
27 | depends on MFD_WM831X | |
28 | ---help--- | |
29 | Supports the clocking subsystem of the WM831x/2x series of | |
fe4e4372 | 30 | PMICs from Wolfson Microelectronics. |
f05259a6 | 31 | |
5ee2b877 | 32 | source "drivers/clk/versatile/Kconfig" |
f9a6aa43 | 33 | |
73118e61 | 34 | config COMMON_CLK_MAX77686 |
5a227cd1 | 35 | tristate "Clock driver for Maxim 77620/77686/77802 MFD" |
9c1b305c | 36 | depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST |
83ccf16c | 37 | ---help--- |
5a227cd1 LD |
38 | This driver supports Maxim 77620/77686/77802 crystal oscillator |
39 | clock. | |
83ccf16c | 40 | |
038b892a | 41 | config COMMON_CLK_RK808 |
cb98fd5d | 42 | tristate "Clock driver for RK808/RK818" |
038b892a CZ |
43 | depends on MFD_RK808 |
44 | ---help--- | |
cb98fd5d | 45 | This driver supports RK808 and RK818 crystal oscillator clock. These |
038b892a CZ |
46 | multi-function devices have two fixed-rate oscillators, |
47 | clocked at 32KHz each. Clkout1 is always on, Clkout2 can off | |
48 | by control register. | |
49 | ||
cd52c2a4 SH |
50 | config COMMON_CLK_SCPI |
51 | tristate "Clock driver controlled via SCPI interface" | |
52 | depends on ARM_SCPI_PROTOCOL || COMPILE_TEST | |
53 | ---help--- | |
54 | This driver provides support for clocks that are controlled | |
55 | by firmware that implements the SCPI interface. | |
56 | ||
57 | This driver uses SCPI Message Protocol to interact with the | |
58 | firmware providing all the clock controls. | |
59 | ||
9abd5f05 SH |
60 | config COMMON_CLK_SI5351 |
61 | tristate "Clock driver for SiLabs 5351A/B/C" | |
62 | depends on I2C | |
63 | select REGMAP_I2C | |
64 | select RATIONAL | |
65 | ---help--- | |
66 | This driver supports Silicon Labs 5351A/B/C programmable clock | |
67 | generators. | |
68 | ||
8ce20e66 ML |
69 | config COMMON_CLK_SI514 |
70 | tristate "Clock driver for SiLabs 514 devices" | |
71 | depends on I2C | |
72 | depends on OF | |
73 | select REGMAP_I2C | |
74 | help | |
75 | ---help--- | |
76 | This driver supports the Silicon Labs 514 programmable clock | |
77 | generator. | |
78 | ||
1459c837 SB |
79 | config COMMON_CLK_SI570 |
80 | tristate "Clock driver for SiLabs 570 and compatible devices" | |
81 | depends on I2C | |
82 | depends on OF | |
83 | select REGMAP_I2C | |
84 | help | |
85 | ---help--- | |
86 | This driver supports Silicon Labs 570/571/598/599 programmable | |
87 | clock generators. | |
88 | ||
c7d5a46b ML |
89 | config COMMON_CLK_CDCE706 |
90 | tristate "Clock driver for TI CDCE706 clock synthesizer" | |
91 | depends on I2C | |
92 | select REGMAP_I2C | |
93 | select RATIONAL | |
94 | ---help--- | |
95 | This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. | |
96 | ||
19fbbbbc | 97 | config COMMON_CLK_CDCE925 |
5508124c | 98 | tristate "Clock driver for TI CDCE913/925/937/949 devices" |
19fbbbbc ML |
99 | depends on I2C |
100 | depends on OF | |
101 | select REGMAP_I2C | |
102 | help | |
103 | ---help--- | |
5508124c AM |
104 | This driver supports the TI CDCE913/925/937/949 programmable clock |
105 | synthesizer. Each chip has different number of PLLs and outputs. | |
106 | For example, the CDCE925 contains two PLLs with spread-spectrum | |
107 | clocking support and five output dividers. The driver only supports | |
108 | the following setup, and uses a fixed setting for the output muxes. | |
19fbbbbc ML |
109 | Y1 is derived from the input clock |
110 | Y2 and Y3 derive from PLL1 | |
111 | Y4 and Y5 derive from PLL2 | |
112 | Given a target output frequency, the driver will set the PLL and | |
113 | divider to best approximate the desired output. | |
114 | ||
64dfbe24 KM |
115 | config COMMON_CLK_CS2000_CP |
116 | tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" | |
117 | depends on I2C | |
118 | help | |
119 | If you say yes here you get support for the CS2000 clock multiplier. | |
120 | ||
7cc560de | 121 | config COMMON_CLK_S2MPS11 |
e8b60a45 | 122 | tristate "Clock driver for S2MPS1X/S5M8767 MFD" |
9c1b305c | 123 | depends on MFD_SEC_CORE || COMPILE_TEST |
7cc560de | 124 | ---help--- |
e8b60a45 KK |
125 | This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator |
126 | clock. These multi-function devices have two (S2MPS14) or three | |
127 | (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. | |
7cc560de | 128 | |
f9f8c043 PU |
129 | config CLK_TWL6040 |
130 | tristate "External McPDM functional clock from twl6040" | |
131 | depends on TWL6040_CORE | |
132 | ---help--- | |
133 | Enable the external functional clock support on OMAP4+ platforms for | |
134 | McPDM. McPDM module is using the external bit clock on the McPDM bus | |
135 | as functional clock. | |
136 | ||
0e646c52 LPC |
137 | config COMMON_CLK_AXI_CLKGEN |
138 | tristate "AXI clkgen driver" | |
4a7748c3 | 139 | depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST |
0e646c52 LPC |
140 | help |
141 | ---help--- | |
142 | Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx | |
143 | FPGAs. It is commonly used in Analog Devices' reference designs. | |
144 | ||
93a17c05 TY |
145 | config CLK_QORIQ |
146 | bool "Clock driver for Freescale QorIQ platforms" | |
2f4bf528 | 147 | depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF |
555eae97 | 148 | ---help--- |
93a17c05 TY |
149 | This adds the clock driver support for Freescale QorIQ platforms |
150 | using common clock framework. | |
555eae97 | 151 | |
308964ca LH |
152 | config COMMON_CLK_XGENE |
153 | bool "Clock driver for APM XGene SoC" | |
154 | default y | |
4a7748c3 | 155 | depends on ARM64 || COMPILE_TEST |
308964ca LH |
156 | ---help--- |
157 | Sypport for the APM X-Gene SoC reference, PLL, and device clocks. | |
158 | ||
6cfc229d SS |
159 | config COMMON_CLK_KEYSTONE |
160 | tristate "Clock drivers for Keystone based SOCs" | |
4a7748c3 | 161 | depends on (ARCH_KEYSTONE || COMPILE_TEST) && OF |
6cfc229d SS |
162 | ---help--- |
163 | Supports clock drivers for Keystone based SOCs. These SOCs have local | |
164 | a power sleep control module that gate the clock to the IPs and PLLs. | |
165 | ||
f7c82a60 VZ |
166 | config COMMON_CLK_NXP |
167 | def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) | |
168 | select REGMAP_MMIO if ARCH_LPC32XX | |
72ad679a | 169 | select MFD_SYSCON if ARCH_LPC18XX |
f7c82a60 VZ |
170 | ---help--- |
171 | Support for clock providers on NXP platforms. | |
172 | ||
942d1d67 PU |
173 | config COMMON_CLK_PALMAS |
174 | tristate "Clock driver for TI Palmas devices" | |
175 | depends on MFD_PALMAS | |
176 | ---help--- | |
177 | This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO | |
178 | using common clock framework. | |
179 | ||
9a74ccdb PZ |
180 | config COMMON_CLK_PWM |
181 | tristate "Clock driver for PWMs used as clock outputs" | |
182 | depends on PWM | |
183 | ---help--- | |
184 | Adapter driver so that any PWM output can be (mis)used as clock signal | |
185 | at 50% duty cycle. | |
186 | ||
98d147f5 RJ |
187 | config COMMON_CLK_PXA |
188 | def_bool COMMON_CLK && ARCH_PXA | |
189 | ---help--- | |
048c58b4 | 190 | Support for the Marvell PXA SoC. |
98d147f5 | 191 | |
ce6e1188 PCM |
192 | config COMMON_CLK_PIC32 |
193 | def_bool COMMON_CLK && MACH_PIC32 | |
194 | ||
0bbd72b4 NA |
195 | config COMMON_CLK_OXNAS |
196 | bool "Clock driver for the OXNAS SoC Family" | |
821f9946 | 197 | depends on ARCH_OXNAS || COMPILE_TEST |
0bbd72b4 NA |
198 | select MFD_SYSCON |
199 | ---help--- | |
200 | Support for the OXNAS SoC Family clocks. | |
201 | ||
3e1aec4e MV |
202 | config COMMON_CLK_VC5 |
203 | tristate "Clock driver for IDT VersaClock5 devices" | |
204 | depends on I2C | |
205 | depends on OF | |
206 | select REGMAP_I2C | |
207 | help | |
208 | ---help--- | |
209 | This driver supports the IDT VersaClock5 programmable clock | |
210 | generator. | |
211 | ||
64a12c56 | 212 | source "drivers/clk/bcm/Kconfig" |
72ea4861 | 213 | source "drivers/clk/hisilicon/Kconfig" |
2886c846 | 214 | source "drivers/clk/mediatek/Kconfig" |
cb7c47d7 | 215 | source "drivers/clk/meson/Kconfig" |
97fa4cf4 | 216 | source "drivers/clk/mvebu/Kconfig" |
b9e65ebc | 217 | source "drivers/clk/qcom/Kconfig" |
a5bd7f7a | 218 | source "drivers/clk/renesas/Kconfig" |
4ce9b85e | 219 | source "drivers/clk/samsung/Kconfig" |
1d80c142 | 220 | source "drivers/clk/sunxi-ng/Kconfig" |
31b52ba4 | 221 | source "drivers/clk/tegra/Kconfig" |
21330497 | 222 | source "drivers/clk/ti/Kconfig" |
734d82f4 | 223 | source "drivers/clk/uniphier/Kconfig" |
b9e65ebc JL |
224 | |
225 | endmenu |