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Commit | Line | Data |
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6d803ba7 JCPV |
1 | |
2 | config CLKDEV_LOOKUP | |
3 | bool | |
4 | select HAVE_CLK | |
aa3831cf | 5 | |
5c77f560 SG |
6 | config HAVE_CLK_PREPARE |
7 | bool | |
8 | ||
aa3831cf KP |
9 | config HAVE_MACH_CLKDEV |
10 | bool | |
b2476490 | 11 | |
8fb61e33 AB |
12 | config COMMON_CLK |
13 | bool | |
b2476490 | 14 | select HAVE_CLK_PREPARE |
01033be1 | 15 | select CLKDEV_LOOKUP |
83fe27ea | 16 | select SRCU |
b2476490 MT |
17 | ---help--- |
18 | The common clock framework is a single definition of struct | |
19 | clk, useful across many platforms, as well as an | |
20 | implementation of the clock API in include/linux/clk.h. | |
21 | Architectures utilizing the common struct clk should select | |
8fb61e33 | 22 | this option. |
b2476490 | 23 | |
8fb61e33 AB |
24 | menu "Common Clock Framework" |
25 | depends on COMMON_CLK | |
b2476490 | 26 | |
f05259a6 MB |
27 | config COMMON_CLK_WM831X |
28 | tristate "Clock driver for WM831x/2x PMICs" | |
29 | depends on MFD_WM831X | |
30 | ---help--- | |
31 | Supports the clocking subsystem of the WM831x/2x series of | |
fe4e4372 | 32 | PMICs from Wolfson Microelectronics. |
f05259a6 | 33 | |
5ee2b877 | 34 | source "drivers/clk/versatile/Kconfig" |
f9a6aa43 | 35 | |
5dbbb00f JMC |
36 | config COMMON_CLK_MAX_GEN |
37 | bool | |
38 | ||
73118e61 JL |
39 | config COMMON_CLK_MAX77686 |
40 | tristate "Clock driver for Maxim 77686 MFD" | |
41 | depends on MFD_MAX77686 | |
1887d693 | 42 | select COMMON_CLK_MAX_GEN |
73118e61 JL |
43 | ---help--- |
44 | This driver supports Maxim 77686 crystal oscillator clock. | |
45 | ||
83ccf16c JMC |
46 | config COMMON_CLK_MAX77802 |
47 | tristate "Clock driver for Maxim 77802 PMIC" | |
48 | depends on MFD_MAX77686 | |
49 | select COMMON_CLK_MAX_GEN | |
50 | ---help--- | |
51 | This driver supports Maxim 77802 crystal oscillator clock. | |
52 | ||
038b892a CZ |
53 | config COMMON_CLK_RK808 |
54 | tristate "Clock driver for RK808" | |
55 | depends on MFD_RK808 | |
56 | ---help--- | |
57 | This driver supports RK808 crystal oscillator clock. These | |
58 | multi-function devices have two fixed-rate oscillators, | |
59 | clocked at 32KHz each. Clkout1 is always on, Clkout2 can off | |
60 | by control register. | |
61 | ||
cd52c2a4 SH |
62 | config COMMON_CLK_SCPI |
63 | tristate "Clock driver controlled via SCPI interface" | |
64 | depends on ARM_SCPI_PROTOCOL || COMPILE_TEST | |
65 | ---help--- | |
66 | This driver provides support for clocks that are controlled | |
67 | by firmware that implements the SCPI interface. | |
68 | ||
69 | This driver uses SCPI Message Protocol to interact with the | |
70 | firmware providing all the clock controls. | |
71 | ||
9abd5f05 SH |
72 | config COMMON_CLK_SI5351 |
73 | tristate "Clock driver for SiLabs 5351A/B/C" | |
74 | depends on I2C | |
75 | select REGMAP_I2C | |
76 | select RATIONAL | |
77 | ---help--- | |
78 | This driver supports Silicon Labs 5351A/B/C programmable clock | |
79 | generators. | |
80 | ||
1459c837 SB |
81 | config COMMON_CLK_SI570 |
82 | tristate "Clock driver for SiLabs 570 and compatible devices" | |
83 | depends on I2C | |
84 | depends on OF | |
85 | select REGMAP_I2C | |
86 | help | |
87 | ---help--- | |
88 | This driver supports Silicon Labs 570/571/598/599 programmable | |
89 | clock generators. | |
90 | ||
19fbbbbc ML |
91 | config COMMON_CLK_CDCE925 |
92 | tristate "Clock driver for TI CDCE925 devices" | |
93 | depends on I2C | |
94 | depends on OF | |
95 | select REGMAP_I2C | |
96 | help | |
97 | ---help--- | |
98 | This driver supports the TI CDCE925 programmable clock synthesizer. | |
99 | The chip contains two PLLs with spread-spectrum clocking support and | |
100 | five output dividers. The driver only supports the following setup, | |
101 | and uses a fixed setting for the output muxes. | |
102 | Y1 is derived from the input clock | |
103 | Y2 and Y3 derive from PLL1 | |
104 | Y4 and Y5 derive from PLL2 | |
105 | Given a target output frequency, the driver will set the PLL and | |
106 | divider to best approximate the desired output. | |
107 | ||
7cc560de | 108 | config COMMON_CLK_S2MPS11 |
e8b60a45 | 109 | tristate "Clock driver for S2MPS1X/S5M8767 MFD" |
7cc560de YSB |
110 | depends on MFD_SEC_CORE |
111 | ---help--- | |
e8b60a45 KK |
112 | This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator |
113 | clock. These multi-function devices have two (S2MPS14) or three | |
114 | (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. | |
7cc560de | 115 | |
f9f8c043 PU |
116 | config CLK_TWL6040 |
117 | tristate "External McPDM functional clock from twl6040" | |
118 | depends on TWL6040_CORE | |
119 | ---help--- | |
120 | Enable the external functional clock support on OMAP4+ platforms for | |
121 | McPDM. McPDM module is using the external bit clock on the McPDM bus | |
122 | as functional clock. | |
123 | ||
0e646c52 LPC |
124 | config COMMON_CLK_AXI_CLKGEN |
125 | tristate "AXI clkgen driver" | |
126 | depends on ARCH_ZYNQ || MICROBLAZE | |
127 | help | |
128 | ---help--- | |
129 | Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx | |
130 | FPGAs. It is commonly used in Analog Devices' reference designs. | |
131 | ||
93a17c05 TY |
132 | config CLK_QORIQ |
133 | bool "Clock driver for Freescale QorIQ platforms" | |
134 | depends on (PPC_E500MC || ARM) && OF | |
555eae97 | 135 | ---help--- |
93a17c05 TY |
136 | This adds the clock driver support for Freescale QorIQ platforms |
137 | using common clock framework. | |
555eae97 | 138 | |
308964ca LH |
139 | config COMMON_CLK_XGENE |
140 | bool "Clock driver for APM XGene SoC" | |
141 | default y | |
142 | depends on ARM64 | |
143 | ---help--- | |
144 | Sypport for the APM X-Gene SoC reference, PLL, and device clocks. | |
145 | ||
6cfc229d SS |
146 | config COMMON_CLK_KEYSTONE |
147 | tristate "Clock drivers for Keystone based SOCs" | |
148 | depends on ARCH_KEYSTONE && OF | |
149 | ---help--- | |
150 | Supports clock drivers for Keystone based SOCs. These SOCs have local | |
151 | a power sleep control module that gate the clock to the IPs and PLLs. | |
152 | ||
942d1d67 PU |
153 | config COMMON_CLK_PALMAS |
154 | tristate "Clock driver for TI Palmas devices" | |
155 | depends on MFD_PALMAS | |
156 | ---help--- | |
157 | This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO | |
158 | using common clock framework. | |
159 | ||
9a74ccdb PZ |
160 | config COMMON_CLK_PWM |
161 | tristate "Clock driver for PWMs used as clock outputs" | |
162 | depends on PWM | |
163 | ---help--- | |
164 | Adapter driver so that any PWM output can be (mis)used as clock signal | |
165 | at 50% duty cycle. | |
166 | ||
98d147f5 RJ |
167 | config COMMON_CLK_PXA |
168 | def_bool COMMON_CLK && ARCH_PXA | |
169 | ---help--- | |
170 | Sypport for the Marvell PXA SoC. | |
171 | ||
0c7665c3 MF |
172 | config COMMON_CLK_CDCE706 |
173 | tristate "Clock driver for TI CDCE706 clock synthesizer" | |
174 | depends on I2C | |
175 | select REGMAP_I2C | |
176 | select RATIONAL | |
177 | ---help--- | |
178 | This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. | |
179 | ||
64a12c56 | 180 | source "drivers/clk/bcm/Kconfig" |
72ea4861 | 181 | source "drivers/clk/hisilicon/Kconfig" |
085d7a45 SB |
182 | source "drivers/clk/qcom/Kconfig" |
183 | ||
8fb61e33 | 184 | endmenu |
97fa4cf4 SH |
185 | |
186 | source "drivers/clk/mvebu/Kconfig" | |
4ce9b85e PD |
187 | |
188 | source "drivers/clk/samsung/Kconfig" | |
31b52ba4 | 189 | source "drivers/clk/tegra/Kconfig" |