[mirror_ubuntu-jammy-kernel.git] / drivers / clk / at91 / pmc.h

/*
 * drivers/clk/at91/pmc.h
 *
 *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#ifndef __PMC_H_
#define __PMC_H_

#include <linux/io.h>
#include <linux/irqdomain.h>
#include <linux/regmap.h>
#include <linux/spinlock.h>

extern spinlock_t pmc_pcr_lock;

struct pmc_data {
	unsigned int ncore;
	struct clk_hw **chws;
	unsigned int nsystem;
	struct clk_hw **shws;
	unsigned int nperiph;
	struct clk_hw **phws;
	unsigned int ngck;
	struct clk_hw **ghws;
};

struct clk_range {
	unsigned long min;
	unsigned long max;
};

#define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,}

struct clk_master_layout {
	u32 mask;
	u8 pres_shift;
};

extern const struct clk_master_layout at91rm9200_master_layout;
extern const struct clk_master_layout at91sam9x5_master_layout;

struct clk_master_characteristics {
	struct clk_range output;
	u32 divisors[4];
	u8 have_div3_pres;
};

struct clk_pll_layout {
	u32 pllr_mask;
	u16 mul_mask;
	u8 mul_shift;
};

extern const struct clk_pll_layout at91rm9200_pll_layout;
extern const struct clk_pll_layout at91sam9g45_pll_layout;
extern const struct clk_pll_layout at91sam9g20_pllb_layout;
extern const struct clk_pll_layout sama5d3_pll_layout;

struct clk_pll_characteristics {
	struct clk_range input;
	int num_output;
	struct clk_range *output;
	u16 *icpll;
	u8 *out;
};

struct clk_programmable_layout {
	u8 pres_shift;
	u8 css_mask;
	u8 have_slck_mck;
};

extern const struct clk_programmable_layout at91rm9200_programmable_layout;
extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
extern const struct clk_programmable_layout at91sam9x5_programmable_layout;

struct clk_pcr_layout {
	u32 offset;
	u32 cmd;
	u32 div_mask;
	u32 gckcss_mask;
	u32 pid_mask;
};

#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))

#define ndck(a, s) (a[s - 1].id + 1)
#define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1)
struct pmc_data *pmc_data_allocate(unsigned int ncore, unsigned int nsystem,
				   unsigned int nperiph, unsigned int ngck);
void pmc_data_free(struct pmc_data *pmc_data);

int of_at91_get_clk_range(struct device_node *np, const char *propname,
			  struct clk_range *range);

struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data);

struct clk_hw * __init
at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name,
				 const char *parent_name);

struct clk_hw * __init
at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name,
				const char *parent_name);

struct clk_hw * __init
at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name,
				const char *parent_name);

struct clk_hw * __init
at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
			    const struct clk_pcr_layout *layout,
			    const char *name, const char **parent_names,
			    u8 num_parents, u8 id, bool pll_audio,
			    const struct clk_range *range);

struct clk_hw * __init
at91_clk_register_h32mx(struct regmap *regmap, const char *name,
			const char *parent_name);

struct clk_hw * __init
at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
			  const char * const *parent_names,
			  unsigned int num_parents, u8 bus_id);

struct clk_hw * __init
at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name,
			      u32 frequency, u32 accuracy);
struct clk_hw * __init
at91_clk_register_main_osc(struct regmap *regmap, const char *name,
			   const char *parent_name, bool bypass);
struct clk_hw * __init
at91_clk_register_rm9200_main(struct regmap *regmap,
			      const char *name,
			      const char *parent_name);
struct clk_hw * __init
at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
			      const char **parent_names, int num_parents);

struct clk_hw * __init
at91_clk_register_master(struct regmap *regmap, const char *name,
			 int num_parents, const char **parent_names,
			 const struct clk_master_layout *layout,
			 const struct clk_master_characteristics *characteristics);

struct clk_hw * __init
at91_clk_register_peripheral(struct regmap *regmap, const char *name,
			     const char *parent_name, u32 id);
struct clk_hw * __init
at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
				    const struct clk_pcr_layout *layout,
				    const char *name, const char *parent_name,
				    u32 id, const struct clk_range *range);

struct clk_hw * __init
at91_clk_register_pll(struct regmap *regmap, const char *name,
		      const char *parent_name, u8 id,
		      const struct clk_pll_layout *layout,
		      const struct clk_pll_characteristics *characteristics);
struct clk_hw * __init
at91_clk_register_plldiv(struct regmap *regmap, const char *name,
			 const char *parent_name);

struct clk_hw * __init
at91_clk_register_programmable(struct regmap *regmap, const char *name,
			       const char **parent_names, u8 num_parents, u8 id,
			       const struct clk_programmable_layout *layout);

struct clk_hw * __init
at91_clk_register_sam9260_slow(struct regmap *regmap,
			       const char *name,
			       const char **parent_names,
			       int num_parents);

struct clk_hw * __init
at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
			    const char **parent_names, u8 num_parents);

struct clk_hw * __init
at91_clk_register_system(struct regmap *regmap, const char *name,
			 const char *parent_name, u8 id);

struct clk_hw * __init
at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
			    const char **parent_names, u8 num_parents);
struct clk_hw * __init
at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
			     const char *parent_name);
struct clk_hw * __init
sam9x60_clk_register_usb(struct regmap *regmap, const char *name,
			 const char **parent_names, u8 num_parents);
struct clk_hw * __init
at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
			    const char *parent_name, const u32 *divisors);

struct clk_hw * __init
at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
		       const char *name, const char *parent_name);

#ifdef CONFIG_PM
void pmc_register_id(u8 id);
void pmc_register_pck(u8 pck);
#else
static inline void pmc_register_id(u8 id) {}
static inline void pmc_register_pck(u8 pck) {}
#endif

#endif /* __PMC_H_ */
Commit	Line	Data
0ad6125b BB	1	/*
	2	* drivers/clk/at91/pmc.h
	3	*
	4	* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#ifndef __PMC_H_
	13	#define __PMC_H_
	14
	15	#include <linux/io.h>
	16	#include <linux/irqdomain.h>
863a81c3	17	#include <linux/regmap.h>
0ad6125b BB	18	#include <linux/spinlock.h>
0ad6125b BB	19
1bdf0232 BB	20	extern spinlock_t pmc_pcr_lock;
1bdf0232 BB	21
b00cd8e4 AB	22	struct pmc_data {
	23	unsigned int ncore;
	24	struct clk_hw **chws;
	25	unsigned int nsystem;
	26	struct clk_hw **shws;
	27	unsigned int nperiph;
	28	struct clk_hw **phws;
	29	unsigned int ngck;
	30	struct clk_hw **ghws;
	31	};
	32
0ad6125b BB	33	struct clk_range {
	34	unsigned long min;
	35	unsigned long max;
	36	};
	37
	38	#define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,}
	39
b2e39dc0 AB	40	struct clk_master_layout {
	41	u32 mask;
	42	u8 pres_shift;
	43	};
	44
	45	extern const struct clk_master_layout at91rm9200_master_layout;
	46	extern const struct clk_master_layout at91sam9x5_master_layout;
	47
	48	struct clk_master_characteristics {
	49	struct clk_range output;
	50	u32 divisors[4];
	51	u8 have_div3_pres;
	52	};
	53
	54	struct clk_pll_layout {
	55	u32 pllr_mask;
	56	u16 mul_mask;
	57	u8 mul_shift;
	58	};
	59
	60	extern const struct clk_pll_layout at91rm9200_pll_layout;
	61	extern const struct clk_pll_layout at91sam9g45_pll_layout;
	62	extern const struct clk_pll_layout at91sam9g20_pllb_layout;
	63	extern const struct clk_pll_layout sama5d3_pll_layout;
	64
	65	struct clk_pll_characteristics {
	66	struct clk_range input;
	67	int num_output;
	68	struct clk_range *output;
	69	u16 *icpll;
	70	u8 *out;
	71	};
	72
	73	struct clk_programmable_layout {
	74	u8 pres_shift;
	75	u8 css_mask;
	76	u8 have_slck_mck;
	77	};
	78
	79	extern const struct clk_programmable_layout at91rm9200_programmable_layout;
	80	extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
	81	extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
	82
cb4f4949 AB	83	struct clk_pcr_layout {
	84	u32 offset;
	85	u32 cmd;
	86	u32 div_mask;
	87	u32 gckcss_mask;
	88	u32 pid_mask;
	89	};
	90
	91	#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
	92	#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
	93
b00cd8e4 AB	94	#define ndck(a, s) (a[s - 1].id + 1)
	95	#define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1)
	96	struct pmc_data *pmc_data_allocate(unsigned int ncore, unsigned int nsystem,
	97	unsigned int nperiph, unsigned int ngck);
	98	void pmc_data_free(struct pmc_data *pmc_data);
	99
0ad6125b BB	100	int of_at91_get_clk_range(struct device_node np, const char propname,
	101	struct clk_range *range);
	102
b2e39dc0 AB	103	struct clk_hw of_clk_hw_pmc_get(struct of_phandle_args clkspec, void *data);
	104
	105	struct clk_hw * __init
	106	at91_clk_register_audio_pll_frac(struct regmap regmap, const char name,
	107	const char *parent_name);
	108
	109	struct clk_hw * __init
	110	at91_clk_register_audio_pll_pad(struct regmap regmap, const char name,
	111	const char *parent_name);
	112
	113	struct clk_hw * __init
	114	at91_clk_register_audio_pll_pmc(struct regmap regmap, const char name,
	115	const char *parent_name);
	116
	117	struct clk_hw * __init
	118	at91_clk_register_generated(struct regmap regmap, spinlock_t lock,
e4cfb823	119	const struct clk_pcr_layout *layout,
b2e39dc0 AB	120	const char name, const char *parent_names,
	121	u8 num_parents, u8 id, bool pll_audio,
	122	const struct clk_range *range);
	123
	124	struct clk_hw * __init
	125	at91_clk_register_h32mx(struct regmap regmap, const char name,
	126	const char *parent_name);
	127
	128	struct clk_hw * __init
	129	at91_clk_i2s_mux_register(struct regmap regmap, const char name,
	130	const char * const *parent_names,
	131	unsigned int num_parents, u8 bus_id);
	132
	133	struct clk_hw * __init
	134	at91_clk_register_main_rc_osc(struct regmap regmap, const char name,
	135	u32 frequency, u32 accuracy);
	136	struct clk_hw * __init
	137	at91_clk_register_main_osc(struct regmap regmap, const char name,
	138	const char *parent_name, bool bypass);
	139	struct clk_hw * __init
	140	at91_clk_register_rm9200_main(struct regmap *regmap,
	141	const char *name,
	142	const char *parent_name);
	143	struct clk_hw * __init
	144	at91_clk_register_sam9x5_main(struct regmap regmap, const char name,
	145	const char **parent_names, int num_parents);
	146
	147	struct clk_hw * __init
	148	at91_clk_register_master(struct regmap regmap, const char name,
	149	int num_parents, const char **parent_names,
	150	const struct clk_master_layout *layout,
	151	const struct clk_master_characteristics *characteristics);
	152
	153	struct clk_hw * __init
	154	at91_clk_register_peripheral(struct regmap regmap, const char name,
	155	const char *parent_name, u32 id);
	156	struct clk_hw * __init
	157	at91_clk_register_sam9x5_peripheral(struct regmap regmap, spinlock_t lock,
cb4f4949	158	const struct clk_pcr_layout *layout,
b2e39dc0 AB	159	const char name, const char parent_name,
	160	u32 id, const struct clk_range *range);
	161
	162	struct clk_hw * __init
	163	at91_clk_register_pll(struct regmap regmap, const char name,
	164	const char *parent_name, u8 id,
	165	const struct clk_pll_layout *layout,
	166	const struct clk_pll_characteristics *characteristics);
	167	struct clk_hw * __init
	168	at91_clk_register_plldiv(struct regmap regmap, const char name,
	169	const char *parent_name);
	170
	171	struct clk_hw * __init
	172	at91_clk_register_programmable(struct regmap regmap, const char name,
	173	const char **parent_names, u8 num_parents, u8 id,
	174	const struct clk_programmable_layout *layout);
	175
	176	struct clk_hw * __init
	177	at91_clk_register_sam9260_slow(struct regmap *regmap,
	178	const char *name,
	179	const char **parent_names,
	180	int num_parents);
	181
	182	struct clk_hw * __init
	183	at91sam9x5_clk_register_smd(struct regmap regmap, const char name,
	184	const char **parent_names, u8 num_parents);
	185
	186	struct clk_hw * __init
	187	at91_clk_register_system(struct regmap regmap, const char name,
	188	const char *parent_name, u8 id);
	189
	190	struct clk_hw * __init
	191	at91sam9x5_clk_register_usb(struct regmap regmap, const char name,
	192	const char **parent_names, u8 num_parents);
	193	struct clk_hw * __init
	194	at91sam9n12_clk_register_usb(struct regmap regmap, const char name,
	195	const char *parent_name);
	196	struct clk_hw * __init
2423eeae AB	197	sam9x60_clk_register_usb(struct regmap regmap, const char name,
	198	const char **parent_names, u8 num_parents);
	199	struct clk_hw * __init
b2e39dc0 AB	200	at91rm9200_clk_register_usb(struct regmap regmap, const char name,
	201	const char parent_name, const u32 divisors);
	202
	203	struct clk_hw * __init
	204	at91_clk_register_utmi(struct regmap regmap_pmc, struct regmap regmap_sfr,
	205	const char name, const char parent_name);
	206
b3b02eac AB	207	#ifdef CONFIG_PM
b3b02eac AB	208	void pmc_register_id(u8 id);
13967bea	209	void pmc_register_pck(u8 pck);
b3b02eac AB	210	#else
b3b02eac AB	211	static inline void pmc_register_id(u8 id) {}
13967bea	212	static inline void pmc_register_pck(u8 pck) {}
b3b02eac AB	213	#endif
b3b02eac AB	214
0ad6125b	215	#endif /* __PMC_H_ */