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0ad6125b BB |
1 | /* |
2 | * drivers/clk/at91/pmc.h | |
3 | * | |
4 | * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #ifndef __PMC_H_ | |
13 | #define __PMC_H_ | |
14 | ||
15 | #include <linux/io.h> | |
16 | #include <linux/irqdomain.h> | |
863a81c3 | 17 | #include <linux/regmap.h> |
0ad6125b BB |
18 | #include <linux/spinlock.h> |
19 | ||
1bdf0232 BB |
20 | extern spinlock_t pmc_pcr_lock; |
21 | ||
b00cd8e4 AB |
22 | struct pmc_data { |
23 | unsigned int ncore; | |
24 | struct clk_hw **chws; | |
25 | unsigned int nsystem; | |
26 | struct clk_hw **shws; | |
27 | unsigned int nperiph; | |
28 | struct clk_hw **phws; | |
29 | unsigned int ngck; | |
30 | struct clk_hw **ghws; | |
31 | }; | |
32 | ||
0ad6125b BB |
33 | struct clk_range { |
34 | unsigned long min; | |
35 | unsigned long max; | |
36 | }; | |
37 | ||
38 | #define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,} | |
39 | ||
b2e39dc0 | 40 | struct clk_master_layout { |
e5be5370 | 41 | u32 offset; |
b2e39dc0 AB |
42 | u32 mask; |
43 | u8 pres_shift; | |
44 | }; | |
45 | ||
46 | extern const struct clk_master_layout at91rm9200_master_layout; | |
47 | extern const struct clk_master_layout at91sam9x5_master_layout; | |
48 | ||
49 | struct clk_master_characteristics { | |
50 | struct clk_range output; | |
51 | u32 divisors[4]; | |
52 | u8 have_div3_pres; | |
53 | }; | |
54 | ||
55 | struct clk_pll_layout { | |
56 | u32 pllr_mask; | |
57 | u16 mul_mask; | |
58 | u8 mul_shift; | |
59 | }; | |
60 | ||
61 | extern const struct clk_pll_layout at91rm9200_pll_layout; | |
62 | extern const struct clk_pll_layout at91sam9g45_pll_layout; | |
63 | extern const struct clk_pll_layout at91sam9g20_pllb_layout; | |
64 | extern const struct clk_pll_layout sama5d3_pll_layout; | |
65 | ||
66 | struct clk_pll_characteristics { | |
67 | struct clk_range input; | |
68 | int num_output; | |
7b4c162e | 69 | const struct clk_range *output; |
b2e39dc0 AB |
70 | u16 *icpll; |
71 | u8 *out; | |
a436c2a4 | 72 | u8 upll : 1; |
b2e39dc0 AB |
73 | }; |
74 | ||
75 | struct clk_programmable_layout { | |
45b06682 | 76 | u8 pres_mask; |
b2e39dc0 AB |
77 | u8 pres_shift; |
78 | u8 css_mask; | |
79 | u8 have_slck_mck; | |
45b06682 | 80 | u8 is_pres_direct; |
b2e39dc0 AB |
81 | }; |
82 | ||
83 | extern const struct clk_programmable_layout at91rm9200_programmable_layout; | |
84 | extern const struct clk_programmable_layout at91sam9g45_programmable_layout; | |
85 | extern const struct clk_programmable_layout at91sam9x5_programmable_layout; | |
86 | ||
cb4f4949 AB |
87 | struct clk_pcr_layout { |
88 | u32 offset; | |
89 | u32 cmd; | |
90 | u32 div_mask; | |
91 | u32 gckcss_mask; | |
92 | u32 pid_mask; | |
93 | }; | |
94 | ||
95 | #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) | |
96 | #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) | |
97 | ||
b00cd8e4 AB |
98 | #define ndck(a, s) (a[s - 1].id + 1) |
99 | #define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1) | |
100 | struct pmc_data *pmc_data_allocate(unsigned int ncore, unsigned int nsystem, | |
101 | unsigned int nperiph, unsigned int ngck); | |
102 | void pmc_data_free(struct pmc_data *pmc_data); | |
103 | ||
0ad6125b BB |
104 | int of_at91_get_clk_range(struct device_node *np, const char *propname, |
105 | struct clk_range *range); | |
106 | ||
b2e39dc0 AB |
107 | struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data); |
108 | ||
109 | struct clk_hw * __init | |
110 | at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name, | |
111 | const char *parent_name); | |
112 | ||
113 | struct clk_hw * __init | |
114 | at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name, | |
115 | const char *parent_name); | |
116 | ||
117 | struct clk_hw * __init | |
118 | at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name, | |
119 | const char *parent_name); | |
120 | ||
121 | struct clk_hw * __init | |
122 | at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, | |
e4cfb823 | 123 | const struct clk_pcr_layout *layout, |
b2e39dc0 AB |
124 | const char *name, const char **parent_names, |
125 | u8 num_parents, u8 id, bool pll_audio, | |
126 | const struct clk_range *range); | |
127 | ||
128 | struct clk_hw * __init | |
129 | at91_clk_register_h32mx(struct regmap *regmap, const char *name, | |
130 | const char *parent_name); | |
131 | ||
132 | struct clk_hw * __init | |
133 | at91_clk_i2s_mux_register(struct regmap *regmap, const char *name, | |
134 | const char * const *parent_names, | |
135 | unsigned int num_parents, u8 bus_id); | |
136 | ||
137 | struct clk_hw * __init | |
138 | at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name, | |
139 | u32 frequency, u32 accuracy); | |
140 | struct clk_hw * __init | |
141 | at91_clk_register_main_osc(struct regmap *regmap, const char *name, | |
142 | const char *parent_name, bool bypass); | |
143 | struct clk_hw * __init | |
144 | at91_clk_register_rm9200_main(struct regmap *regmap, | |
145 | const char *name, | |
146 | const char *parent_name); | |
147 | struct clk_hw * __init | |
148 | at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name, | |
149 | const char **parent_names, int num_parents); | |
150 | ||
151 | struct clk_hw * __init | |
152 | at91_clk_register_master(struct regmap *regmap, const char *name, | |
153 | int num_parents, const char **parent_names, | |
154 | const struct clk_master_layout *layout, | |
155 | const struct clk_master_characteristics *characteristics); | |
156 | ||
157 | struct clk_hw * __init | |
158 | at91_clk_register_peripheral(struct regmap *regmap, const char *name, | |
159 | const char *parent_name, u32 id); | |
160 | struct clk_hw * __init | |
161 | at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, | |
cb4f4949 | 162 | const struct clk_pcr_layout *layout, |
b2e39dc0 AB |
163 | const char *name, const char *parent_name, |
164 | u32 id, const struct clk_range *range); | |
165 | ||
166 | struct clk_hw * __init | |
167 | at91_clk_register_pll(struct regmap *regmap, const char *name, | |
168 | const char *parent_name, u8 id, | |
169 | const struct clk_pll_layout *layout, | |
170 | const struct clk_pll_characteristics *characteristics); | |
171 | struct clk_hw * __init | |
172 | at91_clk_register_plldiv(struct regmap *regmap, const char *name, | |
173 | const char *parent_name); | |
174 | ||
a436c2a4 AB |
175 | struct clk_hw * __init |
176 | sam9x60_clk_register_pll(struct regmap *regmap, spinlock_t *lock, | |
177 | const char *name, const char *parent_name, u8 id, | |
178 | const struct clk_pll_characteristics *characteristics); | |
179 | ||
b2e39dc0 AB |
180 | struct clk_hw * __init |
181 | at91_clk_register_programmable(struct regmap *regmap, const char *name, | |
182 | const char **parent_names, u8 num_parents, u8 id, | |
183 | const struct clk_programmable_layout *layout); | |
184 | ||
185 | struct clk_hw * __init | |
186 | at91_clk_register_sam9260_slow(struct regmap *regmap, | |
187 | const char *name, | |
188 | const char **parent_names, | |
189 | int num_parents); | |
190 | ||
191 | struct clk_hw * __init | |
192 | at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name, | |
193 | const char **parent_names, u8 num_parents); | |
194 | ||
195 | struct clk_hw * __init | |
196 | at91_clk_register_system(struct regmap *regmap, const char *name, | |
197 | const char *parent_name, u8 id); | |
198 | ||
199 | struct clk_hw * __init | |
200 | at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name, | |
201 | const char **parent_names, u8 num_parents); | |
202 | struct clk_hw * __init | |
203 | at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name, | |
204 | const char *parent_name); | |
205 | struct clk_hw * __init | |
2423eeae AB |
206 | sam9x60_clk_register_usb(struct regmap *regmap, const char *name, |
207 | const char **parent_names, u8 num_parents); | |
208 | struct clk_hw * __init | |
b2e39dc0 AB |
209 | at91rm9200_clk_register_usb(struct regmap *regmap, const char *name, |
210 | const char *parent_name, const u32 *divisors); | |
211 | ||
212 | struct clk_hw * __init | |
213 | at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr, | |
214 | const char *name, const char *parent_name); | |
215 | ||
b3b02eac AB |
216 | #ifdef CONFIG_PM |
217 | void pmc_register_id(u8 id); | |
13967bea | 218 | void pmc_register_pck(u8 pck); |
b3b02eac AB |
219 | #else |
220 | static inline void pmc_register_id(u8 id) {} | |
13967bea | 221 | static inline void pmc_register_pck(u8 pck) {} |
b3b02eac AB |
222 | #endif |
223 | ||
0ad6125b | 224 | #endif /* __PMC_H_ */ |