[mirror_ubuntu-bionic-kernel.git] / drivers / clk / clk-fixed-factor.c

/*
 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Standard functionality for the common clock API.
 */
#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/of.h>

/*
 * DOC: basic fixed multiplier and divider clock that cannot gate
 *
 * Traits of this clock:
 * prepare - clk_prepare only ensures that parents are prepared
 * enable - clk_enable only ensures that parents are enabled
 * rate - rate is fixed.  clk->rate = parent->rate / div * mult
 * parent - fixed parent.  No clk_set_parent support
 */

#define to_clk_fixed_factor(_hw) container_of(_hw, struct clk_fixed_factor, hw)

static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
		unsigned long parent_rate)
{
	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
	unsigned long long int rate;

	rate = (unsigned long long int)parent_rate * fix->mult;
	do_div(rate, fix->div);
	return (unsigned long)rate;
}

static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long *prate)
{
	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);

	if (__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT) {
		unsigned long best_parent;

		best_parent = (rate / fix->mult) * fix->div;
		*prate = __clk_round_rate(__clk_get_parent(hw->clk),
				best_parent);
	}

	return (*prate / fix->div) * fix->mult;
}

static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long parent_rate)
{
	/*
	 * We must report success but we can do so unconditionally because
	 * clk_factor_round_rate returns values that ensure this call is a
	 * nop.
	 */

	return 0;
}

const struct clk_ops clk_fixed_factor_ops = {
	.round_rate = clk_factor_round_rate,
	.set_rate = clk_factor_set_rate,
	.recalc_rate = clk_factor_recalc_rate,
};
EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);

struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		unsigned int mult, unsigned int div)
{
	struct clk_fixed_factor *fix;
	struct clk_init_data init;
	struct clk *clk;

	fix = kmalloc(sizeof(*fix), GFP_KERNEL);
	if (!fix)
		return ERR_PTR(-ENOMEM);

	/* struct clk_fixed_factor assignments */
	fix->mult = mult;
	fix->div = div;
	fix->hw.init = &init;

	init.name = name;
	init.ops = &clk_fixed_factor_ops;
	init.flags = flags | CLK_IS_BASIC;
	init.parent_names = &parent_name;
	init.num_parents = 1;

	clk = clk_register(dev, &fix->hw);

	if (IS_ERR(clk))
		kfree(fix);

	return clk;
}
EXPORT_SYMBOL_GPL(clk_register_fixed_factor);

#ifdef CONFIG_OF
/**
 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
 */
void __init of_fixed_factor_clk_setup(struct device_node *node)
{
	struct clk *clk;
	const char *clk_name = node->name;
	const char *parent_name;
	u32 div, mult;

	if (of_property_read_u32(node, "clock-div", &div)) {
		pr_err("%s Fixed factor clock <%s> must have a clock-div property\n",
			__func__, node->name);
		return;
	}

	if (of_property_read_u32(node, "clock-mult", &mult)) {
		pr_err("%s Fixed factor clock <%s> must have a clock-mult property\n",
			__func__, node->name);
		return;
	}

	of_property_read_string(node, "clock-output-names", &clk_name);
	parent_name = of_clk_get_parent_name(node, 0);

	clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
					mult, div);
	if (!IS_ERR(clk))
		of_clk_add_provider(node, of_clk_src_simple_get, clk);
}
EXPORT_SYMBOL_GPL(of_fixed_factor_clk_setup);
CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
		of_fixed_factor_clk_setup);
#endif
Commit	Line	Data
f0948f59 SH	1	/*
	2	* Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* Standard functionality for the common clock API.
	9	*/
	10	#include <linux/module.h>
	11	#include <linux/clk-provider.h>
	12	#include <linux/slab.h>
	13	#include <linux/err.h>
79b16641	14	#include <linux/of.h>
f0948f59 SH	15
	16	/*
	17	* DOC: basic fixed multiplier and divider clock that cannot gate
	18	*
	19	* Traits of this clock:
	20	* prepare - clk_prepare only ensures that parents are prepared
	21	* enable - clk_enable only ensures that parents are enabled
	22	* rate - rate is fixed. clk->rate = parent->rate / div * mult
	23	* parent - fixed parent. No clk_set_parent support
	24	*/
	25
	26	#define to_clk_fixed_factor(_hw) container_of(_hw, struct clk_fixed_factor, hw)
	27
	28	static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
	29	unsigned long parent_rate)
	30	{
	31	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
bab53301	32	unsigned long long int rate;
f0948f59	33
bab53301 HZ	34	rate = (unsigned long long int)parent_rate * fix->mult;
	35	do_div(rate, fix->div);
	36	return (unsigned long)rate;
f0948f59 SH	37	}
	38
	39	static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
	40	unsigned long *prate)
	41	{
	42	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
	43
	44	if (__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT) {
	45	unsigned long best_parent;
	46
	47	best_parent = (rate / fix->mult) * fix->div;
	48	*prate = __clk_round_rate(__clk_get_parent(hw->clk),
	49	best_parent);
	50	}
	51
	52	return (prate / fix->div) fix->mult;
	53	}
	54
	55	static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
	56	unsigned long parent_rate)
	57	{
3037e9ea DT	58	/*
	59	* We must report success but we can do so unconditionally because
	60	* clk_factor_round_rate returns values that ensure this call is a
	61	* nop.
	62	*/
	63
f0948f59 SH	64	return 0;
	65	}
	66
3037e9ea	67	const struct clk_ops clk_fixed_factor_ops = {
f0948f59 SH	68	.round_rate = clk_factor_round_rate,
	69	.set_rate = clk_factor_set_rate,
	70	.recalc_rate = clk_factor_recalc_rate,
	71	};
	72	EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
	73
	74	struct clk clk_register_fixed_factor(struct device dev, const char *name,
	75	const char *parent_name, unsigned long flags,
	76	unsigned int mult, unsigned int div)
	77	{
	78	struct clk_fixed_factor *fix;
	79	struct clk_init_data init;
	80	struct clk *clk;
	81
	82	fix = kmalloc(sizeof(*fix), GFP_KERNEL);
d122db7e	83	if (!fix)
f0948f59	84	return ERR_PTR(-ENOMEM);
f0948f59 SH	85
	86	/* struct clk_fixed_factor assignments */
	87	fix->mult = mult;
	88	fix->div = div;
	89	fix->hw.init = &init;
	90
	91	init.name = name;
	92	init.ops = &clk_fixed_factor_ops;
f7d8caad	93	init.flags = flags \| CLK_IS_BASIC;
f0948f59 SH	94	init.parent_names = &parent_name;
	95	init.num_parents = 1;
	96
	97	clk = clk_register(dev, &fix->hw);
	98
	99	if (IS_ERR(clk))
	100	kfree(fix);
	101
	102	return clk;
	103	}
5cfe10bb MT	104	EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
5cfe10bb MT	105
79b16641 GC	106	#ifdef CONFIG_OF
	107	/**
	108	* of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
	109	*/
	110	void __init of_fixed_factor_clk_setup(struct device_node *node)
	111	{
	112	struct clk *clk;
	113	const char *clk_name = node->name;
	114	const char *parent_name;
	115	u32 div, mult;
	116
	117	if (of_property_read_u32(node, "clock-div", &div)) {
	118	pr_err("%s Fixed factor clock <%s> must have a clock-div property\n",
	119	__func__, node->name);
	120	return;
	121	}
	122
	123	if (of_property_read_u32(node, "clock-mult", &mult)) {
fe2fd5cc	124	pr_err("%s Fixed factor clock <%s> must have a clock-mult property\n",
79b16641 GC	125	__func__, node->name);
	126	return;
	127	}
	128
	129	of_property_read_string(node, "clock-output-names", &clk_name);
	130	parent_name = of_clk_get_parent_name(node, 0);
	131
	132	clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
	133	mult, div);
	134	if (!IS_ERR(clk))
	135	of_clk_add_provider(node, of_clk_src_simple_get, clk);
	136	}
	137	EXPORT_SYMBOL_GPL(of_fixed_factor_clk_setup);
	138	CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
	139	of_fixed_factor_clk_setup);
	140	#endif