[mirror_ubuntu-hirsute-kernel.git] / drivers / clk / clk-max77686.c

/*
 * clk-max77686.c - Clock driver for Maxim 77686
 *
 * Copyright (C) 2012 Samsung Electornics
 * Jonghwa Lee <jonghwa3.lee@samsung.com>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/mfd/max77686.h>
#include <linux/mfd/max77686-private.h>
#include <linux/clk-provider.h>
#include <linux/mutex.h>
#include <linux/clkdev.h>

#include <dt-bindings/clock/maxim,max77686.h>

struct max77686_clk {
	struct max77686_dev *iodev;
	u32 mask;
	struct clk_hw hw;
	struct clk_lookup *lookup;
};

static struct max77686_clk *to_max77686_clk(struct clk_hw *hw)
{
	return container_of(hw, struct max77686_clk, hw);
}

static int max77686_clk_prepare(struct clk_hw *hw)
{
	struct max77686_clk *max77686 = to_max77686_clk(hw);

	return regmap_update_bits(max77686->iodev->regmap,
				  MAX77686_REG_32KHZ, max77686->mask,
				  max77686->mask);
}

static void max77686_clk_unprepare(struct clk_hw *hw)
{
	struct max77686_clk *max77686 = to_max77686_clk(hw);

	regmap_update_bits(max77686->iodev->regmap,
		MAX77686_REG_32KHZ, max77686->mask, ~max77686->mask);
}

static int max77686_clk_is_prepared(struct clk_hw *hw)
{
	struct max77686_clk *max77686 = to_max77686_clk(hw);
	int ret;
	u32 val;

	ret = regmap_read(max77686->iodev->regmap,
				MAX77686_REG_32KHZ, &val);

	if (ret < 0)
		return -EINVAL;

	return val & max77686->mask;
}

static unsigned long max77686_recalc_rate(struct clk_hw *hw,
					  unsigned long parent_rate)
{
	return 32768;
}

static struct clk_ops max77686_clk_ops = {
	.prepare	= max77686_clk_prepare,
	.unprepare	= max77686_clk_unprepare,
	.is_prepared	= max77686_clk_is_prepared,
	.recalc_rate	= max77686_recalc_rate,
};

static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
	[MAX77686_CLK_AP] = {
		.name = "32khz_ap",
		.ops = &max77686_clk_ops,
		.flags = CLK_IS_ROOT,
	},
	[MAX77686_CLK_CP] = {
		.name = "32khz_cp",
		.ops = &max77686_clk_ops,
		.flags = CLK_IS_ROOT,
	},
	[MAX77686_CLK_PMIC] = {
		.name = "32khz_pmic",
		.ops = &max77686_clk_ops,
		.flags = CLK_IS_ROOT,
	},
};

static struct clk *max77686_clk_register(struct device *dev,
				struct max77686_clk *max77686)
{
	struct clk *clk;
	struct clk_hw *hw = &max77686->hw;

	clk = clk_register(dev, hw);
	if (IS_ERR(clk))
		return clk;

	max77686->lookup = kzalloc(sizeof(struct clk_lookup), GFP_KERNEL);
	if (!max77686->lookup)
		return ERR_PTR(-ENOMEM);

	max77686->lookup->con_id = hw->init->name;
	max77686->lookup->clk = clk;

	clkdev_add(max77686->lookup);

	return clk;
}

static int max77686_clk_probe(struct platform_device *pdev)
{
	struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
	struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM];
	struct clk **clocks;
	int i, ret;

	clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk *)
					* MAX77686_CLKS_NUM, GFP_KERNEL);
	if (!clocks)
		return -ENOMEM;

	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
		max77686_clks[i] = devm_kzalloc(&pdev->dev,
					sizeof(struct max77686_clk), GFP_KERNEL);
		if (!max77686_clks[i])
			return -ENOMEM;
	}

	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
		max77686_clks[i]->iodev = iodev;
		max77686_clks[i]->mask = 1 << i;
		max77686_clks[i]->hw.init = &max77686_clks_init[i];

		clocks[i] = max77686_clk_register(&pdev->dev, max77686_clks[i]);
		if (IS_ERR(clocks[i])) {
			ret = PTR_ERR(clocks[i]);
			dev_err(&pdev->dev, "failed to register %s\n",
				max77686_clks[i]->hw.init->name);
			goto err_clocks;
		}
	}

	platform_set_drvdata(pdev, clocks);

	if (iodev->dev->of_node) {
		struct clk_onecell_data *of_data;

		of_data = devm_kzalloc(&pdev->dev,
					sizeof(*of_data), GFP_KERNEL);
		if (!of_data) {
			ret = -ENOMEM;
			goto err_clocks;
		}

		of_data->clks = clocks;
		of_data->clk_num = MAX77686_CLKS_NUM;
		ret = of_clk_add_provider(iodev->dev->of_node,
					of_clk_src_onecell_get, of_data);
		if (ret) {
			dev_err(&pdev->dev, "failed to register OF clock provider\n");
			goto err_clocks;
		}
	}

	return 0;

err_clocks:
	for (--i; i >= 0; --i) {
		clkdev_drop(max77686_clks[i]->lookup);
		clk_unregister(max77686_clks[i]->hw.clk);
	}

	return ret;
}

static int max77686_clk_remove(struct platform_device *pdev)
{
	struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
	struct clk **clocks = platform_get_drvdata(pdev);
	int i;

	if (iodev->dev->of_node)
		of_clk_del_provider(iodev->dev->of_node);

	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
		struct clk_hw *hw = __clk_get_hw(clocks[i]);
		struct max77686_clk *max77686 = to_max77686_clk(hw);

		clkdev_drop(max77686->lookup);
		clk_unregister(clocks[i]);
	}
	return 0;
}

static const struct platform_device_id max77686_clk_id[] = {
	{ "max77686-clk", 0},
	{ },
};
MODULE_DEVICE_TABLE(platform, max77686_clk_id);

static struct platform_driver max77686_clk_driver = {
	.driver = {
		.name  = "max77686-clk",
		.owner = THIS_MODULE,
	},
	.probe = max77686_clk_probe,
	.remove = max77686_clk_remove,
	.id_table = max77686_clk_id,
};

static int __init max77686_clk_init(void)
{
	return platform_driver_register(&max77686_clk_driver);
}
subsys_initcall(max77686_clk_init);

static void __init max77686_clk_cleanup(void)
{
	platform_driver_unregister(&max77686_clk_driver);
}
module_exit(max77686_clk_cleanup);

MODULE_DESCRIPTION("MAXIM 77686 Clock Driver");
MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
73118e61 JL	1	/*
	2	* clk-max77686.c - Clock driver for Maxim 77686
	3	*
	4	* Copyright (C) 2012 Samsung Electornics
	5	* Jonghwa Lee <jonghwa3.lee@samsung.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License as published by the
	9	* Free Software Foundation; either version 2 of the License, or (at your
	10	* option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*
	21	*/
	22
	23	#include <linux/kernel.h>
	24	#include <linux/slab.h>
	25	#include <linux/err.h>
	26	#include <linux/platform_device.h>
	27	#include <linux/mfd/max77686.h>
	28	#include <linux/mfd/max77686-private.h>
	29	#include <linux/clk-provider.h>
	30	#include <linux/mutex.h>
	31	#include <linux/clkdev.h>
	32
a8a76f56	33	#include <dt-bindings/clock/maxim,max77686.h>
73118e61 JL	34
	35	struct max77686_clk {
	36	struct max77686_dev *iodev;
	37	u32 mask;
	38	struct clk_hw hw;
	39	struct clk_lookup *lookup;
	40	};
	41
3fe296cf	42	static struct max77686_clk to_max77686_clk(struct clk_hw hw)
73118e61 JL	43	{
	44	return container_of(hw, struct max77686_clk, hw);
	45	}
	46
	47	static int max77686_clk_prepare(struct clk_hw *hw)
	48	{
3fe296cf	49	struct max77686_clk *max77686 = to_max77686_clk(hw);
73118e61	50
3fe296cf AL	51	return regmap_update_bits(max77686->iodev->regmap,
	52	MAX77686_REG_32KHZ, max77686->mask,
	53	max77686->mask);
73118e61 JL	54	}
	55
	56	static void max77686_clk_unprepare(struct clk_hw *hw)
	57	{
3fe296cf	58	struct max77686_clk *max77686 = to_max77686_clk(hw);
73118e61 JL	59
	60	regmap_update_bits(max77686->iodev->regmap,
	61	MAX77686_REG_32KHZ, max77686->mask, ~max77686->mask);
	62	}
	63
21c8ed2d	64	static int max77686_clk_is_prepared(struct clk_hw *hw)
73118e61	65	{
3fe296cf	66	struct max77686_clk *max77686 = to_max77686_clk(hw);
73118e61 JL	67	int ret;
	68	u32 val;
	69
73118e61 JL	70	ret = regmap_read(max77686->iodev->regmap,
	71	MAX77686_REG_32KHZ, &val);
	72
	73	if (ret < 0)
	74	return -EINVAL;
	75
	76	return val & max77686->mask;
	77	}
	78
cf7d4a6f TF	79	static unsigned long max77686_recalc_rate(struct clk_hw *hw,
	80	unsigned long parent_rate)
	81	{
	82	return 32768;
	83	}
	84
73118e61 JL	85	static struct clk_ops max77686_clk_ops = {
	86	.prepare = max77686_clk_prepare,
	87	.unprepare = max77686_clk_unprepare,
21c8ed2d	88	.is_prepared = max77686_clk_is_prepared,
cf7d4a6f	89	.recalc_rate = max77686_recalc_rate,
73118e61 JL	90	};
	91
	92	static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
	93	[MAX77686_CLK_AP] = {
	94	.name = "32khz_ap",
	95	.ops = &max77686_clk_ops,
	96	.flags = CLK_IS_ROOT,
	97	},
	98	[MAX77686_CLK_CP] = {
	99	.name = "32khz_cp",
	100	.ops = &max77686_clk_ops,
	101	.flags = CLK_IS_ROOT,
	102	},
	103	[MAX77686_CLK_PMIC] = {
	104	.name = "32khz_pmic",
	105	.ops = &max77686_clk_ops,
	106	.flags = CLK_IS_ROOT,
	107	},
	108	};
	109
badbc542	110	static struct clk max77686_clk_register(struct device dev,
73118e61 JL	111	struct max77686_clk *max77686)
	112	{
	113	struct clk *clk;
	114	struct clk_hw *hw = &max77686->hw;
	115
	116	clk = clk_register(dev, hw);
73118e61	117	if (IS_ERR(clk))
badbc542	118	return clk;
73118e61	119
f1ba28a1	120	max77686->lookup = kzalloc(sizeof(struct clk_lookup), GFP_KERNEL);
9f58b9b9	121	if (!max77686->lookup)
badbc542	122	return ERR_PTR(-ENOMEM);
73118e61 JL	123
	124	max77686->lookup->con_id = hw->init->name;
	125	max77686->lookup->clk = clk;
	126
	127	clkdev_add(max77686->lookup);
	128
badbc542	129	return clk;
73118e61 JL	130	}
73118e61 JL	131
018ae93f	132	static int max77686_clk_probe(struct platform_device *pdev)
73118e61 JL	133	{
73118e61 JL	134	struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
3966c947 TF	135	struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM];
3966c947 TF	136	struct clk **clocks;
73118e61 JL	137	int i, ret;
73118e61 JL	138
3966c947	139	clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk *)
73118e61	140	* MAX77686_CLKS_NUM, GFP_KERNEL);
3966c947	141	if (!clocks)
73118e61 JL	142	return -ENOMEM;
	143
	144	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
	145	max77686_clks[i] = devm_kzalloc(&pdev->dev,
	146	sizeof(struct max77686_clk), GFP_KERNEL);
9f58b9b9	147	if (!max77686_clks[i])
73118e61 JL	148	return -ENOMEM;
	149	}
	150
	151	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
	152	max77686_clks[i]->iodev = iodev;
	153	max77686_clks[i]->mask = 1 << i;
	154	max77686_clks[i]->hw.init = &max77686_clks_init[i];
	155
3966c947 TF	156	clocks[i] = max77686_clk_register(&pdev->dev, max77686_clks[i]);
	157	if (IS_ERR(clocks[i])) {
	158	ret = PTR_ERR(clocks[i]);
d73ac4ca TF	159	dev_err(&pdev->dev, "failed to register %s\n",
	160	max77686_clks[i]->hw.init->name);
	161	goto err_clocks;
73118e61 JL	162	}
	163	}
	164
3966c947	165	platform_set_drvdata(pdev, clocks);
73118e61	166
b06c6987 TF	167	if (iodev->dev->of_node) {
	168	struct clk_onecell_data *of_data;
	169
	170	of_data = devm_kzalloc(&pdev->dev,
	171	sizeof(*of_data), GFP_KERNEL);
	172	if (!of_data) {
	173	ret = -ENOMEM;
	174	goto err_clocks;
	175	}
	176
	177	of_data->clks = clocks;
	178	of_data->clk_num = MAX77686_CLKS_NUM;
	179	ret = of_clk_add_provider(iodev->dev->of_node,
	180	of_clk_src_onecell_get, of_data);
	181	if (ret) {
	182	dev_err(&pdev->dev, "failed to register OF clock provider\n");
	183	goto err_clocks;
	184	}
	185	}
	186
b0f85177	187	return 0;
73118e61	188
d73ac4ca TF	189	err_clocks:
	190	for (--i; i >= 0; --i) {
	191	clkdev_drop(max77686_clks[i]->lookup);
	192	clk_unregister(max77686_clks[i]->hw.clk);
	193	}
	194
73118e61 JL	195	return ret;
	196	}
	197
1fc7ad5d	198	static int max77686_clk_remove(struct platform_device *pdev)
73118e61	199	{
b06c6987	200	struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
3966c947	201	struct clk **clocks = platform_get_drvdata(pdev);
73118e61 JL	202	int i;
73118e61 JL	203
b06c6987 TF	204	if (iodev->dev->of_node)
	205	of_clk_del_provider(iodev->dev->of_node);
	206
73118e61	207	for (i = 0; i < MAX77686_CLKS_NUM; i++) {
3966c947 TF	208	struct clk_hw *hw = __clk_get_hw(clocks[i]);
	209	struct max77686_clk *max77686 = to_max77686_clk(hw);
	210
	211	clkdev_drop(max77686->lookup);
	212	clk_unregister(clocks[i]);
73118e61 JL	213	}
	214	return 0;
	215	}
	216
	217	static const struct platform_device_id max77686_clk_id[] = {
	218	{ "max77686-clk", 0},
	219	{ },
	220	};
	221	MODULE_DEVICE_TABLE(platform, max77686_clk_id);
	222
	223	static struct platform_driver max77686_clk_driver = {
	224	.driver = {
	225	.name = "max77686-clk",
	226	.owner = THIS_MODULE,
	227	},
	228	.probe = max77686_clk_probe,
f9cfa630	229	.remove = max77686_clk_remove,
73118e61 JL	230	.id_table = max77686_clk_id,
	231	};
	232
	233	static int __init max77686_clk_init(void)
	234	{
	235	return platform_driver_register(&max77686_clk_driver);
	236	}
	237	subsys_initcall(max77686_clk_init);
	238
	239	static void __init max77686_clk_cleanup(void)
	240	{
	241	platform_driver_unregister(&max77686_clk_driver);
	242	}
	243	module_exit(max77686_clk_cleanup);
	244
	245	MODULE_DESCRIPTION("MAXIM 77686 Clock Driver");
	246	MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
	247	MODULE_LICENSE("GPL");