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[mirror_ubuntu-kernels.git] / drivers / clk / clk.c
CommitLineData
ebafb63d 1// SPDX-License-Identifier: GPL-2.0
b2476490
MT
2/*
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
5 *
5fb94e9c 6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
b2476490
MT
7 */
8
3c373117 9#include <linux/clk.h>
b09d6d99 10#include <linux/clk-provider.h>
86be408b 11#include <linux/clk/clk-conf.h>
b2476490
MT
12#include <linux/module.h>
13#include <linux/mutex.h>
14#include <linux/spinlock.h>
15#include <linux/err.h>
16#include <linux/list.h>
17#include <linux/slab.h>
766e6a4e 18#include <linux/of.h>
46c8773a 19#include <linux/device.h>
f2f6c255 20#include <linux/init.h>
9a34b453 21#include <linux/pm_runtime.h>
533ddeb1 22#include <linux/sched.h>
562ef0b0 23#include <linux/clkdev.h>
b2476490 24
d6782c26
SN
25#include "clk.h"
26
b2476490
MT
27static DEFINE_SPINLOCK(enable_lock);
28static DEFINE_MUTEX(prepare_lock);
29
533ddeb1
MT
30static struct task_struct *prepare_owner;
31static struct task_struct *enable_owner;
32
33static int prepare_refcnt;
34static int enable_refcnt;
35
b2476490
MT
36static HLIST_HEAD(clk_root_list);
37static HLIST_HEAD(clk_orphan_list);
38static LIST_HEAD(clk_notifier_list);
39
bdcf1dc2
SB
40static struct hlist_head *all_lists[] = {
41 &clk_root_list,
42 &clk_orphan_list,
43 NULL,
44};
45
b09d6d99
MT
46/*** private data structures ***/
47
fc0c209c
SB
48struct clk_parent_map {
49 const struct clk_hw *hw;
50 struct clk_core *core;
51 const char *fw_name;
52 const char *name;
601b6e93 53 int index;
fc0c209c
SB
54};
55
b09d6d99
MT
56struct clk_core {
57 const char *name;
58 const struct clk_ops *ops;
59 struct clk_hw *hw;
60 struct module *owner;
9a34b453 61 struct device *dev;
89a5ddcc 62 struct device_node *of_node;
b09d6d99 63 struct clk_core *parent;
fc0c209c 64 struct clk_parent_map *parents;
b09d6d99
MT
65 u8 num_parents;
66 u8 new_parent_index;
67 unsigned long rate;
1c8e6004 68 unsigned long req_rate;
b09d6d99
MT
69 unsigned long new_rate;
70 struct clk_core *new_parent;
71 struct clk_core *new_child;
72 unsigned long flags;
e6500344 73 bool orphan;
24478839 74 bool rpm_enabled;
b09d6d99
MT
75 unsigned int enable_count;
76 unsigned int prepare_count;
e55a839a 77 unsigned int protect_count;
9783c0d9
SB
78 unsigned long min_rate;
79 unsigned long max_rate;
b09d6d99
MT
80 unsigned long accuracy;
81 int phase;
9fba738a 82 struct clk_duty duty;
b09d6d99
MT
83 struct hlist_head children;
84 struct hlist_node child_node;
1c8e6004 85 struct hlist_head clks;
b09d6d99
MT
86 unsigned int notifier_count;
87#ifdef CONFIG_DEBUG_FS
88 struct dentry *dentry;
8c9a8a8f 89 struct hlist_node debug_node;
b09d6d99
MT
90#endif
91 struct kref ref;
92};
93
dfc202ea
SB
94#define CREATE_TRACE_POINTS
95#include <trace/events/clk.h>
96
b09d6d99
MT
97struct clk {
98 struct clk_core *core;
efa85048 99 struct device *dev;
b09d6d99
MT
100 const char *dev_id;
101 const char *con_id;
1c8e6004
TV
102 unsigned long min_rate;
103 unsigned long max_rate;
55e9b8b7 104 unsigned int exclusive_count;
50595f8b 105 struct hlist_node clks_node;
b09d6d99
MT
106};
107
9a34b453
MS
108/*** runtime pm ***/
109static int clk_pm_runtime_get(struct clk_core *core)
110{
24478839 111 int ret;
9a34b453 112
24478839 113 if (!core->rpm_enabled)
9a34b453
MS
114 return 0;
115
116 ret = pm_runtime_get_sync(core->dev);
64c7d7ea
RW
117 if (ret < 0) {
118 pm_runtime_put_noidle(core->dev);
119 return ret;
120 }
121 return 0;
9a34b453
MS
122}
123
124static void clk_pm_runtime_put(struct clk_core *core)
125{
24478839 126 if (!core->rpm_enabled)
9a34b453
MS
127 return;
128
129 pm_runtime_put_sync(core->dev);
130}
131
eab89f69
MT
132/*** locking ***/
133static void clk_prepare_lock(void)
134{
533ddeb1
MT
135 if (!mutex_trylock(&prepare_lock)) {
136 if (prepare_owner == current) {
137 prepare_refcnt++;
138 return;
139 }
140 mutex_lock(&prepare_lock);
141 }
142 WARN_ON_ONCE(prepare_owner != NULL);
143 WARN_ON_ONCE(prepare_refcnt != 0);
144 prepare_owner = current;
145 prepare_refcnt = 1;
eab89f69
MT
146}
147
148static void clk_prepare_unlock(void)
149{
533ddeb1
MT
150 WARN_ON_ONCE(prepare_owner != current);
151 WARN_ON_ONCE(prepare_refcnt == 0);
152
153 if (--prepare_refcnt)
154 return;
155 prepare_owner = NULL;
eab89f69
MT
156 mutex_unlock(&prepare_lock);
157}
158
159static unsigned long clk_enable_lock(void)
a57aa185 160 __acquires(enable_lock)
eab89f69
MT
161{
162 unsigned long flags;
533ddeb1 163
a12aa8a6
DL
164 /*
165 * On UP systems, spin_trylock_irqsave() always returns true, even if
166 * we already hold the lock. So, in that case, we rely only on
167 * reference counting.
168 */
169 if (!IS_ENABLED(CONFIG_SMP) ||
170 !spin_trylock_irqsave(&enable_lock, flags)) {
533ddeb1
MT
171 if (enable_owner == current) {
172 enable_refcnt++;
a57aa185 173 __acquire(enable_lock);
a12aa8a6
DL
174 if (!IS_ENABLED(CONFIG_SMP))
175 local_save_flags(flags);
533ddeb1
MT
176 return flags;
177 }
178 spin_lock_irqsave(&enable_lock, flags);
179 }
180 WARN_ON_ONCE(enable_owner != NULL);
181 WARN_ON_ONCE(enable_refcnt != 0);
182 enable_owner = current;
183 enable_refcnt = 1;
eab89f69
MT
184 return flags;
185}
186
187static void clk_enable_unlock(unsigned long flags)
a57aa185 188 __releases(enable_lock)
eab89f69 189{
533ddeb1
MT
190 WARN_ON_ONCE(enable_owner != current);
191 WARN_ON_ONCE(enable_refcnt == 0);
192
a57aa185
SB
193 if (--enable_refcnt) {
194 __release(enable_lock);
533ddeb1 195 return;
a57aa185 196 }
533ddeb1 197 enable_owner = NULL;
eab89f69
MT
198 spin_unlock_irqrestore(&enable_lock, flags);
199}
200
e55a839a
JB
201static bool clk_core_rate_is_protected(struct clk_core *core)
202{
203 return core->protect_count;
204}
205
4dff95dc
SB
206static bool clk_core_is_prepared(struct clk_core *core)
207{
9a34b453
MS
208 bool ret = false;
209
4dff95dc
SB
210 /*
211 * .is_prepared is optional for clocks that can prepare
212 * fall back to software usage counter if it is missing
213 */
214 if (!core->ops->is_prepared)
215 return core->prepare_count;
b2476490 216
9a34b453
MS
217 if (!clk_pm_runtime_get(core)) {
218 ret = core->ops->is_prepared(core->hw);
219 clk_pm_runtime_put(core);
220 }
221
222 return ret;
4dff95dc 223}
b2476490 224
4dff95dc
SB
225static bool clk_core_is_enabled(struct clk_core *core)
226{
9a34b453
MS
227 bool ret = false;
228
4dff95dc
SB
229 /*
230 * .is_enabled is only mandatory for clocks that gate
231 * fall back to software usage counter if .is_enabled is missing
232 */
233 if (!core->ops->is_enabled)
234 return core->enable_count;
6b44c854 235
9a34b453
MS
236 /*
237 * Check if clock controller's device is runtime active before
238 * calling .is_enabled callback. If not, assume that clock is
239 * disabled, because we might be called from atomic context, from
240 * which pm_runtime_get() is not allowed.
241 * This function is called mainly from clk_disable_unused_subtree,
242 * which ensures proper runtime pm activation of controller before
243 * taking enable spinlock, but the below check is needed if one tries
244 * to call it from other places.
245 */
24478839 246 if (core->rpm_enabled) {
9a34b453
MS
247 pm_runtime_get_noresume(core->dev);
248 if (!pm_runtime_active(core->dev)) {
249 ret = false;
250 goto done;
251 }
252 }
253
254 ret = core->ops->is_enabled(core->hw);
255done:
24478839 256 if (core->rpm_enabled)
756efe13 257 pm_runtime_put(core->dev);
9a34b453
MS
258
259 return ret;
4dff95dc 260}
6b44c854 261
4dff95dc 262/*** helper functions ***/
1af599df 263
b76281cb 264const char *__clk_get_name(const struct clk *clk)
1af599df 265{
4dff95dc 266 return !clk ? NULL : clk->core->name;
1af599df 267}
4dff95dc 268EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 269
e7df6f6e 270const char *clk_hw_get_name(const struct clk_hw *hw)
1a9c069c
SB
271{
272 return hw->core->name;
273}
274EXPORT_SYMBOL_GPL(clk_hw_get_name);
275
4dff95dc
SB
276struct clk_hw *__clk_get_hw(struct clk *clk)
277{
278 return !clk ? NULL : clk->core->hw;
279}
280EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 281
e7df6f6e 282unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
1a9c069c
SB
283{
284 return hw->core->num_parents;
285}
286EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
287
e7df6f6e 288struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
1a9c069c
SB
289{
290 return hw->core->parent ? hw->core->parent->hw : NULL;
291}
292EXPORT_SYMBOL_GPL(clk_hw_get_parent);
293
4dff95dc
SB
294static struct clk_core *__clk_lookup_subtree(const char *name,
295 struct clk_core *core)
bddca894 296{
035a61c3 297 struct clk_core *child;
4dff95dc 298 struct clk_core *ret;
bddca894 299
4dff95dc
SB
300 if (!strcmp(core->name, name))
301 return core;
bddca894 302
4dff95dc
SB
303 hlist_for_each_entry(child, &core->children, child_node) {
304 ret = __clk_lookup_subtree(name, child);
305 if (ret)
306 return ret;
bddca894
PG
307 }
308
4dff95dc 309 return NULL;
bddca894
PG
310}
311
4dff95dc 312static struct clk_core *clk_core_lookup(const char *name)
bddca894 313{
4dff95dc
SB
314 struct clk_core *root_clk;
315 struct clk_core *ret;
bddca894 316
4dff95dc
SB
317 if (!name)
318 return NULL;
bddca894 319
4dff95dc
SB
320 /* search the 'proper' clk tree first */
321 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
322 ret = __clk_lookup_subtree(name, root_clk);
323 if (ret)
324 return ret;
bddca894
PG
325 }
326
4dff95dc
SB
327 /* if not found, then search the orphan tree */
328 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
329 ret = __clk_lookup_subtree(name, root_clk);
330 if (ret)
331 return ret;
332 }
bddca894 333
4dff95dc 334 return NULL;
bddca894
PG
335}
336
4f8c6aba
SB
337#ifdef CONFIG_OF
338static int of_parse_clkspec(const struct device_node *np, int index,
339 const char *name, struct of_phandle_args *out_args);
340static struct clk_hw *
341of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec);
342#else
343static inline int of_parse_clkspec(const struct device_node *np, int index,
344 const char *name,
345 struct of_phandle_args *out_args)
346{
347 return -ENOENT;
348}
349static inline struct clk_hw *
350of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
351{
352 return ERR_PTR(-ENOENT);
353}
354#endif
355
fc0c209c 356/**
dde4eff4 357 * clk_core_get - Find the clk_core parent of a clk
fc0c209c 358 * @core: clk to find parent of
1a079560 359 * @p_index: parent index to search for
fc0c209c
SB
360 *
361 * This is the preferred method for clk providers to find the parent of a
362 * clk when that parent is external to the clk controller. The parent_names
363 * array is indexed and treated as a local name matching a string in the device
dde4eff4
SB
364 * node's 'clock-names' property or as the 'con_id' matching the device's
365 * dev_name() in a clk_lookup. This allows clk providers to use their own
fc0c209c
SB
366 * namespace instead of looking for a globally unique parent string.
367 *
368 * For example the following DT snippet would allow a clock registered by the
369 * clock-controller@c001 that has a clk_init_data::parent_data array
370 * with 'xtal' in the 'name' member to find the clock provided by the
371 * clock-controller@f00abcd without needing to get the globally unique name of
372 * the xtal clk.
373 *
374 * parent: clock-controller@f00abcd {
375 * reg = <0xf00abcd 0xabcd>;
376 * #clock-cells = <0>;
377 * };
378 *
379 * clock-controller@c001 {
380 * reg = <0xc001 0xf00d>;
381 * clocks = <&parent>;
382 * clock-names = "xtal";
383 * #clock-cells = <1>;
384 * };
385 *
386 * Returns: -ENOENT when the provider can't be found or the clk doesn't
4f8c6aba
SB
387 * exist in the provider or the name can't be found in the DT node or
388 * in a clkdev lookup. NULL when the provider knows about the clk but it
389 * isn't provided on this system.
fc0c209c
SB
390 * A valid clk_core pointer when the clk can be found in the provider.
391 */
1a079560 392static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index)
fc0c209c 393{
1a079560
SB
394 const char *name = core->parents[p_index].fw_name;
395 int index = core->parents[p_index].index;
dde4eff4
SB
396 struct clk_hw *hw = ERR_PTR(-ENOENT);
397 struct device *dev = core->dev;
398 const char *dev_id = dev ? dev_name(dev) : NULL;
fc0c209c 399 struct device_node *np = core->of_node;
4f8c6aba 400 struct of_phandle_args clkspec;
fc0c209c 401
4f8c6aba
SB
402 if (np && (name || index >= 0) &&
403 !of_parse_clkspec(np, index, name, &clkspec)) {
404 hw = of_clk_get_hw_from_clkspec(&clkspec);
405 of_node_put(clkspec.np);
406 } else if (name) {
407 /*
408 * If the DT search above couldn't find the provider fallback to
409 * looking up via clkdev based clk_lookups.
410 */
dde4eff4 411 hw = clk_find_hw(dev_id, name);
4f8c6aba 412 }
dde4eff4
SB
413
414 if (IS_ERR(hw))
fc0c209c
SB
415 return ERR_CAST(hw);
416
417 return hw->core;
418}
419
420static void clk_core_fill_parent_index(struct clk_core *core, u8 index)
421{
422 struct clk_parent_map *entry = &core->parents[index];
6a178497 423 struct clk_core *parent;
fc0c209c
SB
424
425 if (entry->hw) {
426 parent = entry->hw->core;
427 /*
428 * We have a direct reference but it isn't registered yet?
429 * Orphan it and let clk_reparent() update the orphan status
430 * when the parent is registered.
431 */
432 if (!parent)
433 parent = ERR_PTR(-EPROBE_DEFER);
434 } else {
1a079560 435 parent = clk_core_get(core, index);
45586c70 436 if (PTR_ERR(parent) == -ENOENT && entry->name)
fc0c209c
SB
437 parent = clk_core_lookup(entry->name);
438 }
439
440 /* Only cache it if it's not an error */
441 if (!IS_ERR(parent))
442 entry->core = parent;
443}
444
4dff95dc
SB
445static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
446 u8 index)
bddca894 447{
fc0c209c 448 if (!core || index >= core->num_parents || !core->parents)
4dff95dc 449 return NULL;
88cfbef2 450
fc0c209c
SB
451 if (!core->parents[index].core)
452 clk_core_fill_parent_index(core, index);
88cfbef2 453
fc0c209c 454 return core->parents[index].core;
bddca894
PG
455}
456
e7df6f6e
SB
457struct clk_hw *
458clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
1a9c069c
SB
459{
460 struct clk_core *parent;
461
462 parent = clk_core_get_parent_by_index(hw->core, index);
463
464 return !parent ? NULL : parent->hw;
465}
466EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
467
4dff95dc
SB
468unsigned int __clk_get_enable_count(struct clk *clk)
469{
470 return !clk ? 0 : clk->core->enable_count;
471}
b2476490 472
4dff95dc
SB
473static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
474{
73d4f945
SB
475 if (!core)
476 return 0;
c646cbf1 477
73d4f945
SB
478 if (!core->num_parents || core->parent)
479 return core->rate;
b2476490 480
73d4f945
SB
481 /*
482 * Clk must have a parent because num_parents > 0 but the parent isn't
483 * known yet. Best to return 0 as the rate of this clk until we can
484 * properly recalc the rate based on the parent's rate.
485 */
486 return 0;
b2476490
MT
487}
488
e7df6f6e 489unsigned long clk_hw_get_rate(const struct clk_hw *hw)
1a9c069c
SB
490{
491 return clk_core_get_rate_nolock(hw->core);
492}
493EXPORT_SYMBOL_GPL(clk_hw_get_rate);
494
0daa376d 495static unsigned long clk_core_get_accuracy_no_lock(struct clk_core *core)
4dff95dc
SB
496{
497 if (!core)
498 return 0;
b2476490 499
4dff95dc 500 return core->accuracy;
b2476490
MT
501}
502
e7df6f6e 503unsigned long clk_hw_get_flags(const struct clk_hw *hw)
1a9c069c
SB
504{
505 return hw->core->flags;
506}
507EXPORT_SYMBOL_GPL(clk_hw_get_flags);
508
e7df6f6e 509bool clk_hw_is_prepared(const struct clk_hw *hw)
1a9c069c
SB
510{
511 return clk_core_is_prepared(hw->core);
512}
12aa377b 513EXPORT_SYMBOL_GPL(clk_hw_is_prepared);
1a9c069c 514
e55a839a
JB
515bool clk_hw_rate_is_protected(const struct clk_hw *hw)
516{
517 return clk_core_rate_is_protected(hw->core);
518}
12aa377b 519EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected);
e55a839a 520
be68bf88
JE
521bool clk_hw_is_enabled(const struct clk_hw *hw)
522{
523 return clk_core_is_enabled(hw->core);
524}
12aa377b 525EXPORT_SYMBOL_GPL(clk_hw_is_enabled);
be68bf88 526
4dff95dc 527bool __clk_is_enabled(struct clk *clk)
b2476490 528{
4dff95dc
SB
529 if (!clk)
530 return false;
b2476490 531
4dff95dc
SB
532 return clk_core_is_enabled(clk->core);
533}
534EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 535
4dff95dc
SB
536static bool mux_is_better_rate(unsigned long rate, unsigned long now,
537 unsigned long best, unsigned long flags)
538{
539 if (flags & CLK_MUX_ROUND_CLOSEST)
540 return abs(now - rate) < abs(best - rate);
1af599df 541
4dff95dc
SB
542 return now <= rate && now > best;
543}
bddca894 544
4ad69b80
JB
545int clk_mux_determine_rate_flags(struct clk_hw *hw,
546 struct clk_rate_request *req,
547 unsigned long flags)
4dff95dc
SB
548{
549 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
550 int i, num_parents, ret;
551 unsigned long best = 0;
552 struct clk_rate_request parent_req = *req;
b2476490 553
4dff95dc
SB
554 /* if NO_REPARENT flag set, pass through to current parent */
555 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
556 parent = core->parent;
0817b62c
BB
557 if (core->flags & CLK_SET_RATE_PARENT) {
558 ret = __clk_determine_rate(parent ? parent->hw : NULL,
559 &parent_req);
560 if (ret)
561 return ret;
562
563 best = parent_req.rate;
564 } else if (parent) {
4dff95dc 565 best = clk_core_get_rate_nolock(parent);
0817b62c 566 } else {
4dff95dc 567 best = clk_core_get_rate_nolock(core);
0817b62c
BB
568 }
569
4dff95dc
SB
570 goto out;
571 }
b2476490 572
4dff95dc
SB
573 /* find the parent that can provide the fastest rate <= rate */
574 num_parents = core->num_parents;
575 for (i = 0; i < num_parents; i++) {
576 parent = clk_core_get_parent_by_index(core, i);
577 if (!parent)
578 continue;
0817b62c
BB
579
580 if (core->flags & CLK_SET_RATE_PARENT) {
581 parent_req = *req;
582 ret = __clk_determine_rate(parent->hw, &parent_req);
583 if (ret)
584 continue;
585 } else {
586 parent_req.rate = clk_core_get_rate_nolock(parent);
587 }
588
589 if (mux_is_better_rate(req->rate, parent_req.rate,
590 best, flags)) {
4dff95dc 591 best_parent = parent;
0817b62c 592 best = parent_req.rate;
4dff95dc
SB
593 }
594 }
b2476490 595
57d866e6
BB
596 if (!best_parent)
597 return -EINVAL;
598
4dff95dc
SB
599out:
600 if (best_parent)
0817b62c
BB
601 req->best_parent_hw = best_parent->hw;
602 req->best_parent_rate = best;
603 req->rate = best;
b2476490 604
0817b62c 605 return 0;
b33d212f 606}
4ad69b80 607EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags);
4dff95dc
SB
608
609struct clk *__clk_lookup(const char *name)
fcb0ee6a 610{
4dff95dc
SB
611 struct clk_core *core = clk_core_lookup(name);
612
613 return !core ? NULL : core->hw->clk;
fcb0ee6a 614}
b2476490 615
4dff95dc
SB
616static void clk_core_get_boundaries(struct clk_core *core,
617 unsigned long *min_rate,
618 unsigned long *max_rate)
1c155b3d 619{
4dff95dc 620 struct clk *clk_user;
1c155b3d 621
9f776722
LC
622 lockdep_assert_held(&prepare_lock);
623
9783c0d9
SB
624 *min_rate = core->min_rate;
625 *max_rate = core->max_rate;
496eadf8 626
4dff95dc
SB
627 hlist_for_each_entry(clk_user, &core->clks, clks_node)
628 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 629
4dff95dc
SB
630 hlist_for_each_entry(clk_user, &core->clks, clks_node)
631 *max_rate = min(*max_rate, clk_user->max_rate);
632}
1c155b3d 633
9783c0d9
SB
634void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
635 unsigned long max_rate)
636{
637 hw->core->min_rate = min_rate;
638 hw->core->max_rate = max_rate;
639}
640EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
641
4dff95dc 642/*
777c1a40
SB
643 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
644 * @hw: mux type clk to determine rate on
645 * @req: rate request, also used to return preferred parent and frequencies
646 *
4dff95dc
SB
647 * Helper for finding best parent to provide a given frequency. This can be used
648 * directly as a determine_rate callback (e.g. for a mux), or from a more
649 * complex clock that may combine a mux with other operations.
777c1a40
SB
650 *
651 * Returns: 0 on success, -EERROR value on error
4dff95dc 652 */
0817b62c
BB
653int __clk_mux_determine_rate(struct clk_hw *hw,
654 struct clk_rate_request *req)
4dff95dc 655{
0817b62c 656 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 657}
4dff95dc 658EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 659
0817b62c
BB
660int __clk_mux_determine_rate_closest(struct clk_hw *hw,
661 struct clk_rate_request *req)
b2476490 662{
0817b62c 663 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
664}
665EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 666
4dff95dc 667/*** clk api ***/
496eadf8 668
e55a839a
JB
669static void clk_core_rate_unprotect(struct clk_core *core)
670{
671 lockdep_assert_held(&prepare_lock);
672
673 if (!core)
674 return;
675
ab525dcc
FE
676 if (WARN(core->protect_count == 0,
677 "%s already unprotected\n", core->name))
e55a839a
JB
678 return;
679
680 if (--core->protect_count > 0)
681 return;
682
683 clk_core_rate_unprotect(core->parent);
684}
685
686static int clk_core_rate_nuke_protect(struct clk_core *core)
687{
688 int ret;
689
690 lockdep_assert_held(&prepare_lock);
691
692 if (!core)
693 return -EINVAL;
694
695 if (core->protect_count == 0)
696 return 0;
697
698 ret = core->protect_count;
699 core->protect_count = 1;
700 clk_core_rate_unprotect(core);
701
702 return ret;
703}
704
55e9b8b7
JB
705/**
706 * clk_rate_exclusive_put - release exclusivity over clock rate control
707 * @clk: the clk over which the exclusivity is released
708 *
709 * clk_rate_exclusive_put() completes a critical section during which a clock
710 * consumer cannot tolerate any other consumer making any operation on the
711 * clock which could result in a rate change or rate glitch. Exclusive clocks
712 * cannot have their rate changed, either directly or indirectly due to changes
713 * further up the parent chain of clocks. As a result, clocks up parent chain
714 * also get under exclusive control of the calling consumer.
715 *
716 * If exlusivity is claimed more than once on clock, even by the same consumer,
717 * the rate effectively gets locked as exclusivity can't be preempted.
718 *
719 * Calls to clk_rate_exclusive_put() must be balanced with calls to
720 * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return
721 * error status.
722 */
723void clk_rate_exclusive_put(struct clk *clk)
724{
725 if (!clk)
726 return;
727
728 clk_prepare_lock();
729
730 /*
731 * if there is something wrong with this consumer protect count, stop
732 * here before messing with the provider
733 */
734 if (WARN_ON(clk->exclusive_count <= 0))
735 goto out;
736
737 clk_core_rate_unprotect(clk->core);
738 clk->exclusive_count--;
739out:
740 clk_prepare_unlock();
741}
742EXPORT_SYMBOL_GPL(clk_rate_exclusive_put);
743
e55a839a
JB
744static void clk_core_rate_protect(struct clk_core *core)
745{
746 lockdep_assert_held(&prepare_lock);
747
748 if (!core)
749 return;
750
751 if (core->protect_count == 0)
752 clk_core_rate_protect(core->parent);
753
754 core->protect_count++;
755}
756
757static void clk_core_rate_restore_protect(struct clk_core *core, int count)
758{
759 lockdep_assert_held(&prepare_lock);
760
761 if (!core)
762 return;
763
764 if (count == 0)
765 return;
766
767 clk_core_rate_protect(core);
768 core->protect_count = count;
769}
770
55e9b8b7
JB
771/**
772 * clk_rate_exclusive_get - get exclusivity over the clk rate control
773 * @clk: the clk over which the exclusity of rate control is requested
774 *
a37a5a9d 775 * clk_rate_exclusive_get() begins a critical section during which a clock
55e9b8b7
JB
776 * consumer cannot tolerate any other consumer making any operation on the
777 * clock which could result in a rate change or rate glitch. Exclusive clocks
778 * cannot have their rate changed, either directly or indirectly due to changes
779 * further up the parent chain of clocks. As a result, clocks up parent chain
780 * also get under exclusive control of the calling consumer.
781 *
782 * If exlusivity is claimed more than once on clock, even by the same consumer,
783 * the rate effectively gets locked as exclusivity can't be preempted.
784 *
785 * Calls to clk_rate_exclusive_get() should be balanced with calls to
786 * clk_rate_exclusive_put(). Calls to this function may sleep.
787 * Returns 0 on success, -EERROR otherwise
788 */
789int clk_rate_exclusive_get(struct clk *clk)
790{
791 if (!clk)
792 return 0;
793
794 clk_prepare_lock();
795 clk_core_rate_protect(clk->core);
796 clk->exclusive_count++;
797 clk_prepare_unlock();
798
799 return 0;
800}
801EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
802
4dff95dc
SB
803static void clk_core_unprepare(struct clk_core *core)
804{
a6334725
SB
805 lockdep_assert_held(&prepare_lock);
806
4dff95dc
SB
807 if (!core)
808 return;
b2476490 809
ab525dcc
FE
810 if (WARN(core->prepare_count == 0,
811 "%s already unprepared\n", core->name))
4dff95dc 812 return;
b2476490 813
ab525dcc
FE
814 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
815 "Unpreparing critical %s\n", core->name))
2e20fbf5
LJ
816 return;
817
9461f7b3
JB
818 if (core->flags & CLK_SET_RATE_GATE)
819 clk_core_rate_unprotect(core);
820
4dff95dc
SB
821 if (--core->prepare_count > 0)
822 return;
b2476490 823
ab525dcc 824 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
b2476490 825
4dff95dc 826 trace_clk_unprepare(core);
b2476490 827
4dff95dc
SB
828 if (core->ops->unprepare)
829 core->ops->unprepare(core->hw);
830
9a34b453
MS
831 clk_pm_runtime_put(core);
832
4dff95dc
SB
833 trace_clk_unprepare_complete(core);
834 clk_core_unprepare(core->parent);
b2476490
MT
835}
836
a6adc30b
DA
837static void clk_core_unprepare_lock(struct clk_core *core)
838{
839 clk_prepare_lock();
840 clk_core_unprepare(core);
841 clk_prepare_unlock();
842}
843
4dff95dc
SB
844/**
845 * clk_unprepare - undo preparation of a clock source
846 * @clk: the clk being unprepared
847 *
848 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
849 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
850 * if the operation may sleep. One example is a clk which is accessed over
851 * I2c. In the complex case a clk gate operation may require a fast and a slow
852 * part. It is this reason that clk_unprepare and clk_disable are not mutually
853 * exclusive. In fact clk_disable must be called before clk_unprepare.
854 */
855void clk_unprepare(struct clk *clk)
1e435256 856{
4dff95dc
SB
857 if (IS_ERR_OR_NULL(clk))
858 return;
859
a6adc30b 860 clk_core_unprepare_lock(clk->core);
1e435256 861}
4dff95dc 862EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 863
4dff95dc 864static int clk_core_prepare(struct clk_core *core)
b2476490 865{
4dff95dc 866 int ret = 0;
b2476490 867
a6334725
SB
868 lockdep_assert_held(&prepare_lock);
869
4dff95dc 870 if (!core)
1e435256 871 return 0;
1e435256 872
4dff95dc 873 if (core->prepare_count == 0) {
9a34b453 874 ret = clk_pm_runtime_get(core);
4dff95dc
SB
875 if (ret)
876 return ret;
b2476490 877
9a34b453
MS
878 ret = clk_core_prepare(core->parent);
879 if (ret)
880 goto runtime_put;
881
4dff95dc 882 trace_clk_prepare(core);
b2476490 883
4dff95dc
SB
884 if (core->ops->prepare)
885 ret = core->ops->prepare(core->hw);
b2476490 886
4dff95dc 887 trace_clk_prepare_complete(core);
1c155b3d 888
9a34b453
MS
889 if (ret)
890 goto unprepare;
4dff95dc 891 }
1c155b3d 892
4dff95dc 893 core->prepare_count++;
b2476490 894
9461f7b3
JB
895 /*
896 * CLK_SET_RATE_GATE is a special case of clock protection
897 * Instead of a consumer claiming exclusive rate control, it is
898 * actually the provider which prevents any consumer from making any
899 * operation which could result in a rate change or rate glitch while
900 * the clock is prepared.
901 */
902 if (core->flags & CLK_SET_RATE_GATE)
903 clk_core_rate_protect(core);
904
b2476490 905 return 0;
9a34b453
MS
906unprepare:
907 clk_core_unprepare(core->parent);
908runtime_put:
909 clk_pm_runtime_put(core);
910 return ret;
b2476490 911}
b2476490 912
a6adc30b
DA
913static int clk_core_prepare_lock(struct clk_core *core)
914{
915 int ret;
916
917 clk_prepare_lock();
918 ret = clk_core_prepare(core);
919 clk_prepare_unlock();
920
921 return ret;
922}
923
4dff95dc
SB
924/**
925 * clk_prepare - prepare a clock source
926 * @clk: the clk being prepared
927 *
928 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
929 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
930 * operation may sleep. One example is a clk which is accessed over I2c. In
931 * the complex case a clk ungate operation may require a fast and a slow part.
932 * It is this reason that clk_prepare and clk_enable are not mutually
933 * exclusive. In fact clk_prepare must be called before clk_enable.
934 * Returns 0 on success, -EERROR otherwise.
935 */
936int clk_prepare(struct clk *clk)
b2476490 937{
4dff95dc
SB
938 if (!clk)
939 return 0;
b2476490 940
a6adc30b 941 return clk_core_prepare_lock(clk->core);
b2476490 942}
4dff95dc 943EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 944
4dff95dc 945static void clk_core_disable(struct clk_core *core)
b2476490 946{
a6334725
SB
947 lockdep_assert_held(&enable_lock);
948
4dff95dc
SB
949 if (!core)
950 return;
035a61c3 951
ab525dcc 952 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
4dff95dc 953 return;
b2476490 954
ab525dcc
FE
955 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
956 "Disabling critical %s\n", core->name))
2e20fbf5
LJ
957 return;
958
4dff95dc
SB
959 if (--core->enable_count > 0)
960 return;
035a61c3 961
2f87a6ea 962 trace_clk_disable_rcuidle(core);
035a61c3 963
4dff95dc
SB
964 if (core->ops->disable)
965 core->ops->disable(core->hw);
035a61c3 966
2f87a6ea 967 trace_clk_disable_complete_rcuidle(core);
035a61c3 968
4dff95dc 969 clk_core_disable(core->parent);
035a61c3 970}
7ef3dcc8 971
a6adc30b
DA
972static void clk_core_disable_lock(struct clk_core *core)
973{
974 unsigned long flags;
975
976 flags = clk_enable_lock();
977 clk_core_disable(core);
978 clk_enable_unlock(flags);
979}
980
4dff95dc
SB
981/**
982 * clk_disable - gate a clock
983 * @clk: the clk being gated
984 *
985 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
986 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
987 * clk if the operation is fast and will never sleep. One example is a
988 * SoC-internal clk which is controlled via simple register writes. In the
989 * complex case a clk gate operation may require a fast and a slow part. It is
990 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
991 * In fact clk_disable must be called before clk_unprepare.
992 */
993void clk_disable(struct clk *clk)
b2476490 994{
4dff95dc
SB
995 if (IS_ERR_OR_NULL(clk))
996 return;
997
a6adc30b 998 clk_core_disable_lock(clk->core);
b2476490 999}
4dff95dc 1000EXPORT_SYMBOL_GPL(clk_disable);
b2476490 1001
4dff95dc 1002static int clk_core_enable(struct clk_core *core)
b2476490 1003{
4dff95dc 1004 int ret = 0;
b2476490 1005
a6334725
SB
1006 lockdep_assert_held(&enable_lock);
1007
4dff95dc
SB
1008 if (!core)
1009 return 0;
b2476490 1010
ab525dcc
FE
1011 if (WARN(core->prepare_count == 0,
1012 "Enabling unprepared %s\n", core->name))
4dff95dc 1013 return -ESHUTDOWN;
b2476490 1014
4dff95dc
SB
1015 if (core->enable_count == 0) {
1016 ret = clk_core_enable(core->parent);
b2476490 1017
4dff95dc
SB
1018 if (ret)
1019 return ret;
b2476490 1020
f17a0dd1 1021 trace_clk_enable_rcuidle(core);
035a61c3 1022
4dff95dc
SB
1023 if (core->ops->enable)
1024 ret = core->ops->enable(core->hw);
035a61c3 1025
f17a0dd1 1026 trace_clk_enable_complete_rcuidle(core);
4dff95dc
SB
1027
1028 if (ret) {
1029 clk_core_disable(core->parent);
1030 return ret;
1031 }
1032 }
1033
1034 core->enable_count++;
1035 return 0;
035a61c3 1036}
b2476490 1037
a6adc30b
DA
1038static int clk_core_enable_lock(struct clk_core *core)
1039{
1040 unsigned long flags;
1041 int ret;
1042
1043 flags = clk_enable_lock();
1044 ret = clk_core_enable(core);
1045 clk_enable_unlock(flags);
1046
1047 return ret;
1048}
1049
43536548
K
1050/**
1051 * clk_gate_restore_context - restore context for poweroff
1052 * @hw: the clk_hw pointer of clock whose state is to be restored
1053 *
1054 * The clock gate restore context function enables or disables
1055 * the gate clocks based on the enable_count. This is done in cases
1056 * where the clock context is lost and based on the enable_count
1057 * the clock either needs to be enabled/disabled. This
1058 * helps restore the state of gate clocks.
1059 */
1060void clk_gate_restore_context(struct clk_hw *hw)
1061{
9be76627
SB
1062 struct clk_core *core = hw->core;
1063
1064 if (core->enable_count)
1065 core->ops->enable(hw);
43536548 1066 else
9be76627 1067 core->ops->disable(hw);
43536548
K
1068}
1069EXPORT_SYMBOL_GPL(clk_gate_restore_context);
1070
9be76627 1071static int clk_core_save_context(struct clk_core *core)
8b95d1ce
RD
1072{
1073 struct clk_core *child;
1074 int ret = 0;
1075
9be76627
SB
1076 hlist_for_each_entry(child, &core->children, child_node) {
1077 ret = clk_core_save_context(child);
8b95d1ce
RD
1078 if (ret < 0)
1079 return ret;
1080 }
1081
9be76627
SB
1082 if (core->ops && core->ops->save_context)
1083 ret = core->ops->save_context(core->hw);
8b95d1ce
RD
1084
1085 return ret;
1086}
1087
9be76627 1088static void clk_core_restore_context(struct clk_core *core)
8b95d1ce
RD
1089{
1090 struct clk_core *child;
1091
9be76627
SB
1092 if (core->ops && core->ops->restore_context)
1093 core->ops->restore_context(core->hw);
8b95d1ce 1094
9be76627
SB
1095 hlist_for_each_entry(child, &core->children, child_node)
1096 clk_core_restore_context(child);
8b95d1ce
RD
1097}
1098
1099/**
1100 * clk_save_context - save clock context for poweroff
1101 *
1102 * Saves the context of the clock register for powerstates in which the
1103 * contents of the registers will be lost. Occurs deep within the suspend
1104 * code. Returns 0 on success.
1105 */
1106int clk_save_context(void)
1107{
1108 struct clk_core *clk;
1109 int ret;
1110
1111 hlist_for_each_entry(clk, &clk_root_list, child_node) {
9be76627 1112 ret = clk_core_save_context(clk);
8b95d1ce
RD
1113 if (ret < 0)
1114 return ret;
1115 }
1116
1117 hlist_for_each_entry(clk, &clk_orphan_list, child_node) {
9be76627 1118 ret = clk_core_save_context(clk);
8b95d1ce
RD
1119 if (ret < 0)
1120 return ret;
1121 }
1122
1123 return 0;
1124}
1125EXPORT_SYMBOL_GPL(clk_save_context);
1126
1127/**
1128 * clk_restore_context - restore clock context after poweroff
1129 *
1130 * Restore the saved clock context upon resume.
1131 *
1132 */
1133void clk_restore_context(void)
1134{
9be76627 1135 struct clk_core *core;
8b95d1ce 1136
9be76627
SB
1137 hlist_for_each_entry(core, &clk_root_list, child_node)
1138 clk_core_restore_context(core);
8b95d1ce 1139
9be76627
SB
1140 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1141 clk_core_restore_context(core);
8b95d1ce
RD
1142}
1143EXPORT_SYMBOL_GPL(clk_restore_context);
1144
4dff95dc
SB
1145/**
1146 * clk_enable - ungate a clock
1147 * @clk: the clk being ungated
1148 *
1149 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
1150 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
1151 * if the operation will never sleep. One example is a SoC-internal clk which
1152 * is controlled via simple register writes. In the complex case a clk ungate
1153 * operation may require a fast and a slow part. It is this reason that
1154 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
1155 * must be called before clk_enable. Returns 0 on success, -EERROR
1156 * otherwise.
1157 */
1158int clk_enable(struct clk *clk)
5279fc40 1159{
4dff95dc 1160 if (!clk)
5279fc40
BB
1161 return 0;
1162
a6adc30b
DA
1163 return clk_core_enable_lock(clk->core);
1164}
1165EXPORT_SYMBOL_GPL(clk_enable);
1166
0bfa0820
NP
1167/**
1168 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it.
1169 * @clk: clock source
1170 *
1171 * Returns true if clk_prepare() implicitly enables the clock, effectively
1172 * making clk_enable()/clk_disable() no-ops, false otherwise.
1173 *
1174 * This is of interest mainly to power management code where actually
1175 * disabling the clock also requires unpreparing it to have any material
1176 * effect.
1177 *
1178 * Regardless of the value returned here, the caller must always invoke
1179 * clk_enable() or clk_prepare_enable() and counterparts for usage counts
1180 * to be right.
1181 */
1182bool clk_is_enabled_when_prepared(struct clk *clk)
1183{
1184 return clk && !(clk->core->ops->enable && clk->core->ops->disable);
1185}
1186EXPORT_SYMBOL_GPL(clk_is_enabled_when_prepared);
1187
a6adc30b
DA
1188static int clk_core_prepare_enable(struct clk_core *core)
1189{
1190 int ret;
1191
1192 ret = clk_core_prepare_lock(core);
1193 if (ret)
1194 return ret;
1195
1196 ret = clk_core_enable_lock(core);
1197 if (ret)
1198 clk_core_unprepare_lock(core);
5279fc40 1199
4dff95dc 1200 return ret;
b2476490 1201}
a6adc30b
DA
1202
1203static void clk_core_disable_unprepare(struct clk_core *core)
1204{
1205 clk_core_disable_lock(core);
1206 clk_core_unprepare_lock(core);
1207}
b2476490 1208
564f86d3 1209static void __init clk_unprepare_unused_subtree(struct clk_core *core)
7ec986ef
DA
1210{
1211 struct clk_core *child;
1212
1213 lockdep_assert_held(&prepare_lock);
1214
1215 hlist_for_each_entry(child, &core->children, child_node)
1216 clk_unprepare_unused_subtree(child);
1217
1218 if (core->prepare_count)
1219 return;
1220
1221 if (core->flags & CLK_IGNORE_UNUSED)
1222 return;
1223
9a34b453
MS
1224 if (clk_pm_runtime_get(core))
1225 return;
1226
7ec986ef
DA
1227 if (clk_core_is_prepared(core)) {
1228 trace_clk_unprepare(core);
1229 if (core->ops->unprepare_unused)
1230 core->ops->unprepare_unused(core->hw);
1231 else if (core->ops->unprepare)
1232 core->ops->unprepare(core->hw);
1233 trace_clk_unprepare_complete(core);
1234 }
9a34b453
MS
1235
1236 clk_pm_runtime_put(core);
7ec986ef
DA
1237}
1238
564f86d3 1239static void __init clk_disable_unused_subtree(struct clk_core *core)
7ec986ef
DA
1240{
1241 struct clk_core *child;
1242 unsigned long flags;
1243
1244 lockdep_assert_held(&prepare_lock);
1245
1246 hlist_for_each_entry(child, &core->children, child_node)
1247 clk_disable_unused_subtree(child);
1248
a4b3518d
DA
1249 if (core->flags & CLK_OPS_PARENT_ENABLE)
1250 clk_core_prepare_enable(core->parent);
1251
9a34b453
MS
1252 if (clk_pm_runtime_get(core))
1253 goto unprepare_out;
1254
7ec986ef
DA
1255 flags = clk_enable_lock();
1256
1257 if (core->enable_count)
1258 goto unlock_out;
1259
1260 if (core->flags & CLK_IGNORE_UNUSED)
1261 goto unlock_out;
1262
1263 /*
1264 * some gate clocks have special needs during the disable-unused
1265 * sequence. call .disable_unused if available, otherwise fall
1266 * back to .disable
1267 */
1268 if (clk_core_is_enabled(core)) {
1269 trace_clk_disable(core);
1270 if (core->ops->disable_unused)
1271 core->ops->disable_unused(core->hw);
1272 else if (core->ops->disable)
1273 core->ops->disable(core->hw);
1274 trace_clk_disable_complete(core);
1275 }
1276
1277unlock_out:
1278 clk_enable_unlock(flags);
9a34b453
MS
1279 clk_pm_runtime_put(core);
1280unprepare_out:
a4b3518d
DA
1281 if (core->flags & CLK_OPS_PARENT_ENABLE)
1282 clk_core_disable_unprepare(core->parent);
7ec986ef
DA
1283}
1284
564f86d3 1285static bool clk_ignore_unused __initdata;
7ec986ef
DA
1286static int __init clk_ignore_unused_setup(char *__unused)
1287{
1288 clk_ignore_unused = true;
1289 return 1;
1290}
1291__setup("clk_ignore_unused", clk_ignore_unused_setup);
1292
564f86d3 1293static int __init clk_disable_unused(void)
7ec986ef
DA
1294{
1295 struct clk_core *core;
1296
1297 if (clk_ignore_unused) {
1298 pr_warn("clk: Not disabling unused clocks\n");
1299 return 0;
1300 }
1301
1302 clk_prepare_lock();
1303
1304 hlist_for_each_entry(core, &clk_root_list, child_node)
1305 clk_disable_unused_subtree(core);
1306
1307 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1308 clk_disable_unused_subtree(core);
1309
1310 hlist_for_each_entry(core, &clk_root_list, child_node)
1311 clk_unprepare_unused_subtree(core);
1312
1313 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1314 clk_unprepare_unused_subtree(core);
1315
1316 clk_prepare_unlock();
1317
1318 return 0;
1319}
1320late_initcall_sync(clk_disable_unused);
1321
0f6cc2b8
JB
1322static int clk_core_determine_round_nolock(struct clk_core *core,
1323 struct clk_rate_request *req)
3d6ee287 1324{
0817b62c 1325 long rate;
4dff95dc
SB
1326
1327 lockdep_assert_held(&prepare_lock);
3d6ee287 1328
d6968fca 1329 if (!core)
4dff95dc 1330 return 0;
3d6ee287 1331
55e9b8b7 1332 /*
e27453ad 1333 * At this point, core protection will be disabled
55e9b8b7
JB
1334 * - if the provider is not protected at all
1335 * - if the calling consumer is the only one which has exclusivity
1336 * over the provider
1337 */
e55a839a
JB
1338 if (clk_core_rate_is_protected(core)) {
1339 req->rate = core->rate;
1340 } else if (core->ops->determine_rate) {
0817b62c
BB
1341 return core->ops->determine_rate(core->hw, req);
1342 } else if (core->ops->round_rate) {
1343 rate = core->ops->round_rate(core->hw, req->rate,
1344 &req->best_parent_rate);
1345 if (rate < 0)
1346 return rate;
1347
1348 req->rate = rate;
0817b62c 1349 } else {
0f6cc2b8 1350 return -EINVAL;
0817b62c
BB
1351 }
1352
1353 return 0;
3d6ee287
UH
1354}
1355
0f6cc2b8
JB
1356static void clk_core_init_rate_req(struct clk_core * const core,
1357 struct clk_rate_request *req)
1358{
1359 struct clk_core *parent;
1360
1361 if (WARN_ON(!core || !req))
1362 return;
1363
1364 parent = core->parent;
1365 if (parent) {
1366 req->best_parent_hw = parent->hw;
1367 req->best_parent_rate = parent->rate;
1368 } else {
1369 req->best_parent_hw = NULL;
1370 req->best_parent_rate = 0;
0817b62c 1371 }
0f6cc2b8 1372}
0817b62c 1373
0f6cc2b8
JB
1374static bool clk_core_can_round(struct clk_core * const core)
1375{
eef1f1b6 1376 return core->ops->determine_rate || core->ops->round_rate;
0f6cc2b8
JB
1377}
1378
1379static int clk_core_round_rate_nolock(struct clk_core *core,
1380 struct clk_rate_request *req)
1381{
1382 lockdep_assert_held(&prepare_lock);
1383
04bf9ab3
JB
1384 if (!core) {
1385 req->rate = 0;
0f6cc2b8 1386 return 0;
04bf9ab3 1387 }
0817b62c 1388
0f6cc2b8
JB
1389 clk_core_init_rate_req(core, req);
1390
1391 if (clk_core_can_round(core))
1392 return clk_core_determine_round_nolock(core, req);
1393 else if (core->flags & CLK_SET_RATE_PARENT)
1394 return clk_core_round_rate_nolock(core->parent, req);
1395
1396 req->rate = core->rate;
0817b62c 1397 return 0;
3d6ee287
UH
1398}
1399
4dff95dc
SB
1400/**
1401 * __clk_determine_rate - get the closest rate actually supported by a clock
1402 * @hw: determine the rate of this clock
2d5b520c 1403 * @req: target rate request
4dff95dc 1404 *
6e5ab41b 1405 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 1406 */
0817b62c 1407int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 1408{
0817b62c
BB
1409 if (!hw) {
1410 req->rate = 0;
4dff95dc 1411 return 0;
0817b62c 1412 }
035a61c3 1413
0817b62c 1414 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 1415}
4dff95dc 1416EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 1417
e8c849c2
SM
1418/**
1419 * clk_hw_round_rate() - round the given rate for a hw clk
1420 * @hw: the hw clk for which we are rounding a rate
1421 * @rate: the rate which is to be rounded
1422 *
1423 * Takes in a rate as input and rounds it to a rate that the clk can actually
1424 * use.
1425 *
1426 * Context: prepare_lock must be held.
1427 * For clk providers to call from within clk_ops such as .round_rate,
1428 * .determine_rate.
1429 *
1430 * Return: returns rounded rate of hw clk if clk supports round_rate operation
1431 * else returns the parent rate.
1432 */
1a9c069c
SB
1433unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
1434{
1435 int ret;
1436 struct clk_rate_request req;
1437
1438 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1439 req.rate = rate;
1440
1441 ret = clk_core_round_rate_nolock(hw->core, &req);
1442 if (ret)
1443 return 0;
1444
1445 return req.rate;
1446}
1447EXPORT_SYMBOL_GPL(clk_hw_round_rate);
1448
4dff95dc
SB
1449/**
1450 * clk_round_rate - round the given rate for a clk
1451 * @clk: the clk for which we are rounding a rate
1452 * @rate: the rate which is to be rounded
1453 *
1454 * Takes in a rate as input and rounds it to a rate that the clk can actually
1455 * use which is then returned. If clk doesn't support round_rate operation
1456 * then the parent rate is returned.
1457 */
1458long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 1459{
fc4a05d4
SB
1460 struct clk_rate_request req;
1461 int ret;
4dff95dc 1462
035a61c3 1463 if (!clk)
4dff95dc 1464 return 0;
035a61c3 1465
4dff95dc 1466 clk_prepare_lock();
fc4a05d4 1467
55e9b8b7
JB
1468 if (clk->exclusive_count)
1469 clk_core_rate_unprotect(clk->core);
1470
fc4a05d4
SB
1471 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1472 req.rate = rate;
1473
1474 ret = clk_core_round_rate_nolock(clk->core, &req);
55e9b8b7
JB
1475
1476 if (clk->exclusive_count)
1477 clk_core_rate_protect(clk->core);
1478
4dff95dc
SB
1479 clk_prepare_unlock();
1480
fc4a05d4
SB
1481 if (ret)
1482 return ret;
1483
1484 return req.rate;
035a61c3 1485}
4dff95dc 1486EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 1487
4dff95dc
SB
1488/**
1489 * __clk_notify - call clk notifier chain
1490 * @core: clk that is changing rate
1491 * @msg: clk notifier type (see include/linux/clk.h)
1492 * @old_rate: old clk rate
1493 * @new_rate: new clk rate
1494 *
1495 * Triggers a notifier call chain on the clk rate-change notification
1496 * for 'clk'. Passes a pointer to the struct clk and the previous
1497 * and current rates to the notifier callback. Intended to be called by
1498 * internal clock code only. Returns NOTIFY_DONE from the last driver
1499 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1500 * a driver returns that.
1501 */
1502static int __clk_notify(struct clk_core *core, unsigned long msg,
1503 unsigned long old_rate, unsigned long new_rate)
b2476490 1504{
4dff95dc
SB
1505 struct clk_notifier *cn;
1506 struct clk_notifier_data cnd;
1507 int ret = NOTIFY_DONE;
b2476490 1508
4dff95dc
SB
1509 cnd.old_rate = old_rate;
1510 cnd.new_rate = new_rate;
b2476490 1511
4dff95dc
SB
1512 list_for_each_entry(cn, &clk_notifier_list, node) {
1513 if (cn->clk->core == core) {
1514 cnd.clk = cn->clk;
1515 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1516 &cnd);
17c34c56
PDS
1517 if (ret & NOTIFY_STOP_MASK)
1518 return ret;
4dff95dc 1519 }
b2476490
MT
1520 }
1521
4dff95dc 1522 return ret;
b2476490
MT
1523}
1524
4dff95dc
SB
1525/**
1526 * __clk_recalc_accuracies
1527 * @core: first clk in the subtree
1528 *
1529 * Walks the subtree of clks starting with clk and recalculates accuracies as
1530 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 1531 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 1532 * parent.
4dff95dc
SB
1533 */
1534static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 1535{
4dff95dc
SB
1536 unsigned long parent_accuracy = 0;
1537 struct clk_core *child;
b2476490 1538
4dff95dc 1539 lockdep_assert_held(&prepare_lock);
b2476490 1540
4dff95dc
SB
1541 if (core->parent)
1542 parent_accuracy = core->parent->accuracy;
b2476490 1543
4dff95dc
SB
1544 if (core->ops->recalc_accuracy)
1545 core->accuracy = core->ops->recalc_accuracy(core->hw,
1546 parent_accuracy);
1547 else
1548 core->accuracy = parent_accuracy;
b2476490 1549
4dff95dc
SB
1550 hlist_for_each_entry(child, &core->children, child_node)
1551 __clk_recalc_accuracies(child);
b2476490
MT
1552}
1553
0daa376d 1554static long clk_core_get_accuracy_recalc(struct clk_core *core)
e366fdd7 1555{
4dff95dc
SB
1556 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1557 __clk_recalc_accuracies(core);
15a02c1f 1558
0daa376d 1559 return clk_core_get_accuracy_no_lock(core);
e366fdd7 1560}
15a02c1f 1561
4dff95dc
SB
1562/**
1563 * clk_get_accuracy - return the accuracy of clk
1564 * @clk: the clk whose accuracy is being returned
1565 *
1566 * Simply returns the cached accuracy of the clk, unless
1567 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1568 * issued.
1569 * If clk is NULL then returns 0.
1570 */
1571long clk_get_accuracy(struct clk *clk)
035a61c3 1572{
0daa376d
SB
1573 long accuracy;
1574
4dff95dc
SB
1575 if (!clk)
1576 return 0;
035a61c3 1577
0daa376d
SB
1578 clk_prepare_lock();
1579 accuracy = clk_core_get_accuracy_recalc(clk->core);
1580 clk_prepare_unlock();
1581
1582 return accuracy;
035a61c3 1583}
4dff95dc 1584EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 1585
4dff95dc
SB
1586static unsigned long clk_recalc(struct clk_core *core,
1587 unsigned long parent_rate)
1c8e6004 1588{
9a34b453
MS
1589 unsigned long rate = parent_rate;
1590
1591 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1592 rate = core->ops->recalc_rate(core->hw, parent_rate);
1593 clk_pm_runtime_put(core);
1594 }
1595 return rate;
1c8e6004
TV
1596}
1597
4dff95dc
SB
1598/**
1599 * __clk_recalc_rates
1600 * @core: first clk in the subtree
1601 * @msg: notification type (see include/linux/clk.h)
1602 *
1603 * Walks the subtree of clks starting with clk and recalculates rates as it
1604 * goes. Note that if a clk does not implement the .recalc_rate callback then
1605 * it is assumed that the clock will take on the rate of its parent.
1606 *
1607 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1608 * if necessary.
15a02c1f 1609 */
4dff95dc 1610static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1611{
4dff95dc
SB
1612 unsigned long old_rate;
1613 unsigned long parent_rate = 0;
1614 struct clk_core *child;
e366fdd7 1615
4dff95dc 1616 lockdep_assert_held(&prepare_lock);
15a02c1f 1617
4dff95dc 1618 old_rate = core->rate;
b2476490 1619
4dff95dc
SB
1620 if (core->parent)
1621 parent_rate = core->parent->rate;
b2476490 1622
4dff95dc 1623 core->rate = clk_recalc(core, parent_rate);
b2476490 1624
4dff95dc
SB
1625 /*
1626 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1627 * & ABORT_RATE_CHANGE notifiers
1628 */
1629 if (core->notifier_count && msg)
1630 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1631
4dff95dc
SB
1632 hlist_for_each_entry(child, &core->children, child_node)
1633 __clk_recalc_rates(child, msg);
1634}
b2476490 1635
0daa376d 1636static unsigned long clk_core_get_rate_recalc(struct clk_core *core)
4dff95dc 1637{
4dff95dc
SB
1638 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1639 __clk_recalc_rates(core, 0);
1640
0daa376d 1641 return clk_core_get_rate_nolock(core);
b2476490
MT
1642}
1643
1644/**
4dff95dc
SB
1645 * clk_get_rate - return the rate of clk
1646 * @clk: the clk whose rate is being returned
b2476490 1647 *
4dff95dc
SB
1648 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1649 * is set, which means a recalc_rate will be issued.
1650 * If clk is NULL then returns 0.
b2476490 1651 */
4dff95dc 1652unsigned long clk_get_rate(struct clk *clk)
b2476490 1653{
0daa376d
SB
1654 unsigned long rate;
1655
4dff95dc
SB
1656 if (!clk)
1657 return 0;
63589e92 1658
0daa376d
SB
1659 clk_prepare_lock();
1660 rate = clk_core_get_rate_recalc(clk->core);
1661 clk_prepare_unlock();
1662
1663 return rate;
b2476490 1664}
4dff95dc 1665EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1666
4dff95dc
SB
1667static int clk_fetch_parent_index(struct clk_core *core,
1668 struct clk_core *parent)
b2476490 1669{
4dff95dc 1670 int i;
b2476490 1671
508f884a
MY
1672 if (!parent)
1673 return -EINVAL;
1674
ede77858 1675 for (i = 0; i < core->num_parents; i++) {
1a079560 1676 /* Found it first try! */
fc0c209c 1677 if (core->parents[i].core == parent)
4dff95dc 1678 return i;
b2476490 1679
1a079560 1680 /* Something else is here, so keep looking */
fc0c209c 1681 if (core->parents[i].core)
ede77858
DB
1682 continue;
1683
1a079560
SB
1684 /* Maybe core hasn't been cached but the hw is all we know? */
1685 if (core->parents[i].hw) {
1686 if (core->parents[i].hw == parent->hw)
1687 break;
1688
1689 /* Didn't match, but we're expecting a clk_hw */
1690 continue;
ede77858 1691 }
1a079560
SB
1692
1693 /* Maybe it hasn't been cached (clk_set_parent() path) */
1694 if (parent == clk_core_get(core, i))
1695 break;
1696
1697 /* Fallback to comparing globally unique names */
24876f09
MB
1698 if (core->parents[i].name &&
1699 !strcmp(parent->name, core->parents[i].name))
1a079560 1700 break;
ede77858
DB
1701 }
1702
1a079560
SB
1703 if (i == core->num_parents)
1704 return -EINVAL;
1705
1706 core->parents[i].core = parent;
1707 return i;
b2476490
MT
1708}
1709
d9b86cc4
SK
1710/**
1711 * clk_hw_get_parent_index - return the index of the parent clock
1712 * @hw: clk_hw associated with the clk being consumed
1713 *
1714 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1715 * clock does not have a current parent.
1716 */
1717int clk_hw_get_parent_index(struct clk_hw *hw)
1718{
1719 struct clk_hw *parent = clk_hw_get_parent(hw);
1720
1721 if (WARN_ON(parent == NULL))
1722 return -EINVAL;
1723
1724 return clk_fetch_parent_index(hw->core, parent->core);
1725}
1726EXPORT_SYMBOL_GPL(clk_hw_get_parent_index);
1727
e6500344
HS
1728/*
1729 * Update the orphan status of @core and all its children.
1730 */
1731static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1732{
1733 struct clk_core *child;
1734
1735 core->orphan = is_orphan;
1736
1737 hlist_for_each_entry(child, &core->children, child_node)
1738 clk_core_update_orphan_status(child, is_orphan);
1739}
1740
4dff95dc 1741static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1742{
e6500344
HS
1743 bool was_orphan = core->orphan;
1744
4dff95dc 1745 hlist_del(&core->child_node);
035a61c3 1746
4dff95dc 1747 if (new_parent) {
e6500344
HS
1748 bool becomes_orphan = new_parent->orphan;
1749
4dff95dc
SB
1750 /* avoid duplicate POST_RATE_CHANGE notifications */
1751 if (new_parent->new_child == core)
1752 new_parent->new_child = NULL;
b2476490 1753
4dff95dc 1754 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1755
1756 if (was_orphan != becomes_orphan)
1757 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1758 } else {
1759 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1760 if (!was_orphan)
1761 clk_core_update_orphan_status(core, true);
4dff95dc 1762 }
dfc202ea 1763
4dff95dc 1764 core->parent = new_parent;
035a61c3
TV
1765}
1766
4dff95dc
SB
1767static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1768 struct clk_core *parent)
b2476490
MT
1769{
1770 unsigned long flags;
4dff95dc 1771 struct clk_core *old_parent = core->parent;
b2476490 1772
4dff95dc 1773 /*
fc8726a2
DA
1774 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock
1775 *
1776 * 2. Migrate prepare state between parents and prevent race with
4dff95dc
SB
1777 * clk_enable().
1778 *
1779 * If the clock is not prepared, then a race with
1780 * clk_enable/disable() is impossible since we already have the
1781 * prepare lock (future calls to clk_enable() need to be preceded by
1782 * a clk_prepare()).
1783 *
1784 * If the clock is prepared, migrate the prepared state to the new
1785 * parent and also protect against a race with clk_enable() by
1786 * forcing the clock and the new parent on. This ensures that all
1787 * future calls to clk_enable() are practically NOPs with respect to
1788 * hardware and software states.
1789 *
1790 * See also: Comment for clk_set_parent() below.
1791 */
fc8726a2
DA
1792
1793 /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
1794 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1795 clk_core_prepare_enable(old_parent);
1796 clk_core_prepare_enable(parent);
1797 }
1798
1799 /* migrate prepare count if > 0 */
4dff95dc 1800 if (core->prepare_count) {
fc8726a2
DA
1801 clk_core_prepare_enable(parent);
1802 clk_core_enable_lock(core);
4dff95dc 1803 }
63589e92 1804
4dff95dc 1805 /* update the clk tree topology */
eab89f69 1806 flags = clk_enable_lock();
4dff95dc 1807 clk_reparent(core, parent);
eab89f69 1808 clk_enable_unlock(flags);
4dff95dc
SB
1809
1810 return old_parent;
b2476490 1811}
b2476490 1812
4dff95dc
SB
1813static void __clk_set_parent_after(struct clk_core *core,
1814 struct clk_core *parent,
1815 struct clk_core *old_parent)
b2476490 1816{
4dff95dc
SB
1817 /*
1818 * Finish the migration of prepare state and undo the changes done
1819 * for preventing a race with clk_enable().
1820 */
1821 if (core->prepare_count) {
fc8726a2
DA
1822 clk_core_disable_lock(core);
1823 clk_core_disable_unprepare(old_parent);
1824 }
1825
1826 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1827 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1828 clk_core_disable_unprepare(parent);
1829 clk_core_disable_unprepare(old_parent);
4dff95dc
SB
1830 }
1831}
b2476490 1832
4dff95dc
SB
1833static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1834 u8 p_index)
1835{
1836 unsigned long flags;
1837 int ret = 0;
1838 struct clk_core *old_parent;
b2476490 1839
4dff95dc 1840 old_parent = __clk_set_parent_before(core, parent);
b2476490 1841
4dff95dc 1842 trace_clk_set_parent(core, parent);
b2476490 1843
4dff95dc
SB
1844 /* change clock input source */
1845 if (parent && core->ops->set_parent)
1846 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1847
4dff95dc 1848 trace_clk_set_parent_complete(core, parent);
dfc202ea 1849
4dff95dc
SB
1850 if (ret) {
1851 flags = clk_enable_lock();
1852 clk_reparent(core, old_parent);
1853 clk_enable_unlock(flags);
c660b2eb 1854 __clk_set_parent_after(core, old_parent, parent);
dfc202ea 1855
4dff95dc 1856 return ret;
b2476490
MT
1857 }
1858
4dff95dc
SB
1859 __clk_set_parent_after(core, parent, old_parent);
1860
b2476490
MT
1861 return 0;
1862}
1863
1864/**
4dff95dc
SB
1865 * __clk_speculate_rates
1866 * @core: first clk in the subtree
1867 * @parent_rate: the "future" rate of clk's parent
b2476490 1868 *
4dff95dc
SB
1869 * Walks the subtree of clks starting with clk, speculating rates as it
1870 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1871 *
1872 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1873 * pre-rate change notifications and returns early if no clks in the
1874 * subtree have subscribed to the notifications. Note that if a clk does not
1875 * implement the .recalc_rate callback then it is assumed that the clock will
1876 * take on the rate of its parent.
b2476490 1877 */
4dff95dc
SB
1878static int __clk_speculate_rates(struct clk_core *core,
1879 unsigned long parent_rate)
b2476490 1880{
4dff95dc
SB
1881 struct clk_core *child;
1882 unsigned long new_rate;
1883 int ret = NOTIFY_DONE;
b2476490 1884
4dff95dc 1885 lockdep_assert_held(&prepare_lock);
864e160a 1886
4dff95dc
SB
1887 new_rate = clk_recalc(core, parent_rate);
1888
1889 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1890 if (core->notifier_count)
1891 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1892
1893 if (ret & NOTIFY_STOP_MASK) {
1894 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1895 __func__, core->name, ret);
1896 goto out;
1897 }
1898
1899 hlist_for_each_entry(child, &core->children, child_node) {
1900 ret = __clk_speculate_rates(child, new_rate);
1901 if (ret & NOTIFY_STOP_MASK)
1902 break;
1903 }
b2476490 1904
4dff95dc 1905out:
b2476490
MT
1906 return ret;
1907}
b2476490 1908
4dff95dc
SB
1909static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1910 struct clk_core *new_parent, u8 p_index)
b2476490 1911{
4dff95dc 1912 struct clk_core *child;
b2476490 1913
4dff95dc
SB
1914 core->new_rate = new_rate;
1915 core->new_parent = new_parent;
1916 core->new_parent_index = p_index;
1917 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1918 core->new_child = NULL;
1919 if (new_parent && new_parent != core->parent)
1920 new_parent->new_child = core;
496eadf8 1921
4dff95dc
SB
1922 hlist_for_each_entry(child, &core->children, child_node) {
1923 child->new_rate = clk_recalc(child, new_rate);
1924 clk_calc_subtree(child, child->new_rate, NULL, 0);
1925 }
1926}
b2476490 1927
4dff95dc
SB
1928/*
1929 * calculate the new rates returning the topmost clock that has to be
1930 * changed.
1931 */
1932static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1933 unsigned long rate)
1934{
1935 struct clk_core *top = core;
1936 struct clk_core *old_parent, *parent;
4dff95dc
SB
1937 unsigned long best_parent_rate = 0;
1938 unsigned long new_rate;
1939 unsigned long min_rate;
1940 unsigned long max_rate;
1941 int p_index = 0;
1942 long ret;
1943
1944 /* sanity */
1945 if (IS_ERR_OR_NULL(core))
1946 return NULL;
1947
1948 /* save parent rate, if it exists */
1949 parent = old_parent = core->parent;
71472c0c 1950 if (parent)
4dff95dc 1951 best_parent_rate = parent->rate;
71472c0c 1952
4dff95dc
SB
1953 clk_core_get_boundaries(core, &min_rate, &max_rate);
1954
1955 /* find the closest rate and parent clk/rate */
0f6cc2b8 1956 if (clk_core_can_round(core)) {
0817b62c
BB
1957 struct clk_rate_request req;
1958
1959 req.rate = rate;
1960 req.min_rate = min_rate;
1961 req.max_rate = max_rate;
0817b62c 1962
0f6cc2b8
JB
1963 clk_core_init_rate_req(core, &req);
1964
1965 ret = clk_core_determine_round_nolock(core, &req);
4dff95dc
SB
1966 if (ret < 0)
1967 return NULL;
1c8e6004 1968
0817b62c
BB
1969 best_parent_rate = req.best_parent_rate;
1970 new_rate = req.rate;
1971 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
035a61c3 1972
4dff95dc
SB
1973 if (new_rate < min_rate || new_rate > max_rate)
1974 return NULL;
1975 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1976 /* pass-through clock without adjustable parent */
1977 core->new_rate = core->rate;
1978 return NULL;
1979 } else {
1980 /* pass-through clock with adjustable parent */
1981 top = clk_calc_new_rates(parent, rate);
1982 new_rate = parent->new_rate;
1983 goto out;
1984 }
1c8e6004 1985
4dff95dc
SB
1986 /* some clocks must be gated to change parent */
1987 if (parent != old_parent &&
1988 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1989 pr_debug("%s: %s not gated but wants to reparent\n",
1990 __func__, core->name);
1991 return NULL;
1992 }
b2476490 1993
4dff95dc
SB
1994 /* try finding the new parent index */
1995 if (parent && core->num_parents > 1) {
1996 p_index = clk_fetch_parent_index(core, parent);
1997 if (p_index < 0) {
1998 pr_debug("%s: clk %s can not be parent of clk %s\n",
1999 __func__, parent->name, core->name);
2000 return NULL;
2001 }
2002 }
b2476490 2003
4dff95dc
SB
2004 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
2005 best_parent_rate != parent->rate)
2006 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 2007
4dff95dc
SB
2008out:
2009 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 2010
4dff95dc 2011 return top;
b2476490 2012}
b2476490 2013
4dff95dc
SB
2014/*
2015 * Notify about rate changes in a subtree. Always walk down the whole tree
2016 * so that in case of an error we can walk down the whole tree again and
2017 * abort the change.
b2476490 2018 */
4dff95dc
SB
2019static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
2020 unsigned long event)
b2476490 2021{
4dff95dc 2022 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
2023 int ret = NOTIFY_DONE;
2024
4dff95dc
SB
2025 if (core->rate == core->new_rate)
2026 return NULL;
b2476490 2027
4dff95dc
SB
2028 if (core->notifier_count) {
2029 ret = __clk_notify(core, event, core->rate, core->new_rate);
2030 if (ret & NOTIFY_STOP_MASK)
2031 fail_clk = core;
b2476490
MT
2032 }
2033
4dff95dc
SB
2034 hlist_for_each_entry(child, &core->children, child_node) {
2035 /* Skip children who will be reparented to another clock */
2036 if (child->new_parent && child->new_parent != core)
2037 continue;
2038 tmp_clk = clk_propagate_rate_change(child, event);
2039 if (tmp_clk)
2040 fail_clk = tmp_clk;
2041 }
5279fc40 2042
4dff95dc
SB
2043 /* handle the new child who might not be in core->children yet */
2044 if (core->new_child) {
2045 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2046 if (tmp_clk)
2047 fail_clk = tmp_clk;
2048 }
5279fc40 2049
4dff95dc 2050 return fail_clk;
5279fc40
BB
2051}
2052
4dff95dc
SB
2053/*
2054 * walk down a subtree and set the new rates notifying the rate
2055 * change on the way
2056 */
2057static void clk_change_rate(struct clk_core *core)
035a61c3 2058{
4dff95dc
SB
2059 struct clk_core *child;
2060 struct hlist_node *tmp;
2061 unsigned long old_rate;
2062 unsigned long best_parent_rate = 0;
2063 bool skip_set_rate = false;
2064 struct clk_core *old_parent;
fc8726a2 2065 struct clk_core *parent = NULL;
035a61c3 2066
4dff95dc 2067 old_rate = core->rate;
035a61c3 2068
fc8726a2
DA
2069 if (core->new_parent) {
2070 parent = core->new_parent;
4dff95dc 2071 best_parent_rate = core->new_parent->rate;
fc8726a2
DA
2072 } else if (core->parent) {
2073 parent = core->parent;
4dff95dc 2074 best_parent_rate = core->parent->rate;
fc8726a2 2075 }
035a61c3 2076
588fb54b
MS
2077 if (clk_pm_runtime_get(core))
2078 return;
2079
2eb8c710 2080 if (core->flags & CLK_SET_RATE_UNGATE) {
2eb8c710 2081 clk_core_prepare(core);
35a79631 2082 clk_core_enable_lock(core);
2eb8c710
HS
2083 }
2084
4dff95dc
SB
2085 if (core->new_parent && core->new_parent != core->parent) {
2086 old_parent = __clk_set_parent_before(core, core->new_parent);
2087 trace_clk_set_parent(core, core->new_parent);
5279fc40 2088
4dff95dc
SB
2089 if (core->ops->set_rate_and_parent) {
2090 skip_set_rate = true;
2091 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2092 best_parent_rate,
2093 core->new_parent_index);
2094 } else if (core->ops->set_parent) {
2095 core->ops->set_parent(core->hw, core->new_parent_index);
2096 }
5279fc40 2097
4dff95dc
SB
2098 trace_clk_set_parent_complete(core, core->new_parent);
2099 __clk_set_parent_after(core, core->new_parent, old_parent);
2100 }
8f2c2db1 2101
fc8726a2
DA
2102 if (core->flags & CLK_OPS_PARENT_ENABLE)
2103 clk_core_prepare_enable(parent);
2104
4dff95dc 2105 trace_clk_set_rate(core, core->new_rate);
b2476490 2106
4dff95dc
SB
2107 if (!skip_set_rate && core->ops->set_rate)
2108 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 2109
4dff95dc 2110 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 2111
4dff95dc 2112 core->rate = clk_recalc(core, best_parent_rate);
b2476490 2113
2eb8c710 2114 if (core->flags & CLK_SET_RATE_UNGATE) {
35a79631 2115 clk_core_disable_lock(core);
2eb8c710
HS
2116 clk_core_unprepare(core);
2117 }
2118
fc8726a2
DA
2119 if (core->flags & CLK_OPS_PARENT_ENABLE)
2120 clk_core_disable_unprepare(parent);
2121
4dff95dc
SB
2122 if (core->notifier_count && old_rate != core->rate)
2123 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 2124
85e88fab
MT
2125 if (core->flags & CLK_RECALC_NEW_RATES)
2126 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 2127
b2476490 2128 /*
4dff95dc
SB
2129 * Use safe iteration, as change_rate can actually swap parents
2130 * for certain clock types.
b2476490 2131 */
4dff95dc
SB
2132 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2133 /* Skip children who will be reparented to another clock */
2134 if (child->new_parent && child->new_parent != core)
2135 continue;
2136 clk_change_rate(child);
2137 }
b2476490 2138
4dff95dc
SB
2139 /* handle the new child who might not be in core->children yet */
2140 if (core->new_child)
2141 clk_change_rate(core->new_child);
588fb54b
MS
2142
2143 clk_pm_runtime_put(core);
b2476490
MT
2144}
2145
ca5e089a
JB
2146static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core,
2147 unsigned long req_rate)
2148{
e55a839a 2149 int ret, cnt;
ca5e089a
JB
2150 struct clk_rate_request req;
2151
2152 lockdep_assert_held(&prepare_lock);
2153
2154 if (!core)
2155 return 0;
2156
e55a839a
JB
2157 /* simulate what the rate would be if it could be freely set */
2158 cnt = clk_core_rate_nuke_protect(core);
2159 if (cnt < 0)
2160 return cnt;
2161
ca5e089a
JB
2162 clk_core_get_boundaries(core, &req.min_rate, &req.max_rate);
2163 req.rate = req_rate;
2164
2165 ret = clk_core_round_rate_nolock(core, &req);
2166
e55a839a
JB
2167 /* restore the protection */
2168 clk_core_rate_restore_protect(core, cnt);
2169
ca5e089a 2170 return ret ? 0 : req.rate;
b2476490
MT
2171}
2172
4dff95dc
SB
2173static int clk_core_set_rate_nolock(struct clk_core *core,
2174 unsigned long req_rate)
a093bde2 2175{
4dff95dc 2176 struct clk_core *top, *fail_clk;
ca5e089a 2177 unsigned long rate;
9a34b453 2178 int ret = 0;
a093bde2 2179
4dff95dc
SB
2180 if (!core)
2181 return 0;
a093bde2 2182
ca5e089a
JB
2183 rate = clk_core_req_round_rate_nolock(core, req_rate);
2184
4dff95dc
SB
2185 /* bail early if nothing to do */
2186 if (rate == clk_core_get_rate_nolock(core))
2187 return 0;
a093bde2 2188
e55a839a
JB
2189 /* fail on a direct rate set of a protected provider */
2190 if (clk_core_rate_is_protected(core))
2191 return -EBUSY;
2192
4dff95dc 2193 /* calculate new rates and get the topmost changed clock */
ca5e089a 2194 top = clk_calc_new_rates(core, req_rate);
4dff95dc
SB
2195 if (!top)
2196 return -EINVAL;
2197
9a34b453
MS
2198 ret = clk_pm_runtime_get(core);
2199 if (ret)
2200 return ret;
2201
4dff95dc
SB
2202 /* notify that we are about to change rates */
2203 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
2204 if (fail_clk) {
2205 pr_debug("%s: failed to set %s rate\n", __func__,
2206 fail_clk->name);
2207 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
9a34b453
MS
2208 ret = -EBUSY;
2209 goto err;
4dff95dc
SB
2210 }
2211
2212 /* change the rates */
2213 clk_change_rate(top);
2214
2215 core->req_rate = req_rate;
9a34b453
MS
2216err:
2217 clk_pm_runtime_put(core);
4dff95dc 2218
9a34b453 2219 return ret;
a093bde2 2220}
035a61c3
TV
2221
2222/**
4dff95dc
SB
2223 * clk_set_rate - specify a new rate for clk
2224 * @clk: the clk whose rate is being changed
2225 * @rate: the new rate for clk
035a61c3 2226 *
4dff95dc
SB
2227 * In the simplest case clk_set_rate will only adjust the rate of clk.
2228 *
2229 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
2230 * propagate up to clk's parent; whether or not this happens depends on the
2231 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
2232 * after calling .round_rate then upstream parent propagation is ignored. If
2233 * *parent_rate comes back with a new rate for clk's parent then we propagate
2234 * up to clk's parent and set its rate. Upward propagation will continue
2235 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
2236 * .round_rate stops requesting changes to clk's parent_rate.
2237 *
2238 * Rate changes are accomplished via tree traversal that also recalculates the
2239 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2240 *
2241 * Returns 0 on success, -EERROR otherwise.
035a61c3 2242 */
4dff95dc 2243int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 2244{
4dff95dc
SB
2245 int ret;
2246
035a61c3
TV
2247 if (!clk)
2248 return 0;
2249
4dff95dc
SB
2250 /* prevent racing with updates to the clock topology */
2251 clk_prepare_lock();
da0f0b2c 2252
55e9b8b7
JB
2253 if (clk->exclusive_count)
2254 clk_core_rate_unprotect(clk->core);
2255
4dff95dc 2256 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 2257
55e9b8b7
JB
2258 if (clk->exclusive_count)
2259 clk_core_rate_protect(clk->core);
2260
4dff95dc 2261 clk_prepare_unlock();
4935b22c 2262
4dff95dc 2263 return ret;
4935b22c 2264}
4dff95dc 2265EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 2266
55e9b8b7 2267/**
65e2218d 2268 * clk_set_rate_exclusive - specify a new rate and get exclusive control
55e9b8b7
JB
2269 * @clk: the clk whose rate is being changed
2270 * @rate: the new rate for clk
2271 *
2272 * This is a combination of clk_set_rate() and clk_rate_exclusive_get()
2273 * within a critical section
2274 *
2275 * This can be used initially to ensure that at least 1 consumer is
65e2218d 2276 * satisfied when several consumers are competing for exclusivity over the
55e9b8b7
JB
2277 * same clock provider.
2278 *
2279 * The exclusivity is not applied if setting the rate failed.
2280 *
2281 * Calls to clk_rate_exclusive_get() should be balanced with calls to
2282 * clk_rate_exclusive_put().
2283 *
2284 * Returns 0 on success, -EERROR otherwise.
2285 */
2286int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
2287{
2288 int ret;
2289
2290 if (!clk)
2291 return 0;
2292
2293 /* prevent racing with updates to the clock topology */
2294 clk_prepare_lock();
2295
2296 /*
2297 * The temporary protection removal is not here, on purpose
2298 * This function is meant to be used instead of clk_rate_protect,
2299 * so before the consumer code path protect the clock provider
2300 */
2301
2302 ret = clk_core_set_rate_nolock(clk->core, rate);
2303 if (!ret) {
2304 clk_core_rate_protect(clk->core);
2305 clk->exclusive_count++;
2306 }
2307
2308 clk_prepare_unlock();
2309
2310 return ret;
2311}
2312EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
2313
4dff95dc
SB
2314/**
2315 * clk_set_rate_range - set a rate range for a clock source
2316 * @clk: clock source
2317 * @min: desired minimum clock rate in Hz, inclusive
2318 * @max: desired maximum clock rate in Hz, inclusive
2319 *
2320 * Returns success (0) or negative errno.
2321 */
2322int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 2323{
4dff95dc 2324 int ret = 0;
6562fbcf 2325 unsigned long old_min, old_max, rate;
4935b22c 2326
4dff95dc
SB
2327 if (!clk)
2328 return 0;
903efc55 2329
03813d9b
MR
2330 trace_clk_set_rate_range(clk->core, min, max);
2331
4dff95dc
SB
2332 if (min > max) {
2333 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
2334 __func__, clk->core->name, clk->dev_id, clk->con_id,
2335 min, max);
2336 return -EINVAL;
903efc55 2337 }
4935b22c 2338
4dff95dc 2339 clk_prepare_lock();
4935b22c 2340
55e9b8b7
JB
2341 if (clk->exclusive_count)
2342 clk_core_rate_unprotect(clk->core);
2343
6562fbcf
JB
2344 /* Save the current values in case we need to rollback the change */
2345 old_min = clk->min_rate;
2346 old_max = clk->max_rate;
2347 clk->min_rate = min;
2348 clk->max_rate = max;
2349
2350 rate = clk_core_get_rate_nolock(clk->core);
2351 if (rate < min || rate > max) {
2352 /*
2353 * FIXME:
2354 * We are in bit of trouble here, current rate is outside the
2355 * the requested range. We are going try to request appropriate
2356 * range boundary but there is a catch. It may fail for the
2357 * usual reason (clock broken, clock protected, etc) but also
2358 * because:
2359 * - round_rate() was not favorable and fell on the wrong
2360 * side of the boundary
2361 * - the determine_rate() callback does not really check for
2362 * this corner case when determining the rate
2363 */
2364
2365 if (rate < min)
2366 rate = min;
2367 else
2368 rate = max;
2369
2370 ret = clk_core_set_rate_nolock(clk->core, rate);
2371 if (ret) {
2372 /* rollback the changes */
2373 clk->min_rate = old_min;
2374 clk->max_rate = old_max;
2375 }
4935b22c
JH
2376 }
2377
55e9b8b7
JB
2378 if (clk->exclusive_count)
2379 clk_core_rate_protect(clk->core);
2380
4dff95dc 2381 clk_prepare_unlock();
4935b22c 2382
4dff95dc 2383 return ret;
3fa2252b 2384}
4dff95dc 2385EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 2386
4dff95dc
SB
2387/**
2388 * clk_set_min_rate - set a minimum clock rate for a clock source
2389 * @clk: clock source
2390 * @rate: desired minimum clock rate in Hz, inclusive
2391 *
2392 * Returns success (0) or negative errno.
2393 */
2394int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 2395{
4dff95dc
SB
2396 if (!clk)
2397 return 0;
2398
03813d9b
MR
2399 trace_clk_set_min_rate(clk->core, rate);
2400
4dff95dc 2401 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 2402}
4dff95dc 2403EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 2404
4dff95dc
SB
2405/**
2406 * clk_set_max_rate - set a maximum clock rate for a clock source
2407 * @clk: clock source
2408 * @rate: desired maximum clock rate in Hz, inclusive
2409 *
2410 * Returns success (0) or negative errno.
2411 */
2412int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 2413{
4dff95dc
SB
2414 if (!clk)
2415 return 0;
4935b22c 2416
03813d9b
MR
2417 trace_clk_set_max_rate(clk->core, rate);
2418
4dff95dc 2419 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 2420}
4dff95dc 2421EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 2422
b2476490 2423/**
4dff95dc
SB
2424 * clk_get_parent - return the parent of a clk
2425 * @clk: the clk whose parent gets returned
b2476490 2426 *
4dff95dc 2427 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 2428 */
4dff95dc 2429struct clk *clk_get_parent(struct clk *clk)
b2476490 2430{
4dff95dc 2431 struct clk *parent;
b2476490 2432
fc4a05d4
SB
2433 if (!clk)
2434 return NULL;
2435
4dff95dc 2436 clk_prepare_lock();
fc4a05d4
SB
2437 /* TODO: Create a per-user clk and change callers to call clk_put */
2438 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 2439 clk_prepare_unlock();
496eadf8 2440
4dff95dc
SB
2441 return parent;
2442}
2443EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 2444
4dff95dc
SB
2445static struct clk_core *__clk_init_parent(struct clk_core *core)
2446{
5146e0b0 2447 u8 index = 0;
4dff95dc 2448
2430a94d 2449 if (core->num_parents > 1 && core->ops->get_parent)
5146e0b0 2450 index = core->ops->get_parent(core->hw);
b2476490 2451
5146e0b0 2452 return clk_core_get_parent_by_index(core, index);
b2476490
MT
2453}
2454
4dff95dc
SB
2455static void clk_core_reparent(struct clk_core *core,
2456 struct clk_core *new_parent)
b2476490 2457{
4dff95dc
SB
2458 clk_reparent(core, new_parent);
2459 __clk_recalc_accuracies(core);
2460 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
2461}
2462
42c86547
TV
2463void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
2464{
2465 if (!hw)
2466 return;
2467
2468 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2469}
2470
4dff95dc
SB
2471/**
2472 * clk_has_parent - check if a clock is a possible parent for another
2473 * @clk: clock source
2474 * @parent: parent clock source
2475 *
2476 * This function can be used in drivers that need to check that a clock can be
2477 * the parent of another without actually changing the parent.
2478 *
2479 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 2480 */
4dff95dc 2481bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 2482{
4dff95dc 2483 struct clk_core *core, *parent_core;
fc0c209c 2484 int i;
b2476490 2485
4dff95dc
SB
2486 /* NULL clocks should be nops, so return success if either is NULL. */
2487 if (!clk || !parent)
2488 return true;
7452b219 2489
4dff95dc
SB
2490 core = clk->core;
2491 parent_core = parent->core;
71472c0c 2492
4dff95dc
SB
2493 /* Optimize for the case where the parent is already the parent. */
2494 if (core->parent == parent_core)
2495 return true;
1c8e6004 2496
fc0c209c
SB
2497 for (i = 0; i < core->num_parents; i++)
2498 if (!strcmp(core->parents[i].name, parent_core->name))
2499 return true;
2500
2501 return false;
4dff95dc
SB
2502}
2503EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 2504
91baa9ff
JB
2505static int clk_core_set_parent_nolock(struct clk_core *core,
2506 struct clk_core *parent)
4dff95dc
SB
2507{
2508 int ret = 0;
2509 int p_index = 0;
2510 unsigned long p_rate = 0;
2511
91baa9ff
JB
2512 lockdep_assert_held(&prepare_lock);
2513
4dff95dc
SB
2514 if (!core)
2515 return 0;
2516
4dff95dc 2517 if (core->parent == parent)
91baa9ff 2518 return 0;
4dff95dc 2519
ef13e55c 2520 /* verify ops for multi-parent clks */
91baa9ff
JB
2521 if (core->num_parents > 1 && !core->ops->set_parent)
2522 return -EPERM;
7452b219 2523
4dff95dc 2524 /* check that we are allowed to re-parent if the clock is in use */
91baa9ff
JB
2525 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2526 return -EBUSY;
b2476490 2527
e55a839a
JB
2528 if (clk_core_rate_is_protected(core))
2529 return -EBUSY;
b2476490 2530
71472c0c 2531 /* try finding the new parent index */
4dff95dc 2532 if (parent) {
d6968fca 2533 p_index = clk_fetch_parent_index(core, parent);
f1c8b2ed 2534 if (p_index < 0) {
71472c0c 2535 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc 2536 __func__, parent->name, core->name);
91baa9ff 2537 return p_index;
71472c0c 2538 }
e8f0e68e 2539 p_rate = parent->rate;
b2476490
MT
2540 }
2541
9a34b453
MS
2542 ret = clk_pm_runtime_get(core);
2543 if (ret)
91baa9ff 2544 return ret;
9a34b453 2545
4dff95dc
SB
2546 /* propagate PRE_RATE_CHANGE notifications */
2547 ret = __clk_speculate_rates(core, p_rate);
b2476490 2548
4dff95dc
SB
2549 /* abort if a driver objects */
2550 if (ret & NOTIFY_STOP_MASK)
9a34b453 2551 goto runtime_put;
b2476490 2552
4dff95dc
SB
2553 /* do the re-parent */
2554 ret = __clk_set_parent(core, parent, p_index);
b2476490 2555
4dff95dc
SB
2556 /* propagate rate an accuracy recalculation accordingly */
2557 if (ret) {
2558 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
2559 } else {
2560 __clk_recalc_rates(core, POST_RATE_CHANGE);
2561 __clk_recalc_accuracies(core);
b2476490
MT
2562 }
2563
9a34b453
MS
2564runtime_put:
2565 clk_pm_runtime_put(core);
71472c0c 2566
4dff95dc
SB
2567 return ret;
2568}
b2476490 2569
3567894b
NA
2570int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent)
2571{
2572 return clk_core_set_parent_nolock(hw->core, parent->core);
2573}
2574EXPORT_SYMBOL_GPL(clk_hw_set_parent);
2575
4dff95dc
SB
2576/**
2577 * clk_set_parent - switch the parent of a mux clk
2578 * @clk: the mux clk whose input we are switching
2579 * @parent: the new input to clk
2580 *
2581 * Re-parent clk to use parent as its new input source. If clk is in
2582 * prepared state, the clk will get enabled for the duration of this call. If
2583 * that's not acceptable for a specific clk (Eg: the consumer can't handle
2584 * that, the reparenting is glitchy in hardware, etc), use the
2585 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2586 *
2587 * After successfully changing clk's parent clk_set_parent will update the
2588 * clk topology, sysfs topology and propagate rate recalculation via
2589 * __clk_recalc_rates.
2590 *
2591 * Returns 0 on success, -EERROR otherwise.
2592 */
2593int clk_set_parent(struct clk *clk, struct clk *parent)
2594{
91baa9ff
JB
2595 int ret;
2596
4dff95dc
SB
2597 if (!clk)
2598 return 0;
2599
91baa9ff 2600 clk_prepare_lock();
55e9b8b7
JB
2601
2602 if (clk->exclusive_count)
2603 clk_core_rate_unprotect(clk->core);
2604
91baa9ff
JB
2605 ret = clk_core_set_parent_nolock(clk->core,
2606 parent ? parent->core : NULL);
55e9b8b7
JB
2607
2608 if (clk->exclusive_count)
2609 clk_core_rate_protect(clk->core);
2610
91baa9ff
JB
2611 clk_prepare_unlock();
2612
2613 return ret;
b2476490 2614}
4dff95dc 2615EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 2616
9e4d04ad
JB
2617static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
2618{
2619 int ret = -EINVAL;
2620
2621 lockdep_assert_held(&prepare_lock);
2622
2623 if (!core)
2624 return 0;
2625
e55a839a
JB
2626 if (clk_core_rate_is_protected(core))
2627 return -EBUSY;
2628
9e4d04ad
JB
2629 trace_clk_set_phase(core, degrees);
2630
7f95beea 2631 if (core->ops->set_phase) {
9e4d04ad 2632 ret = core->ops->set_phase(core->hw, degrees);
7f95beea
SL
2633 if (!ret)
2634 core->phase = degrees;
2635 }
9e4d04ad
JB
2636
2637 trace_clk_set_phase_complete(core, degrees);
2638
2639 return ret;
2640}
2641
4dff95dc
SB
2642/**
2643 * clk_set_phase - adjust the phase shift of a clock signal
2644 * @clk: clock signal source
2645 * @degrees: number of degrees the signal is shifted
2646 *
2647 * Shifts the phase of a clock signal by the specified
2648 * degrees. Returns 0 on success, -EERROR otherwise.
2649 *
2650 * This function makes no distinction about the input or reference
2651 * signal that we adjust the clock signal phase against. For example
2652 * phase locked-loop clock signal generators we may shift phase with
2653 * respect to feedback clock signal input, but for other cases the
2654 * clock phase may be shifted with respect to some other, unspecified
2655 * signal.
2656 *
2657 * Additionally the concept of phase shift does not propagate through
2658 * the clock tree hierarchy, which sets it apart from clock rates and
2659 * clock accuracy. A parent clock phase attribute does not have an
2660 * impact on the phase attribute of a child clock.
b2476490 2661 */
4dff95dc 2662int clk_set_phase(struct clk *clk, int degrees)
b2476490 2663{
9e4d04ad 2664 int ret;
b2476490 2665
4dff95dc
SB
2666 if (!clk)
2667 return 0;
b2476490 2668
4dff95dc
SB
2669 /* sanity check degrees */
2670 degrees %= 360;
2671 if (degrees < 0)
2672 degrees += 360;
bf47b4fd 2673
4dff95dc 2674 clk_prepare_lock();
3fa2252b 2675
55e9b8b7
JB
2676 if (clk->exclusive_count)
2677 clk_core_rate_unprotect(clk->core);
3fa2252b 2678
9e4d04ad 2679 ret = clk_core_set_phase_nolock(clk->core, degrees);
3fa2252b 2680
55e9b8b7
JB
2681 if (clk->exclusive_count)
2682 clk_core_rate_protect(clk->core);
b2476490 2683
4dff95dc 2684 clk_prepare_unlock();
dfc202ea 2685
4dff95dc
SB
2686 return ret;
2687}
2688EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 2689
4dff95dc
SB
2690static int clk_core_get_phase(struct clk_core *core)
2691{
2692 int ret;
b2476490 2693
f21cf9c7
SB
2694 lockdep_assert_held(&prepare_lock);
2695 if (!core->ops->get_phase)
2696 return 0;
2697
1f9c63e8 2698 /* Always try to update cached phase if possible */
f21cf9c7
SB
2699 ret = core->ops->get_phase(core->hw);
2700 if (ret >= 0)
2701 core->phase = ret;
71472c0c 2702
4dff95dc 2703 return ret;
b2476490
MT
2704}
2705
4dff95dc
SB
2706/**
2707 * clk_get_phase - return the phase shift of a clock signal
2708 * @clk: clock signal source
2709 *
2710 * Returns the phase shift of a clock node in degrees, otherwise returns
2711 * -EERROR.
2712 */
2713int clk_get_phase(struct clk *clk)
1c8e6004 2714{
f21cf9c7
SB
2715 int ret;
2716
4dff95dc 2717 if (!clk)
1c8e6004
TV
2718 return 0;
2719
f21cf9c7
SB
2720 clk_prepare_lock();
2721 ret = clk_core_get_phase(clk->core);
2722 clk_prepare_unlock();
2723
2724 return ret;
4dff95dc
SB
2725}
2726EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 2727
9fba738a
JB
2728static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
2729{
2730 /* Assume a default value of 50% */
2731 core->duty.num = 1;
2732 core->duty.den = 2;
2733}
2734
2735static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
2736
2737static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
2738{
2739 struct clk_duty *duty = &core->duty;
2740 int ret = 0;
2741
2742 if (!core->ops->get_duty_cycle)
2743 return clk_core_update_duty_cycle_parent_nolock(core);
2744
2745 ret = core->ops->get_duty_cycle(core->hw, duty);
2746 if (ret)
2747 goto reset;
2748
2749 /* Don't trust the clock provider too much */
2750 if (duty->den == 0 || duty->num > duty->den) {
2751 ret = -EINVAL;
2752 goto reset;
2753 }
2754
2755 return 0;
2756
2757reset:
2758 clk_core_reset_duty_cycle_nolock(core);
2759 return ret;
2760}
2761
2762static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
2763{
2764 int ret = 0;
2765
2766 if (core->parent &&
2767 core->flags & CLK_DUTY_CYCLE_PARENT) {
2768 ret = clk_core_update_duty_cycle_nolock(core->parent);
2769 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2770 } else {
2771 clk_core_reset_duty_cycle_nolock(core);
2772 }
2773
2774 return ret;
2775}
2776
2777static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2778 struct clk_duty *duty);
2779
2780static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
2781 struct clk_duty *duty)
2782{
2783 int ret;
2784
2785 lockdep_assert_held(&prepare_lock);
2786
2787 if (clk_core_rate_is_protected(core))
2788 return -EBUSY;
2789
2790 trace_clk_set_duty_cycle(core, duty);
2791
2792 if (!core->ops->set_duty_cycle)
2793 return clk_core_set_duty_cycle_parent_nolock(core, duty);
2794
2795 ret = core->ops->set_duty_cycle(core->hw, duty);
2796 if (!ret)
2797 memcpy(&core->duty, duty, sizeof(*duty));
2798
2799 trace_clk_set_duty_cycle_complete(core, duty);
2800
2801 return ret;
2802}
2803
2804static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2805 struct clk_duty *duty)
2806{
2807 int ret = 0;
2808
2809 if (core->parent &&
2810 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2811 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2812 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2813 }
2814
2815 return ret;
2816}
2817
2818/**
2819 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2820 * @clk: clock signal source
2821 * @num: numerator of the duty cycle ratio to be applied
2822 * @den: denominator of the duty cycle ratio to be applied
2823 *
2824 * Apply the duty cycle ratio if the ratio is valid and the clock can
2825 * perform this operation
2826 *
2827 * Returns (0) on success, a negative errno otherwise.
2828 */
2829int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
2830{
2831 int ret;
2832 struct clk_duty duty;
2833
2834 if (!clk)
2835 return 0;
2836
2837 /* sanity check the ratio */
2838 if (den == 0 || num > den)
2839 return -EINVAL;
2840
2841 duty.num = num;
2842 duty.den = den;
2843
2844 clk_prepare_lock();
2845
2846 if (clk->exclusive_count)
2847 clk_core_rate_unprotect(clk->core);
2848
2849 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2850
2851 if (clk->exclusive_count)
2852 clk_core_rate_protect(clk->core);
2853
2854 clk_prepare_unlock();
2855
2856 return ret;
2857}
2858EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
2859
2860static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
2861 unsigned int scale)
2862{
2863 struct clk_duty *duty = &core->duty;
2864 int ret;
2865
2866 clk_prepare_lock();
2867
2868 ret = clk_core_update_duty_cycle_nolock(core);
2869 if (!ret)
2870 ret = mult_frac(scale, duty->num, duty->den);
2871
2872 clk_prepare_unlock();
2873
2874 return ret;
2875}
2876
2877/**
2878 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2879 * @clk: clock signal source
2880 * @scale: scaling factor to be applied to represent the ratio as an integer
2881 *
2882 * Returns the duty cycle ratio of a clock node multiplied by the provided
2883 * scaling factor, or negative errno on error.
2884 */
2885int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
2886{
2887 if (!clk)
2888 return 0;
2889
2890 return clk_core_get_scaled_duty_cycle(clk->core, scale);
2891}
2892EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
2893
4dff95dc
SB
2894/**
2895 * clk_is_match - check if two clk's point to the same hardware clock
2896 * @p: clk compared against q
2897 * @q: clk compared against p
2898 *
2899 * Returns true if the two struct clk pointers both point to the same hardware
2900 * clock node. Put differently, returns true if struct clk *p and struct clk *q
2901 * share the same struct clk_core object.
2902 *
2903 * Returns false otherwise. Note that two NULL clks are treated as matching.
2904 */
2905bool clk_is_match(const struct clk *p, const struct clk *q)
2906{
2907 /* trivial case: identical struct clk's or both NULL */
2908 if (p == q)
2909 return true;
1c8e6004 2910
3fe003f9 2911 /* true if clk->core pointers match. Avoid dereferencing garbage */
4dff95dc
SB
2912 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
2913 if (p->core == q->core)
2914 return true;
1c8e6004 2915
4dff95dc
SB
2916 return false;
2917}
2918EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 2919
4dff95dc 2920/*** debugfs support ***/
1c8e6004 2921
4dff95dc
SB
2922#ifdef CONFIG_DEBUG_FS
2923#include <linux/debugfs.h>
1c8e6004 2924
4dff95dc
SB
2925static struct dentry *rootdir;
2926static int inited = 0;
2927static DEFINE_MUTEX(clk_debug_lock);
2928static HLIST_HEAD(clk_debug_list);
1c8e6004 2929
4dff95dc
SB
2930static struct hlist_head *orphan_list[] = {
2931 &clk_orphan_list,
2932 NULL,
2933};
2934
2935static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
2936 int level)
b2476490 2937{
f21cf9c7
SB
2938 int phase;
2939
2940 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ",
4dff95dc
SB
2941 level * 3 + 1, "",
2942 30 - level * 3, c->name,
e55a839a 2943 c->enable_count, c->prepare_count, c->protect_count,
0daa376d
SB
2944 clk_core_get_rate_recalc(c),
2945 clk_core_get_accuracy_recalc(c));
f21cf9c7
SB
2946
2947 phase = clk_core_get_phase(c);
2948 if (phase >= 0)
2949 seq_printf(s, "%5d", phase);
2950 else
2951 seq_puts(s, "-----");
2952
bf6d43d7
DO
2953 seq_printf(s, " %6d", clk_core_get_scaled_duty_cycle(c, 100000));
2954
2955 if (c->ops->is_enabled)
2956 seq_printf(s, " %9c\n", clk_core_is_enabled(c) ? 'Y' : 'N');
2957 else if (!c->ops->enable)
2958 seq_printf(s, " %9c\n", 'Y');
2959 else
2960 seq_printf(s, " %9c\n", '?');
4dff95dc 2961}
89ac8d7a 2962
4dff95dc
SB
2963static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
2964 int level)
2965{
2966 struct clk_core *child;
b2476490 2967
4dff95dc 2968 clk_summary_show_one(s, c, level);
0e1c0301 2969
4dff95dc
SB
2970 hlist_for_each_entry(child, &c->children, child_node)
2971 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 2972}
b2476490 2973
4dff95dc 2974static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2975{
4dff95dc
SB
2976 struct clk_core *c;
2977 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2978
bf6d43d7
DO
2979 seq_puts(s, " enable prepare protect duty hardware\n");
2980 seq_puts(s, " clock count count count rate accuracy phase cycle enable\n");
2981 seq_puts(s, "-------------------------------------------------------------------------------------------------------\n");
b2476490 2982
1c8e6004
TV
2983 clk_prepare_lock();
2984
4dff95dc
SB
2985 for (; *lists; lists++)
2986 hlist_for_each_entry(c, *lists, child_node)
2987 clk_summary_show_subtree(s, c, 0);
b2476490 2988
eab89f69 2989 clk_prepare_unlock();
b2476490 2990
4dff95dc 2991 return 0;
b2476490 2992}
fec0ef3f 2993DEFINE_SHOW_ATTRIBUTE(clk_summary);
b2476490 2994
4dff95dc
SB
2995static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2996{
f21cf9c7 2997 int phase;
1bd37a46
LC
2998 unsigned long min_rate, max_rate;
2999
1bd37a46 3000 clk_core_get_boundaries(c, &min_rate, &max_rate);
b2476490 3001
7cb81136 3002 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
3003 seq_printf(s, "\"%s\": { ", c->name);
3004 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
3005 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
e55a839a 3006 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
0daa376d 3007 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate_recalc(c));
1bd37a46
LC
3008 seq_printf(s, "\"min_rate\": %lu,", min_rate);
3009 seq_printf(s, "\"max_rate\": %lu,", max_rate);
0daa376d 3010 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c));
f21cf9c7
SB
3011 phase = clk_core_get_phase(c);
3012 if (phase >= 0)
3013 seq_printf(s, "\"phase\": %d,", phase);
9fba738a
JB
3014 seq_printf(s, "\"duty_cycle\": %u",
3015 clk_core_get_scaled_duty_cycle(c, 100000));
b2476490 3016}
b2476490 3017
4dff95dc 3018static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 3019{
4dff95dc 3020 struct clk_core *child;
b2476490 3021
4dff95dc 3022 clk_dump_one(s, c, level);
b2476490 3023
4dff95dc 3024 hlist_for_each_entry(child, &c->children, child_node) {
4d327586 3025 seq_putc(s, ',');
4dff95dc 3026 clk_dump_subtree(s, child, level + 1);
b2476490
MT
3027 }
3028
4d327586 3029 seq_putc(s, '}');
b2476490
MT
3030}
3031
fec0ef3f 3032static int clk_dump_show(struct seq_file *s, void *data)
4e88f3de 3033{
4dff95dc
SB
3034 struct clk_core *c;
3035 bool first_node = true;
3036 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 3037
4d327586 3038 seq_putc(s, '{');
4dff95dc 3039 clk_prepare_lock();
035a61c3 3040
4dff95dc
SB
3041 for (; *lists; lists++) {
3042 hlist_for_each_entry(c, *lists, child_node) {
3043 if (!first_node)
4d327586 3044 seq_putc(s, ',');
4dff95dc
SB
3045 first_node = false;
3046 clk_dump_subtree(s, c, 0);
3047 }
3048 }
4e88f3de 3049
4dff95dc 3050 clk_prepare_unlock();
4e88f3de 3051
70e9f4dd 3052 seq_puts(s, "}\n");
4dff95dc 3053 return 0;
4e88f3de 3054}
fec0ef3f 3055DEFINE_SHOW_ATTRIBUTE(clk_dump);
89ac8d7a 3056
37215da5
GU
3057#undef CLOCK_ALLOW_WRITE_DEBUGFS
3058#ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3059/*
3060 * This can be dangerous, therefore don't provide any real compile time
3061 * configuration option for this feature.
3062 * People who want to use this will need to modify the source code directly.
3063 */
3064static int clk_rate_set(void *data, u64 val)
3065{
3066 struct clk_core *core = data;
3067 int ret;
3068
3069 clk_prepare_lock();
3070 ret = clk_core_set_rate_nolock(core, val);
3071 clk_prepare_unlock();
3072
3073 return ret;
3074}
3075
3076#define clk_rate_mode 0644
03111b10
MT
3077
3078static int clk_prepare_enable_set(void *data, u64 val)
3079{
3080 struct clk_core *core = data;
3081 int ret = 0;
3082
3083 if (val)
3084 ret = clk_prepare_enable(core->hw->clk);
3085 else
3086 clk_disable_unprepare(core->hw->clk);
3087
3088 return ret;
3089}
3090
3091static int clk_prepare_enable_get(void *data, u64 *val)
3092{
3093 struct clk_core *core = data;
3094
3095 *val = core->enable_count && core->prepare_count;
3096 return 0;
3097}
3098
3099DEFINE_DEBUGFS_ATTRIBUTE(clk_prepare_enable_fops, clk_prepare_enable_get,
3100 clk_prepare_enable_set, "%llu\n");
3101
37215da5
GU
3102#else
3103#define clk_rate_set NULL
3104#define clk_rate_mode 0444
3105#endif
3106
3107static int clk_rate_get(void *data, u64 *val)
3108{
3109 struct clk_core *core = data;
3110
3111 *val = core->rate;
3112 return 0;
3113}
3114
3115DEFINE_DEBUGFS_ATTRIBUTE(clk_rate_fops, clk_rate_get, clk_rate_set, "%llu\n");
3116
a6059ab9
GU
3117static const struct {
3118 unsigned long flag;
3119 const char *name;
3120} clk_flags[] = {
40dd71c7 3121#define ENTRY(f) { f, #f }
a6059ab9
GU
3122 ENTRY(CLK_SET_RATE_GATE),
3123 ENTRY(CLK_SET_PARENT_GATE),
3124 ENTRY(CLK_SET_RATE_PARENT),
3125 ENTRY(CLK_IGNORE_UNUSED),
a6059ab9
GU
3126 ENTRY(CLK_GET_RATE_NOCACHE),
3127 ENTRY(CLK_SET_RATE_NO_REPARENT),
3128 ENTRY(CLK_GET_ACCURACY_NOCACHE),
3129 ENTRY(CLK_RECALC_NEW_RATES),
3130 ENTRY(CLK_SET_RATE_UNGATE),
3131 ENTRY(CLK_IS_CRITICAL),
3132 ENTRY(CLK_OPS_PARENT_ENABLE),
9fba738a 3133 ENTRY(CLK_DUTY_CYCLE_PARENT),
a6059ab9
GU
3134#undef ENTRY
3135};
3136
fec0ef3f 3137static int clk_flags_show(struct seq_file *s, void *data)
a6059ab9
GU
3138{
3139 struct clk_core *core = s->private;
3140 unsigned long flags = core->flags;
3141 unsigned int i;
3142
3143 for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) {
3144 if (flags & clk_flags[i].flag) {
3145 seq_printf(s, "%s\n", clk_flags[i].name);
3146 flags &= ~clk_flags[i].flag;
3147 }
3148 }
3149 if (flags) {
3150 /* Unknown flags */
3151 seq_printf(s, "0x%lx\n", flags);
3152 }
3153
3154 return 0;
3155}
fec0ef3f 3156DEFINE_SHOW_ATTRIBUTE(clk_flags);
a6059ab9 3157
11f6c230
SB
3158static void possible_parent_show(struct seq_file *s, struct clk_core *core,
3159 unsigned int i, char terminator)
92031575 3160{
2d156b78 3161 struct clk_core *parent;
92031575 3162
2d156b78
CYT
3163 /*
3164 * Go through the following options to fetch a parent's name.
3165 *
3166 * 1. Fetch the registered parent clock and use its name
3167 * 2. Use the global (fallback) name if specified
3168 * 3. Use the local fw_name if provided
3169 * 4. Fetch parent clock's clock-output-name if DT index was set
3170 *
3171 * This may still fail in some cases, such as when the parent is
3172 * specified directly via a struct clk_hw pointer, but it isn't
3173 * registered (yet).
3174 */
2d156b78
CYT
3175 parent = clk_core_get_parent_by_index(core, i);
3176 if (parent)
1ccc0ddf 3177 seq_puts(s, parent->name);
2d156b78 3178 else if (core->parents[i].name)
1ccc0ddf 3179 seq_puts(s, core->parents[i].name);
2d156b78
CYT
3180 else if (core->parents[i].fw_name)
3181 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3182 else if (core->parents[i].index >= 0)
1ccc0ddf
ME
3183 seq_puts(s,
3184 of_clk_get_parent_name(core->of_node,
3185 core->parents[i].index));
2d156b78
CYT
3186 else
3187 seq_puts(s, "(missing)");
92031575 3188
11f6c230
SB
3189 seq_putc(s, terminator);
3190}
3191
fec0ef3f 3192static int possible_parents_show(struct seq_file *s, void *data)
92031575
PDS
3193{
3194 struct clk_core *core = s->private;
3195 int i;
3196
3197 for (i = 0; i < core->num_parents - 1; i++)
11f6c230 3198 possible_parent_show(s, core, i, ' ');
92031575 3199
11f6c230 3200 possible_parent_show(s, core, i, '\n');
92031575
PDS
3201
3202 return 0;
3203}
fec0ef3f 3204DEFINE_SHOW_ATTRIBUTE(possible_parents);
92031575 3205
e5e89247
LC
3206static int current_parent_show(struct seq_file *s, void *data)
3207{
3208 struct clk_core *core = s->private;
3209
3210 if (core->parent)
3211 seq_printf(s, "%s\n", core->parent->name);
3212
3213 return 0;
3214}
3215DEFINE_SHOW_ATTRIBUTE(current_parent);
3216
9fba738a
JB
3217static int clk_duty_cycle_show(struct seq_file *s, void *data)
3218{
3219 struct clk_core *core = s->private;
3220 struct clk_duty *duty = &core->duty;
3221
3222 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3223
3224 return 0;
3225}
3226DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
3227
1bd37a46
LC
3228static int clk_min_rate_show(struct seq_file *s, void *data)
3229{
3230 struct clk_core *core = s->private;
3231 unsigned long min_rate, max_rate;
3232
3233 clk_prepare_lock();
3234 clk_core_get_boundaries(core, &min_rate, &max_rate);
3235 clk_prepare_unlock();
3236 seq_printf(s, "%lu\n", min_rate);
3237
3238 return 0;
3239}
3240DEFINE_SHOW_ATTRIBUTE(clk_min_rate);
3241
3242static int clk_max_rate_show(struct seq_file *s, void *data)
3243{
3244 struct clk_core *core = s->private;
3245 unsigned long min_rate, max_rate;
3246
3247 clk_prepare_lock();
3248 clk_core_get_boundaries(core, &min_rate, &max_rate);
3249 clk_prepare_unlock();
3250 seq_printf(s, "%lu\n", max_rate);
3251
3252 return 0;
3253}
3254DEFINE_SHOW_ATTRIBUTE(clk_max_rate);
3255
8a26bbbb 3256static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
4dff95dc 3257{
8a26bbbb 3258 struct dentry *root;
b61c43c0 3259
8a26bbbb
GKH
3260 if (!core || !pdentry)
3261 return;
b2476490 3262
8a26bbbb
GKH
3263 root = debugfs_create_dir(core->name, pdentry);
3264 core->dentry = root;
92031575 3265
37215da5
GU
3266 debugfs_create_file("clk_rate", clk_rate_mode, root, core,
3267 &clk_rate_fops);
1bd37a46
LC
3268 debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops);
3269 debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops);
8a26bbbb
GKH
3270 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3271 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
3272 debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
3273 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3274 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3275 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3276 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
9fba738a
JB
3277 debugfs_create_file("clk_duty_cycle", 0444, root, core,
3278 &clk_duty_cycle_fops);
03111b10
MT
3279#ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3280 debugfs_create_file("clk_prepare_enable", 0644, root, core,
3281 &clk_prepare_enable_fops);
3282#endif
b2476490 3283
e5e89247
LC
3284 if (core->num_parents > 0)
3285 debugfs_create_file("clk_parent", 0444, root, core,
3286 &current_parent_fops);
3287
8a26bbbb
GKH
3288 if (core->num_parents > 1)
3289 debugfs_create_file("clk_possible_parents", 0444, root, core,
3290 &possible_parents_fops);
b2476490 3291
8a26bbbb
GKH
3292 if (core->ops->debug_init)
3293 core->ops->debug_init(core->hw, core->dentry);
b2476490 3294}
035a61c3
TV
3295
3296/**
6e5ab41b
SB
3297 * clk_debug_register - add a clk node to the debugfs clk directory
3298 * @core: the clk being added to the debugfs clk directory
035a61c3 3299 *
6e5ab41b
SB
3300 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
3301 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 3302 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 3303 */
8a26bbbb 3304static void clk_debug_register(struct clk_core *core)
035a61c3 3305{
4dff95dc
SB
3306 mutex_lock(&clk_debug_lock);
3307 hlist_add_head(&core->debug_node, &clk_debug_list);
db3188fa 3308 if (inited)
8a26bbbb 3309 clk_debug_create_one(core, rootdir);
4dff95dc 3310 mutex_unlock(&clk_debug_lock);
035a61c3 3311}
b2476490 3312
4dff95dc 3313 /**
6e5ab41b
SB
3314 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3315 * @core: the clk being removed from the debugfs clk directory
e59c5371 3316 *
6e5ab41b
SB
3317 * Dynamically removes a clk and all its child nodes from the
3318 * debugfs clk directory if clk->dentry points to debugfs created by
706d5c73 3319 * clk_debug_register in __clk_core_init.
e59c5371 3320 */
4dff95dc 3321static void clk_debug_unregister(struct clk_core *core)
e59c5371 3322{
4dff95dc
SB
3323 mutex_lock(&clk_debug_lock);
3324 hlist_del_init(&core->debug_node);
3325 debugfs_remove_recursive(core->dentry);
3326 core->dentry = NULL;
3327 mutex_unlock(&clk_debug_lock);
3328}
e59c5371 3329
4dff95dc 3330/**
6e5ab41b 3331 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 3332 *
6e5ab41b
SB
3333 * clks are often initialized very early during boot before memory can be
3334 * dynamically allocated and well before debugfs is setup. This function
3335 * populates the debugfs clk directory once at boot-time when we know that
3336 * debugfs is setup. It should only be called once at boot-time, all other clks
3337 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
3338 */
3339static int __init clk_debug_init(void)
3340{
3341 struct clk_core *core;
dfc202ea 3342
4dff95dc 3343 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 3344
8a26bbbb
GKH
3345 debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
3346 &clk_summary_fops);
3347 debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
3348 &clk_dump_fops);
3349 debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
3350 &clk_summary_fops);
3351 debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
3352 &clk_dump_fops);
e59c5371 3353
4dff95dc
SB
3354 mutex_lock(&clk_debug_lock);
3355 hlist_for_each_entry(core, &clk_debug_list, debug_node)
3356 clk_debug_create_one(core, rootdir);
e59c5371 3357
4dff95dc
SB
3358 inited = 1;
3359 mutex_unlock(&clk_debug_lock);
e59c5371 3360
4dff95dc
SB
3361 return 0;
3362}
3363late_initcall(clk_debug_init);
3364#else
8a26bbbb 3365static inline void clk_debug_register(struct clk_core *core) { }
4dff95dc 3366static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 3367{
3d3801ef 3368}
4dff95dc 3369#endif
3d3801ef 3370
66d95064
JB
3371static void clk_core_reparent_orphans_nolock(void)
3372{
3373 struct clk_core *orphan;
3374 struct hlist_node *tmp2;
3375
3376 /*
3377 * walk the list of orphan clocks and reparent any that newly finds a
3378 * parent.
3379 */
3380 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
3381 struct clk_core *parent = __clk_init_parent(orphan);
3382
3383 /*
3384 * We need to use __clk_set_parent_before() and _after() to
3385 * to properly migrate any prepare/enable count of the orphan
3386 * clock. This is important for CLK_IS_CRITICAL clocks, which
3387 * are enabled during init but might not have a parent yet.
3388 */
3389 if (parent) {
3390 /* update the clk tree topology */
3391 __clk_set_parent_before(orphan, parent);
3392 __clk_set_parent_after(orphan, parent, NULL);
3393 __clk_recalc_accuracies(orphan);
3394 __clk_recalc_rates(orphan, 0);
3395 }
3396 }
3397}
3398
b2476490 3399/**
be45ebf2 3400 * __clk_core_init - initialize the data structures in a struct clk_core
d35c80c2 3401 * @core: clk_core being initialized
b2476490 3402 *
035a61c3 3403 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 3404 * parent and rate and sets them both.
b2476490 3405 */
be45ebf2 3406static int __clk_core_init(struct clk_core *core)
b2476490 3407{
fc0c209c 3408 int ret;
768a5d4f 3409 struct clk_core *parent;
1c8e6004 3410 unsigned long rate;
c3944ec8 3411 int phase;
b2476490 3412
d35c80c2 3413 if (!core)
d1302a36 3414 return -EINVAL;
b2476490 3415
eab89f69 3416 clk_prepare_lock();
b2476490 3417
9a34b453
MS
3418 ret = clk_pm_runtime_get(core);
3419 if (ret)
3420 goto unlock;
3421
b2476490 3422 /* check to see if a clock with this name is already registered */
d6968fca 3423 if (clk_core_lookup(core->name)) {
d1302a36 3424 pr_debug("%s: clk %s already initialized\n",
d6968fca 3425 __func__, core->name);
d1302a36 3426 ret = -EEXIST;
b2476490 3427 goto out;
d1302a36 3428 }
b2476490 3429
5fb94e9c 3430 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
d6968fca
SB
3431 if (core->ops->set_rate &&
3432 !((core->ops->round_rate || core->ops->determine_rate) &&
3433 core->ops->recalc_rate)) {
c44fccb5
MY
3434 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
3435 __func__, core->name);
d1302a36 3436 ret = -EINVAL;
d4d7e3dd
MT
3437 goto out;
3438 }
3439
d6968fca 3440 if (core->ops->set_parent && !core->ops->get_parent) {
c44fccb5
MY
3441 pr_err("%s: %s must implement .get_parent & .set_parent\n",
3442 __func__, core->name);
d1302a36 3443 ret = -EINVAL;
d4d7e3dd
MT
3444 goto out;
3445 }
3446
3c8e77dd
MY
3447 if (core->num_parents > 1 && !core->ops->get_parent) {
3448 pr_err("%s: %s must implement .get_parent as it has multi parents\n",
3449 __func__, core->name);
3450 ret = -EINVAL;
3451 goto out;
3452 }
3453
d6968fca
SB
3454 if (core->ops->set_rate_and_parent &&
3455 !(core->ops->set_parent && core->ops->set_rate)) {
c44fccb5 3456 pr_err("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 3457 __func__, core->name);
3fa2252b
SB
3458 ret = -EINVAL;
3459 goto out;
3460 }
3461
f6fa75ca
JB
3462 /*
3463 * optional platform-specific magic
3464 *
3465 * The .init callback is not used by any of the basic clock types, but
89d079dc
JB
3466 * exists for weird hardware that must perform initialization magic for
3467 * CCF to get an accurate view of clock for any other callbacks. It may
3468 * also be used needs to perform dynamic allocations. Such allocation
3469 * must be freed in the terminate() callback.
3470 * This callback shall not be used to initialize the parameters state,
3471 * such as rate, parent, etc ...
f6fa75ca
JB
3472 *
3473 * If it exist, this callback should called before any other callback of
3474 * the clock
3475 */
89d079dc
JB
3476 if (core->ops->init) {
3477 ret = core->ops->init(core->hw);
3478 if (ret)
3479 goto out;
3480 }
f6fa75ca 3481
768a5d4f 3482 parent = core->parent = __clk_init_parent(core);
b2476490
MT
3483
3484 /*
706d5c73
SB
3485 * Populate core->parent if parent has already been clk_core_init'd. If
3486 * parent has not yet been clk_core_init'd then place clk in the orphan
47b0eeb3 3487 * list. If clk doesn't have any parents then place it in the root
b2476490
MT
3488 * clk list.
3489 *
3490 * Every time a new clk is clk_init'd then we walk the list of orphan
3491 * clocks and re-parent any that are children of the clock currently
3492 * being clk_init'd.
3493 */
768a5d4f
SB
3494 if (parent) {
3495 hlist_add_head(&core->child_node, &parent->children);
3496 core->orphan = parent->orphan;
47b0eeb3 3497 } else if (!core->num_parents) {
d6968fca 3498 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
3499 core->orphan = false;
3500 } else {
d6968fca 3501 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
3502 core->orphan = true;
3503 }
b2476490 3504
5279fc40
BB
3505 /*
3506 * Set clk's accuracy. The preferred method is to use
3507 * .recalc_accuracy. For simple clocks and lazy developers the default
3508 * fallback is to use the parent's accuracy. If a clock doesn't have a
3509 * parent (or is orphaned) then accuracy is set to zero (perfect
3510 * clock).
3511 */
d6968fca
SB
3512 if (core->ops->recalc_accuracy)
3513 core->accuracy = core->ops->recalc_accuracy(core->hw,
0daa376d 3514 clk_core_get_accuracy_no_lock(parent));
768a5d4f
SB
3515 else if (parent)
3516 core->accuracy = parent->accuracy;
5279fc40 3517 else
d6968fca 3518 core->accuracy = 0;
5279fc40 3519
9824cf73 3520 /*
f21cf9c7 3521 * Set clk's phase by clk_core_get_phase() caching the phase.
9824cf73
MR
3522 * Since a phase is by definition relative to its parent, just
3523 * query the current clock phase, or just assume it's in phase.
3524 */
c3944ec8
MR
3525 phase = clk_core_get_phase(core);
3526 if (phase < 0) {
3527 ret = phase;
27608786
SB
3528 pr_warn("%s: Failed to get phase for clk '%s'\n", __func__,
3529 core->name);
3530 goto out;
3531 }
9824cf73 3532
9fba738a
JB
3533 /*
3534 * Set clk's duty cycle.
3535 */
3536 clk_core_update_duty_cycle_nolock(core);
3537
b2476490
MT
3538 /*
3539 * Set clk's rate. The preferred method is to use .recalc_rate. For
3540 * simple clocks and lazy developers the default fallback is to use the
3541 * parent's rate. If a clock doesn't have a parent (or is orphaned)
3542 * then rate is set to zero.
3543 */
d6968fca
SB
3544 if (core->ops->recalc_rate)
3545 rate = core->ops->recalc_rate(core->hw,
768a5d4f
SB
3546 clk_core_get_rate_nolock(parent));
3547 else if (parent)
3548 rate = parent->rate;
b2476490 3549 else
1c8e6004 3550 rate = 0;
d6968fca 3551 core->rate = core->req_rate = rate;
b2476490 3552
99652a46
JB
3553 /*
3554 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3555 * don't get accidentally disabled when walking the orphan tree and
3556 * reparenting clocks
3557 */
3558 if (core->flags & CLK_IS_CRITICAL) {
12ead774 3559 ret = clk_core_prepare(core);
2d269992
SB
3560 if (ret) {
3561 pr_warn("%s: critical clk '%s' failed to prepare\n",
3562 __func__, core->name);
12ead774 3563 goto out;
2d269992 3564 }
99652a46 3565
35a79631 3566 ret = clk_core_enable_lock(core);
12ead774 3567 if (ret) {
2d269992
SB
3568 pr_warn("%s: critical clk '%s' failed to enable\n",
3569 __func__, core->name);
12ead774
GR
3570 clk_core_unprepare(core);
3571 goto out;
3572 }
99652a46
JB
3573 }
3574
66d95064 3575 clk_core_reparent_orphans_nolock();
1f61e5f1 3576
b2476490 3577
d6968fca 3578 kref_init(&core->ref);
b2476490 3579out:
9a34b453
MS
3580 clk_pm_runtime_put(core);
3581unlock:
018d4671
MZ
3582 if (ret)
3583 hlist_del_init(&core->child_node);
3584
eab89f69 3585 clk_prepare_unlock();
b2476490 3586
89f7e9de 3587 if (!ret)
d6968fca 3588 clk_debug_register(core);
89f7e9de 3589
d1302a36 3590 return ret;
b2476490
MT
3591}
3592
1df4046a
SB
3593/**
3594 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3595 * @core: clk to add consumer to
3596 * @clk: consumer to link to a clk
3597 */
3598static void clk_core_link_consumer(struct clk_core *core, struct clk *clk)
3599{
3600 clk_prepare_lock();
3601 hlist_add_head(&clk->clks_node, &core->clks);
3602 clk_prepare_unlock();
3603}
3604
3605/**
3606 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3607 * @clk: consumer to unlink
3608 */
3609static void clk_core_unlink_consumer(struct clk *clk)
3610{
3611 lockdep_assert_held(&prepare_lock);
3612 hlist_del(&clk->clks_node);
3613}
3614
3615/**
3616 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3617 * @core: clk to allocate a consumer for
3618 * @dev_id: string describing device name
3619 * @con_id: connection ID string on device
3620 *
3621 * Returns: clk consumer left unlinked from the consumer list
3622 */
3623static struct clk *alloc_clk(struct clk_core *core, const char *dev_id,
035a61c3 3624 const char *con_id)
0197b3ea 3625{
0197b3ea
SK
3626 struct clk *clk;
3627
035a61c3
TV
3628 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
3629 if (!clk)
3630 return ERR_PTR(-ENOMEM);
3631
1df4046a 3632 clk->core = core;
035a61c3 3633 clk->dev_id = dev_id;
253160a8 3634 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
1c8e6004
TV
3635 clk->max_rate = ULONG_MAX;
3636
0197b3ea
SK
3637 return clk;
3638}
035a61c3 3639
1df4046a
SB
3640/**
3641 * free_clk - Free a clk consumer
3642 * @clk: clk consumer to free
3643 *
3644 * Note, this assumes the clk has been unlinked from the clk_core consumer
3645 * list.
3646 */
3647static void free_clk(struct clk *clk)
1c8e6004 3648{
253160a8 3649 kfree_const(clk->con_id);
1c8e6004
TV
3650 kfree(clk);
3651}
0197b3ea 3652
1df4046a
SB
3653/**
3654 * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given
3655 * a clk_hw
efa85048 3656 * @dev: clk consumer device
1df4046a
SB
3657 * @hw: clk_hw associated with the clk being consumed
3658 * @dev_id: string describing device name
3659 * @con_id: connection ID string on device
3660 *
3661 * This is the main function used to create a clk pointer for use by clk
3662 * consumers. It connects a consumer to the clk_core and clk_hw structures
3663 * used by the framework and clk provider respectively.
3664 */
efa85048 3665struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,
1df4046a
SB
3666 const char *dev_id, const char *con_id)
3667{
3668 struct clk *clk;
3669 struct clk_core *core;
3670
3671 /* This is to allow this function to be chained to others */
3672 if (IS_ERR_OR_NULL(hw))
3673 return ERR_CAST(hw);
3674
3675 core = hw->core;
3676 clk = alloc_clk(core, dev_id, con_id);
3677 if (IS_ERR(clk))
3678 return clk;
efa85048 3679 clk->dev = dev;
1df4046a
SB
3680
3681 if (!try_module_get(core->owner)) {
3682 free_clk(clk);
3683 return ERR_PTR(-ENOENT);
3684 }
3685
3686 kref_get(&core->ref);
3687 clk_core_link_consumer(core, clk);
3688
3689 return clk;
3690}
3691
30d6f8c1
JB
3692/**
3693 * clk_hw_get_clk - get clk consumer given an clk_hw
3694 * @hw: clk_hw associated with the clk being consumed
3695 * @con_id: connection ID string on device
3696 *
3697 * Returns: new clk consumer
3698 * This is the function to be used by providers which need
3699 * to get a consumer clk and act on the clock element
3700 * Calls to this function must be balanced with calls clk_put()
3701 */
3702struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id)
3703{
3704 struct device *dev = hw->core->dev;
3705
3706 return clk_hw_create_clk(dev, hw, dev_name(dev), con_id);
3707}
3708EXPORT_SYMBOL(clk_hw_get_clk);
3709
fc0c209c 3710static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist)
b2476490 3711{
fc0c209c
SB
3712 const char *dst;
3713
3714 if (!src) {
3715 if (must_exist)
3716 return -EINVAL;
3717 return 0;
3718 }
3719
3720 *dst_p = dst = kstrdup_const(src, GFP_KERNEL);
3721 if (!dst)
3722 return -ENOMEM;
3723
3724 return 0;
3725}
3726
0214f33c
SB
3727static int clk_core_populate_parent_map(struct clk_core *core,
3728 const struct clk_init_data *init)
fc0c209c 3729{
fc0c209c
SB
3730 u8 num_parents = init->num_parents;
3731 const char * const *parent_names = init->parent_names;
3732 const struct clk_hw **parent_hws = init->parent_hws;
3733 const struct clk_parent_data *parent_data = init->parent_data;
3734 int i, ret = 0;
3735 struct clk_parent_map *parents, *parent;
3736
3737 if (!num_parents)
3738 return 0;
3739
3740 /*
3741 * Avoid unnecessary string look-ups of clk_core's possible parents by
3742 * having a cache of names/clk_hw pointers to clk_core pointers.
3743 */
3744 parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL);
3745 core->parents = parents;
3746 if (!parents)
3747 return -ENOMEM;
3748
3749 /* Copy everything over because it might be __initdata */
3750 for (i = 0, parent = parents; i < num_parents; i++, parent++) {
601b6e93 3751 parent->index = -1;
fc0c209c
SB
3752 if (parent_names) {
3753 /* throw a WARN if any entries are NULL */
3754 WARN(!parent_names[i],
3755 "%s: invalid NULL in %s's .parent_names\n",
3756 __func__, core->name);
3757 ret = clk_cpy_name(&parent->name, parent_names[i],
3758 true);
3759 } else if (parent_data) {
3760 parent->hw = parent_data[i].hw;
601b6e93 3761 parent->index = parent_data[i].index;
fc0c209c
SB
3762 ret = clk_cpy_name(&parent->fw_name,
3763 parent_data[i].fw_name, false);
3764 if (!ret)
3765 ret = clk_cpy_name(&parent->name,
3766 parent_data[i].name,
3767 false);
3768 } else if (parent_hws) {
3769 parent->hw = parent_hws[i];
3770 } else {
3771 ret = -EINVAL;
3772 WARN(1, "Must specify parents if num_parents > 0\n");
3773 }
3774
3775 if (ret) {
3776 do {
3777 kfree_const(parents[i].name);
3778 kfree_const(parents[i].fw_name);
3779 } while (--i >= 0);
3780 kfree(parents);
3781
3782 return ret;
3783 }
3784 }
3785
3786 return 0;
3787}
3788
3789static void clk_core_free_parent_map(struct clk_core *core)
3790{
3791 int i = core->num_parents;
3792
3793 if (!core->num_parents)
3794 return;
3795
3796 while (--i >= 0) {
3797 kfree_const(core->parents[i].name);
3798 kfree_const(core->parents[i].fw_name);
3799 }
3800
3801 kfree(core->parents);
3802}
3803
89a5ddcc
SB
3804static struct clk *
3805__clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
b2476490 3806{
fc0c209c 3807 int ret;
d6968fca 3808 struct clk_core *core;
0214f33c
SB
3809 const struct clk_init_data *init = hw->init;
3810
3811 /*
3812 * The init data is not supposed to be used outside of registration path.
3813 * Set it to NULL so that provider drivers can't use it either and so that
3814 * we catch use of hw->init early on in the core.
3815 */
3816 hw->init = NULL;
293ba3b4 3817
d6968fca
SB
3818 core = kzalloc(sizeof(*core), GFP_KERNEL);
3819 if (!core) {
293ba3b4
SB
3820 ret = -ENOMEM;
3821 goto fail_out;
3822 }
b2476490 3823
0214f33c 3824 core->name = kstrdup_const(init->name, GFP_KERNEL);
d6968fca 3825 if (!core->name) {
0197b3ea
SK
3826 ret = -ENOMEM;
3827 goto fail_name;
3828 }
29fd2a34 3829
0214f33c 3830 if (WARN_ON(!init->ops)) {
29fd2a34
JB
3831 ret = -EINVAL;
3832 goto fail_ops;
3833 }
0214f33c 3834 core->ops = init->ops;
29fd2a34 3835
9a34b453 3836 if (dev && pm_runtime_enabled(dev))
24478839
MR
3837 core->rpm_enabled = true;
3838 core->dev = dev;
89a5ddcc 3839 core->of_node = np;
ac2df527 3840 if (dev && dev->driver)
d6968fca
SB
3841 core->owner = dev->driver->owner;
3842 core->hw = hw;
0214f33c
SB
3843 core->flags = init->flags;
3844 core->num_parents = init->num_parents;
9783c0d9
SB
3845 core->min_rate = 0;
3846 core->max_rate = ULONG_MAX;
d6968fca 3847 hw->core = core;
b2476490 3848
0214f33c 3849 ret = clk_core_populate_parent_map(core, init);
fc0c209c 3850 if (ret)
176d1169 3851 goto fail_parents;
176d1169 3852
d6968fca 3853 INIT_HLIST_HEAD(&core->clks);
1c8e6004 3854
1df4046a
SB
3855 /*
3856 * Don't call clk_hw_create_clk() here because that would pin the
3857 * provider module to itself and prevent it from ever being removed.
3858 */
3859 hw->clk = alloc_clk(core, NULL, NULL);
035a61c3 3860 if (IS_ERR(hw->clk)) {
035a61c3 3861 ret = PTR_ERR(hw->clk);
fc0c209c 3862 goto fail_create_clk;
035a61c3
TV
3863 }
3864
1df4046a
SB
3865 clk_core_link_consumer(hw->core, hw->clk);
3866
be45ebf2 3867 ret = __clk_core_init(core);
d1302a36 3868 if (!ret)
035a61c3 3869 return hw->clk;
b2476490 3870
1df4046a
SB
3871 clk_prepare_lock();
3872 clk_core_unlink_consumer(hw->clk);
3873 clk_prepare_unlock();
3874
3875 free_clk(hw->clk);
035a61c3 3876 hw->clk = NULL;
b2476490 3877
fc0c209c
SB
3878fail_create_clk:
3879 clk_core_free_parent_map(core);
176d1169 3880fail_parents:
29fd2a34 3881fail_ops:
d6968fca 3882 kfree_const(core->name);
0197b3ea 3883fail_name:
d6968fca 3884 kfree(core);
d1302a36
MT
3885fail_out:
3886 return ERR_PTR(ret);
b2476490 3887}
fceaa7d8 3888
9011f926
SB
3889/**
3890 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
3891 * @dev: Device to get device node of
3892 *
3893 * Return: device node pointer of @dev, or the device node pointer of
3894 * @dev->parent if dev doesn't have a device node, or NULL if neither
3895 * @dev or @dev->parent have a device node.
3896 */
3897static struct device_node *dev_or_parent_of_node(struct device *dev)
3898{
3899 struct device_node *np;
3900
3901 if (!dev)
3902 return NULL;
3903
3904 np = dev_of_node(dev);
3905 if (!np)
3906 np = dev_of_node(dev->parent);
3907
3908 return np;
3909}
3910
fceaa7d8
SB
3911/**
3912 * clk_register - allocate a new clock, register it and return an opaque cookie
3913 * @dev: device that is registering this clock
3914 * @hw: link to hardware-specific clock data
3915 *
c1157f60
SB
3916 * clk_register is the *deprecated* interface for populating the clock tree with
3917 * new clock nodes. Use clk_hw_register() instead.
3918 *
3919 * Returns: a pointer to the newly allocated struct clk which
fceaa7d8
SB
3920 * cannot be dereferenced by driver code but may be used in conjunction with the
3921 * rest of the clock API. In the event of an error clk_register will return an
3922 * error code; drivers must test for an error code after calling clk_register.
3923 */
3924struct clk *clk_register(struct device *dev, struct clk_hw *hw)
3925{
9011f926 3926 return __clk_register(dev, dev_or_parent_of_node(dev), hw);
fceaa7d8 3927}
b2476490
MT
3928EXPORT_SYMBOL_GPL(clk_register);
3929
4143804c
SB
3930/**
3931 * clk_hw_register - register a clk_hw and return an error code
3932 * @dev: device that is registering this clock
3933 * @hw: link to hardware-specific clock data
3934 *
3935 * clk_hw_register is the primary interface for populating the clock tree with
3936 * new clock nodes. It returns an integer equal to zero indicating success or
3937 * less than zero indicating failure. Drivers must test for an error code after
3938 * calling clk_hw_register().
3939 */
3940int clk_hw_register(struct device *dev, struct clk_hw *hw)
3941{
9011f926
SB
3942 return PTR_ERR_OR_ZERO(__clk_register(dev, dev_or_parent_of_node(dev),
3943 hw));
4143804c
SB
3944}
3945EXPORT_SYMBOL_GPL(clk_hw_register);
3946
89a5ddcc
SB
3947/*
3948 * of_clk_hw_register - register a clk_hw and return an error code
3949 * @node: device_node of device that is registering this clock
3950 * @hw: link to hardware-specific clock data
3951 *
3952 * of_clk_hw_register() is the primary interface for populating the clock tree
3953 * with new clock nodes when a struct device is not available, but a struct
3954 * device_node is. It returns an integer equal to zero indicating success or
3955 * less than zero indicating failure. Drivers must test for an error code after
3956 * calling of_clk_hw_register().
3957 */
3958int of_clk_hw_register(struct device_node *node, struct clk_hw *hw)
3959{
3960 return PTR_ERR_OR_ZERO(__clk_register(NULL, node, hw));
3961}
3962EXPORT_SYMBOL_GPL(of_clk_hw_register);
3963
6e5ab41b 3964/* Free memory allocated for a clock. */
fcb0ee6a
SN
3965static void __clk_release(struct kref *ref)
3966{
d6968fca 3967 struct clk_core *core = container_of(ref, struct clk_core, ref);
fcb0ee6a 3968
496eadf8
KK
3969 lockdep_assert_held(&prepare_lock);
3970
fc0c209c 3971 clk_core_free_parent_map(core);
d6968fca
SB
3972 kfree_const(core->name);
3973 kfree(core);
fcb0ee6a
SN
3974}
3975
3976/*
3977 * Empty clk_ops for unregistered clocks. These are used temporarily
3978 * after clk_unregister() was called on a clock and until last clock
3979 * consumer calls clk_put() and the struct clk object is freed.
3980 */
3981static int clk_nodrv_prepare_enable(struct clk_hw *hw)
3982{
3983 return -ENXIO;
3984}
3985
3986static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
3987{
3988 WARN_ON_ONCE(1);
3989}
3990
3991static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
3992 unsigned long parent_rate)
3993{
3994 return -ENXIO;
3995}
3996
3997static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
3998{
3999 return -ENXIO;
4000}
4001
4002static const struct clk_ops clk_nodrv_ops = {
4003 .enable = clk_nodrv_prepare_enable,
4004 .disable = clk_nodrv_disable_unprepare,
4005 .prepare = clk_nodrv_prepare_enable,
4006 .unprepare = clk_nodrv_disable_unprepare,
4007 .set_rate = clk_nodrv_set_rate,
4008 .set_parent = clk_nodrv_set_parent,
4009};
4010
bdcf1dc2
SB
4011static void clk_core_evict_parent_cache_subtree(struct clk_core *root,
4012 struct clk_core *target)
4013{
4014 int i;
4015 struct clk_core *child;
4016
4017 for (i = 0; i < root->num_parents; i++)
4018 if (root->parents[i].core == target)
4019 root->parents[i].core = NULL;
4020
4021 hlist_for_each_entry(child, &root->children, child_node)
4022 clk_core_evict_parent_cache_subtree(child, target);
4023}
4024
4025/* Remove this clk from all parent caches */
4026static void clk_core_evict_parent_cache(struct clk_core *core)
4027{
4028 struct hlist_head **lists;
4029 struct clk_core *root;
4030
4031 lockdep_assert_held(&prepare_lock);
4032
4033 for (lists = all_lists; *lists; lists++)
4034 hlist_for_each_entry(root, *lists, child_node)
4035 clk_core_evict_parent_cache_subtree(root, core);
4036
4037}
4038
1df5c939
MB
4039/**
4040 * clk_unregister - unregister a currently registered clock
4041 * @clk: clock to unregister
1df5c939 4042 */
fcb0ee6a
SN
4043void clk_unregister(struct clk *clk)
4044{
4045 unsigned long flags;
f873744c 4046 const struct clk_ops *ops;
fcb0ee6a 4047
6314b679
SB
4048 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
4049 return;
4050
035a61c3 4051 clk_debug_unregister(clk->core);
fcb0ee6a
SN
4052
4053 clk_prepare_lock();
4054
f873744c
JB
4055 ops = clk->core->ops;
4056 if (ops == &clk_nodrv_ops) {
035a61c3
TV
4057 pr_err("%s: unregistered clock: %s\n", __func__,
4058 clk->core->name);
4106a3d9 4059 goto unlock;
fcb0ee6a
SN
4060 }
4061 /*
4062 * Assign empty clock ops for consumers that might still hold
4063 * a reference to this clock.
4064 */
4065 flags = clk_enable_lock();
035a61c3 4066 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
4067 clk_enable_unlock(flags);
4068
f873744c
JB
4069 if (ops->terminate)
4070 ops->terminate(clk->core->hw);
4071
035a61c3
TV
4072 if (!hlist_empty(&clk->core->children)) {
4073 struct clk_core *child;
874f224c 4074 struct hlist_node *t;
fcb0ee6a
SN
4075
4076 /* Reparent all children to the orphan list. */
035a61c3
TV
4077 hlist_for_each_entry_safe(child, t, &clk->core->children,
4078 child_node)
91baa9ff 4079 clk_core_set_parent_nolock(child, NULL);
fcb0ee6a
SN
4080 }
4081
bdcf1dc2
SB
4082 clk_core_evict_parent_cache(clk->core);
4083
035a61c3 4084 hlist_del_init(&clk->core->child_node);
fcb0ee6a 4085
035a61c3 4086 if (clk->core->prepare_count)
fcb0ee6a 4087 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3 4088 __func__, clk->core->name);
e55a839a
JB
4089
4090 if (clk->core->protect_count)
4091 pr_warn("%s: unregistering protected clock: %s\n",
4092 __func__, clk->core->name);
4093
035a61c3 4094 kref_put(&clk->core->ref, __clk_release);
82474707 4095 free_clk(clk);
4106a3d9 4096unlock:
fcb0ee6a
SN
4097 clk_prepare_unlock();
4098}
1df5c939
MB
4099EXPORT_SYMBOL_GPL(clk_unregister);
4100
4143804c
SB
4101/**
4102 * clk_hw_unregister - unregister a currently registered clk_hw
4103 * @hw: hardware-specific clock data to unregister
4104 */
4105void clk_hw_unregister(struct clk_hw *hw)
4106{
4107 clk_unregister(hw->clk);
4108}
4109EXPORT_SYMBOL_GPL(clk_hw_unregister);
4110
e5a4b9b9 4111static void devm_clk_unregister_cb(struct device *dev, void *res)
46c8773a 4112{
293ba3b4 4113 clk_unregister(*(struct clk **)res);
46c8773a
SB
4114}
4115
e5a4b9b9 4116static void devm_clk_hw_unregister_cb(struct device *dev, void *res)
4143804c
SB
4117{
4118 clk_hw_unregister(*(struct clk_hw **)res);
4119}
4120
46c8773a
SB
4121/**
4122 * devm_clk_register - resource managed clk_register()
4123 * @dev: device that is registering this clock
4124 * @hw: link to hardware-specific clock data
4125 *
9fe9b7ab
SB
4126 * Managed clk_register(). This function is *deprecated*, use devm_clk_hw_register() instead.
4127 *
4128 * Clocks returned from this function are automatically clk_unregister()ed on
4129 * driver detach. See clk_register() for more information.
46c8773a
SB
4130 */
4131struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
4132{
4133 struct clk *clk;
293ba3b4 4134 struct clk **clkp;
46c8773a 4135
e5a4b9b9 4136 clkp = devres_alloc(devm_clk_unregister_cb, sizeof(*clkp), GFP_KERNEL);
293ba3b4 4137 if (!clkp)
46c8773a
SB
4138 return ERR_PTR(-ENOMEM);
4139
293ba3b4
SB
4140 clk = clk_register(dev, hw);
4141 if (!IS_ERR(clk)) {
4142 *clkp = clk;
4143 devres_add(dev, clkp);
46c8773a 4144 } else {
293ba3b4 4145 devres_free(clkp);
46c8773a
SB
4146 }
4147
4148 return clk;
4149}
4150EXPORT_SYMBOL_GPL(devm_clk_register);
4151
4143804c
SB
4152/**
4153 * devm_clk_hw_register - resource managed clk_hw_register()
4154 * @dev: device that is registering this clock
4155 * @hw: link to hardware-specific clock data
4156 *
c47265ad 4157 * Managed clk_hw_register(). Clocks registered by this function are
4143804c
SB
4158 * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
4159 * for more information.
4160 */
4161int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
4162{
4163 struct clk_hw **hwp;
4164 int ret;
4165
e5a4b9b9 4166 hwp = devres_alloc(devm_clk_hw_unregister_cb, sizeof(*hwp), GFP_KERNEL);
4143804c
SB
4167 if (!hwp)
4168 return -ENOMEM;
4169
4170 ret = clk_hw_register(dev, hw);
4171 if (!ret) {
4172 *hwp = hw;
4173 devres_add(dev, hwp);
4174 } else {
4175 devres_free(hwp);
4176 }
4177
4178 return ret;
4179}
4180EXPORT_SYMBOL_GPL(devm_clk_hw_register);
4181
46c8773a
SB
4182static int devm_clk_match(struct device *dev, void *res, void *data)
4183{
4184 struct clk *c = res;
4185 if (WARN_ON(!c))
4186 return 0;
4187 return c == data;
4188}
4189
4143804c
SB
4190static int devm_clk_hw_match(struct device *dev, void *res, void *data)
4191{
4192 struct clk_hw *hw = res;
4193
4194 if (WARN_ON(!hw))
4195 return 0;
4196 return hw == data;
4197}
4198
46c8773a
SB
4199/**
4200 * devm_clk_unregister - resource managed clk_unregister()
6378cfdc 4201 * @dev: device that is unregistering the clock data
46c8773a
SB
4202 * @clk: clock to unregister
4203 *
4204 * Deallocate a clock allocated with devm_clk_register(). Normally
4205 * this function will not need to be called and the resource management
4206 * code will ensure that the resource is freed.
4207 */
4208void devm_clk_unregister(struct device *dev, struct clk *clk)
4209{
e5a4b9b9 4210 WARN_ON(devres_release(dev, devm_clk_unregister_cb, devm_clk_match, clk));
46c8773a
SB
4211}
4212EXPORT_SYMBOL_GPL(devm_clk_unregister);
4213
4143804c
SB
4214/**
4215 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
4216 * @dev: device that is unregistering the hardware-specific clock data
4217 * @hw: link to hardware-specific clock data
4218 *
4219 * Unregister a clk_hw registered with devm_clk_hw_register(). Normally
4220 * this function will not need to be called and the resource management
4221 * code will ensure that the resource is freed.
4222 */
4223void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)
4224{
e5a4b9b9 4225 WARN_ON(devres_release(dev, devm_clk_hw_unregister_cb, devm_clk_hw_match,
4143804c
SB
4226 hw));
4227}
4228EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);
4229
30d6f8c1
JB
4230static void devm_clk_release(struct device *dev, void *res)
4231{
4232 clk_put(*(struct clk **)res);
4233}
4234
4235/**
4236 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()
4237 * @dev: device that is registering this clock
4238 * @hw: clk_hw associated with the clk being consumed
4239 * @con_id: connection ID string on device
4240 *
4241 * Managed clk_hw_get_clk(). Clocks got with this function are
4242 * automatically clk_put() on driver detach. See clk_put()
4243 * for more information.
4244 */
4245struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw,
4246 const char *con_id)
4247{
4248 struct clk *clk;
4249 struct clk **clkp;
4250
4251 /* This should not happen because it would mean we have drivers
4252 * passing around clk_hw pointers instead of having the caller use
4253 * proper clk_get() style APIs
4254 */
4255 WARN_ON_ONCE(dev != hw->core->dev);
4256
4257 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
4258 if (!clkp)
4259 return ERR_PTR(-ENOMEM);
4260
4261 clk = clk_hw_get_clk(hw, con_id);
4262 if (!IS_ERR(clk)) {
4263 *clkp = clk;
4264 devres_add(dev, clkp);
4265 } else {
4266 devres_free(clkp);
4267 }
4268
4269 return clk;
4270}
4271EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk);
4272
ac2df527
SN
4273/*
4274 * clkdev helpers
4275 */
ac2df527
SN
4276
4277void __clk_put(struct clk *clk)
4278{
10cdfe54
TV
4279 struct module *owner;
4280
00efcb1c 4281 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
4282 return;
4283
fcb0ee6a 4284 clk_prepare_lock();
1c8e6004 4285
55e9b8b7
JB
4286 /*
4287 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a
4288 * given user should be balanced with calls to clk_rate_exclusive_put()
4289 * and by that same consumer
4290 */
4291 if (WARN_ON(clk->exclusive_count)) {
4292 /* We voiced our concern, let's sanitize the situation */
4293 clk->core->protect_count -= (clk->exclusive_count - 1);
4294 clk_core_rate_unprotect(clk->core);
4295 clk->exclusive_count = 0;
4296 }
4297
50595f8b 4298 hlist_del(&clk->clks_node);
ec02ace8
TV
4299 if (clk->min_rate > clk->core->req_rate ||
4300 clk->max_rate < clk->core->req_rate)
4301 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4302
1c8e6004
TV
4303 owner = clk->core->owner;
4304 kref_put(&clk->core->ref, __clk_release);
4305
fcb0ee6a
SN
4306 clk_prepare_unlock();
4307
10cdfe54 4308 module_put(owner);
035a61c3 4309
1df4046a 4310 free_clk(clk);
ac2df527
SN
4311}
4312
b2476490
MT
4313/*** clk rate change notifiers ***/
4314
4315/**
4316 * clk_notifier_register - add a clk rate change notifier
4317 * @clk: struct clk * to watch
4318 * @nb: struct notifier_block * with callback info
4319 *
4320 * Request notification when clk's rate changes. This uses an SRCU
4321 * notifier because we want it to block and notifier unregistrations are
4322 * uncommon. The callbacks associated with the notifier must not
4323 * re-enter into the clk framework by calling any top-level clk APIs;
4324 * this will cause a nested prepare_lock mutex.
4325 *
198bb594
MY
4326 * In all notification cases (pre, post and abort rate change) the original
4327 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
4328 * and the new frequency is passed via struct clk_notifier_data.new_rate.
b2476490 4329 *
b2476490
MT
4330 * clk_notifier_register() must be called from non-atomic context.
4331 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4332 * allocation failure; otherwise, passes along the return value of
4333 * srcu_notifier_chain_register().
4334 */
4335int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
4336{
4337 struct clk_notifier *cn;
4338 int ret = -ENOMEM;
4339
4340 if (!clk || !nb)
4341 return -EINVAL;
4342
eab89f69 4343 clk_prepare_lock();
b2476490
MT
4344
4345 /* search the list of notifiers for this clk */
4346 list_for_each_entry(cn, &clk_notifier_list, node)
4347 if (cn->clk == clk)
8d3c0c01 4348 goto found;
b2476490
MT
4349
4350 /* if clk wasn't in the notifier list, allocate new clk_notifier */
8d3c0c01
LB
4351 cn = kzalloc(sizeof(*cn), GFP_KERNEL);
4352 if (!cn)
4353 goto out;
b2476490 4354
8d3c0c01
LB
4355 cn->clk = clk;
4356 srcu_init_notifier_head(&cn->notifier_head);
b2476490 4357
8d3c0c01 4358 list_add(&cn->node, &clk_notifier_list);
b2476490 4359
8d3c0c01 4360found:
b2476490
MT
4361 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4362
035a61c3 4363 clk->core->notifier_count++;
b2476490
MT
4364
4365out:
eab89f69 4366 clk_prepare_unlock();
b2476490
MT
4367
4368 return ret;
4369}
4370EXPORT_SYMBOL_GPL(clk_notifier_register);
4371
4372/**
4373 * clk_notifier_unregister - remove a clk rate change notifier
4374 * @clk: struct clk *
4375 * @nb: struct notifier_block * with callback info
4376 *
4377 * Request no further notification for changes to 'clk' and frees memory
4378 * allocated in clk_notifier_register.
4379 *
4380 * Returns -EINVAL if called with null arguments; otherwise, passes
4381 * along the return value of srcu_notifier_chain_unregister().
4382 */
4383int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
4384{
70454655
LB
4385 struct clk_notifier *cn;
4386 int ret = -ENOENT;
b2476490
MT
4387
4388 if (!clk || !nb)
4389 return -EINVAL;
4390
eab89f69 4391 clk_prepare_lock();
b2476490 4392
70454655
LB
4393 list_for_each_entry(cn, &clk_notifier_list, node) {
4394 if (cn->clk == clk) {
4395 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
b2476490 4396
70454655 4397 clk->core->notifier_count--;
b2476490 4398
70454655
LB
4399 /* XXX the notifier code should handle this better */
4400 if (!cn->notifier_head.head) {
4401 srcu_cleanup_notifier_head(&cn->notifier_head);
4402 list_del(&cn->node);
4403 kfree(cn);
4404 }
4405 break;
b2476490 4406 }
b2476490
MT
4407 }
4408
eab89f69 4409 clk_prepare_unlock();
b2476490
MT
4410
4411 return ret;
4412}
4413EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e 4414
6d30d50d
JB
4415struct clk_notifier_devres {
4416 struct clk *clk;
4417 struct notifier_block *nb;
4418};
4419
4420static void devm_clk_notifier_release(struct device *dev, void *res)
4421{
4422 struct clk_notifier_devres *devres = res;
4423
4424 clk_notifier_unregister(devres->clk, devres->nb);
4425}
4426
4427int devm_clk_notifier_register(struct device *dev, struct clk *clk,
4428 struct notifier_block *nb)
4429{
4430 struct clk_notifier_devres *devres;
4431 int ret;
4432
4433 devres = devres_alloc(devm_clk_notifier_release,
4434 sizeof(*devres), GFP_KERNEL);
4435
4436 if (!devres)
4437 return -ENOMEM;
4438
4439 ret = clk_notifier_register(clk, nb);
4440 if (!ret) {
4441 devres->clk = clk;
4442 devres->nb = nb;
4443 } else {
4444 devres_free(devres);
4445 }
4446
4447 return ret;
4448}
4449EXPORT_SYMBOL_GPL(devm_clk_notifier_register);
4450
766e6a4e 4451#ifdef CONFIG_OF
c771256e
OJ
4452static void clk_core_reparent_orphans(void)
4453{
4454 clk_prepare_lock();
4455 clk_core_reparent_orphans_nolock();
4456 clk_prepare_unlock();
4457}
4458
766e6a4e
GL
4459/**
4460 * struct of_clk_provider - Clock provider registration structure
4461 * @link: Entry in global list of clock providers
4462 * @node: Pointer to device tree node of clock provider
4463 * @get: Get clock callback. Returns NULL or a struct clk for the
4464 * given clock specifier
6378cfdc
SB
4465 * @get_hw: Get clk_hw callback. Returns NULL, ERR_PTR or a
4466 * struct clk_hw for the given clock specifier
766e6a4e
GL
4467 * @data: context pointer to be passed into @get callback
4468 */
4469struct of_clk_provider {
4470 struct list_head link;
4471
4472 struct device_node *node;
4473 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
0861e5b8 4474 struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
766e6a4e
GL
4475 void *data;
4476};
4477
30d5a945 4478extern struct of_device_id __clk_of_table;
f2f6c255 4479static const struct of_device_id __clk_of_table_sentinel
33def849 4480 __used __section("__clk_of_table_end");
f2f6c255 4481
766e6a4e 4482static LIST_HEAD(of_clk_providers);
d6782c26
SN
4483static DEFINE_MUTEX(of_clk_mutex);
4484
766e6a4e
GL
4485struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
4486 void *data)
4487{
4488 return data;
4489}
4490EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
4491
0861e5b8
SB
4492struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
4493{
4494 return data;
4495}
4496EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
4497
494bfec9
SG
4498struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
4499{
4500 struct clk_onecell_data *clk_data = data;
4501 unsigned int idx = clkspec->args[0];
4502
4503 if (idx >= clk_data->clk_num) {
7e96353c 4504 pr_err("%s: invalid clock index %u\n", __func__, idx);
494bfec9
SG
4505 return ERR_PTR(-EINVAL);
4506 }
4507
4508 return clk_data->clks[idx];
4509}
4510EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
4511
0861e5b8
SB
4512struct clk_hw *
4513of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
4514{
4515 struct clk_hw_onecell_data *hw_data = data;
4516 unsigned int idx = clkspec->args[0];
4517
4518 if (idx >= hw_data->num) {
4519 pr_err("%s: invalid index %u\n", __func__, idx);
4520 return ERR_PTR(-EINVAL);
4521 }
4522
4523 return hw_data->hws[idx];
4524}
4525EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
4526
766e6a4e
GL
4527/**
4528 * of_clk_add_provider() - Register a clock provider for a node
4529 * @np: Device node pointer associated with clock provider
4530 * @clk_src_get: callback for decoding clock
4531 * @data: context pointer for @clk_src_get callback.
9fe9b7ab
SB
4532 *
4533 * This function is *deprecated*. Use of_clk_add_hw_provider() instead.
766e6a4e
GL
4534 */
4535int of_clk_add_provider(struct device_node *np,
4536 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
4537 void *data),
4538 void *data)
4539{
4540 struct of_clk_provider *cp;
86be408b 4541 int ret;
766e6a4e 4542
bb4031b8
TA
4543 if (!np)
4544 return 0;
4545
1808a320 4546 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
766e6a4e
GL
4547 if (!cp)
4548 return -ENOMEM;
4549
4550 cp->node = of_node_get(np);
4551 cp->data = data;
4552 cp->get = clk_src_get;
4553
d6782c26 4554 mutex_lock(&of_clk_mutex);
766e6a4e 4555 list_add(&cp->link, &of_clk_providers);
d6782c26 4556 mutex_unlock(&of_clk_mutex);
16673931 4557 pr_debug("Added clock from %pOF\n", np);
766e6a4e 4558
66d95064
JB
4559 clk_core_reparent_orphans();
4560
86be408b
SN
4561 ret = of_clk_set_defaults(np, true);
4562 if (ret < 0)
4563 of_clk_del_provider(np);
4564
3c9ea428
SK
4565 fwnode_dev_initialized(&np->fwnode, true);
4566
86be408b 4567 return ret;
766e6a4e
GL
4568}
4569EXPORT_SYMBOL_GPL(of_clk_add_provider);
4570
0861e5b8
SB
4571/**
4572 * of_clk_add_hw_provider() - Register a clock provider for a node
4573 * @np: Device node pointer associated with clock provider
4574 * @get: callback for decoding clk_hw
4575 * @data: context pointer for @get callback.
4576 */
4577int of_clk_add_hw_provider(struct device_node *np,
4578 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4579 void *data),
4580 void *data)
4581{
4582 struct of_clk_provider *cp;
4583 int ret;
4584
bb4031b8
TA
4585 if (!np)
4586 return 0;
4587
0861e5b8
SB
4588 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
4589 if (!cp)
4590 return -ENOMEM;
4591
4592 cp->node = of_node_get(np);
4593 cp->data = data;
4594 cp->get_hw = get;
4595
4596 mutex_lock(&of_clk_mutex);
4597 list_add(&cp->link, &of_clk_providers);
4598 mutex_unlock(&of_clk_mutex);
16673931 4599 pr_debug("Added clk_hw provider from %pOF\n", np);
0861e5b8 4600
66d95064
JB
4601 clk_core_reparent_orphans();
4602
0861e5b8
SB
4603 ret = of_clk_set_defaults(np, true);
4604 if (ret < 0)
4605 of_clk_del_provider(np);
4606
6579c8d9
TA
4607 fwnode_dev_initialized(&np->fwnode, true);
4608
0861e5b8
SB
4609 return ret;
4610}
4611EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
4612
aa795c41
SB
4613static void devm_of_clk_release_provider(struct device *dev, void *res)
4614{
4615 of_clk_del_provider(*(struct device_node **)res);
4616}
4617
05502bf9
MV
4618/*
4619 * We allow a child device to use its parent device as the clock provider node
4620 * for cases like MFD sub-devices where the child device driver wants to use
4621 * devm_*() APIs but not list the device in DT as a sub-node.
4622 */
4623static struct device_node *get_clk_provider_node(struct device *dev)
4624{
4625 struct device_node *np, *parent_np;
4626
4627 np = dev->of_node;
4628 parent_np = dev->parent ? dev->parent->of_node : NULL;
4629
4630 if (!of_find_property(np, "#clock-cells", NULL))
4631 if (of_find_property(parent_np, "#clock-cells", NULL))
4632 np = parent_np;
4633
4634 return np;
4635}
4636
e45838b5
MV
4637/**
4638 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4639 * @dev: Device acting as the clock provider (used for DT node and lifetime)
4640 * @get: callback for decoding clk_hw
4641 * @data: context pointer for @get callback
4642 *
05502bf9
MV
4643 * Registers clock provider for given device's node. If the device has no DT
4644 * node or if the device node lacks of clock provider information (#clock-cells)
4645 * then the parent device's node is scanned for this information. If parent node
4646 * has the #clock-cells then it is used in registration. Provider is
4647 * automatically released at device exit.
e45838b5
MV
4648 *
4649 * Return: 0 on success or an errno on failure.
4650 */
aa795c41
SB
4651int devm_of_clk_add_hw_provider(struct device *dev,
4652 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4653 void *data),
4654 void *data)
4655{
4656 struct device_node **ptr, *np;
4657 int ret;
4658
4659 ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr),
4660 GFP_KERNEL);
4661 if (!ptr)
4662 return -ENOMEM;
4663
05502bf9 4664 np = get_clk_provider_node(dev);
aa795c41
SB
4665 ret = of_clk_add_hw_provider(np, get, data);
4666 if (!ret) {
4667 *ptr = np;
4668 devres_add(dev, ptr);
4669 } else {
4670 devres_free(ptr);
4671 }
4672
4673 return ret;
4674}
4675EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider);
4676
766e6a4e
GL
4677/**
4678 * of_clk_del_provider() - Remove a previously registered clock provider
4679 * @np: Device node pointer associated with clock provider
4680 */
4681void of_clk_del_provider(struct device_node *np)
4682{
4683 struct of_clk_provider *cp;
4684
bb4031b8
TA
4685 if (!np)
4686 return;
4687
d6782c26 4688 mutex_lock(&of_clk_mutex);
766e6a4e
GL
4689 list_for_each_entry(cp, &of_clk_providers, link) {
4690 if (cp->node == np) {
4691 list_del(&cp->link);
3c9ea428 4692 fwnode_dev_initialized(&np->fwnode, false);
766e6a4e
GL
4693 of_node_put(cp->node);
4694 kfree(cp);
4695 break;
4696 }
4697 }
d6782c26 4698 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
4699}
4700EXPORT_SYMBOL_GPL(of_clk_del_provider);
4701
aa795c41
SB
4702static int devm_clk_provider_match(struct device *dev, void *res, void *data)
4703{
4704 struct device_node **np = res;
4705
4706 if (WARN_ON(!np || !*np))
4707 return 0;
4708
4709 return *np == data;
4710}
4711
e45838b5
MV
4712/**
4713 * devm_of_clk_del_provider() - Remove clock provider registered using devm
4714 * @dev: Device to whose lifetime the clock provider was bound
4715 */
aa795c41
SB
4716void devm_of_clk_del_provider(struct device *dev)
4717{
4718 int ret;
05502bf9 4719 struct device_node *np = get_clk_provider_node(dev);
aa795c41
SB
4720
4721 ret = devres_release(dev, devm_of_clk_release_provider,
05502bf9 4722 devm_clk_provider_match, np);
aa795c41
SB
4723
4724 WARN_ON(ret);
4725}
4726EXPORT_SYMBOL(devm_of_clk_del_provider);
4727
226fd702
SB
4728/**
4729 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
4730 * @np: device node to parse clock specifier from
4731 * @index: index of phandle to parse clock out of. If index < 0, @name is used
4732 * @name: clock name to find and parse. If name is NULL, the index is used
4733 * @out_args: Result of parsing the clock specifier
4734 *
4735 * Parses a device node's "clocks" and "clock-names" properties to find the
4736 * phandle and cells for the index or name that is desired. The resulting clock
4737 * specifier is placed into @out_args, or an errno is returned when there's a
4738 * parsing error. The @index argument is ignored if @name is non-NULL.
4739 *
4740 * Example:
4741 *
4742 * phandle1: clock-controller@1 {
4743 * #clock-cells = <2>;
4744 * }
4745 *
4746 * phandle2: clock-controller@2 {
4747 * #clock-cells = <1>;
4748 * }
4749 *
4750 * clock-consumer@3 {
4751 * clocks = <&phandle1 1 2 &phandle2 3>;
4752 * clock-names = "name1", "name2";
4753 * }
4754 *
4755 * To get a device_node for `clock-controller@2' node you may call this
4756 * function a few different ways:
4757 *
4758 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
4759 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
4760 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
4761 *
4762 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
4763 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
4764 * the "clock-names" property of @np.
5dc7e842 4765 */
cf13f289
SB
4766static int of_parse_clkspec(const struct device_node *np, int index,
4767 const char *name, struct of_phandle_args *out_args)
4472287a
SB
4768{
4769 int ret = -ENOENT;
4770
4771 /* Walk up the tree of devices looking for a clock property that matches */
4772 while (np) {
4773 /*
4774 * For named clocks, first look up the name in the
4775 * "clock-names" property. If it cannot be found, then index
4776 * will be an error code and of_parse_phandle_with_args() will
4777 * return -EINVAL.
4778 */
4779 if (name)
4780 index = of_property_match_string(np, "clock-names", name);
4781 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
4782 index, out_args);
4783 if (!ret)
4784 break;
4785 if (name && index >= 0)
4786 break;
4787
4788 /*
4789 * No matching clock found on this node. If the parent node
4790 * has a "clock-ranges" property, then we can try one of its
4791 * clocks.
4792 */
4793 np = np->parent;
4794 if (np && !of_get_property(np, "clock-ranges", NULL))
4795 break;
4796 index = 0;
4797 }
4798
4799 return ret;
4800}
4801
0861e5b8
SB
4802static struct clk_hw *
4803__of_clk_get_hw_from_provider(struct of_clk_provider *provider,
4804 struct of_phandle_args *clkspec)
4805{
4806 struct clk *clk;
0861e5b8 4807
74002fcd
SB
4808 if (provider->get_hw)
4809 return provider->get_hw(clkspec, provider->data);
0861e5b8 4810
74002fcd
SB
4811 clk = provider->get(clkspec, provider->data);
4812 if (IS_ERR(clk))
4813 return ERR_CAST(clk);
4814 return __clk_get_hw(clk);
0861e5b8
SB
4815}
4816
cf13f289
SB
4817static struct clk_hw *
4818of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
766e6a4e
GL
4819{
4820 struct of_clk_provider *provider;
1df4046a 4821 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
766e6a4e 4822
306c342f
SB
4823 if (!clkspec)
4824 return ERR_PTR(-EINVAL);
4825
306c342f 4826 mutex_lock(&of_clk_mutex);
766e6a4e 4827 list_for_each_entry(provider, &of_clk_providers, link) {
f155d15b 4828 if (provider->node == clkspec->np) {
0861e5b8 4829 hw = __of_clk_get_hw_from_provider(provider, clkspec);
1df4046a
SB
4830 if (!IS_ERR(hw))
4831 break;
73e0e496 4832 }
766e6a4e 4833 }
306c342f 4834 mutex_unlock(&of_clk_mutex);
d6782c26 4835
4472287a 4836 return hw;
d6782c26
SN
4837}
4838
306c342f
SB
4839/**
4840 * of_clk_get_from_provider() - Lookup a clock from a clock provider
4841 * @clkspec: pointer to a clock specifier data structure
4842 *
4843 * This function looks up a struct clk from the registered list of clock
4844 * providers, an input is a clock specifier data structure as returned
4845 * from the of_parse_phandle_with_args() function call.
4846 */
d6782c26
SN
4847struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
4848{
4472287a
SB
4849 struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec);
4850
efa85048 4851 return clk_hw_create_clk(NULL, hw, NULL, __func__);
766e6a4e 4852}
fb4dd222 4853EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
766e6a4e 4854
cf13f289
SB
4855struct clk_hw *of_clk_get_hw(struct device_node *np, int index,
4856 const char *con_id)
4857{
4858 int ret;
4859 struct clk_hw *hw;
4860 struct of_phandle_args clkspec;
4861
4862 ret = of_parse_clkspec(np, index, con_id, &clkspec);
4863 if (ret)
4864 return ERR_PTR(ret);
4865
4866 hw = of_clk_get_hw_from_clkspec(&clkspec);
4867 of_node_put(clkspec.np);
4868
4869 return hw;
4870}
4871
4872static struct clk *__of_clk_get(struct device_node *np,
4873 int index, const char *dev_id,
4874 const char *con_id)
4875{
4876 struct clk_hw *hw = of_clk_get_hw(np, index, con_id);
4877
4878 return clk_hw_create_clk(NULL, hw, dev_id, con_id);
4879}
4880
4881struct clk *of_clk_get(struct device_node *np, int index)
4882{
4883 return __of_clk_get(np, index, np->full_name, NULL);
4884}
4885EXPORT_SYMBOL(of_clk_get);
4886
4887/**
4888 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
4889 * @np: pointer to clock consumer node
4890 * @name: name of consumer's clock input, or NULL for the first clock reference
4891 *
4892 * This function parses the clocks and clock-names properties,
4893 * and uses them to look up the struct clk from the registered list of clock
4894 * providers.
4895 */
4896struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
4897{
4898 if (!np)
4899 return ERR_PTR(-ENOENT);
4900
65cf20ad 4901 return __of_clk_get(np, 0, np->full_name, name);
cf13f289
SB
4902}
4903EXPORT_SYMBOL(of_clk_get_by_name);
4904
929e7f3b
SB
4905/**
4906 * of_clk_get_parent_count() - Count the number of clocks a device node has
4907 * @np: device node to count
4908 *
4909 * Returns: The number of clocks that are possible parents of this node
4910 */
4a4472fd 4911unsigned int of_clk_get_parent_count(const struct device_node *np)
f6102742 4912{
929e7f3b
SB
4913 int count;
4914
4915 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4916 if (count < 0)
4917 return 0;
4918
4919 return count;
f6102742
MT
4920}
4921EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
4922
4a4472fd 4923const char *of_clk_get_parent_name(const struct device_node *np, int index)
766e6a4e
GL
4924{
4925 struct of_phandle_args clkspec;
7a0fc1a3 4926 struct property *prop;
766e6a4e 4927 const char *clk_name;
7a0fc1a3
BD
4928 const __be32 *vp;
4929 u32 pv;
766e6a4e 4930 int rc;
7a0fc1a3 4931 int count;
0a4807c2 4932 struct clk *clk;
766e6a4e 4933
766e6a4e
GL
4934 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4935 &clkspec);
4936 if (rc)
4937 return NULL;
4938
7a0fc1a3
BD
4939 index = clkspec.args_count ? clkspec.args[0] : 0;
4940 count = 0;
4941
4942 /* if there is an indices property, use it to transfer the index
4943 * specified into an array offset for the clock-output-names property.
4944 */
4945 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4946 if (index == pv) {
4947 index = count;
4948 break;
4949 }
4950 count++;
4951 }
8da411cc
MY
4952 /* We went off the end of 'clock-indices' without finding it */
4953 if (prop && !vp)
4954 return NULL;
7a0fc1a3 4955
766e6a4e 4956 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 4957 index,
0a4807c2
SB
4958 &clk_name) < 0) {
4959 /*
4960 * Best effort to get the name if the clock has been
4961 * registered with the framework. If the clock isn't
4962 * registered, we return the node name as the name of
4963 * the clock as long as #clock-cells = 0.
4964 */
4965 clk = of_clk_get_from_provider(&clkspec);
4966 if (IS_ERR(clk)) {
4967 if (clkspec.args_count == 0)
4968 clk_name = clkspec.np->name;
4969 else
4970 clk_name = NULL;
4971 } else {
4972 clk_name = __clk_get_name(clk);
4973 clk_put(clk);
4974 }
4975 }
4976
766e6a4e
GL
4977
4978 of_node_put(clkspec.np);
4979 return clk_name;
4980}
4981EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
4982
2e61dfb3
DN
4983/**
4984 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
4985 * number of parents
4986 * @np: Device node pointer associated with clock provider
4987 * @parents: pointer to char array that hold the parents' names
4988 * @size: size of the @parents array
4989 *
4990 * Return: number of parents for the clock node.
4991 */
4992int of_clk_parent_fill(struct device_node *np, const char **parents,
4993 unsigned int size)
4994{
4995 unsigned int i = 0;
4996
4997 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
4998 i++;
4999
5000 return i;
5001}
5002EXPORT_SYMBOL_GPL(of_clk_parent_fill);
5003
1771b10d 5004struct clock_provider {
a5970433 5005 void (*clk_init_cb)(struct device_node *);
1771b10d
GC
5006 struct device_node *np;
5007 struct list_head node;
5008};
5009
1771b10d
GC
5010/*
5011 * This function looks for a parent clock. If there is one, then it
5012 * checks that the provider for this parent clock was initialized, in
5013 * this case the parent clock will be ready.
5014 */
5015static int parent_ready(struct device_node *np)
5016{
5017 int i = 0;
5018
5019 while (true) {
5020 struct clk *clk = of_clk_get(np, i);
5021
5022 /* this parent is ready we can check the next one */
5023 if (!IS_ERR(clk)) {
5024 clk_put(clk);
5025 i++;
5026 continue;
5027 }
5028
5029 /* at least one parent is not ready, we exit now */
5030 if (PTR_ERR(clk) == -EPROBE_DEFER)
5031 return 0;
5032
5033 /*
5034 * Here we make assumption that the device tree is
5035 * written correctly. So an error means that there is
5036 * no more parent. As we didn't exit yet, then the
5037 * previous parent are ready. If there is no clock
5038 * parent, no need to wait for them, then we can
5039 * consider their absence as being ready
5040 */
5041 return 1;
5042 }
5043}
5044
d56f8994
LJ
5045/**
5046 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
5047 * @np: Device node pointer associated with clock provider
5048 * @index: clock index
f7ae7503 5049 * @flags: pointer to top-level framework flags
d56f8994
LJ
5050 *
5051 * Detects if the clock-critical property exists and, if so, sets the
5052 * corresponding CLK_IS_CRITICAL flag.
5053 *
5054 * Do not use this function. It exists only for legacy Device Tree
5055 * bindings, such as the one-clock-per-node style that are outdated.
5056 * Those bindings typically put all clock data into .dts and the Linux
5057 * driver has no clock data, thus making it impossible to set this flag
5058 * correctly from the driver. Only those drivers may call
5059 * of_clk_detect_critical from their setup functions.
5060 *
5061 * Return: error code or zero on success
5062 */
be545c79
GU
5063int of_clk_detect_critical(struct device_node *np, int index,
5064 unsigned long *flags)
d56f8994
LJ
5065{
5066 struct property *prop;
5067 const __be32 *cur;
5068 uint32_t idx;
5069
5070 if (!np || !flags)
5071 return -EINVAL;
5072
5073 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
5074 if (index == idx)
5075 *flags |= CLK_IS_CRITICAL;
5076
5077 return 0;
5078}
5079
766e6a4e
GL
5080/**
5081 * of_clk_init() - Scan and init clock providers from the DT
5082 * @matches: array of compatible values and init functions for providers.
5083 *
1771b10d 5084 * This function scans the device tree for matching clock providers
e5ca8fb4 5085 * and calls their initialization functions. It also does it by trying
1771b10d 5086 * to follow the dependencies.
766e6a4e
GL
5087 */
5088void __init of_clk_init(const struct of_device_id *matches)
5089{
7f7ed584 5090 const struct of_device_id *match;
766e6a4e 5091 struct device_node *np;
1771b10d
GC
5092 struct clock_provider *clk_provider, *next;
5093 bool is_init_done;
5094 bool force = false;
2573a02a 5095 LIST_HEAD(clk_provider_list);
766e6a4e 5096
f2f6c255 5097 if (!matches)
819b4861 5098 matches = &__clk_of_table;
f2f6c255 5099
1771b10d 5100 /* First prepare the list of the clocks providers */
7f7ed584 5101 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
5102 struct clock_provider *parent;
5103
3e5dd6f6
GU
5104 if (!of_device_is_available(np))
5105 continue;
5106
2e3b19f1
SB
5107 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
5108 if (!parent) {
5109 list_for_each_entry_safe(clk_provider, next,
5110 &clk_provider_list, node) {
5111 list_del(&clk_provider->node);
6bc9d9d6 5112 of_node_put(clk_provider->np);
2e3b19f1
SB
5113 kfree(clk_provider);
5114 }
6bc9d9d6 5115 of_node_put(np);
2e3b19f1
SB
5116 return;
5117 }
1771b10d
GC
5118
5119 parent->clk_init_cb = match->data;
6bc9d9d6 5120 parent->np = of_node_get(np);
3f6d439f 5121 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
5122 }
5123
5124 while (!list_empty(&clk_provider_list)) {
5125 is_init_done = false;
5126 list_for_each_entry_safe(clk_provider, next,
5127 &clk_provider_list, node) {
5128 if (force || parent_ready(clk_provider->np)) {
86be408b 5129
989eafd0
RRD
5130 /* Don't populate platform devices */
5131 of_node_set_flag(clk_provider->np,
5132 OF_POPULATED);
5133
1771b10d 5134 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
5135 of_clk_set_defaults(clk_provider->np, true);
5136
1771b10d 5137 list_del(&clk_provider->node);
6bc9d9d6 5138 of_node_put(clk_provider->np);
1771b10d
GC
5139 kfree(clk_provider);
5140 is_init_done = true;
5141 }
5142 }
5143
5144 /*
e5ca8fb4 5145 * We didn't manage to initialize any of the
1771b10d
GC
5146 * remaining providers during the last loop, so now we
5147 * initialize all the remaining ones unconditionally
5148 * in case the clock parent was not mandatory
5149 */
5150 if (!is_init_done)
5151 force = true;
766e6a4e
GL
5152 }
5153}
5154#endif