]>
Commit | Line | Data |
---|---|---|
ebafb63d | 1 | // SPDX-License-Identifier: GPL-2.0 |
b2476490 MT |
2 | /* |
3 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
4 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
5 | * | |
5fb94e9c | 6 | * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst |
b2476490 MT |
7 | */ |
8 | ||
3c373117 | 9 | #include <linux/clk.h> |
b09d6d99 | 10 | #include <linux/clk-provider.h> |
86be408b | 11 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
12 | #include <linux/module.h> |
13 | #include <linux/mutex.h> | |
14 | #include <linux/spinlock.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/slab.h> | |
766e6a4e | 18 | #include <linux/of.h> |
46c8773a | 19 | #include <linux/device.h> |
f2f6c255 | 20 | #include <linux/init.h> |
9a34b453 | 21 | #include <linux/pm_runtime.h> |
533ddeb1 | 22 | #include <linux/sched.h> |
562ef0b0 | 23 | #include <linux/clkdev.h> |
b2476490 | 24 | |
d6782c26 SN |
25 | #include "clk.h" |
26 | ||
b2476490 MT |
27 | static DEFINE_SPINLOCK(enable_lock); |
28 | static DEFINE_MUTEX(prepare_lock); | |
29 | ||
533ddeb1 MT |
30 | static struct task_struct *prepare_owner; |
31 | static struct task_struct *enable_owner; | |
32 | ||
33 | static int prepare_refcnt; | |
34 | static int enable_refcnt; | |
35 | ||
b2476490 MT |
36 | static HLIST_HEAD(clk_root_list); |
37 | static HLIST_HEAD(clk_orphan_list); | |
38 | static LIST_HEAD(clk_notifier_list); | |
39 | ||
bdcf1dc2 SB |
40 | static struct hlist_head *all_lists[] = { |
41 | &clk_root_list, | |
42 | &clk_orphan_list, | |
43 | NULL, | |
44 | }; | |
45 | ||
b09d6d99 MT |
46 | /*** private data structures ***/ |
47 | ||
fc0c209c SB |
48 | struct clk_parent_map { |
49 | const struct clk_hw *hw; | |
50 | struct clk_core *core; | |
51 | const char *fw_name; | |
52 | const char *name; | |
601b6e93 | 53 | int index; |
fc0c209c SB |
54 | }; |
55 | ||
b09d6d99 MT |
56 | struct clk_core { |
57 | const char *name; | |
58 | const struct clk_ops *ops; | |
59 | struct clk_hw *hw; | |
60 | struct module *owner; | |
9a34b453 | 61 | struct device *dev; |
89a5ddcc | 62 | struct device_node *of_node; |
b09d6d99 | 63 | struct clk_core *parent; |
fc0c209c | 64 | struct clk_parent_map *parents; |
b09d6d99 MT |
65 | u8 num_parents; |
66 | u8 new_parent_index; | |
67 | unsigned long rate; | |
1c8e6004 | 68 | unsigned long req_rate; |
b09d6d99 MT |
69 | unsigned long new_rate; |
70 | struct clk_core *new_parent; | |
71 | struct clk_core *new_child; | |
72 | unsigned long flags; | |
e6500344 | 73 | bool orphan; |
24478839 | 74 | bool rpm_enabled; |
b09d6d99 MT |
75 | unsigned int enable_count; |
76 | unsigned int prepare_count; | |
e55a839a | 77 | unsigned int protect_count; |
9783c0d9 SB |
78 | unsigned long min_rate; |
79 | unsigned long max_rate; | |
b09d6d99 MT |
80 | unsigned long accuracy; |
81 | int phase; | |
9fba738a | 82 | struct clk_duty duty; |
b09d6d99 MT |
83 | struct hlist_head children; |
84 | struct hlist_node child_node; | |
1c8e6004 | 85 | struct hlist_head clks; |
b09d6d99 MT |
86 | unsigned int notifier_count; |
87 | #ifdef CONFIG_DEBUG_FS | |
88 | struct dentry *dentry; | |
8c9a8a8f | 89 | struct hlist_node debug_node; |
b09d6d99 MT |
90 | #endif |
91 | struct kref ref; | |
92 | }; | |
93 | ||
dfc202ea SB |
94 | #define CREATE_TRACE_POINTS |
95 | #include <trace/events/clk.h> | |
96 | ||
b09d6d99 MT |
97 | struct clk { |
98 | struct clk_core *core; | |
efa85048 | 99 | struct device *dev; |
b09d6d99 MT |
100 | const char *dev_id; |
101 | const char *con_id; | |
1c8e6004 TV |
102 | unsigned long min_rate; |
103 | unsigned long max_rate; | |
55e9b8b7 | 104 | unsigned int exclusive_count; |
50595f8b | 105 | struct hlist_node clks_node; |
b09d6d99 MT |
106 | }; |
107 | ||
9a34b453 MS |
108 | /*** runtime pm ***/ |
109 | static int clk_pm_runtime_get(struct clk_core *core) | |
110 | { | |
24478839 | 111 | int ret; |
9a34b453 | 112 | |
24478839 | 113 | if (!core->rpm_enabled) |
9a34b453 MS |
114 | return 0; |
115 | ||
116 | ret = pm_runtime_get_sync(core->dev); | |
64c7d7ea RW |
117 | if (ret < 0) { |
118 | pm_runtime_put_noidle(core->dev); | |
119 | return ret; | |
120 | } | |
121 | return 0; | |
9a34b453 MS |
122 | } |
123 | ||
124 | static void clk_pm_runtime_put(struct clk_core *core) | |
125 | { | |
24478839 | 126 | if (!core->rpm_enabled) |
9a34b453 MS |
127 | return; |
128 | ||
129 | pm_runtime_put_sync(core->dev); | |
130 | } | |
131 | ||
eab89f69 MT |
132 | /*** locking ***/ |
133 | static void clk_prepare_lock(void) | |
134 | { | |
533ddeb1 MT |
135 | if (!mutex_trylock(&prepare_lock)) { |
136 | if (prepare_owner == current) { | |
137 | prepare_refcnt++; | |
138 | return; | |
139 | } | |
140 | mutex_lock(&prepare_lock); | |
141 | } | |
142 | WARN_ON_ONCE(prepare_owner != NULL); | |
143 | WARN_ON_ONCE(prepare_refcnt != 0); | |
144 | prepare_owner = current; | |
145 | prepare_refcnt = 1; | |
eab89f69 MT |
146 | } |
147 | ||
148 | static void clk_prepare_unlock(void) | |
149 | { | |
533ddeb1 MT |
150 | WARN_ON_ONCE(prepare_owner != current); |
151 | WARN_ON_ONCE(prepare_refcnt == 0); | |
152 | ||
153 | if (--prepare_refcnt) | |
154 | return; | |
155 | prepare_owner = NULL; | |
eab89f69 MT |
156 | mutex_unlock(&prepare_lock); |
157 | } | |
158 | ||
159 | static unsigned long clk_enable_lock(void) | |
a57aa185 | 160 | __acquires(enable_lock) |
eab89f69 MT |
161 | { |
162 | unsigned long flags; | |
533ddeb1 | 163 | |
a12aa8a6 DL |
164 | /* |
165 | * On UP systems, spin_trylock_irqsave() always returns true, even if | |
166 | * we already hold the lock. So, in that case, we rely only on | |
167 | * reference counting. | |
168 | */ | |
169 | if (!IS_ENABLED(CONFIG_SMP) || | |
170 | !spin_trylock_irqsave(&enable_lock, flags)) { | |
533ddeb1 MT |
171 | if (enable_owner == current) { |
172 | enable_refcnt++; | |
a57aa185 | 173 | __acquire(enable_lock); |
a12aa8a6 DL |
174 | if (!IS_ENABLED(CONFIG_SMP)) |
175 | local_save_flags(flags); | |
533ddeb1 MT |
176 | return flags; |
177 | } | |
178 | spin_lock_irqsave(&enable_lock, flags); | |
179 | } | |
180 | WARN_ON_ONCE(enable_owner != NULL); | |
181 | WARN_ON_ONCE(enable_refcnt != 0); | |
182 | enable_owner = current; | |
183 | enable_refcnt = 1; | |
eab89f69 MT |
184 | return flags; |
185 | } | |
186 | ||
187 | static void clk_enable_unlock(unsigned long flags) | |
a57aa185 | 188 | __releases(enable_lock) |
eab89f69 | 189 | { |
533ddeb1 MT |
190 | WARN_ON_ONCE(enable_owner != current); |
191 | WARN_ON_ONCE(enable_refcnt == 0); | |
192 | ||
a57aa185 SB |
193 | if (--enable_refcnt) { |
194 | __release(enable_lock); | |
533ddeb1 | 195 | return; |
a57aa185 | 196 | } |
533ddeb1 | 197 | enable_owner = NULL; |
eab89f69 MT |
198 | spin_unlock_irqrestore(&enable_lock, flags); |
199 | } | |
200 | ||
e55a839a JB |
201 | static bool clk_core_rate_is_protected(struct clk_core *core) |
202 | { | |
203 | return core->protect_count; | |
204 | } | |
205 | ||
4dff95dc SB |
206 | static bool clk_core_is_prepared(struct clk_core *core) |
207 | { | |
9a34b453 MS |
208 | bool ret = false; |
209 | ||
4dff95dc SB |
210 | /* |
211 | * .is_prepared is optional for clocks that can prepare | |
212 | * fall back to software usage counter if it is missing | |
213 | */ | |
214 | if (!core->ops->is_prepared) | |
215 | return core->prepare_count; | |
b2476490 | 216 | |
9a34b453 MS |
217 | if (!clk_pm_runtime_get(core)) { |
218 | ret = core->ops->is_prepared(core->hw); | |
219 | clk_pm_runtime_put(core); | |
220 | } | |
221 | ||
222 | return ret; | |
4dff95dc | 223 | } |
b2476490 | 224 | |
4dff95dc SB |
225 | static bool clk_core_is_enabled(struct clk_core *core) |
226 | { | |
9a34b453 MS |
227 | bool ret = false; |
228 | ||
4dff95dc SB |
229 | /* |
230 | * .is_enabled is only mandatory for clocks that gate | |
231 | * fall back to software usage counter if .is_enabled is missing | |
232 | */ | |
233 | if (!core->ops->is_enabled) | |
234 | return core->enable_count; | |
6b44c854 | 235 | |
9a34b453 MS |
236 | /* |
237 | * Check if clock controller's device is runtime active before | |
238 | * calling .is_enabled callback. If not, assume that clock is | |
239 | * disabled, because we might be called from atomic context, from | |
240 | * which pm_runtime_get() is not allowed. | |
241 | * This function is called mainly from clk_disable_unused_subtree, | |
242 | * which ensures proper runtime pm activation of controller before | |
243 | * taking enable spinlock, but the below check is needed if one tries | |
244 | * to call it from other places. | |
245 | */ | |
24478839 | 246 | if (core->rpm_enabled) { |
9a34b453 MS |
247 | pm_runtime_get_noresume(core->dev); |
248 | if (!pm_runtime_active(core->dev)) { | |
249 | ret = false; | |
250 | goto done; | |
251 | } | |
252 | } | |
253 | ||
254 | ret = core->ops->is_enabled(core->hw); | |
255 | done: | |
24478839 | 256 | if (core->rpm_enabled) |
756efe13 | 257 | pm_runtime_put(core->dev); |
9a34b453 MS |
258 | |
259 | return ret; | |
4dff95dc | 260 | } |
6b44c854 | 261 | |
4dff95dc | 262 | /*** helper functions ***/ |
1af599df | 263 | |
b76281cb | 264 | const char *__clk_get_name(const struct clk *clk) |
1af599df | 265 | { |
4dff95dc | 266 | return !clk ? NULL : clk->core->name; |
1af599df | 267 | } |
4dff95dc | 268 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 269 | |
e7df6f6e | 270 | const char *clk_hw_get_name(const struct clk_hw *hw) |
1a9c069c SB |
271 | { |
272 | return hw->core->name; | |
273 | } | |
274 | EXPORT_SYMBOL_GPL(clk_hw_get_name); | |
275 | ||
4dff95dc SB |
276 | struct clk_hw *__clk_get_hw(struct clk *clk) |
277 | { | |
278 | return !clk ? NULL : clk->core->hw; | |
279 | } | |
280 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 281 | |
e7df6f6e | 282 | unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) |
1a9c069c SB |
283 | { |
284 | return hw->core->num_parents; | |
285 | } | |
286 | EXPORT_SYMBOL_GPL(clk_hw_get_num_parents); | |
287 | ||
e7df6f6e | 288 | struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) |
1a9c069c SB |
289 | { |
290 | return hw->core->parent ? hw->core->parent->hw : NULL; | |
291 | } | |
292 | EXPORT_SYMBOL_GPL(clk_hw_get_parent); | |
293 | ||
4dff95dc SB |
294 | static struct clk_core *__clk_lookup_subtree(const char *name, |
295 | struct clk_core *core) | |
bddca894 | 296 | { |
035a61c3 | 297 | struct clk_core *child; |
4dff95dc | 298 | struct clk_core *ret; |
bddca894 | 299 | |
4dff95dc SB |
300 | if (!strcmp(core->name, name)) |
301 | return core; | |
bddca894 | 302 | |
4dff95dc SB |
303 | hlist_for_each_entry(child, &core->children, child_node) { |
304 | ret = __clk_lookup_subtree(name, child); | |
305 | if (ret) | |
306 | return ret; | |
bddca894 PG |
307 | } |
308 | ||
4dff95dc | 309 | return NULL; |
bddca894 PG |
310 | } |
311 | ||
4dff95dc | 312 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 313 | { |
4dff95dc SB |
314 | struct clk_core *root_clk; |
315 | struct clk_core *ret; | |
bddca894 | 316 | |
4dff95dc SB |
317 | if (!name) |
318 | return NULL; | |
bddca894 | 319 | |
4dff95dc SB |
320 | /* search the 'proper' clk tree first */ |
321 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
322 | ret = __clk_lookup_subtree(name, root_clk); | |
323 | if (ret) | |
324 | return ret; | |
bddca894 PG |
325 | } |
326 | ||
4dff95dc SB |
327 | /* if not found, then search the orphan tree */ |
328 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
329 | ret = __clk_lookup_subtree(name, root_clk); | |
330 | if (ret) | |
331 | return ret; | |
332 | } | |
bddca894 | 333 | |
4dff95dc | 334 | return NULL; |
bddca894 PG |
335 | } |
336 | ||
4f8c6aba SB |
337 | #ifdef CONFIG_OF |
338 | static int of_parse_clkspec(const struct device_node *np, int index, | |
339 | const char *name, struct of_phandle_args *out_args); | |
340 | static struct clk_hw * | |
341 | of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec); | |
342 | #else | |
343 | static inline int of_parse_clkspec(const struct device_node *np, int index, | |
344 | const char *name, | |
345 | struct of_phandle_args *out_args) | |
346 | { | |
347 | return -ENOENT; | |
348 | } | |
349 | static inline struct clk_hw * | |
350 | of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) | |
351 | { | |
352 | return ERR_PTR(-ENOENT); | |
353 | } | |
354 | #endif | |
355 | ||
fc0c209c | 356 | /** |
dde4eff4 | 357 | * clk_core_get - Find the clk_core parent of a clk |
fc0c209c | 358 | * @core: clk to find parent of |
1a079560 | 359 | * @p_index: parent index to search for |
fc0c209c SB |
360 | * |
361 | * This is the preferred method for clk providers to find the parent of a | |
362 | * clk when that parent is external to the clk controller. The parent_names | |
363 | * array is indexed and treated as a local name matching a string in the device | |
dde4eff4 SB |
364 | * node's 'clock-names' property or as the 'con_id' matching the device's |
365 | * dev_name() in a clk_lookup. This allows clk providers to use their own | |
fc0c209c SB |
366 | * namespace instead of looking for a globally unique parent string. |
367 | * | |
368 | * For example the following DT snippet would allow a clock registered by the | |
369 | * clock-controller@c001 that has a clk_init_data::parent_data array | |
370 | * with 'xtal' in the 'name' member to find the clock provided by the | |
371 | * clock-controller@f00abcd without needing to get the globally unique name of | |
372 | * the xtal clk. | |
373 | * | |
374 | * parent: clock-controller@f00abcd { | |
375 | * reg = <0xf00abcd 0xabcd>; | |
376 | * #clock-cells = <0>; | |
377 | * }; | |
378 | * | |
379 | * clock-controller@c001 { | |
380 | * reg = <0xc001 0xf00d>; | |
381 | * clocks = <&parent>; | |
382 | * clock-names = "xtal"; | |
383 | * #clock-cells = <1>; | |
384 | * }; | |
385 | * | |
386 | * Returns: -ENOENT when the provider can't be found or the clk doesn't | |
4f8c6aba SB |
387 | * exist in the provider or the name can't be found in the DT node or |
388 | * in a clkdev lookup. NULL when the provider knows about the clk but it | |
389 | * isn't provided on this system. | |
fc0c209c SB |
390 | * A valid clk_core pointer when the clk can be found in the provider. |
391 | */ | |
1a079560 | 392 | static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index) |
fc0c209c | 393 | { |
1a079560 SB |
394 | const char *name = core->parents[p_index].fw_name; |
395 | int index = core->parents[p_index].index; | |
dde4eff4 SB |
396 | struct clk_hw *hw = ERR_PTR(-ENOENT); |
397 | struct device *dev = core->dev; | |
398 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
fc0c209c | 399 | struct device_node *np = core->of_node; |
4f8c6aba | 400 | struct of_phandle_args clkspec; |
fc0c209c | 401 | |
4f8c6aba SB |
402 | if (np && (name || index >= 0) && |
403 | !of_parse_clkspec(np, index, name, &clkspec)) { | |
404 | hw = of_clk_get_hw_from_clkspec(&clkspec); | |
405 | of_node_put(clkspec.np); | |
406 | } else if (name) { | |
407 | /* | |
408 | * If the DT search above couldn't find the provider fallback to | |
409 | * looking up via clkdev based clk_lookups. | |
410 | */ | |
dde4eff4 | 411 | hw = clk_find_hw(dev_id, name); |
4f8c6aba | 412 | } |
dde4eff4 SB |
413 | |
414 | if (IS_ERR(hw)) | |
fc0c209c SB |
415 | return ERR_CAST(hw); |
416 | ||
417 | return hw->core; | |
418 | } | |
419 | ||
420 | static void clk_core_fill_parent_index(struct clk_core *core, u8 index) | |
421 | { | |
422 | struct clk_parent_map *entry = &core->parents[index]; | |
6a178497 | 423 | struct clk_core *parent; |
fc0c209c SB |
424 | |
425 | if (entry->hw) { | |
426 | parent = entry->hw->core; | |
427 | /* | |
428 | * We have a direct reference but it isn't registered yet? | |
429 | * Orphan it and let clk_reparent() update the orphan status | |
430 | * when the parent is registered. | |
431 | */ | |
432 | if (!parent) | |
433 | parent = ERR_PTR(-EPROBE_DEFER); | |
434 | } else { | |
1a079560 | 435 | parent = clk_core_get(core, index); |
45586c70 | 436 | if (PTR_ERR(parent) == -ENOENT && entry->name) |
fc0c209c SB |
437 | parent = clk_core_lookup(entry->name); |
438 | } | |
439 | ||
440 | /* Only cache it if it's not an error */ | |
441 | if (!IS_ERR(parent)) | |
442 | entry->core = parent; | |
443 | } | |
444 | ||
4dff95dc SB |
445 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
446 | u8 index) | |
bddca894 | 447 | { |
fc0c209c | 448 | if (!core || index >= core->num_parents || !core->parents) |
4dff95dc | 449 | return NULL; |
88cfbef2 | 450 | |
fc0c209c SB |
451 | if (!core->parents[index].core) |
452 | clk_core_fill_parent_index(core, index); | |
88cfbef2 | 453 | |
fc0c209c | 454 | return core->parents[index].core; |
bddca894 PG |
455 | } |
456 | ||
e7df6f6e SB |
457 | struct clk_hw * |
458 | clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) | |
1a9c069c SB |
459 | { |
460 | struct clk_core *parent; | |
461 | ||
462 | parent = clk_core_get_parent_by_index(hw->core, index); | |
463 | ||
464 | return !parent ? NULL : parent->hw; | |
465 | } | |
466 | EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index); | |
467 | ||
4dff95dc SB |
468 | unsigned int __clk_get_enable_count(struct clk *clk) |
469 | { | |
470 | return !clk ? 0 : clk->core->enable_count; | |
471 | } | |
b2476490 | 472 | |
4dff95dc SB |
473 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
474 | { | |
73d4f945 SB |
475 | if (!core) |
476 | return 0; | |
c646cbf1 | 477 | |
73d4f945 SB |
478 | if (!core->num_parents || core->parent) |
479 | return core->rate; | |
b2476490 | 480 | |
73d4f945 SB |
481 | /* |
482 | * Clk must have a parent because num_parents > 0 but the parent isn't | |
483 | * known yet. Best to return 0 as the rate of this clk until we can | |
484 | * properly recalc the rate based on the parent's rate. | |
485 | */ | |
486 | return 0; | |
b2476490 MT |
487 | } |
488 | ||
e7df6f6e | 489 | unsigned long clk_hw_get_rate(const struct clk_hw *hw) |
1a9c069c SB |
490 | { |
491 | return clk_core_get_rate_nolock(hw->core); | |
492 | } | |
493 | EXPORT_SYMBOL_GPL(clk_hw_get_rate); | |
494 | ||
0daa376d | 495 | static unsigned long clk_core_get_accuracy_no_lock(struct clk_core *core) |
4dff95dc SB |
496 | { |
497 | if (!core) | |
498 | return 0; | |
b2476490 | 499 | |
4dff95dc | 500 | return core->accuracy; |
b2476490 MT |
501 | } |
502 | ||
e7df6f6e | 503 | unsigned long clk_hw_get_flags(const struct clk_hw *hw) |
1a9c069c SB |
504 | { |
505 | return hw->core->flags; | |
506 | } | |
507 | EXPORT_SYMBOL_GPL(clk_hw_get_flags); | |
508 | ||
e7df6f6e | 509 | bool clk_hw_is_prepared(const struct clk_hw *hw) |
1a9c069c SB |
510 | { |
511 | return clk_core_is_prepared(hw->core); | |
512 | } | |
12aa377b | 513 | EXPORT_SYMBOL_GPL(clk_hw_is_prepared); |
1a9c069c | 514 | |
e55a839a JB |
515 | bool clk_hw_rate_is_protected(const struct clk_hw *hw) |
516 | { | |
517 | return clk_core_rate_is_protected(hw->core); | |
518 | } | |
12aa377b | 519 | EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected); |
e55a839a | 520 | |
be68bf88 JE |
521 | bool clk_hw_is_enabled(const struct clk_hw *hw) |
522 | { | |
523 | return clk_core_is_enabled(hw->core); | |
524 | } | |
12aa377b | 525 | EXPORT_SYMBOL_GPL(clk_hw_is_enabled); |
be68bf88 | 526 | |
4dff95dc | 527 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 528 | { |
4dff95dc SB |
529 | if (!clk) |
530 | return false; | |
b2476490 | 531 | |
4dff95dc SB |
532 | return clk_core_is_enabled(clk->core); |
533 | } | |
534 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 535 | |
4dff95dc SB |
536 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
537 | unsigned long best, unsigned long flags) | |
538 | { | |
539 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
540 | return abs(now - rate) < abs(best - rate); | |
1af599df | 541 | |
4dff95dc SB |
542 | return now <= rate && now > best; |
543 | } | |
bddca894 | 544 | |
4ad69b80 JB |
545 | int clk_mux_determine_rate_flags(struct clk_hw *hw, |
546 | struct clk_rate_request *req, | |
547 | unsigned long flags) | |
4dff95dc SB |
548 | { |
549 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
0817b62c BB |
550 | int i, num_parents, ret; |
551 | unsigned long best = 0; | |
552 | struct clk_rate_request parent_req = *req; | |
b2476490 | 553 | |
4dff95dc SB |
554 | /* if NO_REPARENT flag set, pass through to current parent */ |
555 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
556 | parent = core->parent; | |
0817b62c BB |
557 | if (core->flags & CLK_SET_RATE_PARENT) { |
558 | ret = __clk_determine_rate(parent ? parent->hw : NULL, | |
559 | &parent_req); | |
560 | if (ret) | |
561 | return ret; | |
562 | ||
563 | best = parent_req.rate; | |
564 | } else if (parent) { | |
4dff95dc | 565 | best = clk_core_get_rate_nolock(parent); |
0817b62c | 566 | } else { |
4dff95dc | 567 | best = clk_core_get_rate_nolock(core); |
0817b62c BB |
568 | } |
569 | ||
4dff95dc SB |
570 | goto out; |
571 | } | |
b2476490 | 572 | |
4dff95dc SB |
573 | /* find the parent that can provide the fastest rate <= rate */ |
574 | num_parents = core->num_parents; | |
575 | for (i = 0; i < num_parents; i++) { | |
576 | parent = clk_core_get_parent_by_index(core, i); | |
577 | if (!parent) | |
578 | continue; | |
0817b62c BB |
579 | |
580 | if (core->flags & CLK_SET_RATE_PARENT) { | |
581 | parent_req = *req; | |
582 | ret = __clk_determine_rate(parent->hw, &parent_req); | |
583 | if (ret) | |
584 | continue; | |
585 | } else { | |
586 | parent_req.rate = clk_core_get_rate_nolock(parent); | |
587 | } | |
588 | ||
589 | if (mux_is_better_rate(req->rate, parent_req.rate, | |
590 | best, flags)) { | |
4dff95dc | 591 | best_parent = parent; |
0817b62c | 592 | best = parent_req.rate; |
4dff95dc SB |
593 | } |
594 | } | |
b2476490 | 595 | |
57d866e6 BB |
596 | if (!best_parent) |
597 | return -EINVAL; | |
598 | ||
4dff95dc SB |
599 | out: |
600 | if (best_parent) | |
0817b62c BB |
601 | req->best_parent_hw = best_parent->hw; |
602 | req->best_parent_rate = best; | |
603 | req->rate = best; | |
b2476490 | 604 | |
0817b62c | 605 | return 0; |
b33d212f | 606 | } |
4ad69b80 | 607 | EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags); |
4dff95dc SB |
608 | |
609 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 610 | { |
4dff95dc SB |
611 | struct clk_core *core = clk_core_lookup(name); |
612 | ||
613 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 614 | } |
b2476490 | 615 | |
4dff95dc SB |
616 | static void clk_core_get_boundaries(struct clk_core *core, |
617 | unsigned long *min_rate, | |
618 | unsigned long *max_rate) | |
1c155b3d | 619 | { |
4dff95dc | 620 | struct clk *clk_user; |
1c155b3d | 621 | |
9f776722 LC |
622 | lockdep_assert_held(&prepare_lock); |
623 | ||
9783c0d9 SB |
624 | *min_rate = core->min_rate; |
625 | *max_rate = core->max_rate; | |
496eadf8 | 626 | |
4dff95dc SB |
627 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
628 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 629 | |
4dff95dc SB |
630 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
631 | *max_rate = min(*max_rate, clk_user->max_rate); | |
632 | } | |
1c155b3d | 633 | |
9783c0d9 SB |
634 | void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, |
635 | unsigned long max_rate) | |
636 | { | |
637 | hw->core->min_rate = min_rate; | |
638 | hw->core->max_rate = max_rate; | |
639 | } | |
640 | EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); | |
641 | ||
4dff95dc | 642 | /* |
777c1a40 SB |
643 | * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk |
644 | * @hw: mux type clk to determine rate on | |
645 | * @req: rate request, also used to return preferred parent and frequencies | |
646 | * | |
4dff95dc SB |
647 | * Helper for finding best parent to provide a given frequency. This can be used |
648 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
649 | * complex clock that may combine a mux with other operations. | |
777c1a40 SB |
650 | * |
651 | * Returns: 0 on success, -EERROR value on error | |
4dff95dc | 652 | */ |
0817b62c BB |
653 | int __clk_mux_determine_rate(struct clk_hw *hw, |
654 | struct clk_rate_request *req) | |
4dff95dc | 655 | { |
0817b62c | 656 | return clk_mux_determine_rate_flags(hw, req, 0); |
1c155b3d | 657 | } |
4dff95dc | 658 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 659 | |
0817b62c BB |
660 | int __clk_mux_determine_rate_closest(struct clk_hw *hw, |
661 | struct clk_rate_request *req) | |
b2476490 | 662 | { |
0817b62c | 663 | return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); |
4dff95dc SB |
664 | } |
665 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 666 | |
4dff95dc | 667 | /*** clk api ***/ |
496eadf8 | 668 | |
e55a839a JB |
669 | static void clk_core_rate_unprotect(struct clk_core *core) |
670 | { | |
671 | lockdep_assert_held(&prepare_lock); | |
672 | ||
673 | if (!core) | |
674 | return; | |
675 | ||
ab525dcc FE |
676 | if (WARN(core->protect_count == 0, |
677 | "%s already unprotected\n", core->name)) | |
e55a839a JB |
678 | return; |
679 | ||
680 | if (--core->protect_count > 0) | |
681 | return; | |
682 | ||
683 | clk_core_rate_unprotect(core->parent); | |
684 | } | |
685 | ||
686 | static int clk_core_rate_nuke_protect(struct clk_core *core) | |
687 | { | |
688 | int ret; | |
689 | ||
690 | lockdep_assert_held(&prepare_lock); | |
691 | ||
692 | if (!core) | |
693 | return -EINVAL; | |
694 | ||
695 | if (core->protect_count == 0) | |
696 | return 0; | |
697 | ||
698 | ret = core->protect_count; | |
699 | core->protect_count = 1; | |
700 | clk_core_rate_unprotect(core); | |
701 | ||
702 | return ret; | |
703 | } | |
704 | ||
55e9b8b7 JB |
705 | /** |
706 | * clk_rate_exclusive_put - release exclusivity over clock rate control | |
707 | * @clk: the clk over which the exclusivity is released | |
708 | * | |
709 | * clk_rate_exclusive_put() completes a critical section during which a clock | |
710 | * consumer cannot tolerate any other consumer making any operation on the | |
711 | * clock which could result in a rate change or rate glitch. Exclusive clocks | |
712 | * cannot have their rate changed, either directly or indirectly due to changes | |
713 | * further up the parent chain of clocks. As a result, clocks up parent chain | |
714 | * also get under exclusive control of the calling consumer. | |
715 | * | |
716 | * If exlusivity is claimed more than once on clock, even by the same consumer, | |
717 | * the rate effectively gets locked as exclusivity can't be preempted. | |
718 | * | |
719 | * Calls to clk_rate_exclusive_put() must be balanced with calls to | |
720 | * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return | |
721 | * error status. | |
722 | */ | |
723 | void clk_rate_exclusive_put(struct clk *clk) | |
724 | { | |
725 | if (!clk) | |
726 | return; | |
727 | ||
728 | clk_prepare_lock(); | |
729 | ||
730 | /* | |
731 | * if there is something wrong with this consumer protect count, stop | |
732 | * here before messing with the provider | |
733 | */ | |
734 | if (WARN_ON(clk->exclusive_count <= 0)) | |
735 | goto out; | |
736 | ||
737 | clk_core_rate_unprotect(clk->core); | |
738 | clk->exclusive_count--; | |
739 | out: | |
740 | clk_prepare_unlock(); | |
741 | } | |
742 | EXPORT_SYMBOL_GPL(clk_rate_exclusive_put); | |
743 | ||
e55a839a JB |
744 | static void clk_core_rate_protect(struct clk_core *core) |
745 | { | |
746 | lockdep_assert_held(&prepare_lock); | |
747 | ||
748 | if (!core) | |
749 | return; | |
750 | ||
751 | if (core->protect_count == 0) | |
752 | clk_core_rate_protect(core->parent); | |
753 | ||
754 | core->protect_count++; | |
755 | } | |
756 | ||
757 | static void clk_core_rate_restore_protect(struct clk_core *core, int count) | |
758 | { | |
759 | lockdep_assert_held(&prepare_lock); | |
760 | ||
761 | if (!core) | |
762 | return; | |
763 | ||
764 | if (count == 0) | |
765 | return; | |
766 | ||
767 | clk_core_rate_protect(core); | |
768 | core->protect_count = count; | |
769 | } | |
770 | ||
55e9b8b7 JB |
771 | /** |
772 | * clk_rate_exclusive_get - get exclusivity over the clk rate control | |
773 | * @clk: the clk over which the exclusity of rate control is requested | |
774 | * | |
a37a5a9d | 775 | * clk_rate_exclusive_get() begins a critical section during which a clock |
55e9b8b7 JB |
776 | * consumer cannot tolerate any other consumer making any operation on the |
777 | * clock which could result in a rate change or rate glitch. Exclusive clocks | |
778 | * cannot have their rate changed, either directly or indirectly due to changes | |
779 | * further up the parent chain of clocks. As a result, clocks up parent chain | |
780 | * also get under exclusive control of the calling consumer. | |
781 | * | |
782 | * If exlusivity is claimed more than once on clock, even by the same consumer, | |
783 | * the rate effectively gets locked as exclusivity can't be preempted. | |
784 | * | |
785 | * Calls to clk_rate_exclusive_get() should be balanced with calls to | |
786 | * clk_rate_exclusive_put(). Calls to this function may sleep. | |
787 | * Returns 0 on success, -EERROR otherwise | |
788 | */ | |
789 | int clk_rate_exclusive_get(struct clk *clk) | |
790 | { | |
791 | if (!clk) | |
792 | return 0; | |
793 | ||
794 | clk_prepare_lock(); | |
795 | clk_core_rate_protect(clk->core); | |
796 | clk->exclusive_count++; | |
797 | clk_prepare_unlock(); | |
798 | ||
799 | return 0; | |
800 | } | |
801 | EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); | |
802 | ||
4dff95dc SB |
803 | static void clk_core_unprepare(struct clk_core *core) |
804 | { | |
a6334725 SB |
805 | lockdep_assert_held(&prepare_lock); |
806 | ||
4dff95dc SB |
807 | if (!core) |
808 | return; | |
b2476490 | 809 | |
ab525dcc FE |
810 | if (WARN(core->prepare_count == 0, |
811 | "%s already unprepared\n", core->name)) | |
4dff95dc | 812 | return; |
b2476490 | 813 | |
ab525dcc FE |
814 | if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL, |
815 | "Unpreparing critical %s\n", core->name)) | |
2e20fbf5 LJ |
816 | return; |
817 | ||
9461f7b3 JB |
818 | if (core->flags & CLK_SET_RATE_GATE) |
819 | clk_core_rate_unprotect(core); | |
820 | ||
4dff95dc SB |
821 | if (--core->prepare_count > 0) |
822 | return; | |
b2476490 | 823 | |
ab525dcc | 824 | WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name); |
b2476490 | 825 | |
4dff95dc | 826 | trace_clk_unprepare(core); |
b2476490 | 827 | |
4dff95dc SB |
828 | if (core->ops->unprepare) |
829 | core->ops->unprepare(core->hw); | |
830 | ||
9a34b453 MS |
831 | clk_pm_runtime_put(core); |
832 | ||
4dff95dc SB |
833 | trace_clk_unprepare_complete(core); |
834 | clk_core_unprepare(core->parent); | |
b2476490 MT |
835 | } |
836 | ||
a6adc30b DA |
837 | static void clk_core_unprepare_lock(struct clk_core *core) |
838 | { | |
839 | clk_prepare_lock(); | |
840 | clk_core_unprepare(core); | |
841 | clk_prepare_unlock(); | |
842 | } | |
843 | ||
4dff95dc SB |
844 | /** |
845 | * clk_unprepare - undo preparation of a clock source | |
846 | * @clk: the clk being unprepared | |
847 | * | |
848 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
849 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
850 | * if the operation may sleep. One example is a clk which is accessed over | |
851 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
852 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
853 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
854 | */ | |
855 | void clk_unprepare(struct clk *clk) | |
1e435256 | 856 | { |
4dff95dc SB |
857 | if (IS_ERR_OR_NULL(clk)) |
858 | return; | |
859 | ||
a6adc30b | 860 | clk_core_unprepare_lock(clk->core); |
1e435256 | 861 | } |
4dff95dc | 862 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 863 | |
4dff95dc | 864 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 865 | { |
4dff95dc | 866 | int ret = 0; |
b2476490 | 867 | |
a6334725 SB |
868 | lockdep_assert_held(&prepare_lock); |
869 | ||
4dff95dc | 870 | if (!core) |
1e435256 | 871 | return 0; |
1e435256 | 872 | |
4dff95dc | 873 | if (core->prepare_count == 0) { |
9a34b453 | 874 | ret = clk_pm_runtime_get(core); |
4dff95dc SB |
875 | if (ret) |
876 | return ret; | |
b2476490 | 877 | |
9a34b453 MS |
878 | ret = clk_core_prepare(core->parent); |
879 | if (ret) | |
880 | goto runtime_put; | |
881 | ||
4dff95dc | 882 | trace_clk_prepare(core); |
b2476490 | 883 | |
4dff95dc SB |
884 | if (core->ops->prepare) |
885 | ret = core->ops->prepare(core->hw); | |
b2476490 | 886 | |
4dff95dc | 887 | trace_clk_prepare_complete(core); |
1c155b3d | 888 | |
9a34b453 MS |
889 | if (ret) |
890 | goto unprepare; | |
4dff95dc | 891 | } |
1c155b3d | 892 | |
4dff95dc | 893 | core->prepare_count++; |
b2476490 | 894 | |
9461f7b3 JB |
895 | /* |
896 | * CLK_SET_RATE_GATE is a special case of clock protection | |
897 | * Instead of a consumer claiming exclusive rate control, it is | |
898 | * actually the provider which prevents any consumer from making any | |
899 | * operation which could result in a rate change or rate glitch while | |
900 | * the clock is prepared. | |
901 | */ | |
902 | if (core->flags & CLK_SET_RATE_GATE) | |
903 | clk_core_rate_protect(core); | |
904 | ||
b2476490 | 905 | return 0; |
9a34b453 MS |
906 | unprepare: |
907 | clk_core_unprepare(core->parent); | |
908 | runtime_put: | |
909 | clk_pm_runtime_put(core); | |
910 | return ret; | |
b2476490 | 911 | } |
b2476490 | 912 | |
a6adc30b DA |
913 | static int clk_core_prepare_lock(struct clk_core *core) |
914 | { | |
915 | int ret; | |
916 | ||
917 | clk_prepare_lock(); | |
918 | ret = clk_core_prepare(core); | |
919 | clk_prepare_unlock(); | |
920 | ||
921 | return ret; | |
922 | } | |
923 | ||
4dff95dc SB |
924 | /** |
925 | * clk_prepare - prepare a clock source | |
926 | * @clk: the clk being prepared | |
927 | * | |
928 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
929 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
930 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
931 | * the complex case a clk ungate operation may require a fast and a slow part. | |
932 | * It is this reason that clk_prepare and clk_enable are not mutually | |
933 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
934 | * Returns 0 on success, -EERROR otherwise. | |
935 | */ | |
936 | int clk_prepare(struct clk *clk) | |
b2476490 | 937 | { |
4dff95dc SB |
938 | if (!clk) |
939 | return 0; | |
b2476490 | 940 | |
a6adc30b | 941 | return clk_core_prepare_lock(clk->core); |
b2476490 | 942 | } |
4dff95dc | 943 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 944 | |
4dff95dc | 945 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 946 | { |
a6334725 SB |
947 | lockdep_assert_held(&enable_lock); |
948 | ||
4dff95dc SB |
949 | if (!core) |
950 | return; | |
035a61c3 | 951 | |
ab525dcc | 952 | if (WARN(core->enable_count == 0, "%s already disabled\n", core->name)) |
4dff95dc | 953 | return; |
b2476490 | 954 | |
ab525dcc FE |
955 | if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL, |
956 | "Disabling critical %s\n", core->name)) | |
2e20fbf5 LJ |
957 | return; |
958 | ||
4dff95dc SB |
959 | if (--core->enable_count > 0) |
960 | return; | |
035a61c3 | 961 | |
2f87a6ea | 962 | trace_clk_disable_rcuidle(core); |
035a61c3 | 963 | |
4dff95dc SB |
964 | if (core->ops->disable) |
965 | core->ops->disable(core->hw); | |
035a61c3 | 966 | |
2f87a6ea | 967 | trace_clk_disable_complete_rcuidle(core); |
035a61c3 | 968 | |
4dff95dc | 969 | clk_core_disable(core->parent); |
035a61c3 | 970 | } |
7ef3dcc8 | 971 | |
a6adc30b DA |
972 | static void clk_core_disable_lock(struct clk_core *core) |
973 | { | |
974 | unsigned long flags; | |
975 | ||
976 | flags = clk_enable_lock(); | |
977 | clk_core_disable(core); | |
978 | clk_enable_unlock(flags); | |
979 | } | |
980 | ||
4dff95dc SB |
981 | /** |
982 | * clk_disable - gate a clock | |
983 | * @clk: the clk being gated | |
984 | * | |
985 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
986 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
987 | * clk if the operation is fast and will never sleep. One example is a | |
988 | * SoC-internal clk which is controlled via simple register writes. In the | |
989 | * complex case a clk gate operation may require a fast and a slow part. It is | |
990 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
991 | * In fact clk_disable must be called before clk_unprepare. | |
992 | */ | |
993 | void clk_disable(struct clk *clk) | |
b2476490 | 994 | { |
4dff95dc SB |
995 | if (IS_ERR_OR_NULL(clk)) |
996 | return; | |
997 | ||
a6adc30b | 998 | clk_core_disable_lock(clk->core); |
b2476490 | 999 | } |
4dff95dc | 1000 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 1001 | |
4dff95dc | 1002 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 1003 | { |
4dff95dc | 1004 | int ret = 0; |
b2476490 | 1005 | |
a6334725 SB |
1006 | lockdep_assert_held(&enable_lock); |
1007 | ||
4dff95dc SB |
1008 | if (!core) |
1009 | return 0; | |
b2476490 | 1010 | |
ab525dcc FE |
1011 | if (WARN(core->prepare_count == 0, |
1012 | "Enabling unprepared %s\n", core->name)) | |
4dff95dc | 1013 | return -ESHUTDOWN; |
b2476490 | 1014 | |
4dff95dc SB |
1015 | if (core->enable_count == 0) { |
1016 | ret = clk_core_enable(core->parent); | |
b2476490 | 1017 | |
4dff95dc SB |
1018 | if (ret) |
1019 | return ret; | |
b2476490 | 1020 | |
f17a0dd1 | 1021 | trace_clk_enable_rcuidle(core); |
035a61c3 | 1022 | |
4dff95dc SB |
1023 | if (core->ops->enable) |
1024 | ret = core->ops->enable(core->hw); | |
035a61c3 | 1025 | |
f17a0dd1 | 1026 | trace_clk_enable_complete_rcuidle(core); |
4dff95dc SB |
1027 | |
1028 | if (ret) { | |
1029 | clk_core_disable(core->parent); | |
1030 | return ret; | |
1031 | } | |
1032 | } | |
1033 | ||
1034 | core->enable_count++; | |
1035 | return 0; | |
035a61c3 | 1036 | } |
b2476490 | 1037 | |
a6adc30b DA |
1038 | static int clk_core_enable_lock(struct clk_core *core) |
1039 | { | |
1040 | unsigned long flags; | |
1041 | int ret; | |
1042 | ||
1043 | flags = clk_enable_lock(); | |
1044 | ret = clk_core_enable(core); | |
1045 | clk_enable_unlock(flags); | |
1046 | ||
1047 | return ret; | |
1048 | } | |
1049 | ||
43536548 K |
1050 | /** |
1051 | * clk_gate_restore_context - restore context for poweroff | |
1052 | * @hw: the clk_hw pointer of clock whose state is to be restored | |
1053 | * | |
1054 | * The clock gate restore context function enables or disables | |
1055 | * the gate clocks based on the enable_count. This is done in cases | |
1056 | * where the clock context is lost and based on the enable_count | |
1057 | * the clock either needs to be enabled/disabled. This | |
1058 | * helps restore the state of gate clocks. | |
1059 | */ | |
1060 | void clk_gate_restore_context(struct clk_hw *hw) | |
1061 | { | |
9be76627 SB |
1062 | struct clk_core *core = hw->core; |
1063 | ||
1064 | if (core->enable_count) | |
1065 | core->ops->enable(hw); | |
43536548 | 1066 | else |
9be76627 | 1067 | core->ops->disable(hw); |
43536548 K |
1068 | } |
1069 | EXPORT_SYMBOL_GPL(clk_gate_restore_context); | |
1070 | ||
9be76627 | 1071 | static int clk_core_save_context(struct clk_core *core) |
8b95d1ce RD |
1072 | { |
1073 | struct clk_core *child; | |
1074 | int ret = 0; | |
1075 | ||
9be76627 SB |
1076 | hlist_for_each_entry(child, &core->children, child_node) { |
1077 | ret = clk_core_save_context(child); | |
8b95d1ce RD |
1078 | if (ret < 0) |
1079 | return ret; | |
1080 | } | |
1081 | ||
9be76627 SB |
1082 | if (core->ops && core->ops->save_context) |
1083 | ret = core->ops->save_context(core->hw); | |
8b95d1ce RD |
1084 | |
1085 | return ret; | |
1086 | } | |
1087 | ||
9be76627 | 1088 | static void clk_core_restore_context(struct clk_core *core) |
8b95d1ce RD |
1089 | { |
1090 | struct clk_core *child; | |
1091 | ||
9be76627 SB |
1092 | if (core->ops && core->ops->restore_context) |
1093 | core->ops->restore_context(core->hw); | |
8b95d1ce | 1094 | |
9be76627 SB |
1095 | hlist_for_each_entry(child, &core->children, child_node) |
1096 | clk_core_restore_context(child); | |
8b95d1ce RD |
1097 | } |
1098 | ||
1099 | /** | |
1100 | * clk_save_context - save clock context for poweroff | |
1101 | * | |
1102 | * Saves the context of the clock register for powerstates in which the | |
1103 | * contents of the registers will be lost. Occurs deep within the suspend | |
1104 | * code. Returns 0 on success. | |
1105 | */ | |
1106 | int clk_save_context(void) | |
1107 | { | |
1108 | struct clk_core *clk; | |
1109 | int ret; | |
1110 | ||
1111 | hlist_for_each_entry(clk, &clk_root_list, child_node) { | |
9be76627 | 1112 | ret = clk_core_save_context(clk); |
8b95d1ce RD |
1113 | if (ret < 0) |
1114 | return ret; | |
1115 | } | |
1116 | ||
1117 | hlist_for_each_entry(clk, &clk_orphan_list, child_node) { | |
9be76627 | 1118 | ret = clk_core_save_context(clk); |
8b95d1ce RD |
1119 | if (ret < 0) |
1120 | return ret; | |
1121 | } | |
1122 | ||
1123 | return 0; | |
1124 | } | |
1125 | EXPORT_SYMBOL_GPL(clk_save_context); | |
1126 | ||
1127 | /** | |
1128 | * clk_restore_context - restore clock context after poweroff | |
1129 | * | |
1130 | * Restore the saved clock context upon resume. | |
1131 | * | |
1132 | */ | |
1133 | void clk_restore_context(void) | |
1134 | { | |
9be76627 | 1135 | struct clk_core *core; |
8b95d1ce | 1136 | |
9be76627 SB |
1137 | hlist_for_each_entry(core, &clk_root_list, child_node) |
1138 | clk_core_restore_context(core); | |
8b95d1ce | 1139 | |
9be76627 SB |
1140 | hlist_for_each_entry(core, &clk_orphan_list, child_node) |
1141 | clk_core_restore_context(core); | |
8b95d1ce RD |
1142 | } |
1143 | EXPORT_SYMBOL_GPL(clk_restore_context); | |
1144 | ||
4dff95dc SB |
1145 | /** |
1146 | * clk_enable - ungate a clock | |
1147 | * @clk: the clk being ungated | |
1148 | * | |
1149 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
1150 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
1151 | * if the operation will never sleep. One example is a SoC-internal clk which | |
1152 | * is controlled via simple register writes. In the complex case a clk ungate | |
1153 | * operation may require a fast and a slow part. It is this reason that | |
1154 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
1155 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
1156 | * otherwise. | |
1157 | */ | |
1158 | int clk_enable(struct clk *clk) | |
5279fc40 | 1159 | { |
4dff95dc | 1160 | if (!clk) |
5279fc40 BB |
1161 | return 0; |
1162 | ||
a6adc30b DA |
1163 | return clk_core_enable_lock(clk->core); |
1164 | } | |
1165 | EXPORT_SYMBOL_GPL(clk_enable); | |
1166 | ||
1167 | static int clk_core_prepare_enable(struct clk_core *core) | |
1168 | { | |
1169 | int ret; | |
1170 | ||
1171 | ret = clk_core_prepare_lock(core); | |
1172 | if (ret) | |
1173 | return ret; | |
1174 | ||
1175 | ret = clk_core_enable_lock(core); | |
1176 | if (ret) | |
1177 | clk_core_unprepare_lock(core); | |
5279fc40 | 1178 | |
4dff95dc | 1179 | return ret; |
b2476490 | 1180 | } |
a6adc30b DA |
1181 | |
1182 | static void clk_core_disable_unprepare(struct clk_core *core) | |
1183 | { | |
1184 | clk_core_disable_lock(core); | |
1185 | clk_core_unprepare_lock(core); | |
1186 | } | |
b2476490 | 1187 | |
564f86d3 | 1188 | static void __init clk_unprepare_unused_subtree(struct clk_core *core) |
7ec986ef DA |
1189 | { |
1190 | struct clk_core *child; | |
1191 | ||
1192 | lockdep_assert_held(&prepare_lock); | |
1193 | ||
1194 | hlist_for_each_entry(child, &core->children, child_node) | |
1195 | clk_unprepare_unused_subtree(child); | |
1196 | ||
1197 | if (core->prepare_count) | |
1198 | return; | |
1199 | ||
1200 | if (core->flags & CLK_IGNORE_UNUSED) | |
1201 | return; | |
1202 | ||
9a34b453 MS |
1203 | if (clk_pm_runtime_get(core)) |
1204 | return; | |
1205 | ||
7ec986ef DA |
1206 | if (clk_core_is_prepared(core)) { |
1207 | trace_clk_unprepare(core); | |
1208 | if (core->ops->unprepare_unused) | |
1209 | core->ops->unprepare_unused(core->hw); | |
1210 | else if (core->ops->unprepare) | |
1211 | core->ops->unprepare(core->hw); | |
1212 | trace_clk_unprepare_complete(core); | |
1213 | } | |
9a34b453 MS |
1214 | |
1215 | clk_pm_runtime_put(core); | |
7ec986ef DA |
1216 | } |
1217 | ||
564f86d3 | 1218 | static void __init clk_disable_unused_subtree(struct clk_core *core) |
7ec986ef DA |
1219 | { |
1220 | struct clk_core *child; | |
1221 | unsigned long flags; | |
1222 | ||
1223 | lockdep_assert_held(&prepare_lock); | |
1224 | ||
1225 | hlist_for_each_entry(child, &core->children, child_node) | |
1226 | clk_disable_unused_subtree(child); | |
1227 | ||
a4b3518d DA |
1228 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
1229 | clk_core_prepare_enable(core->parent); | |
1230 | ||
9a34b453 MS |
1231 | if (clk_pm_runtime_get(core)) |
1232 | goto unprepare_out; | |
1233 | ||
7ec986ef DA |
1234 | flags = clk_enable_lock(); |
1235 | ||
1236 | if (core->enable_count) | |
1237 | goto unlock_out; | |
1238 | ||
1239 | if (core->flags & CLK_IGNORE_UNUSED) | |
1240 | goto unlock_out; | |
1241 | ||
1242 | /* | |
1243 | * some gate clocks have special needs during the disable-unused | |
1244 | * sequence. call .disable_unused if available, otherwise fall | |
1245 | * back to .disable | |
1246 | */ | |
1247 | if (clk_core_is_enabled(core)) { | |
1248 | trace_clk_disable(core); | |
1249 | if (core->ops->disable_unused) | |
1250 | core->ops->disable_unused(core->hw); | |
1251 | else if (core->ops->disable) | |
1252 | core->ops->disable(core->hw); | |
1253 | trace_clk_disable_complete(core); | |
1254 | } | |
1255 | ||
1256 | unlock_out: | |
1257 | clk_enable_unlock(flags); | |
9a34b453 MS |
1258 | clk_pm_runtime_put(core); |
1259 | unprepare_out: | |
a4b3518d DA |
1260 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
1261 | clk_core_disable_unprepare(core->parent); | |
7ec986ef DA |
1262 | } |
1263 | ||
564f86d3 | 1264 | static bool clk_ignore_unused __initdata; |
7ec986ef DA |
1265 | static int __init clk_ignore_unused_setup(char *__unused) |
1266 | { | |
1267 | clk_ignore_unused = true; | |
1268 | return 1; | |
1269 | } | |
1270 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
1271 | ||
564f86d3 | 1272 | static int __init clk_disable_unused(void) |
7ec986ef DA |
1273 | { |
1274 | struct clk_core *core; | |
1275 | ||
1276 | if (clk_ignore_unused) { | |
1277 | pr_warn("clk: Not disabling unused clocks\n"); | |
1278 | return 0; | |
1279 | } | |
1280 | ||
1281 | clk_prepare_lock(); | |
1282 | ||
1283 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
1284 | clk_disable_unused_subtree(core); | |
1285 | ||
1286 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
1287 | clk_disable_unused_subtree(core); | |
1288 | ||
1289 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
1290 | clk_unprepare_unused_subtree(core); | |
1291 | ||
1292 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
1293 | clk_unprepare_unused_subtree(core); | |
1294 | ||
1295 | clk_prepare_unlock(); | |
1296 | ||
1297 | return 0; | |
1298 | } | |
1299 | late_initcall_sync(clk_disable_unused); | |
1300 | ||
0f6cc2b8 JB |
1301 | static int clk_core_determine_round_nolock(struct clk_core *core, |
1302 | struct clk_rate_request *req) | |
3d6ee287 | 1303 | { |
0817b62c | 1304 | long rate; |
4dff95dc SB |
1305 | |
1306 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 1307 | |
d6968fca | 1308 | if (!core) |
4dff95dc | 1309 | return 0; |
3d6ee287 | 1310 | |
55e9b8b7 JB |
1311 | /* |
1312 | * At this point, core protection will be disabled if | |
1313 | * - if the provider is not protected at all | |
1314 | * - if the calling consumer is the only one which has exclusivity | |
1315 | * over the provider | |
1316 | */ | |
e55a839a JB |
1317 | if (clk_core_rate_is_protected(core)) { |
1318 | req->rate = core->rate; | |
1319 | } else if (core->ops->determine_rate) { | |
0817b62c BB |
1320 | return core->ops->determine_rate(core->hw, req); |
1321 | } else if (core->ops->round_rate) { | |
1322 | rate = core->ops->round_rate(core->hw, req->rate, | |
1323 | &req->best_parent_rate); | |
1324 | if (rate < 0) | |
1325 | return rate; | |
1326 | ||
1327 | req->rate = rate; | |
0817b62c | 1328 | } else { |
0f6cc2b8 | 1329 | return -EINVAL; |
0817b62c BB |
1330 | } |
1331 | ||
1332 | return 0; | |
3d6ee287 UH |
1333 | } |
1334 | ||
0f6cc2b8 JB |
1335 | static void clk_core_init_rate_req(struct clk_core * const core, |
1336 | struct clk_rate_request *req) | |
1337 | { | |
1338 | struct clk_core *parent; | |
1339 | ||
1340 | if (WARN_ON(!core || !req)) | |
1341 | return; | |
1342 | ||
1343 | parent = core->parent; | |
1344 | if (parent) { | |
1345 | req->best_parent_hw = parent->hw; | |
1346 | req->best_parent_rate = parent->rate; | |
1347 | } else { | |
1348 | req->best_parent_hw = NULL; | |
1349 | req->best_parent_rate = 0; | |
0817b62c | 1350 | } |
0f6cc2b8 | 1351 | } |
0817b62c | 1352 | |
0f6cc2b8 JB |
1353 | static bool clk_core_can_round(struct clk_core * const core) |
1354 | { | |
eef1f1b6 | 1355 | return core->ops->determine_rate || core->ops->round_rate; |
0f6cc2b8 JB |
1356 | } |
1357 | ||
1358 | static int clk_core_round_rate_nolock(struct clk_core *core, | |
1359 | struct clk_rate_request *req) | |
1360 | { | |
1361 | lockdep_assert_held(&prepare_lock); | |
1362 | ||
04bf9ab3 JB |
1363 | if (!core) { |
1364 | req->rate = 0; | |
0f6cc2b8 | 1365 | return 0; |
04bf9ab3 | 1366 | } |
0817b62c | 1367 | |
0f6cc2b8 JB |
1368 | clk_core_init_rate_req(core, req); |
1369 | ||
1370 | if (clk_core_can_round(core)) | |
1371 | return clk_core_determine_round_nolock(core, req); | |
1372 | else if (core->flags & CLK_SET_RATE_PARENT) | |
1373 | return clk_core_round_rate_nolock(core->parent, req); | |
1374 | ||
1375 | req->rate = core->rate; | |
0817b62c | 1376 | return 0; |
3d6ee287 UH |
1377 | } |
1378 | ||
4dff95dc SB |
1379 | /** |
1380 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
1381 | * @hw: determine the rate of this clock | |
2d5b520c | 1382 | * @req: target rate request |
4dff95dc | 1383 | * |
6e5ab41b | 1384 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc | 1385 | */ |
0817b62c | 1386 | int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) |
035a61c3 | 1387 | { |
0817b62c BB |
1388 | if (!hw) { |
1389 | req->rate = 0; | |
4dff95dc | 1390 | return 0; |
0817b62c | 1391 | } |
035a61c3 | 1392 | |
0817b62c | 1393 | return clk_core_round_rate_nolock(hw->core, req); |
035a61c3 | 1394 | } |
4dff95dc | 1395 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 1396 | |
e8c849c2 SM |
1397 | /** |
1398 | * clk_hw_round_rate() - round the given rate for a hw clk | |
1399 | * @hw: the hw clk for which we are rounding a rate | |
1400 | * @rate: the rate which is to be rounded | |
1401 | * | |
1402 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
1403 | * use. | |
1404 | * | |
1405 | * Context: prepare_lock must be held. | |
1406 | * For clk providers to call from within clk_ops such as .round_rate, | |
1407 | * .determine_rate. | |
1408 | * | |
1409 | * Return: returns rounded rate of hw clk if clk supports round_rate operation | |
1410 | * else returns the parent rate. | |
1411 | */ | |
1a9c069c SB |
1412 | unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) |
1413 | { | |
1414 | int ret; | |
1415 | struct clk_rate_request req; | |
1416 | ||
1417 | clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate); | |
1418 | req.rate = rate; | |
1419 | ||
1420 | ret = clk_core_round_rate_nolock(hw->core, &req); | |
1421 | if (ret) | |
1422 | return 0; | |
1423 | ||
1424 | return req.rate; | |
1425 | } | |
1426 | EXPORT_SYMBOL_GPL(clk_hw_round_rate); | |
1427 | ||
4dff95dc SB |
1428 | /** |
1429 | * clk_round_rate - round the given rate for a clk | |
1430 | * @clk: the clk for which we are rounding a rate | |
1431 | * @rate: the rate which is to be rounded | |
1432 | * | |
1433 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
1434 | * use which is then returned. If clk doesn't support round_rate operation | |
1435 | * then the parent rate is returned. | |
1436 | */ | |
1437 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 1438 | { |
fc4a05d4 SB |
1439 | struct clk_rate_request req; |
1440 | int ret; | |
4dff95dc | 1441 | |
035a61c3 | 1442 | if (!clk) |
4dff95dc | 1443 | return 0; |
035a61c3 | 1444 | |
4dff95dc | 1445 | clk_prepare_lock(); |
fc4a05d4 | 1446 | |
55e9b8b7 JB |
1447 | if (clk->exclusive_count) |
1448 | clk_core_rate_unprotect(clk->core); | |
1449 | ||
fc4a05d4 SB |
1450 | clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate); |
1451 | req.rate = rate; | |
1452 | ||
1453 | ret = clk_core_round_rate_nolock(clk->core, &req); | |
55e9b8b7 JB |
1454 | |
1455 | if (clk->exclusive_count) | |
1456 | clk_core_rate_protect(clk->core); | |
1457 | ||
4dff95dc SB |
1458 | clk_prepare_unlock(); |
1459 | ||
fc4a05d4 SB |
1460 | if (ret) |
1461 | return ret; | |
1462 | ||
1463 | return req.rate; | |
035a61c3 | 1464 | } |
4dff95dc | 1465 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 1466 | |
4dff95dc SB |
1467 | /** |
1468 | * __clk_notify - call clk notifier chain | |
1469 | * @core: clk that is changing rate | |
1470 | * @msg: clk notifier type (see include/linux/clk.h) | |
1471 | * @old_rate: old clk rate | |
1472 | * @new_rate: new clk rate | |
1473 | * | |
1474 | * Triggers a notifier call chain on the clk rate-change notification | |
1475 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
1476 | * and current rates to the notifier callback. Intended to be called by | |
1477 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
1478 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
1479 | * a driver returns that. | |
1480 | */ | |
1481 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
1482 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 1483 | { |
4dff95dc SB |
1484 | struct clk_notifier *cn; |
1485 | struct clk_notifier_data cnd; | |
1486 | int ret = NOTIFY_DONE; | |
b2476490 | 1487 | |
4dff95dc SB |
1488 | cnd.old_rate = old_rate; |
1489 | cnd.new_rate = new_rate; | |
b2476490 | 1490 | |
4dff95dc SB |
1491 | list_for_each_entry(cn, &clk_notifier_list, node) { |
1492 | if (cn->clk->core == core) { | |
1493 | cnd.clk = cn->clk; | |
1494 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
1495 | &cnd); | |
17c34c56 PDS |
1496 | if (ret & NOTIFY_STOP_MASK) |
1497 | return ret; | |
4dff95dc | 1498 | } |
b2476490 MT |
1499 | } |
1500 | ||
4dff95dc | 1501 | return ret; |
b2476490 MT |
1502 | } |
1503 | ||
4dff95dc SB |
1504 | /** |
1505 | * __clk_recalc_accuracies | |
1506 | * @core: first clk in the subtree | |
1507 | * | |
1508 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
1509 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 1510 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 1511 | * parent. |
4dff95dc SB |
1512 | */ |
1513 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 1514 | { |
4dff95dc SB |
1515 | unsigned long parent_accuracy = 0; |
1516 | struct clk_core *child; | |
b2476490 | 1517 | |
4dff95dc | 1518 | lockdep_assert_held(&prepare_lock); |
b2476490 | 1519 | |
4dff95dc SB |
1520 | if (core->parent) |
1521 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 1522 | |
4dff95dc SB |
1523 | if (core->ops->recalc_accuracy) |
1524 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
1525 | parent_accuracy); | |
1526 | else | |
1527 | core->accuracy = parent_accuracy; | |
b2476490 | 1528 | |
4dff95dc SB |
1529 | hlist_for_each_entry(child, &core->children, child_node) |
1530 | __clk_recalc_accuracies(child); | |
b2476490 MT |
1531 | } |
1532 | ||
0daa376d | 1533 | static long clk_core_get_accuracy_recalc(struct clk_core *core) |
e366fdd7 | 1534 | { |
4dff95dc SB |
1535 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) |
1536 | __clk_recalc_accuracies(core); | |
15a02c1f | 1537 | |
0daa376d | 1538 | return clk_core_get_accuracy_no_lock(core); |
e366fdd7 | 1539 | } |
15a02c1f | 1540 | |
4dff95dc SB |
1541 | /** |
1542 | * clk_get_accuracy - return the accuracy of clk | |
1543 | * @clk: the clk whose accuracy is being returned | |
1544 | * | |
1545 | * Simply returns the cached accuracy of the clk, unless | |
1546 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
1547 | * issued. | |
1548 | * If clk is NULL then returns 0. | |
1549 | */ | |
1550 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 1551 | { |
0daa376d SB |
1552 | long accuracy; |
1553 | ||
4dff95dc SB |
1554 | if (!clk) |
1555 | return 0; | |
035a61c3 | 1556 | |
0daa376d SB |
1557 | clk_prepare_lock(); |
1558 | accuracy = clk_core_get_accuracy_recalc(clk->core); | |
1559 | clk_prepare_unlock(); | |
1560 | ||
1561 | return accuracy; | |
035a61c3 | 1562 | } |
4dff95dc | 1563 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 1564 | |
4dff95dc SB |
1565 | static unsigned long clk_recalc(struct clk_core *core, |
1566 | unsigned long parent_rate) | |
1c8e6004 | 1567 | { |
9a34b453 MS |
1568 | unsigned long rate = parent_rate; |
1569 | ||
1570 | if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) { | |
1571 | rate = core->ops->recalc_rate(core->hw, parent_rate); | |
1572 | clk_pm_runtime_put(core); | |
1573 | } | |
1574 | return rate; | |
1c8e6004 TV |
1575 | } |
1576 | ||
4dff95dc SB |
1577 | /** |
1578 | * __clk_recalc_rates | |
1579 | * @core: first clk in the subtree | |
1580 | * @msg: notification type (see include/linux/clk.h) | |
1581 | * | |
1582 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1583 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
1584 | * it is assumed that the clock will take on the rate of its parent. | |
1585 | * | |
1586 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1587 | * if necessary. | |
15a02c1f | 1588 | */ |
4dff95dc | 1589 | static void __clk_recalc_rates(struct clk_core *core, unsigned long msg) |
15a02c1f | 1590 | { |
4dff95dc SB |
1591 | unsigned long old_rate; |
1592 | unsigned long parent_rate = 0; | |
1593 | struct clk_core *child; | |
e366fdd7 | 1594 | |
4dff95dc | 1595 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 1596 | |
4dff95dc | 1597 | old_rate = core->rate; |
b2476490 | 1598 | |
4dff95dc SB |
1599 | if (core->parent) |
1600 | parent_rate = core->parent->rate; | |
b2476490 | 1601 | |
4dff95dc | 1602 | core->rate = clk_recalc(core, parent_rate); |
b2476490 | 1603 | |
4dff95dc SB |
1604 | /* |
1605 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1606 | * & ABORT_RATE_CHANGE notifiers | |
1607 | */ | |
1608 | if (core->notifier_count && msg) | |
1609 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 1610 | |
4dff95dc SB |
1611 | hlist_for_each_entry(child, &core->children, child_node) |
1612 | __clk_recalc_rates(child, msg); | |
1613 | } | |
b2476490 | 1614 | |
0daa376d | 1615 | static unsigned long clk_core_get_rate_recalc(struct clk_core *core) |
4dff95dc | 1616 | { |
4dff95dc SB |
1617 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
1618 | __clk_recalc_rates(core, 0); | |
1619 | ||
0daa376d | 1620 | return clk_core_get_rate_nolock(core); |
b2476490 MT |
1621 | } |
1622 | ||
1623 | /** | |
4dff95dc SB |
1624 | * clk_get_rate - return the rate of clk |
1625 | * @clk: the clk whose rate is being returned | |
b2476490 | 1626 | * |
4dff95dc SB |
1627 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
1628 | * is set, which means a recalc_rate will be issued. | |
1629 | * If clk is NULL then returns 0. | |
b2476490 | 1630 | */ |
4dff95dc | 1631 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1632 | { |
0daa376d SB |
1633 | unsigned long rate; |
1634 | ||
4dff95dc SB |
1635 | if (!clk) |
1636 | return 0; | |
63589e92 | 1637 | |
0daa376d SB |
1638 | clk_prepare_lock(); |
1639 | rate = clk_core_get_rate_recalc(clk->core); | |
1640 | clk_prepare_unlock(); | |
1641 | ||
1642 | return rate; | |
b2476490 | 1643 | } |
4dff95dc | 1644 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1645 | |
4dff95dc SB |
1646 | static int clk_fetch_parent_index(struct clk_core *core, |
1647 | struct clk_core *parent) | |
b2476490 | 1648 | { |
4dff95dc | 1649 | int i; |
b2476490 | 1650 | |
508f884a MY |
1651 | if (!parent) |
1652 | return -EINVAL; | |
1653 | ||
ede77858 | 1654 | for (i = 0; i < core->num_parents; i++) { |
1a079560 | 1655 | /* Found it first try! */ |
fc0c209c | 1656 | if (core->parents[i].core == parent) |
4dff95dc | 1657 | return i; |
b2476490 | 1658 | |
1a079560 | 1659 | /* Something else is here, so keep looking */ |
fc0c209c | 1660 | if (core->parents[i].core) |
ede77858 DB |
1661 | continue; |
1662 | ||
1a079560 SB |
1663 | /* Maybe core hasn't been cached but the hw is all we know? */ |
1664 | if (core->parents[i].hw) { | |
1665 | if (core->parents[i].hw == parent->hw) | |
1666 | break; | |
1667 | ||
1668 | /* Didn't match, but we're expecting a clk_hw */ | |
1669 | continue; | |
ede77858 | 1670 | } |
1a079560 SB |
1671 | |
1672 | /* Maybe it hasn't been cached (clk_set_parent() path) */ | |
1673 | if (parent == clk_core_get(core, i)) | |
1674 | break; | |
1675 | ||
1676 | /* Fallback to comparing globally unique names */ | |
24876f09 MB |
1677 | if (core->parents[i].name && |
1678 | !strcmp(parent->name, core->parents[i].name)) | |
1a079560 | 1679 | break; |
ede77858 DB |
1680 | } |
1681 | ||
1a079560 SB |
1682 | if (i == core->num_parents) |
1683 | return -EINVAL; | |
1684 | ||
1685 | core->parents[i].core = parent; | |
1686 | return i; | |
b2476490 MT |
1687 | } |
1688 | ||
d9b86cc4 SK |
1689 | /** |
1690 | * clk_hw_get_parent_index - return the index of the parent clock | |
1691 | * @hw: clk_hw associated with the clk being consumed | |
1692 | * | |
1693 | * Fetches and returns the index of parent clock. Returns -EINVAL if the given | |
1694 | * clock does not have a current parent. | |
1695 | */ | |
1696 | int clk_hw_get_parent_index(struct clk_hw *hw) | |
1697 | { | |
1698 | struct clk_hw *parent = clk_hw_get_parent(hw); | |
1699 | ||
1700 | if (WARN_ON(parent == NULL)) | |
1701 | return -EINVAL; | |
1702 | ||
1703 | return clk_fetch_parent_index(hw->core, parent->core); | |
1704 | } | |
1705 | EXPORT_SYMBOL_GPL(clk_hw_get_parent_index); | |
1706 | ||
e6500344 HS |
1707 | /* |
1708 | * Update the orphan status of @core and all its children. | |
1709 | */ | |
1710 | static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan) | |
1711 | { | |
1712 | struct clk_core *child; | |
1713 | ||
1714 | core->orphan = is_orphan; | |
1715 | ||
1716 | hlist_for_each_entry(child, &core->children, child_node) | |
1717 | clk_core_update_orphan_status(child, is_orphan); | |
1718 | } | |
1719 | ||
4dff95dc | 1720 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1721 | { |
e6500344 HS |
1722 | bool was_orphan = core->orphan; |
1723 | ||
4dff95dc | 1724 | hlist_del(&core->child_node); |
035a61c3 | 1725 | |
4dff95dc | 1726 | if (new_parent) { |
e6500344 HS |
1727 | bool becomes_orphan = new_parent->orphan; |
1728 | ||
4dff95dc SB |
1729 | /* avoid duplicate POST_RATE_CHANGE notifications */ |
1730 | if (new_parent->new_child == core) | |
1731 | new_parent->new_child = NULL; | |
b2476490 | 1732 | |
4dff95dc | 1733 | hlist_add_head(&core->child_node, &new_parent->children); |
e6500344 HS |
1734 | |
1735 | if (was_orphan != becomes_orphan) | |
1736 | clk_core_update_orphan_status(core, becomes_orphan); | |
4dff95dc SB |
1737 | } else { |
1738 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
e6500344 HS |
1739 | if (!was_orphan) |
1740 | clk_core_update_orphan_status(core, true); | |
4dff95dc | 1741 | } |
dfc202ea | 1742 | |
4dff95dc | 1743 | core->parent = new_parent; |
035a61c3 TV |
1744 | } |
1745 | ||
4dff95dc SB |
1746 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1747 | struct clk_core *parent) | |
b2476490 MT |
1748 | { |
1749 | unsigned long flags; | |
4dff95dc | 1750 | struct clk_core *old_parent = core->parent; |
b2476490 | 1751 | |
4dff95dc | 1752 | /* |
fc8726a2 DA |
1753 | * 1. enable parents for CLK_OPS_PARENT_ENABLE clock |
1754 | * | |
1755 | * 2. Migrate prepare state between parents and prevent race with | |
4dff95dc SB |
1756 | * clk_enable(). |
1757 | * | |
1758 | * If the clock is not prepared, then a race with | |
1759 | * clk_enable/disable() is impossible since we already have the | |
1760 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1761 | * a clk_prepare()). | |
1762 | * | |
1763 | * If the clock is prepared, migrate the prepared state to the new | |
1764 | * parent and also protect against a race with clk_enable() by | |
1765 | * forcing the clock and the new parent on. This ensures that all | |
1766 | * future calls to clk_enable() are practically NOPs with respect to | |
1767 | * hardware and software states. | |
1768 | * | |
1769 | * See also: Comment for clk_set_parent() below. | |
1770 | */ | |
fc8726a2 DA |
1771 | |
1772 | /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */ | |
1773 | if (core->flags & CLK_OPS_PARENT_ENABLE) { | |
1774 | clk_core_prepare_enable(old_parent); | |
1775 | clk_core_prepare_enable(parent); | |
1776 | } | |
1777 | ||
1778 | /* migrate prepare count if > 0 */ | |
4dff95dc | 1779 | if (core->prepare_count) { |
fc8726a2 DA |
1780 | clk_core_prepare_enable(parent); |
1781 | clk_core_enable_lock(core); | |
4dff95dc | 1782 | } |
63589e92 | 1783 | |
4dff95dc | 1784 | /* update the clk tree topology */ |
eab89f69 | 1785 | flags = clk_enable_lock(); |
4dff95dc | 1786 | clk_reparent(core, parent); |
eab89f69 | 1787 | clk_enable_unlock(flags); |
4dff95dc SB |
1788 | |
1789 | return old_parent; | |
b2476490 | 1790 | } |
b2476490 | 1791 | |
4dff95dc SB |
1792 | static void __clk_set_parent_after(struct clk_core *core, |
1793 | struct clk_core *parent, | |
1794 | struct clk_core *old_parent) | |
b2476490 | 1795 | { |
4dff95dc SB |
1796 | /* |
1797 | * Finish the migration of prepare state and undo the changes done | |
1798 | * for preventing a race with clk_enable(). | |
1799 | */ | |
1800 | if (core->prepare_count) { | |
fc8726a2 DA |
1801 | clk_core_disable_lock(core); |
1802 | clk_core_disable_unprepare(old_parent); | |
1803 | } | |
1804 | ||
1805 | /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ | |
1806 | if (core->flags & CLK_OPS_PARENT_ENABLE) { | |
1807 | clk_core_disable_unprepare(parent); | |
1808 | clk_core_disable_unprepare(old_parent); | |
4dff95dc SB |
1809 | } |
1810 | } | |
b2476490 | 1811 | |
4dff95dc SB |
1812 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
1813 | u8 p_index) | |
1814 | { | |
1815 | unsigned long flags; | |
1816 | int ret = 0; | |
1817 | struct clk_core *old_parent; | |
b2476490 | 1818 | |
4dff95dc | 1819 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 1820 | |
4dff95dc | 1821 | trace_clk_set_parent(core, parent); |
b2476490 | 1822 | |
4dff95dc SB |
1823 | /* change clock input source */ |
1824 | if (parent && core->ops->set_parent) | |
1825 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 1826 | |
4dff95dc | 1827 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 1828 | |
4dff95dc SB |
1829 | if (ret) { |
1830 | flags = clk_enable_lock(); | |
1831 | clk_reparent(core, old_parent); | |
1832 | clk_enable_unlock(flags); | |
c660b2eb | 1833 | __clk_set_parent_after(core, old_parent, parent); |
dfc202ea | 1834 | |
4dff95dc | 1835 | return ret; |
b2476490 MT |
1836 | } |
1837 | ||
4dff95dc SB |
1838 | __clk_set_parent_after(core, parent, old_parent); |
1839 | ||
b2476490 MT |
1840 | return 0; |
1841 | } | |
1842 | ||
1843 | /** | |
4dff95dc SB |
1844 | * __clk_speculate_rates |
1845 | * @core: first clk in the subtree | |
1846 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 1847 | * |
4dff95dc SB |
1848 | * Walks the subtree of clks starting with clk, speculating rates as it |
1849 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1850 | * | |
1851 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1852 | * pre-rate change notifications and returns early if no clks in the | |
1853 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1854 | * implement the .recalc_rate callback then it is assumed that the clock will | |
1855 | * take on the rate of its parent. | |
b2476490 | 1856 | */ |
4dff95dc SB |
1857 | static int __clk_speculate_rates(struct clk_core *core, |
1858 | unsigned long parent_rate) | |
b2476490 | 1859 | { |
4dff95dc SB |
1860 | struct clk_core *child; |
1861 | unsigned long new_rate; | |
1862 | int ret = NOTIFY_DONE; | |
b2476490 | 1863 | |
4dff95dc | 1864 | lockdep_assert_held(&prepare_lock); |
864e160a | 1865 | |
4dff95dc SB |
1866 | new_rate = clk_recalc(core, parent_rate); |
1867 | ||
1868 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
1869 | if (core->notifier_count) | |
1870 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
1871 | ||
1872 | if (ret & NOTIFY_STOP_MASK) { | |
1873 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1874 | __func__, core->name, ret); | |
1875 | goto out; | |
1876 | } | |
1877 | ||
1878 | hlist_for_each_entry(child, &core->children, child_node) { | |
1879 | ret = __clk_speculate_rates(child, new_rate); | |
1880 | if (ret & NOTIFY_STOP_MASK) | |
1881 | break; | |
1882 | } | |
b2476490 | 1883 | |
4dff95dc | 1884 | out: |
b2476490 MT |
1885 | return ret; |
1886 | } | |
b2476490 | 1887 | |
4dff95dc SB |
1888 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
1889 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1890 | { |
4dff95dc | 1891 | struct clk_core *child; |
b2476490 | 1892 | |
4dff95dc SB |
1893 | core->new_rate = new_rate; |
1894 | core->new_parent = new_parent; | |
1895 | core->new_parent_index = p_index; | |
1896 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1897 | core->new_child = NULL; | |
1898 | if (new_parent && new_parent != core->parent) | |
1899 | new_parent->new_child = core; | |
496eadf8 | 1900 | |
4dff95dc SB |
1901 | hlist_for_each_entry(child, &core->children, child_node) { |
1902 | child->new_rate = clk_recalc(child, new_rate); | |
1903 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
1904 | } | |
1905 | } | |
b2476490 | 1906 | |
4dff95dc SB |
1907 | /* |
1908 | * calculate the new rates returning the topmost clock that has to be | |
1909 | * changed. | |
1910 | */ | |
1911 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
1912 | unsigned long rate) | |
1913 | { | |
1914 | struct clk_core *top = core; | |
1915 | struct clk_core *old_parent, *parent; | |
4dff95dc SB |
1916 | unsigned long best_parent_rate = 0; |
1917 | unsigned long new_rate; | |
1918 | unsigned long min_rate; | |
1919 | unsigned long max_rate; | |
1920 | int p_index = 0; | |
1921 | long ret; | |
1922 | ||
1923 | /* sanity */ | |
1924 | if (IS_ERR_OR_NULL(core)) | |
1925 | return NULL; | |
1926 | ||
1927 | /* save parent rate, if it exists */ | |
1928 | parent = old_parent = core->parent; | |
71472c0c | 1929 | if (parent) |
4dff95dc | 1930 | best_parent_rate = parent->rate; |
71472c0c | 1931 | |
4dff95dc SB |
1932 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
1933 | ||
1934 | /* find the closest rate and parent clk/rate */ | |
0f6cc2b8 | 1935 | if (clk_core_can_round(core)) { |
0817b62c BB |
1936 | struct clk_rate_request req; |
1937 | ||
1938 | req.rate = rate; | |
1939 | req.min_rate = min_rate; | |
1940 | req.max_rate = max_rate; | |
0817b62c | 1941 | |
0f6cc2b8 JB |
1942 | clk_core_init_rate_req(core, &req); |
1943 | ||
1944 | ret = clk_core_determine_round_nolock(core, &req); | |
4dff95dc SB |
1945 | if (ret < 0) |
1946 | return NULL; | |
1c8e6004 | 1947 | |
0817b62c BB |
1948 | best_parent_rate = req.best_parent_rate; |
1949 | new_rate = req.rate; | |
1950 | parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; | |
035a61c3 | 1951 | |
4dff95dc SB |
1952 | if (new_rate < min_rate || new_rate > max_rate) |
1953 | return NULL; | |
1954 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
1955 | /* pass-through clock without adjustable parent */ | |
1956 | core->new_rate = core->rate; | |
1957 | return NULL; | |
1958 | } else { | |
1959 | /* pass-through clock with adjustable parent */ | |
1960 | top = clk_calc_new_rates(parent, rate); | |
1961 | new_rate = parent->new_rate; | |
1962 | goto out; | |
1963 | } | |
1c8e6004 | 1964 | |
4dff95dc SB |
1965 | /* some clocks must be gated to change parent */ |
1966 | if (parent != old_parent && | |
1967 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1968 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1969 | __func__, core->name); | |
1970 | return NULL; | |
1971 | } | |
b2476490 | 1972 | |
4dff95dc SB |
1973 | /* try finding the new parent index */ |
1974 | if (parent && core->num_parents > 1) { | |
1975 | p_index = clk_fetch_parent_index(core, parent); | |
1976 | if (p_index < 0) { | |
1977 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
1978 | __func__, parent->name, core->name); | |
1979 | return NULL; | |
1980 | } | |
1981 | } | |
b2476490 | 1982 | |
4dff95dc SB |
1983 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
1984 | best_parent_rate != parent->rate) | |
1985 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 1986 | |
4dff95dc SB |
1987 | out: |
1988 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 1989 | |
4dff95dc | 1990 | return top; |
b2476490 | 1991 | } |
b2476490 | 1992 | |
4dff95dc SB |
1993 | /* |
1994 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1995 | * so that in case of an error we can walk down the whole tree again and | |
1996 | * abort the change. | |
b2476490 | 1997 | */ |
4dff95dc SB |
1998 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
1999 | unsigned long event) | |
b2476490 | 2000 | { |
4dff95dc | 2001 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
2002 | int ret = NOTIFY_DONE; |
2003 | ||
4dff95dc SB |
2004 | if (core->rate == core->new_rate) |
2005 | return NULL; | |
b2476490 | 2006 | |
4dff95dc SB |
2007 | if (core->notifier_count) { |
2008 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
2009 | if (ret & NOTIFY_STOP_MASK) | |
2010 | fail_clk = core; | |
b2476490 MT |
2011 | } |
2012 | ||
4dff95dc SB |
2013 | hlist_for_each_entry(child, &core->children, child_node) { |
2014 | /* Skip children who will be reparented to another clock */ | |
2015 | if (child->new_parent && child->new_parent != core) | |
2016 | continue; | |
2017 | tmp_clk = clk_propagate_rate_change(child, event); | |
2018 | if (tmp_clk) | |
2019 | fail_clk = tmp_clk; | |
2020 | } | |
5279fc40 | 2021 | |
4dff95dc SB |
2022 | /* handle the new child who might not be in core->children yet */ |
2023 | if (core->new_child) { | |
2024 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
2025 | if (tmp_clk) | |
2026 | fail_clk = tmp_clk; | |
2027 | } | |
5279fc40 | 2028 | |
4dff95dc | 2029 | return fail_clk; |
5279fc40 BB |
2030 | } |
2031 | ||
4dff95dc SB |
2032 | /* |
2033 | * walk down a subtree and set the new rates notifying the rate | |
2034 | * change on the way | |
2035 | */ | |
2036 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 2037 | { |
4dff95dc SB |
2038 | struct clk_core *child; |
2039 | struct hlist_node *tmp; | |
2040 | unsigned long old_rate; | |
2041 | unsigned long best_parent_rate = 0; | |
2042 | bool skip_set_rate = false; | |
2043 | struct clk_core *old_parent; | |
fc8726a2 | 2044 | struct clk_core *parent = NULL; |
035a61c3 | 2045 | |
4dff95dc | 2046 | old_rate = core->rate; |
035a61c3 | 2047 | |
fc8726a2 DA |
2048 | if (core->new_parent) { |
2049 | parent = core->new_parent; | |
4dff95dc | 2050 | best_parent_rate = core->new_parent->rate; |
fc8726a2 DA |
2051 | } else if (core->parent) { |
2052 | parent = core->parent; | |
4dff95dc | 2053 | best_parent_rate = core->parent->rate; |
fc8726a2 | 2054 | } |
035a61c3 | 2055 | |
588fb54b MS |
2056 | if (clk_pm_runtime_get(core)) |
2057 | return; | |
2058 | ||
2eb8c710 HS |
2059 | if (core->flags & CLK_SET_RATE_UNGATE) { |
2060 | unsigned long flags; | |
2061 | ||
2062 | clk_core_prepare(core); | |
2063 | flags = clk_enable_lock(); | |
2064 | clk_core_enable(core); | |
2065 | clk_enable_unlock(flags); | |
2066 | } | |
2067 | ||
4dff95dc SB |
2068 | if (core->new_parent && core->new_parent != core->parent) { |
2069 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
2070 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 2071 | |
4dff95dc SB |
2072 | if (core->ops->set_rate_and_parent) { |
2073 | skip_set_rate = true; | |
2074 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
2075 | best_parent_rate, | |
2076 | core->new_parent_index); | |
2077 | } else if (core->ops->set_parent) { | |
2078 | core->ops->set_parent(core->hw, core->new_parent_index); | |
2079 | } | |
5279fc40 | 2080 | |
4dff95dc SB |
2081 | trace_clk_set_parent_complete(core, core->new_parent); |
2082 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
2083 | } | |
8f2c2db1 | 2084 | |
fc8726a2 DA |
2085 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
2086 | clk_core_prepare_enable(parent); | |
2087 | ||
4dff95dc | 2088 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 2089 | |
4dff95dc SB |
2090 | if (!skip_set_rate && core->ops->set_rate) |
2091 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 2092 | |
4dff95dc | 2093 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 2094 | |
4dff95dc | 2095 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 2096 | |
2eb8c710 HS |
2097 | if (core->flags & CLK_SET_RATE_UNGATE) { |
2098 | unsigned long flags; | |
2099 | ||
2100 | flags = clk_enable_lock(); | |
2101 | clk_core_disable(core); | |
2102 | clk_enable_unlock(flags); | |
2103 | clk_core_unprepare(core); | |
2104 | } | |
2105 | ||
fc8726a2 DA |
2106 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
2107 | clk_core_disable_unprepare(parent); | |
2108 | ||
4dff95dc SB |
2109 | if (core->notifier_count && old_rate != core->rate) |
2110 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 | 2111 | |
85e88fab MT |
2112 | if (core->flags & CLK_RECALC_NEW_RATES) |
2113 | (void)clk_calc_new_rates(core, core->new_rate); | |
d8d91987 | 2114 | |
b2476490 | 2115 | /* |
4dff95dc SB |
2116 | * Use safe iteration, as change_rate can actually swap parents |
2117 | * for certain clock types. | |
b2476490 | 2118 | */ |
4dff95dc SB |
2119 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
2120 | /* Skip children who will be reparented to another clock */ | |
2121 | if (child->new_parent && child->new_parent != core) | |
2122 | continue; | |
2123 | clk_change_rate(child); | |
2124 | } | |
b2476490 | 2125 | |
4dff95dc SB |
2126 | /* handle the new child who might not be in core->children yet */ |
2127 | if (core->new_child) | |
2128 | clk_change_rate(core->new_child); | |
588fb54b MS |
2129 | |
2130 | clk_pm_runtime_put(core); | |
b2476490 MT |
2131 | } |
2132 | ||
ca5e089a JB |
2133 | static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, |
2134 | unsigned long req_rate) | |
2135 | { | |
e55a839a | 2136 | int ret, cnt; |
ca5e089a JB |
2137 | struct clk_rate_request req; |
2138 | ||
2139 | lockdep_assert_held(&prepare_lock); | |
2140 | ||
2141 | if (!core) | |
2142 | return 0; | |
2143 | ||
e55a839a JB |
2144 | /* simulate what the rate would be if it could be freely set */ |
2145 | cnt = clk_core_rate_nuke_protect(core); | |
2146 | if (cnt < 0) | |
2147 | return cnt; | |
2148 | ||
ca5e089a JB |
2149 | clk_core_get_boundaries(core, &req.min_rate, &req.max_rate); |
2150 | req.rate = req_rate; | |
2151 | ||
2152 | ret = clk_core_round_rate_nolock(core, &req); | |
2153 | ||
e55a839a JB |
2154 | /* restore the protection */ |
2155 | clk_core_rate_restore_protect(core, cnt); | |
2156 | ||
ca5e089a | 2157 | return ret ? 0 : req.rate; |
b2476490 MT |
2158 | } |
2159 | ||
4dff95dc SB |
2160 | static int clk_core_set_rate_nolock(struct clk_core *core, |
2161 | unsigned long req_rate) | |
a093bde2 | 2162 | { |
4dff95dc | 2163 | struct clk_core *top, *fail_clk; |
ca5e089a | 2164 | unsigned long rate; |
9a34b453 | 2165 | int ret = 0; |
a093bde2 | 2166 | |
4dff95dc SB |
2167 | if (!core) |
2168 | return 0; | |
a093bde2 | 2169 | |
ca5e089a JB |
2170 | rate = clk_core_req_round_rate_nolock(core, req_rate); |
2171 | ||
4dff95dc SB |
2172 | /* bail early if nothing to do */ |
2173 | if (rate == clk_core_get_rate_nolock(core)) | |
2174 | return 0; | |
a093bde2 | 2175 | |
e55a839a JB |
2176 | /* fail on a direct rate set of a protected provider */ |
2177 | if (clk_core_rate_is_protected(core)) | |
2178 | return -EBUSY; | |
2179 | ||
4dff95dc | 2180 | /* calculate new rates and get the topmost changed clock */ |
ca5e089a | 2181 | top = clk_calc_new_rates(core, req_rate); |
4dff95dc SB |
2182 | if (!top) |
2183 | return -EINVAL; | |
2184 | ||
9a34b453 MS |
2185 | ret = clk_pm_runtime_get(core); |
2186 | if (ret) | |
2187 | return ret; | |
2188 | ||
4dff95dc SB |
2189 | /* notify that we are about to change rates */ |
2190 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
2191 | if (fail_clk) { | |
2192 | pr_debug("%s: failed to set %s rate\n", __func__, | |
2193 | fail_clk->name); | |
2194 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
9a34b453 MS |
2195 | ret = -EBUSY; |
2196 | goto err; | |
4dff95dc SB |
2197 | } |
2198 | ||
2199 | /* change the rates */ | |
2200 | clk_change_rate(top); | |
2201 | ||
2202 | core->req_rate = req_rate; | |
9a34b453 MS |
2203 | err: |
2204 | clk_pm_runtime_put(core); | |
4dff95dc | 2205 | |
9a34b453 | 2206 | return ret; |
a093bde2 | 2207 | } |
035a61c3 TV |
2208 | |
2209 | /** | |
4dff95dc SB |
2210 | * clk_set_rate - specify a new rate for clk |
2211 | * @clk: the clk whose rate is being changed | |
2212 | * @rate: the new rate for clk | |
035a61c3 | 2213 | * |
4dff95dc SB |
2214 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
2215 | * | |
2216 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
2217 | * propagate up to clk's parent; whether or not this happens depends on the | |
2218 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
2219 | * after calling .round_rate then upstream parent propagation is ignored. If | |
2220 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
2221 | * up to clk's parent and set its rate. Upward propagation will continue | |
2222 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
2223 | * .round_rate stops requesting changes to clk's parent_rate. | |
2224 | * | |
2225 | * Rate changes are accomplished via tree traversal that also recalculates the | |
2226 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
2227 | * | |
2228 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 2229 | */ |
4dff95dc | 2230 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 2231 | { |
4dff95dc SB |
2232 | int ret; |
2233 | ||
035a61c3 TV |
2234 | if (!clk) |
2235 | return 0; | |
2236 | ||
4dff95dc SB |
2237 | /* prevent racing with updates to the clock topology */ |
2238 | clk_prepare_lock(); | |
da0f0b2c | 2239 | |
55e9b8b7 JB |
2240 | if (clk->exclusive_count) |
2241 | clk_core_rate_unprotect(clk->core); | |
2242 | ||
4dff95dc | 2243 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 2244 | |
55e9b8b7 JB |
2245 | if (clk->exclusive_count) |
2246 | clk_core_rate_protect(clk->core); | |
2247 | ||
4dff95dc | 2248 | clk_prepare_unlock(); |
4935b22c | 2249 | |
4dff95dc | 2250 | return ret; |
4935b22c | 2251 | } |
4dff95dc | 2252 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 2253 | |
55e9b8b7 | 2254 | /** |
65e2218d | 2255 | * clk_set_rate_exclusive - specify a new rate and get exclusive control |
55e9b8b7 JB |
2256 | * @clk: the clk whose rate is being changed |
2257 | * @rate: the new rate for clk | |
2258 | * | |
2259 | * This is a combination of clk_set_rate() and clk_rate_exclusive_get() | |
2260 | * within a critical section | |
2261 | * | |
2262 | * This can be used initially to ensure that at least 1 consumer is | |
65e2218d | 2263 | * satisfied when several consumers are competing for exclusivity over the |
55e9b8b7 JB |
2264 | * same clock provider. |
2265 | * | |
2266 | * The exclusivity is not applied if setting the rate failed. | |
2267 | * | |
2268 | * Calls to clk_rate_exclusive_get() should be balanced with calls to | |
2269 | * clk_rate_exclusive_put(). | |
2270 | * | |
2271 | * Returns 0 on success, -EERROR otherwise. | |
2272 | */ | |
2273 | int clk_set_rate_exclusive(struct clk *clk, unsigned long rate) | |
2274 | { | |
2275 | int ret; | |
2276 | ||
2277 | if (!clk) | |
2278 | return 0; | |
2279 | ||
2280 | /* prevent racing with updates to the clock topology */ | |
2281 | clk_prepare_lock(); | |
2282 | ||
2283 | /* | |
2284 | * The temporary protection removal is not here, on purpose | |
2285 | * This function is meant to be used instead of clk_rate_protect, | |
2286 | * so before the consumer code path protect the clock provider | |
2287 | */ | |
2288 | ||
2289 | ret = clk_core_set_rate_nolock(clk->core, rate); | |
2290 | if (!ret) { | |
2291 | clk_core_rate_protect(clk->core); | |
2292 | clk->exclusive_count++; | |
2293 | } | |
2294 | ||
2295 | clk_prepare_unlock(); | |
2296 | ||
2297 | return ret; | |
2298 | } | |
2299 | EXPORT_SYMBOL_GPL(clk_set_rate_exclusive); | |
2300 | ||
4dff95dc SB |
2301 | /** |
2302 | * clk_set_rate_range - set a rate range for a clock source | |
2303 | * @clk: clock source | |
2304 | * @min: desired minimum clock rate in Hz, inclusive | |
2305 | * @max: desired maximum clock rate in Hz, inclusive | |
2306 | * | |
2307 | * Returns success (0) or negative errno. | |
2308 | */ | |
2309 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
4935b22c | 2310 | { |
4dff95dc | 2311 | int ret = 0; |
6562fbcf | 2312 | unsigned long old_min, old_max, rate; |
4935b22c | 2313 | |
4dff95dc SB |
2314 | if (!clk) |
2315 | return 0; | |
903efc55 | 2316 | |
4dff95dc SB |
2317 | if (min > max) { |
2318 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
2319 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
2320 | min, max); | |
2321 | return -EINVAL; | |
903efc55 | 2322 | } |
4935b22c | 2323 | |
4dff95dc | 2324 | clk_prepare_lock(); |
4935b22c | 2325 | |
55e9b8b7 JB |
2326 | if (clk->exclusive_count) |
2327 | clk_core_rate_unprotect(clk->core); | |
2328 | ||
6562fbcf JB |
2329 | /* Save the current values in case we need to rollback the change */ |
2330 | old_min = clk->min_rate; | |
2331 | old_max = clk->max_rate; | |
2332 | clk->min_rate = min; | |
2333 | clk->max_rate = max; | |
2334 | ||
2335 | rate = clk_core_get_rate_nolock(clk->core); | |
2336 | if (rate < min || rate > max) { | |
2337 | /* | |
2338 | * FIXME: | |
2339 | * We are in bit of trouble here, current rate is outside the | |
2340 | * the requested range. We are going try to request appropriate | |
2341 | * range boundary but there is a catch. It may fail for the | |
2342 | * usual reason (clock broken, clock protected, etc) but also | |
2343 | * because: | |
2344 | * - round_rate() was not favorable and fell on the wrong | |
2345 | * side of the boundary | |
2346 | * - the determine_rate() callback does not really check for | |
2347 | * this corner case when determining the rate | |
2348 | */ | |
2349 | ||
2350 | if (rate < min) | |
2351 | rate = min; | |
2352 | else | |
2353 | rate = max; | |
2354 | ||
2355 | ret = clk_core_set_rate_nolock(clk->core, rate); | |
2356 | if (ret) { | |
2357 | /* rollback the changes */ | |
2358 | clk->min_rate = old_min; | |
2359 | clk->max_rate = old_max; | |
2360 | } | |
4935b22c JH |
2361 | } |
2362 | ||
55e9b8b7 JB |
2363 | if (clk->exclusive_count) |
2364 | clk_core_rate_protect(clk->core); | |
2365 | ||
4dff95dc | 2366 | clk_prepare_unlock(); |
4935b22c | 2367 | |
4dff95dc | 2368 | return ret; |
3fa2252b | 2369 | } |
4dff95dc | 2370 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 2371 | |
4dff95dc SB |
2372 | /** |
2373 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
2374 | * @clk: clock source | |
2375 | * @rate: desired minimum clock rate in Hz, inclusive | |
2376 | * | |
2377 | * Returns success (0) or negative errno. | |
2378 | */ | |
2379 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 2380 | { |
4dff95dc SB |
2381 | if (!clk) |
2382 | return 0; | |
2383 | ||
2384 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
3fa2252b | 2385 | } |
4dff95dc | 2386 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 2387 | |
4dff95dc SB |
2388 | /** |
2389 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
2390 | * @clk: clock source | |
2391 | * @rate: desired maximum clock rate in Hz, inclusive | |
2392 | * | |
2393 | * Returns success (0) or negative errno. | |
2394 | */ | |
2395 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 2396 | { |
4dff95dc SB |
2397 | if (!clk) |
2398 | return 0; | |
4935b22c | 2399 | |
4dff95dc | 2400 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 2401 | } |
4dff95dc | 2402 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 2403 | |
b2476490 | 2404 | /** |
4dff95dc SB |
2405 | * clk_get_parent - return the parent of a clk |
2406 | * @clk: the clk whose parent gets returned | |
b2476490 | 2407 | * |
4dff95dc | 2408 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 2409 | */ |
4dff95dc | 2410 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 2411 | { |
4dff95dc | 2412 | struct clk *parent; |
b2476490 | 2413 | |
fc4a05d4 SB |
2414 | if (!clk) |
2415 | return NULL; | |
2416 | ||
4dff95dc | 2417 | clk_prepare_lock(); |
fc4a05d4 SB |
2418 | /* TODO: Create a per-user clk and change callers to call clk_put */ |
2419 | parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
4dff95dc | 2420 | clk_prepare_unlock(); |
496eadf8 | 2421 | |
4dff95dc SB |
2422 | return parent; |
2423 | } | |
2424 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 2425 | |
4dff95dc SB |
2426 | static struct clk_core *__clk_init_parent(struct clk_core *core) |
2427 | { | |
5146e0b0 | 2428 | u8 index = 0; |
4dff95dc | 2429 | |
2430a94d | 2430 | if (core->num_parents > 1 && core->ops->get_parent) |
5146e0b0 | 2431 | index = core->ops->get_parent(core->hw); |
b2476490 | 2432 | |
5146e0b0 | 2433 | return clk_core_get_parent_by_index(core, index); |
b2476490 MT |
2434 | } |
2435 | ||
4dff95dc SB |
2436 | static void clk_core_reparent(struct clk_core *core, |
2437 | struct clk_core *new_parent) | |
b2476490 | 2438 | { |
4dff95dc SB |
2439 | clk_reparent(core, new_parent); |
2440 | __clk_recalc_accuracies(core); | |
2441 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
b2476490 MT |
2442 | } |
2443 | ||
42c86547 TV |
2444 | void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) |
2445 | { | |
2446 | if (!hw) | |
2447 | return; | |
2448 | ||
2449 | clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); | |
2450 | } | |
2451 | ||
4dff95dc SB |
2452 | /** |
2453 | * clk_has_parent - check if a clock is a possible parent for another | |
2454 | * @clk: clock source | |
2455 | * @parent: parent clock source | |
2456 | * | |
2457 | * This function can be used in drivers that need to check that a clock can be | |
2458 | * the parent of another without actually changing the parent. | |
2459 | * | |
2460 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 2461 | */ |
4dff95dc | 2462 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
b2476490 | 2463 | { |
4dff95dc | 2464 | struct clk_core *core, *parent_core; |
fc0c209c | 2465 | int i; |
b2476490 | 2466 | |
4dff95dc SB |
2467 | /* NULL clocks should be nops, so return success if either is NULL. */ |
2468 | if (!clk || !parent) | |
2469 | return true; | |
7452b219 | 2470 | |
4dff95dc SB |
2471 | core = clk->core; |
2472 | parent_core = parent->core; | |
71472c0c | 2473 | |
4dff95dc SB |
2474 | /* Optimize for the case where the parent is already the parent. */ |
2475 | if (core->parent == parent_core) | |
2476 | return true; | |
1c8e6004 | 2477 | |
fc0c209c SB |
2478 | for (i = 0; i < core->num_parents; i++) |
2479 | if (!strcmp(core->parents[i].name, parent_core->name)) | |
2480 | return true; | |
2481 | ||
2482 | return false; | |
4dff95dc SB |
2483 | } |
2484 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 2485 | |
91baa9ff JB |
2486 | static int clk_core_set_parent_nolock(struct clk_core *core, |
2487 | struct clk_core *parent) | |
4dff95dc SB |
2488 | { |
2489 | int ret = 0; | |
2490 | int p_index = 0; | |
2491 | unsigned long p_rate = 0; | |
2492 | ||
91baa9ff JB |
2493 | lockdep_assert_held(&prepare_lock); |
2494 | ||
4dff95dc SB |
2495 | if (!core) |
2496 | return 0; | |
2497 | ||
4dff95dc | 2498 | if (core->parent == parent) |
91baa9ff | 2499 | return 0; |
4dff95dc | 2500 | |
ef13e55c | 2501 | /* verify ops for multi-parent clks */ |
91baa9ff JB |
2502 | if (core->num_parents > 1 && !core->ops->set_parent) |
2503 | return -EPERM; | |
7452b219 | 2504 | |
4dff95dc | 2505 | /* check that we are allowed to re-parent if the clock is in use */ |
91baa9ff JB |
2506 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) |
2507 | return -EBUSY; | |
b2476490 | 2508 | |
e55a839a JB |
2509 | if (clk_core_rate_is_protected(core)) |
2510 | return -EBUSY; | |
b2476490 | 2511 | |
71472c0c | 2512 | /* try finding the new parent index */ |
4dff95dc | 2513 | if (parent) { |
d6968fca | 2514 | p_index = clk_fetch_parent_index(core, parent); |
f1c8b2ed | 2515 | if (p_index < 0) { |
71472c0c | 2516 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc | 2517 | __func__, parent->name, core->name); |
91baa9ff | 2518 | return p_index; |
71472c0c | 2519 | } |
e8f0e68e | 2520 | p_rate = parent->rate; |
b2476490 MT |
2521 | } |
2522 | ||
9a34b453 MS |
2523 | ret = clk_pm_runtime_get(core); |
2524 | if (ret) | |
91baa9ff | 2525 | return ret; |
9a34b453 | 2526 | |
4dff95dc SB |
2527 | /* propagate PRE_RATE_CHANGE notifications */ |
2528 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 2529 | |
4dff95dc SB |
2530 | /* abort if a driver objects */ |
2531 | if (ret & NOTIFY_STOP_MASK) | |
9a34b453 | 2532 | goto runtime_put; |
b2476490 | 2533 | |
4dff95dc SB |
2534 | /* do the re-parent */ |
2535 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 2536 | |
4dff95dc SB |
2537 | /* propagate rate an accuracy recalculation accordingly */ |
2538 | if (ret) { | |
2539 | __clk_recalc_rates(core, ABORT_RATE_CHANGE); | |
2540 | } else { | |
2541 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
2542 | __clk_recalc_accuracies(core); | |
b2476490 MT |
2543 | } |
2544 | ||
9a34b453 MS |
2545 | runtime_put: |
2546 | clk_pm_runtime_put(core); | |
71472c0c | 2547 | |
4dff95dc SB |
2548 | return ret; |
2549 | } | |
b2476490 | 2550 | |
3567894b NA |
2551 | int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent) |
2552 | { | |
2553 | return clk_core_set_parent_nolock(hw->core, parent->core); | |
2554 | } | |
2555 | EXPORT_SYMBOL_GPL(clk_hw_set_parent); | |
2556 | ||
4dff95dc SB |
2557 | /** |
2558 | * clk_set_parent - switch the parent of a mux clk | |
2559 | * @clk: the mux clk whose input we are switching | |
2560 | * @parent: the new input to clk | |
2561 | * | |
2562 | * Re-parent clk to use parent as its new input source. If clk is in | |
2563 | * prepared state, the clk will get enabled for the duration of this call. If | |
2564 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
2565 | * that, the reparenting is glitchy in hardware, etc), use the | |
2566 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
2567 | * | |
2568 | * After successfully changing clk's parent clk_set_parent will update the | |
2569 | * clk topology, sysfs topology and propagate rate recalculation via | |
2570 | * __clk_recalc_rates. | |
2571 | * | |
2572 | * Returns 0 on success, -EERROR otherwise. | |
2573 | */ | |
2574 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
2575 | { | |
91baa9ff JB |
2576 | int ret; |
2577 | ||
4dff95dc SB |
2578 | if (!clk) |
2579 | return 0; | |
2580 | ||
91baa9ff | 2581 | clk_prepare_lock(); |
55e9b8b7 JB |
2582 | |
2583 | if (clk->exclusive_count) | |
2584 | clk_core_rate_unprotect(clk->core); | |
2585 | ||
91baa9ff JB |
2586 | ret = clk_core_set_parent_nolock(clk->core, |
2587 | parent ? parent->core : NULL); | |
55e9b8b7 JB |
2588 | |
2589 | if (clk->exclusive_count) | |
2590 | clk_core_rate_protect(clk->core); | |
2591 | ||
91baa9ff JB |
2592 | clk_prepare_unlock(); |
2593 | ||
2594 | return ret; | |
b2476490 | 2595 | } |
4dff95dc | 2596 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 2597 | |
9e4d04ad JB |
2598 | static int clk_core_set_phase_nolock(struct clk_core *core, int degrees) |
2599 | { | |
2600 | int ret = -EINVAL; | |
2601 | ||
2602 | lockdep_assert_held(&prepare_lock); | |
2603 | ||
2604 | if (!core) | |
2605 | return 0; | |
2606 | ||
e55a839a JB |
2607 | if (clk_core_rate_is_protected(core)) |
2608 | return -EBUSY; | |
2609 | ||
9e4d04ad JB |
2610 | trace_clk_set_phase(core, degrees); |
2611 | ||
7f95beea | 2612 | if (core->ops->set_phase) { |
9e4d04ad | 2613 | ret = core->ops->set_phase(core->hw, degrees); |
7f95beea SL |
2614 | if (!ret) |
2615 | core->phase = degrees; | |
2616 | } | |
9e4d04ad JB |
2617 | |
2618 | trace_clk_set_phase_complete(core, degrees); | |
2619 | ||
2620 | return ret; | |
2621 | } | |
2622 | ||
4dff95dc SB |
2623 | /** |
2624 | * clk_set_phase - adjust the phase shift of a clock signal | |
2625 | * @clk: clock signal source | |
2626 | * @degrees: number of degrees the signal is shifted | |
2627 | * | |
2628 | * Shifts the phase of a clock signal by the specified | |
2629 | * degrees. Returns 0 on success, -EERROR otherwise. | |
2630 | * | |
2631 | * This function makes no distinction about the input or reference | |
2632 | * signal that we adjust the clock signal phase against. For example | |
2633 | * phase locked-loop clock signal generators we may shift phase with | |
2634 | * respect to feedback clock signal input, but for other cases the | |
2635 | * clock phase may be shifted with respect to some other, unspecified | |
2636 | * signal. | |
2637 | * | |
2638 | * Additionally the concept of phase shift does not propagate through | |
2639 | * the clock tree hierarchy, which sets it apart from clock rates and | |
2640 | * clock accuracy. A parent clock phase attribute does not have an | |
2641 | * impact on the phase attribute of a child clock. | |
b2476490 | 2642 | */ |
4dff95dc | 2643 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 2644 | { |
9e4d04ad | 2645 | int ret; |
b2476490 | 2646 | |
4dff95dc SB |
2647 | if (!clk) |
2648 | return 0; | |
b2476490 | 2649 | |
4dff95dc SB |
2650 | /* sanity check degrees */ |
2651 | degrees %= 360; | |
2652 | if (degrees < 0) | |
2653 | degrees += 360; | |
bf47b4fd | 2654 | |
4dff95dc | 2655 | clk_prepare_lock(); |
3fa2252b | 2656 | |
55e9b8b7 JB |
2657 | if (clk->exclusive_count) |
2658 | clk_core_rate_unprotect(clk->core); | |
3fa2252b | 2659 | |
9e4d04ad | 2660 | ret = clk_core_set_phase_nolock(clk->core, degrees); |
3fa2252b | 2661 | |
55e9b8b7 JB |
2662 | if (clk->exclusive_count) |
2663 | clk_core_rate_protect(clk->core); | |
b2476490 | 2664 | |
4dff95dc | 2665 | clk_prepare_unlock(); |
dfc202ea | 2666 | |
4dff95dc SB |
2667 | return ret; |
2668 | } | |
2669 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 2670 | |
4dff95dc SB |
2671 | static int clk_core_get_phase(struct clk_core *core) |
2672 | { | |
2673 | int ret; | |
b2476490 | 2674 | |
f21cf9c7 SB |
2675 | lockdep_assert_held(&prepare_lock); |
2676 | if (!core->ops->get_phase) | |
2677 | return 0; | |
2678 | ||
1f9c63e8 | 2679 | /* Always try to update cached phase if possible */ |
f21cf9c7 SB |
2680 | ret = core->ops->get_phase(core->hw); |
2681 | if (ret >= 0) | |
2682 | core->phase = ret; | |
71472c0c | 2683 | |
4dff95dc | 2684 | return ret; |
b2476490 MT |
2685 | } |
2686 | ||
4dff95dc SB |
2687 | /** |
2688 | * clk_get_phase - return the phase shift of a clock signal | |
2689 | * @clk: clock signal source | |
2690 | * | |
2691 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
2692 | * -EERROR. | |
2693 | */ | |
2694 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 2695 | { |
f21cf9c7 SB |
2696 | int ret; |
2697 | ||
4dff95dc | 2698 | if (!clk) |
1c8e6004 TV |
2699 | return 0; |
2700 | ||
f21cf9c7 SB |
2701 | clk_prepare_lock(); |
2702 | ret = clk_core_get_phase(clk->core); | |
2703 | clk_prepare_unlock(); | |
2704 | ||
2705 | return ret; | |
4dff95dc SB |
2706 | } |
2707 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 2708 | |
9fba738a JB |
2709 | static void clk_core_reset_duty_cycle_nolock(struct clk_core *core) |
2710 | { | |
2711 | /* Assume a default value of 50% */ | |
2712 | core->duty.num = 1; | |
2713 | core->duty.den = 2; | |
2714 | } | |
2715 | ||
2716 | static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core); | |
2717 | ||
2718 | static int clk_core_update_duty_cycle_nolock(struct clk_core *core) | |
2719 | { | |
2720 | struct clk_duty *duty = &core->duty; | |
2721 | int ret = 0; | |
2722 | ||
2723 | if (!core->ops->get_duty_cycle) | |
2724 | return clk_core_update_duty_cycle_parent_nolock(core); | |
2725 | ||
2726 | ret = core->ops->get_duty_cycle(core->hw, duty); | |
2727 | if (ret) | |
2728 | goto reset; | |
2729 | ||
2730 | /* Don't trust the clock provider too much */ | |
2731 | if (duty->den == 0 || duty->num > duty->den) { | |
2732 | ret = -EINVAL; | |
2733 | goto reset; | |
2734 | } | |
2735 | ||
2736 | return 0; | |
2737 | ||
2738 | reset: | |
2739 | clk_core_reset_duty_cycle_nolock(core); | |
2740 | return ret; | |
2741 | } | |
2742 | ||
2743 | static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core) | |
2744 | { | |
2745 | int ret = 0; | |
2746 | ||
2747 | if (core->parent && | |
2748 | core->flags & CLK_DUTY_CYCLE_PARENT) { | |
2749 | ret = clk_core_update_duty_cycle_nolock(core->parent); | |
2750 | memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); | |
2751 | } else { | |
2752 | clk_core_reset_duty_cycle_nolock(core); | |
2753 | } | |
2754 | ||
2755 | return ret; | |
2756 | } | |
2757 | ||
2758 | static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core, | |
2759 | struct clk_duty *duty); | |
2760 | ||
2761 | static int clk_core_set_duty_cycle_nolock(struct clk_core *core, | |
2762 | struct clk_duty *duty) | |
2763 | { | |
2764 | int ret; | |
2765 | ||
2766 | lockdep_assert_held(&prepare_lock); | |
2767 | ||
2768 | if (clk_core_rate_is_protected(core)) | |
2769 | return -EBUSY; | |
2770 | ||
2771 | trace_clk_set_duty_cycle(core, duty); | |
2772 | ||
2773 | if (!core->ops->set_duty_cycle) | |
2774 | return clk_core_set_duty_cycle_parent_nolock(core, duty); | |
2775 | ||
2776 | ret = core->ops->set_duty_cycle(core->hw, duty); | |
2777 | if (!ret) | |
2778 | memcpy(&core->duty, duty, sizeof(*duty)); | |
2779 | ||
2780 | trace_clk_set_duty_cycle_complete(core, duty); | |
2781 | ||
2782 | return ret; | |
2783 | } | |
2784 | ||
2785 | static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core, | |
2786 | struct clk_duty *duty) | |
2787 | { | |
2788 | int ret = 0; | |
2789 | ||
2790 | if (core->parent && | |
2791 | core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) { | |
2792 | ret = clk_core_set_duty_cycle_nolock(core->parent, duty); | |
2793 | memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); | |
2794 | } | |
2795 | ||
2796 | return ret; | |
2797 | } | |
2798 | ||
2799 | /** | |
2800 | * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal | |
2801 | * @clk: clock signal source | |
2802 | * @num: numerator of the duty cycle ratio to be applied | |
2803 | * @den: denominator of the duty cycle ratio to be applied | |
2804 | * | |
2805 | * Apply the duty cycle ratio if the ratio is valid and the clock can | |
2806 | * perform this operation | |
2807 | * | |
2808 | * Returns (0) on success, a negative errno otherwise. | |
2809 | */ | |
2810 | int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den) | |
2811 | { | |
2812 | int ret; | |
2813 | struct clk_duty duty; | |
2814 | ||
2815 | if (!clk) | |
2816 | return 0; | |
2817 | ||
2818 | /* sanity check the ratio */ | |
2819 | if (den == 0 || num > den) | |
2820 | return -EINVAL; | |
2821 | ||
2822 | duty.num = num; | |
2823 | duty.den = den; | |
2824 | ||
2825 | clk_prepare_lock(); | |
2826 | ||
2827 | if (clk->exclusive_count) | |
2828 | clk_core_rate_unprotect(clk->core); | |
2829 | ||
2830 | ret = clk_core_set_duty_cycle_nolock(clk->core, &duty); | |
2831 | ||
2832 | if (clk->exclusive_count) | |
2833 | clk_core_rate_protect(clk->core); | |
2834 | ||
2835 | clk_prepare_unlock(); | |
2836 | ||
2837 | return ret; | |
2838 | } | |
2839 | EXPORT_SYMBOL_GPL(clk_set_duty_cycle); | |
2840 | ||
2841 | static int clk_core_get_scaled_duty_cycle(struct clk_core *core, | |
2842 | unsigned int scale) | |
2843 | { | |
2844 | struct clk_duty *duty = &core->duty; | |
2845 | int ret; | |
2846 | ||
2847 | clk_prepare_lock(); | |
2848 | ||
2849 | ret = clk_core_update_duty_cycle_nolock(core); | |
2850 | if (!ret) | |
2851 | ret = mult_frac(scale, duty->num, duty->den); | |
2852 | ||
2853 | clk_prepare_unlock(); | |
2854 | ||
2855 | return ret; | |
2856 | } | |
2857 | ||
2858 | /** | |
2859 | * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal | |
2860 | * @clk: clock signal source | |
2861 | * @scale: scaling factor to be applied to represent the ratio as an integer | |
2862 | * | |
2863 | * Returns the duty cycle ratio of a clock node multiplied by the provided | |
2864 | * scaling factor, or negative errno on error. | |
2865 | */ | |
2866 | int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale) | |
2867 | { | |
2868 | if (!clk) | |
2869 | return 0; | |
2870 | ||
2871 | return clk_core_get_scaled_duty_cycle(clk->core, scale); | |
2872 | } | |
2873 | EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle); | |
2874 | ||
4dff95dc SB |
2875 | /** |
2876 | * clk_is_match - check if two clk's point to the same hardware clock | |
2877 | * @p: clk compared against q | |
2878 | * @q: clk compared against p | |
2879 | * | |
2880 | * Returns true if the two struct clk pointers both point to the same hardware | |
2881 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
2882 | * share the same struct clk_core object. | |
2883 | * | |
2884 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
2885 | */ | |
2886 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
2887 | { | |
2888 | /* trivial case: identical struct clk's or both NULL */ | |
2889 | if (p == q) | |
2890 | return true; | |
1c8e6004 | 2891 | |
3fe003f9 | 2892 | /* true if clk->core pointers match. Avoid dereferencing garbage */ |
4dff95dc SB |
2893 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) |
2894 | if (p->core == q->core) | |
2895 | return true; | |
1c8e6004 | 2896 | |
4dff95dc SB |
2897 | return false; |
2898 | } | |
2899 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 2900 | |
4dff95dc | 2901 | /*** debugfs support ***/ |
1c8e6004 | 2902 | |
4dff95dc SB |
2903 | #ifdef CONFIG_DEBUG_FS |
2904 | #include <linux/debugfs.h> | |
1c8e6004 | 2905 | |
4dff95dc SB |
2906 | static struct dentry *rootdir; |
2907 | static int inited = 0; | |
2908 | static DEFINE_MUTEX(clk_debug_lock); | |
2909 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 2910 | |
4dff95dc SB |
2911 | static struct hlist_head *orphan_list[] = { |
2912 | &clk_orphan_list, | |
2913 | NULL, | |
2914 | }; | |
2915 | ||
2916 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
2917 | int level) | |
b2476490 | 2918 | { |
f21cf9c7 SB |
2919 | int phase; |
2920 | ||
2921 | seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ", | |
4dff95dc SB |
2922 | level * 3 + 1, "", |
2923 | 30 - level * 3, c->name, | |
e55a839a | 2924 | c->enable_count, c->prepare_count, c->protect_count, |
0daa376d SB |
2925 | clk_core_get_rate_recalc(c), |
2926 | clk_core_get_accuracy_recalc(c)); | |
f21cf9c7 SB |
2927 | |
2928 | phase = clk_core_get_phase(c); | |
2929 | if (phase >= 0) | |
2930 | seq_printf(s, "%5d", phase); | |
2931 | else | |
2932 | seq_puts(s, "-----"); | |
2933 | ||
2934 | seq_printf(s, " %6d\n", clk_core_get_scaled_duty_cycle(c, 100000)); | |
4dff95dc | 2935 | } |
89ac8d7a | 2936 | |
4dff95dc SB |
2937 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
2938 | int level) | |
2939 | { | |
2940 | struct clk_core *child; | |
b2476490 | 2941 | |
4dff95dc | 2942 | clk_summary_show_one(s, c, level); |
0e1c0301 | 2943 | |
4dff95dc SB |
2944 | hlist_for_each_entry(child, &c->children, child_node) |
2945 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 2946 | } |
b2476490 | 2947 | |
4dff95dc | 2948 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 2949 | { |
4dff95dc SB |
2950 | struct clk_core *c; |
2951 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
1c8e6004 | 2952 | |
9fba738a JB |
2953 | seq_puts(s, " enable prepare protect duty\n"); |
2954 | seq_puts(s, " clock count count count rate accuracy phase cycle\n"); | |
2955 | seq_puts(s, "---------------------------------------------------------------------------------------------\n"); | |
b2476490 | 2956 | |
1c8e6004 TV |
2957 | clk_prepare_lock(); |
2958 | ||
4dff95dc SB |
2959 | for (; *lists; lists++) |
2960 | hlist_for_each_entry(c, *lists, child_node) | |
2961 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 2962 | |
eab89f69 | 2963 | clk_prepare_unlock(); |
b2476490 | 2964 | |
4dff95dc | 2965 | return 0; |
b2476490 | 2966 | } |
fec0ef3f | 2967 | DEFINE_SHOW_ATTRIBUTE(clk_summary); |
b2476490 | 2968 | |
4dff95dc SB |
2969 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
2970 | { | |
f21cf9c7 | 2971 | int phase; |
1bd37a46 LC |
2972 | unsigned long min_rate, max_rate; |
2973 | ||
1bd37a46 | 2974 | clk_core_get_boundaries(c, &min_rate, &max_rate); |
b2476490 | 2975 | |
7cb81136 | 2976 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
2977 | seq_printf(s, "\"%s\": { ", c->name); |
2978 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
2979 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
e55a839a | 2980 | seq_printf(s, "\"protect_count\": %d,", c->protect_count); |
0daa376d | 2981 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate_recalc(c)); |
1bd37a46 LC |
2982 | seq_printf(s, "\"min_rate\": %lu,", min_rate); |
2983 | seq_printf(s, "\"max_rate\": %lu,", max_rate); | |
0daa376d | 2984 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c)); |
f21cf9c7 SB |
2985 | phase = clk_core_get_phase(c); |
2986 | if (phase >= 0) | |
2987 | seq_printf(s, "\"phase\": %d,", phase); | |
9fba738a JB |
2988 | seq_printf(s, "\"duty_cycle\": %u", |
2989 | clk_core_get_scaled_duty_cycle(c, 100000)); | |
b2476490 | 2990 | } |
b2476490 | 2991 | |
4dff95dc | 2992 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 2993 | { |
4dff95dc | 2994 | struct clk_core *child; |
b2476490 | 2995 | |
4dff95dc | 2996 | clk_dump_one(s, c, level); |
b2476490 | 2997 | |
4dff95dc | 2998 | hlist_for_each_entry(child, &c->children, child_node) { |
4d327586 | 2999 | seq_putc(s, ','); |
4dff95dc | 3000 | clk_dump_subtree(s, child, level + 1); |
b2476490 MT |
3001 | } |
3002 | ||
4d327586 | 3003 | seq_putc(s, '}'); |
b2476490 MT |
3004 | } |
3005 | ||
fec0ef3f | 3006 | static int clk_dump_show(struct seq_file *s, void *data) |
4e88f3de | 3007 | { |
4dff95dc SB |
3008 | struct clk_core *c; |
3009 | bool first_node = true; | |
3010 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
4e88f3de | 3011 | |
4d327586 | 3012 | seq_putc(s, '{'); |
4dff95dc | 3013 | clk_prepare_lock(); |
035a61c3 | 3014 | |
4dff95dc SB |
3015 | for (; *lists; lists++) { |
3016 | hlist_for_each_entry(c, *lists, child_node) { | |
3017 | if (!first_node) | |
4d327586 | 3018 | seq_putc(s, ','); |
4dff95dc SB |
3019 | first_node = false; |
3020 | clk_dump_subtree(s, c, 0); | |
3021 | } | |
3022 | } | |
4e88f3de | 3023 | |
4dff95dc | 3024 | clk_prepare_unlock(); |
4e88f3de | 3025 | |
70e9f4dd | 3026 | seq_puts(s, "}\n"); |
4dff95dc | 3027 | return 0; |
4e88f3de | 3028 | } |
fec0ef3f | 3029 | DEFINE_SHOW_ATTRIBUTE(clk_dump); |
89ac8d7a | 3030 | |
37215da5 GU |
3031 | #undef CLOCK_ALLOW_WRITE_DEBUGFS |
3032 | #ifdef CLOCK_ALLOW_WRITE_DEBUGFS | |
3033 | /* | |
3034 | * This can be dangerous, therefore don't provide any real compile time | |
3035 | * configuration option for this feature. | |
3036 | * People who want to use this will need to modify the source code directly. | |
3037 | */ | |
3038 | static int clk_rate_set(void *data, u64 val) | |
3039 | { | |
3040 | struct clk_core *core = data; | |
3041 | int ret; | |
3042 | ||
3043 | clk_prepare_lock(); | |
3044 | ret = clk_core_set_rate_nolock(core, val); | |
3045 | clk_prepare_unlock(); | |
3046 | ||
3047 | return ret; | |
3048 | } | |
3049 | ||
3050 | #define clk_rate_mode 0644 | |
03111b10 MT |
3051 | |
3052 | static int clk_prepare_enable_set(void *data, u64 val) | |
3053 | { | |
3054 | struct clk_core *core = data; | |
3055 | int ret = 0; | |
3056 | ||
3057 | if (val) | |
3058 | ret = clk_prepare_enable(core->hw->clk); | |
3059 | else | |
3060 | clk_disable_unprepare(core->hw->clk); | |
3061 | ||
3062 | return ret; | |
3063 | } | |
3064 | ||
3065 | static int clk_prepare_enable_get(void *data, u64 *val) | |
3066 | { | |
3067 | struct clk_core *core = data; | |
3068 | ||
3069 | *val = core->enable_count && core->prepare_count; | |
3070 | return 0; | |
3071 | } | |
3072 | ||
3073 | DEFINE_DEBUGFS_ATTRIBUTE(clk_prepare_enable_fops, clk_prepare_enable_get, | |
3074 | clk_prepare_enable_set, "%llu\n"); | |
3075 | ||
37215da5 GU |
3076 | #else |
3077 | #define clk_rate_set NULL | |
3078 | #define clk_rate_mode 0444 | |
3079 | #endif | |
3080 | ||
3081 | static int clk_rate_get(void *data, u64 *val) | |
3082 | { | |
3083 | struct clk_core *core = data; | |
3084 | ||
3085 | *val = core->rate; | |
3086 | return 0; | |
3087 | } | |
3088 | ||
3089 | DEFINE_DEBUGFS_ATTRIBUTE(clk_rate_fops, clk_rate_get, clk_rate_set, "%llu\n"); | |
3090 | ||
a6059ab9 GU |
3091 | static const struct { |
3092 | unsigned long flag; | |
3093 | const char *name; | |
3094 | } clk_flags[] = { | |
40dd71c7 | 3095 | #define ENTRY(f) { f, #f } |
a6059ab9 GU |
3096 | ENTRY(CLK_SET_RATE_GATE), |
3097 | ENTRY(CLK_SET_PARENT_GATE), | |
3098 | ENTRY(CLK_SET_RATE_PARENT), | |
3099 | ENTRY(CLK_IGNORE_UNUSED), | |
a6059ab9 GU |
3100 | ENTRY(CLK_GET_RATE_NOCACHE), |
3101 | ENTRY(CLK_SET_RATE_NO_REPARENT), | |
3102 | ENTRY(CLK_GET_ACCURACY_NOCACHE), | |
3103 | ENTRY(CLK_RECALC_NEW_RATES), | |
3104 | ENTRY(CLK_SET_RATE_UNGATE), | |
3105 | ENTRY(CLK_IS_CRITICAL), | |
3106 | ENTRY(CLK_OPS_PARENT_ENABLE), | |
9fba738a | 3107 | ENTRY(CLK_DUTY_CYCLE_PARENT), |
a6059ab9 GU |
3108 | #undef ENTRY |
3109 | }; | |
3110 | ||
fec0ef3f | 3111 | static int clk_flags_show(struct seq_file *s, void *data) |
a6059ab9 GU |
3112 | { |
3113 | struct clk_core *core = s->private; | |
3114 | unsigned long flags = core->flags; | |
3115 | unsigned int i; | |
3116 | ||
3117 | for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) { | |
3118 | if (flags & clk_flags[i].flag) { | |
3119 | seq_printf(s, "%s\n", clk_flags[i].name); | |
3120 | flags &= ~clk_flags[i].flag; | |
3121 | } | |
3122 | } | |
3123 | if (flags) { | |
3124 | /* Unknown flags */ | |
3125 | seq_printf(s, "0x%lx\n", flags); | |
3126 | } | |
3127 | ||
3128 | return 0; | |
3129 | } | |
fec0ef3f | 3130 | DEFINE_SHOW_ATTRIBUTE(clk_flags); |
a6059ab9 | 3131 | |
11f6c230 SB |
3132 | static void possible_parent_show(struct seq_file *s, struct clk_core *core, |
3133 | unsigned int i, char terminator) | |
92031575 | 3134 | { |
2d156b78 | 3135 | struct clk_core *parent; |
92031575 | 3136 | |
2d156b78 CYT |
3137 | /* |
3138 | * Go through the following options to fetch a parent's name. | |
3139 | * | |
3140 | * 1. Fetch the registered parent clock and use its name | |
3141 | * 2. Use the global (fallback) name if specified | |
3142 | * 3. Use the local fw_name if provided | |
3143 | * 4. Fetch parent clock's clock-output-name if DT index was set | |
3144 | * | |
3145 | * This may still fail in some cases, such as when the parent is | |
3146 | * specified directly via a struct clk_hw pointer, but it isn't | |
3147 | * registered (yet). | |
3148 | */ | |
2d156b78 CYT |
3149 | parent = clk_core_get_parent_by_index(core, i); |
3150 | if (parent) | |
1ccc0ddf | 3151 | seq_puts(s, parent->name); |
2d156b78 | 3152 | else if (core->parents[i].name) |
1ccc0ddf | 3153 | seq_puts(s, core->parents[i].name); |
2d156b78 CYT |
3154 | else if (core->parents[i].fw_name) |
3155 | seq_printf(s, "<%s>(fw)", core->parents[i].fw_name); | |
3156 | else if (core->parents[i].index >= 0) | |
1ccc0ddf ME |
3157 | seq_puts(s, |
3158 | of_clk_get_parent_name(core->of_node, | |
3159 | core->parents[i].index)); | |
2d156b78 CYT |
3160 | else |
3161 | seq_puts(s, "(missing)"); | |
92031575 | 3162 | |
11f6c230 SB |
3163 | seq_putc(s, terminator); |
3164 | } | |
3165 | ||
fec0ef3f | 3166 | static int possible_parents_show(struct seq_file *s, void *data) |
92031575 PDS |
3167 | { |
3168 | struct clk_core *core = s->private; | |
3169 | int i; | |
3170 | ||
3171 | for (i = 0; i < core->num_parents - 1; i++) | |
11f6c230 | 3172 | possible_parent_show(s, core, i, ' '); |
92031575 | 3173 | |
11f6c230 | 3174 | possible_parent_show(s, core, i, '\n'); |
92031575 PDS |
3175 | |
3176 | return 0; | |
3177 | } | |
fec0ef3f | 3178 | DEFINE_SHOW_ATTRIBUTE(possible_parents); |
92031575 | 3179 | |
e5e89247 LC |
3180 | static int current_parent_show(struct seq_file *s, void *data) |
3181 | { | |
3182 | struct clk_core *core = s->private; | |
3183 | ||
3184 | if (core->parent) | |
3185 | seq_printf(s, "%s\n", core->parent->name); | |
3186 | ||
3187 | return 0; | |
3188 | } | |
3189 | DEFINE_SHOW_ATTRIBUTE(current_parent); | |
3190 | ||
9fba738a JB |
3191 | static int clk_duty_cycle_show(struct seq_file *s, void *data) |
3192 | { | |
3193 | struct clk_core *core = s->private; | |
3194 | struct clk_duty *duty = &core->duty; | |
3195 | ||
3196 | seq_printf(s, "%u/%u\n", duty->num, duty->den); | |
3197 | ||
3198 | return 0; | |
3199 | } | |
3200 | DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle); | |
3201 | ||
1bd37a46 LC |
3202 | static int clk_min_rate_show(struct seq_file *s, void *data) |
3203 | { | |
3204 | struct clk_core *core = s->private; | |
3205 | unsigned long min_rate, max_rate; | |
3206 | ||
3207 | clk_prepare_lock(); | |
3208 | clk_core_get_boundaries(core, &min_rate, &max_rate); | |
3209 | clk_prepare_unlock(); | |
3210 | seq_printf(s, "%lu\n", min_rate); | |
3211 | ||
3212 | return 0; | |
3213 | } | |
3214 | DEFINE_SHOW_ATTRIBUTE(clk_min_rate); | |
3215 | ||
3216 | static int clk_max_rate_show(struct seq_file *s, void *data) | |
3217 | { | |
3218 | struct clk_core *core = s->private; | |
3219 | unsigned long min_rate, max_rate; | |
3220 | ||
3221 | clk_prepare_lock(); | |
3222 | clk_core_get_boundaries(core, &min_rate, &max_rate); | |
3223 | clk_prepare_unlock(); | |
3224 | seq_printf(s, "%lu\n", max_rate); | |
3225 | ||
3226 | return 0; | |
3227 | } | |
3228 | DEFINE_SHOW_ATTRIBUTE(clk_max_rate); | |
3229 | ||
8a26bbbb | 3230 | static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
4dff95dc | 3231 | { |
8a26bbbb | 3232 | struct dentry *root; |
b61c43c0 | 3233 | |
8a26bbbb GKH |
3234 | if (!core || !pdentry) |
3235 | return; | |
b2476490 | 3236 | |
8a26bbbb GKH |
3237 | root = debugfs_create_dir(core->name, pdentry); |
3238 | core->dentry = root; | |
92031575 | 3239 | |
37215da5 GU |
3240 | debugfs_create_file("clk_rate", clk_rate_mode, root, core, |
3241 | &clk_rate_fops); | |
1bd37a46 LC |
3242 | debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops); |
3243 | debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops); | |
8a26bbbb GKH |
3244 | debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy); |
3245 | debugfs_create_u32("clk_phase", 0444, root, &core->phase); | |
3246 | debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops); | |
3247 | debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count); | |
3248 | debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count); | |
3249 | debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count); | |
3250 | debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count); | |
9fba738a JB |
3251 | debugfs_create_file("clk_duty_cycle", 0444, root, core, |
3252 | &clk_duty_cycle_fops); | |
03111b10 MT |
3253 | #ifdef CLOCK_ALLOW_WRITE_DEBUGFS |
3254 | debugfs_create_file("clk_prepare_enable", 0644, root, core, | |
3255 | &clk_prepare_enable_fops); | |
3256 | #endif | |
b2476490 | 3257 | |
e5e89247 LC |
3258 | if (core->num_parents > 0) |
3259 | debugfs_create_file("clk_parent", 0444, root, core, | |
3260 | ¤t_parent_fops); | |
3261 | ||
8a26bbbb GKH |
3262 | if (core->num_parents > 1) |
3263 | debugfs_create_file("clk_possible_parents", 0444, root, core, | |
3264 | &possible_parents_fops); | |
b2476490 | 3265 | |
8a26bbbb GKH |
3266 | if (core->ops->debug_init) |
3267 | core->ops->debug_init(core->hw, core->dentry); | |
b2476490 | 3268 | } |
035a61c3 TV |
3269 | |
3270 | /** | |
6e5ab41b SB |
3271 | * clk_debug_register - add a clk node to the debugfs clk directory |
3272 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 3273 | * |
6e5ab41b SB |
3274 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
3275 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 3276 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 3277 | */ |
8a26bbbb | 3278 | static void clk_debug_register(struct clk_core *core) |
035a61c3 | 3279 | { |
4dff95dc SB |
3280 | mutex_lock(&clk_debug_lock); |
3281 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
db3188fa | 3282 | if (inited) |
8a26bbbb | 3283 | clk_debug_create_one(core, rootdir); |
4dff95dc | 3284 | mutex_unlock(&clk_debug_lock); |
035a61c3 | 3285 | } |
b2476490 | 3286 | |
4dff95dc | 3287 | /** |
6e5ab41b SB |
3288 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
3289 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 3290 | * |
6e5ab41b SB |
3291 | * Dynamically removes a clk and all its child nodes from the |
3292 | * debugfs clk directory if clk->dentry points to debugfs created by | |
706d5c73 | 3293 | * clk_debug_register in __clk_core_init. |
e59c5371 | 3294 | */ |
4dff95dc | 3295 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 3296 | { |
4dff95dc SB |
3297 | mutex_lock(&clk_debug_lock); |
3298 | hlist_del_init(&core->debug_node); | |
3299 | debugfs_remove_recursive(core->dentry); | |
3300 | core->dentry = NULL; | |
3301 | mutex_unlock(&clk_debug_lock); | |
3302 | } | |
e59c5371 | 3303 | |
4dff95dc | 3304 | /** |
6e5ab41b | 3305 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 3306 | * |
6e5ab41b SB |
3307 | * clks are often initialized very early during boot before memory can be |
3308 | * dynamically allocated and well before debugfs is setup. This function | |
3309 | * populates the debugfs clk directory once at boot-time when we know that | |
3310 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
3311 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
3312 | */ |
3313 | static int __init clk_debug_init(void) | |
3314 | { | |
3315 | struct clk_core *core; | |
dfc202ea | 3316 | |
4dff95dc | 3317 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 3318 | |
8a26bbbb GKH |
3319 | debugfs_create_file("clk_summary", 0444, rootdir, &all_lists, |
3320 | &clk_summary_fops); | |
3321 | debugfs_create_file("clk_dump", 0444, rootdir, &all_lists, | |
3322 | &clk_dump_fops); | |
3323 | debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list, | |
3324 | &clk_summary_fops); | |
3325 | debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list, | |
3326 | &clk_dump_fops); | |
e59c5371 | 3327 | |
4dff95dc SB |
3328 | mutex_lock(&clk_debug_lock); |
3329 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
3330 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 3331 | |
4dff95dc SB |
3332 | inited = 1; |
3333 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 3334 | |
4dff95dc SB |
3335 | return 0; |
3336 | } | |
3337 | late_initcall(clk_debug_init); | |
3338 | #else | |
8a26bbbb | 3339 | static inline void clk_debug_register(struct clk_core *core) { } |
4dff95dc | 3340 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 3341 | { |
3d3801ef | 3342 | } |
4dff95dc | 3343 | #endif |
3d3801ef | 3344 | |
66d95064 JB |
3345 | static void clk_core_reparent_orphans_nolock(void) |
3346 | { | |
3347 | struct clk_core *orphan; | |
3348 | struct hlist_node *tmp2; | |
3349 | ||
3350 | /* | |
3351 | * walk the list of orphan clocks and reparent any that newly finds a | |
3352 | * parent. | |
3353 | */ | |
3354 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { | |
3355 | struct clk_core *parent = __clk_init_parent(orphan); | |
3356 | ||
3357 | /* | |
3358 | * We need to use __clk_set_parent_before() and _after() to | |
3359 | * to properly migrate any prepare/enable count of the orphan | |
3360 | * clock. This is important for CLK_IS_CRITICAL clocks, which | |
3361 | * are enabled during init but might not have a parent yet. | |
3362 | */ | |
3363 | if (parent) { | |
3364 | /* update the clk tree topology */ | |
3365 | __clk_set_parent_before(orphan, parent); | |
3366 | __clk_set_parent_after(orphan, parent, NULL); | |
3367 | __clk_recalc_accuracies(orphan); | |
3368 | __clk_recalc_rates(orphan, 0); | |
3369 | } | |
3370 | } | |
3371 | } | |
3372 | ||
b2476490 | 3373 | /** |
be45ebf2 | 3374 | * __clk_core_init - initialize the data structures in a struct clk_core |
d35c80c2 | 3375 | * @core: clk_core being initialized |
b2476490 | 3376 | * |
035a61c3 | 3377 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 3378 | * parent and rate and sets them both. |
b2476490 | 3379 | */ |
be45ebf2 | 3380 | static int __clk_core_init(struct clk_core *core) |
b2476490 | 3381 | { |
fc0c209c | 3382 | int ret; |
768a5d4f | 3383 | struct clk_core *parent; |
1c8e6004 | 3384 | unsigned long rate; |
c3944ec8 | 3385 | int phase; |
b2476490 | 3386 | |
d35c80c2 | 3387 | if (!core) |
d1302a36 | 3388 | return -EINVAL; |
b2476490 | 3389 | |
eab89f69 | 3390 | clk_prepare_lock(); |
b2476490 | 3391 | |
9a34b453 MS |
3392 | ret = clk_pm_runtime_get(core); |
3393 | if (ret) | |
3394 | goto unlock; | |
3395 | ||
b2476490 | 3396 | /* check to see if a clock with this name is already registered */ |
d6968fca | 3397 | if (clk_core_lookup(core->name)) { |
d1302a36 | 3398 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 3399 | __func__, core->name); |
d1302a36 | 3400 | ret = -EEXIST; |
b2476490 | 3401 | goto out; |
d1302a36 | 3402 | } |
b2476490 | 3403 | |
5fb94e9c | 3404 | /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */ |
d6968fca SB |
3405 | if (core->ops->set_rate && |
3406 | !((core->ops->round_rate || core->ops->determine_rate) && | |
3407 | core->ops->recalc_rate)) { | |
c44fccb5 MY |
3408 | pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
3409 | __func__, core->name); | |
d1302a36 | 3410 | ret = -EINVAL; |
d4d7e3dd MT |
3411 | goto out; |
3412 | } | |
3413 | ||
d6968fca | 3414 | if (core->ops->set_parent && !core->ops->get_parent) { |
c44fccb5 MY |
3415 | pr_err("%s: %s must implement .get_parent & .set_parent\n", |
3416 | __func__, core->name); | |
d1302a36 | 3417 | ret = -EINVAL; |
d4d7e3dd MT |
3418 | goto out; |
3419 | } | |
3420 | ||
3c8e77dd MY |
3421 | if (core->num_parents > 1 && !core->ops->get_parent) { |
3422 | pr_err("%s: %s must implement .get_parent as it has multi parents\n", | |
3423 | __func__, core->name); | |
3424 | ret = -EINVAL; | |
3425 | goto out; | |
3426 | } | |
3427 | ||
d6968fca SB |
3428 | if (core->ops->set_rate_and_parent && |
3429 | !(core->ops->set_parent && core->ops->set_rate)) { | |
c44fccb5 | 3430 | pr_err("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 3431 | __func__, core->name); |
3fa2252b SB |
3432 | ret = -EINVAL; |
3433 | goto out; | |
3434 | } | |
3435 | ||
f6fa75ca JB |
3436 | /* |
3437 | * optional platform-specific magic | |
3438 | * | |
3439 | * The .init callback is not used by any of the basic clock types, but | |
89d079dc JB |
3440 | * exists for weird hardware that must perform initialization magic for |
3441 | * CCF to get an accurate view of clock for any other callbacks. It may | |
3442 | * also be used needs to perform dynamic allocations. Such allocation | |
3443 | * must be freed in the terminate() callback. | |
3444 | * This callback shall not be used to initialize the parameters state, | |
3445 | * such as rate, parent, etc ... | |
f6fa75ca JB |
3446 | * |
3447 | * If it exist, this callback should called before any other callback of | |
3448 | * the clock | |
3449 | */ | |
89d079dc JB |
3450 | if (core->ops->init) { |
3451 | ret = core->ops->init(core->hw); | |
3452 | if (ret) | |
3453 | goto out; | |
3454 | } | |
f6fa75ca | 3455 | |
768a5d4f | 3456 | parent = core->parent = __clk_init_parent(core); |
b2476490 MT |
3457 | |
3458 | /* | |
706d5c73 SB |
3459 | * Populate core->parent if parent has already been clk_core_init'd. If |
3460 | * parent has not yet been clk_core_init'd then place clk in the orphan | |
47b0eeb3 | 3461 | * list. If clk doesn't have any parents then place it in the root |
b2476490 MT |
3462 | * clk list. |
3463 | * | |
3464 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
3465 | * clocks and re-parent any that are children of the clock currently | |
3466 | * being clk_init'd. | |
3467 | */ | |
768a5d4f SB |
3468 | if (parent) { |
3469 | hlist_add_head(&core->child_node, &parent->children); | |
3470 | core->orphan = parent->orphan; | |
47b0eeb3 | 3471 | } else if (!core->num_parents) { |
d6968fca | 3472 | hlist_add_head(&core->child_node, &clk_root_list); |
e6500344 HS |
3473 | core->orphan = false; |
3474 | } else { | |
d6968fca | 3475 | hlist_add_head(&core->child_node, &clk_orphan_list); |
e6500344 HS |
3476 | core->orphan = true; |
3477 | } | |
b2476490 | 3478 | |
5279fc40 BB |
3479 | /* |
3480 | * Set clk's accuracy. The preferred method is to use | |
3481 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
3482 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
3483 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
3484 | * clock). | |
3485 | */ | |
d6968fca SB |
3486 | if (core->ops->recalc_accuracy) |
3487 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
0daa376d | 3488 | clk_core_get_accuracy_no_lock(parent)); |
768a5d4f SB |
3489 | else if (parent) |
3490 | core->accuracy = parent->accuracy; | |
5279fc40 | 3491 | else |
d6968fca | 3492 | core->accuracy = 0; |
5279fc40 | 3493 | |
9824cf73 | 3494 | /* |
f21cf9c7 | 3495 | * Set clk's phase by clk_core_get_phase() caching the phase. |
9824cf73 MR |
3496 | * Since a phase is by definition relative to its parent, just |
3497 | * query the current clock phase, or just assume it's in phase. | |
3498 | */ | |
c3944ec8 MR |
3499 | phase = clk_core_get_phase(core); |
3500 | if (phase < 0) { | |
3501 | ret = phase; | |
27608786 SB |
3502 | pr_warn("%s: Failed to get phase for clk '%s'\n", __func__, |
3503 | core->name); | |
3504 | goto out; | |
3505 | } | |
9824cf73 | 3506 | |
9fba738a JB |
3507 | /* |
3508 | * Set clk's duty cycle. | |
3509 | */ | |
3510 | clk_core_update_duty_cycle_nolock(core); | |
3511 | ||
b2476490 MT |
3512 | /* |
3513 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
3514 | * simple clocks and lazy developers the default fallback is to use the | |
3515 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
3516 | * then rate is set to zero. | |
3517 | */ | |
d6968fca SB |
3518 | if (core->ops->recalc_rate) |
3519 | rate = core->ops->recalc_rate(core->hw, | |
768a5d4f SB |
3520 | clk_core_get_rate_nolock(parent)); |
3521 | else if (parent) | |
3522 | rate = parent->rate; | |
b2476490 | 3523 | else |
1c8e6004 | 3524 | rate = 0; |
d6968fca | 3525 | core->rate = core->req_rate = rate; |
b2476490 | 3526 | |
99652a46 JB |
3527 | /* |
3528 | * Enable CLK_IS_CRITICAL clocks so newly added critical clocks | |
3529 | * don't get accidentally disabled when walking the orphan tree and | |
3530 | * reparenting clocks | |
3531 | */ | |
3532 | if (core->flags & CLK_IS_CRITICAL) { | |
3533 | unsigned long flags; | |
3534 | ||
12ead774 | 3535 | ret = clk_core_prepare(core); |
2d269992 SB |
3536 | if (ret) { |
3537 | pr_warn("%s: critical clk '%s' failed to prepare\n", | |
3538 | __func__, core->name); | |
12ead774 | 3539 | goto out; |
2d269992 | 3540 | } |
99652a46 JB |
3541 | |
3542 | flags = clk_enable_lock(); | |
12ead774 | 3543 | ret = clk_core_enable(core); |
99652a46 | 3544 | clk_enable_unlock(flags); |
12ead774 | 3545 | if (ret) { |
2d269992 SB |
3546 | pr_warn("%s: critical clk '%s' failed to enable\n", |
3547 | __func__, core->name); | |
12ead774 GR |
3548 | clk_core_unprepare(core); |
3549 | goto out; | |
3550 | } | |
99652a46 JB |
3551 | } |
3552 | ||
66d95064 | 3553 | clk_core_reparent_orphans_nolock(); |
1f61e5f1 | 3554 | |
b2476490 | 3555 | |
d6968fca | 3556 | kref_init(&core->ref); |
b2476490 | 3557 | out: |
9a34b453 MS |
3558 | clk_pm_runtime_put(core); |
3559 | unlock: | |
018d4671 MZ |
3560 | if (ret) |
3561 | hlist_del_init(&core->child_node); | |
3562 | ||
eab89f69 | 3563 | clk_prepare_unlock(); |
b2476490 | 3564 | |
89f7e9de | 3565 | if (!ret) |
d6968fca | 3566 | clk_debug_register(core); |
89f7e9de | 3567 | |
d1302a36 | 3568 | return ret; |
b2476490 MT |
3569 | } |
3570 | ||
1df4046a SB |
3571 | /** |
3572 | * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core | |
3573 | * @core: clk to add consumer to | |
3574 | * @clk: consumer to link to a clk | |
3575 | */ | |
3576 | static void clk_core_link_consumer(struct clk_core *core, struct clk *clk) | |
3577 | { | |
3578 | clk_prepare_lock(); | |
3579 | hlist_add_head(&clk->clks_node, &core->clks); | |
3580 | clk_prepare_unlock(); | |
3581 | } | |
3582 | ||
3583 | /** | |
3584 | * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core | |
3585 | * @clk: consumer to unlink | |
3586 | */ | |
3587 | static void clk_core_unlink_consumer(struct clk *clk) | |
3588 | { | |
3589 | lockdep_assert_held(&prepare_lock); | |
3590 | hlist_del(&clk->clks_node); | |
3591 | } | |
3592 | ||
3593 | /** | |
3594 | * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core | |
3595 | * @core: clk to allocate a consumer for | |
3596 | * @dev_id: string describing device name | |
3597 | * @con_id: connection ID string on device | |
3598 | * | |
3599 | * Returns: clk consumer left unlinked from the consumer list | |
3600 | */ | |
3601 | static struct clk *alloc_clk(struct clk_core *core, const char *dev_id, | |
035a61c3 | 3602 | const char *con_id) |
0197b3ea | 3603 | { |
0197b3ea SK |
3604 | struct clk *clk; |
3605 | ||
035a61c3 TV |
3606 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
3607 | if (!clk) | |
3608 | return ERR_PTR(-ENOMEM); | |
3609 | ||
1df4046a | 3610 | clk->core = core; |
035a61c3 | 3611 | clk->dev_id = dev_id; |
253160a8 | 3612 | clk->con_id = kstrdup_const(con_id, GFP_KERNEL); |
1c8e6004 TV |
3613 | clk->max_rate = ULONG_MAX; |
3614 | ||
0197b3ea SK |
3615 | return clk; |
3616 | } | |
035a61c3 | 3617 | |
1df4046a SB |
3618 | /** |
3619 | * free_clk - Free a clk consumer | |
3620 | * @clk: clk consumer to free | |
3621 | * | |
3622 | * Note, this assumes the clk has been unlinked from the clk_core consumer | |
3623 | * list. | |
3624 | */ | |
3625 | static void free_clk(struct clk *clk) | |
1c8e6004 | 3626 | { |
253160a8 | 3627 | kfree_const(clk->con_id); |
1c8e6004 TV |
3628 | kfree(clk); |
3629 | } | |
0197b3ea | 3630 | |
1df4046a SB |
3631 | /** |
3632 | * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given | |
3633 | * a clk_hw | |
efa85048 | 3634 | * @dev: clk consumer device |
1df4046a SB |
3635 | * @hw: clk_hw associated with the clk being consumed |
3636 | * @dev_id: string describing device name | |
3637 | * @con_id: connection ID string on device | |
3638 | * | |
3639 | * This is the main function used to create a clk pointer for use by clk | |
3640 | * consumers. It connects a consumer to the clk_core and clk_hw structures | |
3641 | * used by the framework and clk provider respectively. | |
3642 | */ | |
efa85048 | 3643 | struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw, |
1df4046a SB |
3644 | const char *dev_id, const char *con_id) |
3645 | { | |
3646 | struct clk *clk; | |
3647 | struct clk_core *core; | |
3648 | ||
3649 | /* This is to allow this function to be chained to others */ | |
3650 | if (IS_ERR_OR_NULL(hw)) | |
3651 | return ERR_CAST(hw); | |
3652 | ||
3653 | core = hw->core; | |
3654 | clk = alloc_clk(core, dev_id, con_id); | |
3655 | if (IS_ERR(clk)) | |
3656 | return clk; | |
efa85048 | 3657 | clk->dev = dev; |
1df4046a SB |
3658 | |
3659 | if (!try_module_get(core->owner)) { | |
3660 | free_clk(clk); | |
3661 | return ERR_PTR(-ENOENT); | |
3662 | } | |
3663 | ||
3664 | kref_get(&core->ref); | |
3665 | clk_core_link_consumer(core, clk); | |
3666 | ||
3667 | return clk; | |
3668 | } | |
3669 | ||
fc0c209c | 3670 | static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist) |
b2476490 | 3671 | { |
fc0c209c SB |
3672 | const char *dst; |
3673 | ||
3674 | if (!src) { | |
3675 | if (must_exist) | |
3676 | return -EINVAL; | |
3677 | return 0; | |
3678 | } | |
3679 | ||
3680 | *dst_p = dst = kstrdup_const(src, GFP_KERNEL); | |
3681 | if (!dst) | |
3682 | return -ENOMEM; | |
3683 | ||
3684 | return 0; | |
3685 | } | |
3686 | ||
0214f33c SB |
3687 | static int clk_core_populate_parent_map(struct clk_core *core, |
3688 | const struct clk_init_data *init) | |
fc0c209c | 3689 | { |
fc0c209c SB |
3690 | u8 num_parents = init->num_parents; |
3691 | const char * const *parent_names = init->parent_names; | |
3692 | const struct clk_hw **parent_hws = init->parent_hws; | |
3693 | const struct clk_parent_data *parent_data = init->parent_data; | |
3694 | int i, ret = 0; | |
3695 | struct clk_parent_map *parents, *parent; | |
3696 | ||
3697 | if (!num_parents) | |
3698 | return 0; | |
3699 | ||
3700 | /* | |
3701 | * Avoid unnecessary string look-ups of clk_core's possible parents by | |
3702 | * having a cache of names/clk_hw pointers to clk_core pointers. | |
3703 | */ | |
3704 | parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL); | |
3705 | core->parents = parents; | |
3706 | if (!parents) | |
3707 | return -ENOMEM; | |
3708 | ||
3709 | /* Copy everything over because it might be __initdata */ | |
3710 | for (i = 0, parent = parents; i < num_parents; i++, parent++) { | |
601b6e93 | 3711 | parent->index = -1; |
fc0c209c SB |
3712 | if (parent_names) { |
3713 | /* throw a WARN if any entries are NULL */ | |
3714 | WARN(!parent_names[i], | |
3715 | "%s: invalid NULL in %s's .parent_names\n", | |
3716 | __func__, core->name); | |
3717 | ret = clk_cpy_name(&parent->name, parent_names[i], | |
3718 | true); | |
3719 | } else if (parent_data) { | |
3720 | parent->hw = parent_data[i].hw; | |
601b6e93 | 3721 | parent->index = parent_data[i].index; |
fc0c209c SB |
3722 | ret = clk_cpy_name(&parent->fw_name, |
3723 | parent_data[i].fw_name, false); | |
3724 | if (!ret) | |
3725 | ret = clk_cpy_name(&parent->name, | |
3726 | parent_data[i].name, | |
3727 | false); | |
3728 | } else if (parent_hws) { | |
3729 | parent->hw = parent_hws[i]; | |
3730 | } else { | |
3731 | ret = -EINVAL; | |
3732 | WARN(1, "Must specify parents if num_parents > 0\n"); | |
3733 | } | |
3734 | ||
3735 | if (ret) { | |
3736 | do { | |
3737 | kfree_const(parents[i].name); | |
3738 | kfree_const(parents[i].fw_name); | |
3739 | } while (--i >= 0); | |
3740 | kfree(parents); | |
3741 | ||
3742 | return ret; | |
3743 | } | |
3744 | } | |
3745 | ||
3746 | return 0; | |
3747 | } | |
3748 | ||
3749 | static void clk_core_free_parent_map(struct clk_core *core) | |
3750 | { | |
3751 | int i = core->num_parents; | |
3752 | ||
3753 | if (!core->num_parents) | |
3754 | return; | |
3755 | ||
3756 | while (--i >= 0) { | |
3757 | kfree_const(core->parents[i].name); | |
3758 | kfree_const(core->parents[i].fw_name); | |
3759 | } | |
3760 | ||
3761 | kfree(core->parents); | |
3762 | } | |
3763 | ||
89a5ddcc SB |
3764 | static struct clk * |
3765 | __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw) | |
b2476490 | 3766 | { |
fc0c209c | 3767 | int ret; |
d6968fca | 3768 | struct clk_core *core; |
0214f33c SB |
3769 | const struct clk_init_data *init = hw->init; |
3770 | ||
3771 | /* | |
3772 | * The init data is not supposed to be used outside of registration path. | |
3773 | * Set it to NULL so that provider drivers can't use it either and so that | |
3774 | * we catch use of hw->init early on in the core. | |
3775 | */ | |
3776 | hw->init = NULL; | |
293ba3b4 | 3777 | |
d6968fca SB |
3778 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
3779 | if (!core) { | |
293ba3b4 SB |
3780 | ret = -ENOMEM; |
3781 | goto fail_out; | |
3782 | } | |
b2476490 | 3783 | |
0214f33c | 3784 | core->name = kstrdup_const(init->name, GFP_KERNEL); |
d6968fca | 3785 | if (!core->name) { |
0197b3ea SK |
3786 | ret = -ENOMEM; |
3787 | goto fail_name; | |
3788 | } | |
29fd2a34 | 3789 | |
0214f33c | 3790 | if (WARN_ON(!init->ops)) { |
29fd2a34 JB |
3791 | ret = -EINVAL; |
3792 | goto fail_ops; | |
3793 | } | |
0214f33c | 3794 | core->ops = init->ops; |
29fd2a34 | 3795 | |
9a34b453 | 3796 | if (dev && pm_runtime_enabled(dev)) |
24478839 MR |
3797 | core->rpm_enabled = true; |
3798 | core->dev = dev; | |
89a5ddcc | 3799 | core->of_node = np; |
ac2df527 | 3800 | if (dev && dev->driver) |
d6968fca SB |
3801 | core->owner = dev->driver->owner; |
3802 | core->hw = hw; | |
0214f33c SB |
3803 | core->flags = init->flags; |
3804 | core->num_parents = init->num_parents; | |
9783c0d9 SB |
3805 | core->min_rate = 0; |
3806 | core->max_rate = ULONG_MAX; | |
d6968fca | 3807 | hw->core = core; |
b2476490 | 3808 | |
0214f33c | 3809 | ret = clk_core_populate_parent_map(core, init); |
fc0c209c | 3810 | if (ret) |
176d1169 | 3811 | goto fail_parents; |
176d1169 | 3812 | |
d6968fca | 3813 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 3814 | |
1df4046a SB |
3815 | /* |
3816 | * Don't call clk_hw_create_clk() here because that would pin the | |
3817 | * provider module to itself and prevent it from ever being removed. | |
3818 | */ | |
3819 | hw->clk = alloc_clk(core, NULL, NULL); | |
035a61c3 | 3820 | if (IS_ERR(hw->clk)) { |
035a61c3 | 3821 | ret = PTR_ERR(hw->clk); |
fc0c209c | 3822 | goto fail_create_clk; |
035a61c3 TV |
3823 | } |
3824 | ||
1df4046a SB |
3825 | clk_core_link_consumer(hw->core, hw->clk); |
3826 | ||
be45ebf2 | 3827 | ret = __clk_core_init(core); |
d1302a36 | 3828 | if (!ret) |
035a61c3 | 3829 | return hw->clk; |
b2476490 | 3830 | |
1df4046a SB |
3831 | clk_prepare_lock(); |
3832 | clk_core_unlink_consumer(hw->clk); | |
3833 | clk_prepare_unlock(); | |
3834 | ||
3835 | free_clk(hw->clk); | |
035a61c3 | 3836 | hw->clk = NULL; |
b2476490 | 3837 | |
fc0c209c SB |
3838 | fail_create_clk: |
3839 | clk_core_free_parent_map(core); | |
176d1169 | 3840 | fail_parents: |
29fd2a34 | 3841 | fail_ops: |
d6968fca | 3842 | kfree_const(core->name); |
0197b3ea | 3843 | fail_name: |
d6968fca | 3844 | kfree(core); |
d1302a36 MT |
3845 | fail_out: |
3846 | return ERR_PTR(ret); | |
b2476490 | 3847 | } |
fceaa7d8 | 3848 | |
9011f926 SB |
3849 | /** |
3850 | * dev_or_parent_of_node() - Get device node of @dev or @dev's parent | |
3851 | * @dev: Device to get device node of | |
3852 | * | |
3853 | * Return: device node pointer of @dev, or the device node pointer of | |
3854 | * @dev->parent if dev doesn't have a device node, or NULL if neither | |
3855 | * @dev or @dev->parent have a device node. | |
3856 | */ | |
3857 | static struct device_node *dev_or_parent_of_node(struct device *dev) | |
3858 | { | |
3859 | struct device_node *np; | |
3860 | ||
3861 | if (!dev) | |
3862 | return NULL; | |
3863 | ||
3864 | np = dev_of_node(dev); | |
3865 | if (!np) | |
3866 | np = dev_of_node(dev->parent); | |
3867 | ||
3868 | return np; | |
3869 | } | |
3870 | ||
fceaa7d8 SB |
3871 | /** |
3872 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
3873 | * @dev: device that is registering this clock | |
3874 | * @hw: link to hardware-specific clock data | |
3875 | * | |
c1157f60 SB |
3876 | * clk_register is the *deprecated* interface for populating the clock tree with |
3877 | * new clock nodes. Use clk_hw_register() instead. | |
3878 | * | |
3879 | * Returns: a pointer to the newly allocated struct clk which | |
fceaa7d8 SB |
3880 | * cannot be dereferenced by driver code but may be used in conjunction with the |
3881 | * rest of the clock API. In the event of an error clk_register will return an | |
3882 | * error code; drivers must test for an error code after calling clk_register. | |
3883 | */ | |
3884 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
3885 | { | |
9011f926 | 3886 | return __clk_register(dev, dev_or_parent_of_node(dev), hw); |
fceaa7d8 | 3887 | } |
b2476490 MT |
3888 | EXPORT_SYMBOL_GPL(clk_register); |
3889 | ||
4143804c SB |
3890 | /** |
3891 | * clk_hw_register - register a clk_hw and return an error code | |
3892 | * @dev: device that is registering this clock | |
3893 | * @hw: link to hardware-specific clock data | |
3894 | * | |
3895 | * clk_hw_register is the primary interface for populating the clock tree with | |
3896 | * new clock nodes. It returns an integer equal to zero indicating success or | |
3897 | * less than zero indicating failure. Drivers must test for an error code after | |
3898 | * calling clk_hw_register(). | |
3899 | */ | |
3900 | int clk_hw_register(struct device *dev, struct clk_hw *hw) | |
3901 | { | |
9011f926 SB |
3902 | return PTR_ERR_OR_ZERO(__clk_register(dev, dev_or_parent_of_node(dev), |
3903 | hw)); | |
4143804c SB |
3904 | } |
3905 | EXPORT_SYMBOL_GPL(clk_hw_register); | |
3906 | ||
89a5ddcc SB |
3907 | /* |
3908 | * of_clk_hw_register - register a clk_hw and return an error code | |
3909 | * @node: device_node of device that is registering this clock | |
3910 | * @hw: link to hardware-specific clock data | |
3911 | * | |
3912 | * of_clk_hw_register() is the primary interface for populating the clock tree | |
3913 | * with new clock nodes when a struct device is not available, but a struct | |
3914 | * device_node is. It returns an integer equal to zero indicating success or | |
3915 | * less than zero indicating failure. Drivers must test for an error code after | |
3916 | * calling of_clk_hw_register(). | |
3917 | */ | |
3918 | int of_clk_hw_register(struct device_node *node, struct clk_hw *hw) | |
3919 | { | |
3920 | return PTR_ERR_OR_ZERO(__clk_register(NULL, node, hw)); | |
3921 | } | |
3922 | EXPORT_SYMBOL_GPL(of_clk_hw_register); | |
3923 | ||
6e5ab41b | 3924 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
3925 | static void __clk_release(struct kref *ref) |
3926 | { | |
d6968fca | 3927 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
fcb0ee6a | 3928 | |
496eadf8 KK |
3929 | lockdep_assert_held(&prepare_lock); |
3930 | ||
fc0c209c | 3931 | clk_core_free_parent_map(core); |
d6968fca SB |
3932 | kfree_const(core->name); |
3933 | kfree(core); | |
fcb0ee6a SN |
3934 | } |
3935 | ||
3936 | /* | |
3937 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
3938 | * after clk_unregister() was called on a clock and until last clock | |
3939 | * consumer calls clk_put() and the struct clk object is freed. | |
3940 | */ | |
3941 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
3942 | { | |
3943 | return -ENXIO; | |
3944 | } | |
3945 | ||
3946 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
3947 | { | |
3948 | WARN_ON_ONCE(1); | |
3949 | } | |
3950 | ||
3951 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
3952 | unsigned long parent_rate) | |
3953 | { | |
3954 | return -ENXIO; | |
3955 | } | |
3956 | ||
3957 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
3958 | { | |
3959 | return -ENXIO; | |
3960 | } | |
3961 | ||
3962 | static const struct clk_ops clk_nodrv_ops = { | |
3963 | .enable = clk_nodrv_prepare_enable, | |
3964 | .disable = clk_nodrv_disable_unprepare, | |
3965 | .prepare = clk_nodrv_prepare_enable, | |
3966 | .unprepare = clk_nodrv_disable_unprepare, | |
3967 | .set_rate = clk_nodrv_set_rate, | |
3968 | .set_parent = clk_nodrv_set_parent, | |
3969 | }; | |
3970 | ||
bdcf1dc2 SB |
3971 | static void clk_core_evict_parent_cache_subtree(struct clk_core *root, |
3972 | struct clk_core *target) | |
3973 | { | |
3974 | int i; | |
3975 | struct clk_core *child; | |
3976 | ||
3977 | for (i = 0; i < root->num_parents; i++) | |
3978 | if (root->parents[i].core == target) | |
3979 | root->parents[i].core = NULL; | |
3980 | ||
3981 | hlist_for_each_entry(child, &root->children, child_node) | |
3982 | clk_core_evict_parent_cache_subtree(child, target); | |
3983 | } | |
3984 | ||
3985 | /* Remove this clk from all parent caches */ | |
3986 | static void clk_core_evict_parent_cache(struct clk_core *core) | |
3987 | { | |
3988 | struct hlist_head **lists; | |
3989 | struct clk_core *root; | |
3990 | ||
3991 | lockdep_assert_held(&prepare_lock); | |
3992 | ||
3993 | for (lists = all_lists; *lists; lists++) | |
3994 | hlist_for_each_entry(root, *lists, child_node) | |
3995 | clk_core_evict_parent_cache_subtree(root, core); | |
3996 | ||
3997 | } | |
3998 | ||
1df5c939 MB |
3999 | /** |
4000 | * clk_unregister - unregister a currently registered clock | |
4001 | * @clk: clock to unregister | |
1df5c939 | 4002 | */ |
fcb0ee6a SN |
4003 | void clk_unregister(struct clk *clk) |
4004 | { | |
4005 | unsigned long flags; | |
f873744c | 4006 | const struct clk_ops *ops; |
fcb0ee6a | 4007 | |
6314b679 SB |
4008 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
4009 | return; | |
4010 | ||
035a61c3 | 4011 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
4012 | |
4013 | clk_prepare_lock(); | |
4014 | ||
f873744c JB |
4015 | ops = clk->core->ops; |
4016 | if (ops == &clk_nodrv_ops) { | |
035a61c3 TV |
4017 | pr_err("%s: unregistered clock: %s\n", __func__, |
4018 | clk->core->name); | |
4106a3d9 | 4019 | goto unlock; |
fcb0ee6a SN |
4020 | } |
4021 | /* | |
4022 | * Assign empty clock ops for consumers that might still hold | |
4023 | * a reference to this clock. | |
4024 | */ | |
4025 | flags = clk_enable_lock(); | |
035a61c3 | 4026 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
4027 | clk_enable_unlock(flags); |
4028 | ||
f873744c JB |
4029 | if (ops->terminate) |
4030 | ops->terminate(clk->core->hw); | |
4031 | ||
035a61c3 TV |
4032 | if (!hlist_empty(&clk->core->children)) { |
4033 | struct clk_core *child; | |
874f224c | 4034 | struct hlist_node *t; |
fcb0ee6a SN |
4035 | |
4036 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
4037 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
4038 | child_node) | |
91baa9ff | 4039 | clk_core_set_parent_nolock(child, NULL); |
fcb0ee6a SN |
4040 | } |
4041 | ||
bdcf1dc2 SB |
4042 | clk_core_evict_parent_cache(clk->core); |
4043 | ||
035a61c3 | 4044 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 4045 | |
035a61c3 | 4046 | if (clk->core->prepare_count) |
fcb0ee6a | 4047 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 | 4048 | __func__, clk->core->name); |
e55a839a JB |
4049 | |
4050 | if (clk->core->protect_count) | |
4051 | pr_warn("%s: unregistering protected clock: %s\n", | |
4052 | __func__, clk->core->name); | |
4053 | ||
035a61c3 | 4054 | kref_put(&clk->core->ref, __clk_release); |
82474707 | 4055 | free_clk(clk); |
4106a3d9 | 4056 | unlock: |
fcb0ee6a SN |
4057 | clk_prepare_unlock(); |
4058 | } | |
1df5c939 MB |
4059 | EXPORT_SYMBOL_GPL(clk_unregister); |
4060 | ||
4143804c SB |
4061 | /** |
4062 | * clk_hw_unregister - unregister a currently registered clk_hw | |
4063 | * @hw: hardware-specific clock data to unregister | |
4064 | */ | |
4065 | void clk_hw_unregister(struct clk_hw *hw) | |
4066 | { | |
4067 | clk_unregister(hw->clk); | |
4068 | } | |
4069 | EXPORT_SYMBOL_GPL(clk_hw_unregister); | |
4070 | ||
46c8773a SB |
4071 | static void devm_clk_release(struct device *dev, void *res) |
4072 | { | |
293ba3b4 | 4073 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
4074 | } |
4075 | ||
4143804c SB |
4076 | static void devm_clk_hw_release(struct device *dev, void *res) |
4077 | { | |
4078 | clk_hw_unregister(*(struct clk_hw **)res); | |
4079 | } | |
4080 | ||
46c8773a SB |
4081 | /** |
4082 | * devm_clk_register - resource managed clk_register() | |
4083 | * @dev: device that is registering this clock | |
4084 | * @hw: link to hardware-specific clock data | |
4085 | * | |
9fe9b7ab SB |
4086 | * Managed clk_register(). This function is *deprecated*, use devm_clk_hw_register() instead. |
4087 | * | |
4088 | * Clocks returned from this function are automatically clk_unregister()ed on | |
4089 | * driver detach. See clk_register() for more information. | |
46c8773a SB |
4090 | */ |
4091 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
4092 | { | |
4093 | struct clk *clk; | |
293ba3b4 | 4094 | struct clk **clkp; |
46c8773a | 4095 | |
293ba3b4 SB |
4096 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
4097 | if (!clkp) | |
46c8773a SB |
4098 | return ERR_PTR(-ENOMEM); |
4099 | ||
293ba3b4 SB |
4100 | clk = clk_register(dev, hw); |
4101 | if (!IS_ERR(clk)) { | |
4102 | *clkp = clk; | |
4103 | devres_add(dev, clkp); | |
46c8773a | 4104 | } else { |
293ba3b4 | 4105 | devres_free(clkp); |
46c8773a SB |
4106 | } |
4107 | ||
4108 | return clk; | |
4109 | } | |
4110 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
4111 | ||
4143804c SB |
4112 | /** |
4113 | * devm_clk_hw_register - resource managed clk_hw_register() | |
4114 | * @dev: device that is registering this clock | |
4115 | * @hw: link to hardware-specific clock data | |
4116 | * | |
c47265ad | 4117 | * Managed clk_hw_register(). Clocks registered by this function are |
4143804c SB |
4118 | * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register() |
4119 | * for more information. | |
4120 | */ | |
4121 | int devm_clk_hw_register(struct device *dev, struct clk_hw *hw) | |
4122 | { | |
4123 | struct clk_hw **hwp; | |
4124 | int ret; | |
4125 | ||
4126 | hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL); | |
4127 | if (!hwp) | |
4128 | return -ENOMEM; | |
4129 | ||
4130 | ret = clk_hw_register(dev, hw); | |
4131 | if (!ret) { | |
4132 | *hwp = hw; | |
4133 | devres_add(dev, hwp); | |
4134 | } else { | |
4135 | devres_free(hwp); | |
4136 | } | |
4137 | ||
4138 | return ret; | |
4139 | } | |
4140 | EXPORT_SYMBOL_GPL(devm_clk_hw_register); | |
4141 | ||
46c8773a SB |
4142 | static int devm_clk_match(struct device *dev, void *res, void *data) |
4143 | { | |
4144 | struct clk *c = res; | |
4145 | if (WARN_ON(!c)) | |
4146 | return 0; | |
4147 | return c == data; | |
4148 | } | |
4149 | ||
4143804c SB |
4150 | static int devm_clk_hw_match(struct device *dev, void *res, void *data) |
4151 | { | |
4152 | struct clk_hw *hw = res; | |
4153 | ||
4154 | if (WARN_ON(!hw)) | |
4155 | return 0; | |
4156 | return hw == data; | |
4157 | } | |
4158 | ||
46c8773a SB |
4159 | /** |
4160 | * devm_clk_unregister - resource managed clk_unregister() | |
6378cfdc | 4161 | * @dev: device that is unregistering the clock data |
46c8773a SB |
4162 | * @clk: clock to unregister |
4163 | * | |
4164 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
4165 | * this function will not need to be called and the resource management | |
4166 | * code will ensure that the resource is freed. | |
4167 | */ | |
4168 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
4169 | { | |
4170 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
4171 | } | |
4172 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
4173 | ||
4143804c SB |
4174 | /** |
4175 | * devm_clk_hw_unregister - resource managed clk_hw_unregister() | |
4176 | * @dev: device that is unregistering the hardware-specific clock data | |
4177 | * @hw: link to hardware-specific clock data | |
4178 | * | |
4179 | * Unregister a clk_hw registered with devm_clk_hw_register(). Normally | |
4180 | * this function will not need to be called and the resource management | |
4181 | * code will ensure that the resource is freed. | |
4182 | */ | |
4183 | void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw) | |
4184 | { | |
4185 | WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match, | |
4186 | hw)); | |
4187 | } | |
4188 | EXPORT_SYMBOL_GPL(devm_clk_hw_unregister); | |
4189 | ||
ac2df527 SN |
4190 | /* |
4191 | * clkdev helpers | |
4192 | */ | |
ac2df527 SN |
4193 | |
4194 | void __clk_put(struct clk *clk) | |
4195 | { | |
10cdfe54 TV |
4196 | struct module *owner; |
4197 | ||
00efcb1c | 4198 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
4199 | return; |
4200 | ||
fcb0ee6a | 4201 | clk_prepare_lock(); |
1c8e6004 | 4202 | |
55e9b8b7 JB |
4203 | /* |
4204 | * Before calling clk_put, all calls to clk_rate_exclusive_get() from a | |
4205 | * given user should be balanced with calls to clk_rate_exclusive_put() | |
4206 | * and by that same consumer | |
4207 | */ | |
4208 | if (WARN_ON(clk->exclusive_count)) { | |
4209 | /* We voiced our concern, let's sanitize the situation */ | |
4210 | clk->core->protect_count -= (clk->exclusive_count - 1); | |
4211 | clk_core_rate_unprotect(clk->core); | |
4212 | clk->exclusive_count = 0; | |
4213 | } | |
4214 | ||
50595f8b | 4215 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
4216 | if (clk->min_rate > clk->core->req_rate || |
4217 | clk->max_rate < clk->core->req_rate) | |
4218 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
4219 | ||
1c8e6004 TV |
4220 | owner = clk->core->owner; |
4221 | kref_put(&clk->core->ref, __clk_release); | |
4222 | ||
fcb0ee6a SN |
4223 | clk_prepare_unlock(); |
4224 | ||
10cdfe54 | 4225 | module_put(owner); |
035a61c3 | 4226 | |
1df4046a | 4227 | free_clk(clk); |
ac2df527 SN |
4228 | } |
4229 | ||
b2476490 MT |
4230 | /*** clk rate change notifiers ***/ |
4231 | ||
4232 | /** | |
4233 | * clk_notifier_register - add a clk rate change notifier | |
4234 | * @clk: struct clk * to watch | |
4235 | * @nb: struct notifier_block * with callback info | |
4236 | * | |
4237 | * Request notification when clk's rate changes. This uses an SRCU | |
4238 | * notifier because we want it to block and notifier unregistrations are | |
4239 | * uncommon. The callbacks associated with the notifier must not | |
4240 | * re-enter into the clk framework by calling any top-level clk APIs; | |
4241 | * this will cause a nested prepare_lock mutex. | |
4242 | * | |
198bb594 MY |
4243 | * In all notification cases (pre, post and abort rate change) the original |
4244 | * clock rate is passed to the callback via struct clk_notifier_data.old_rate | |
4245 | * and the new frequency is passed via struct clk_notifier_data.new_rate. | |
b2476490 | 4246 | * |
b2476490 MT |
4247 | * clk_notifier_register() must be called from non-atomic context. |
4248 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
4249 | * allocation failure; otherwise, passes along the return value of | |
4250 | * srcu_notifier_chain_register(). | |
4251 | */ | |
4252 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
4253 | { | |
4254 | struct clk_notifier *cn; | |
4255 | int ret = -ENOMEM; | |
4256 | ||
4257 | if (!clk || !nb) | |
4258 | return -EINVAL; | |
4259 | ||
eab89f69 | 4260 | clk_prepare_lock(); |
b2476490 MT |
4261 | |
4262 | /* search the list of notifiers for this clk */ | |
4263 | list_for_each_entry(cn, &clk_notifier_list, node) | |
4264 | if (cn->clk == clk) | |
4265 | break; | |
4266 | ||
4267 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
4268 | if (cn->clk != clk) { | |
1808a320 | 4269 | cn = kzalloc(sizeof(*cn), GFP_KERNEL); |
b2476490 MT |
4270 | if (!cn) |
4271 | goto out; | |
4272 | ||
4273 | cn->clk = clk; | |
4274 | srcu_init_notifier_head(&cn->notifier_head); | |
4275 | ||
4276 | list_add(&cn->node, &clk_notifier_list); | |
4277 | } | |
4278 | ||
4279 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
4280 | ||
035a61c3 | 4281 | clk->core->notifier_count++; |
b2476490 MT |
4282 | |
4283 | out: | |
eab89f69 | 4284 | clk_prepare_unlock(); |
b2476490 MT |
4285 | |
4286 | return ret; | |
4287 | } | |
4288 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
4289 | ||
4290 | /** | |
4291 | * clk_notifier_unregister - remove a clk rate change notifier | |
4292 | * @clk: struct clk * | |
4293 | * @nb: struct notifier_block * with callback info | |
4294 | * | |
4295 | * Request no further notification for changes to 'clk' and frees memory | |
4296 | * allocated in clk_notifier_register. | |
4297 | * | |
4298 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
4299 | * along the return value of srcu_notifier_chain_unregister(). | |
4300 | */ | |
4301 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
4302 | { | |
4303 | struct clk_notifier *cn = NULL; | |
4304 | int ret = -EINVAL; | |
4305 | ||
4306 | if (!clk || !nb) | |
4307 | return -EINVAL; | |
4308 | ||
eab89f69 | 4309 | clk_prepare_lock(); |
b2476490 MT |
4310 | |
4311 | list_for_each_entry(cn, &clk_notifier_list, node) | |
4312 | if (cn->clk == clk) | |
4313 | break; | |
4314 | ||
4315 | if (cn->clk == clk) { | |
4316 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
4317 | ||
035a61c3 | 4318 | clk->core->notifier_count--; |
b2476490 MT |
4319 | |
4320 | /* XXX the notifier code should handle this better */ | |
4321 | if (!cn->notifier_head.head) { | |
4322 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 4323 | list_del(&cn->node); |
b2476490 MT |
4324 | kfree(cn); |
4325 | } | |
4326 | ||
4327 | } else { | |
4328 | ret = -ENOENT; | |
4329 | } | |
4330 | ||
eab89f69 | 4331 | clk_prepare_unlock(); |
b2476490 MT |
4332 | |
4333 | return ret; | |
4334 | } | |
4335 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
4336 | |
4337 | #ifdef CONFIG_OF | |
c771256e OJ |
4338 | static void clk_core_reparent_orphans(void) |
4339 | { | |
4340 | clk_prepare_lock(); | |
4341 | clk_core_reparent_orphans_nolock(); | |
4342 | clk_prepare_unlock(); | |
4343 | } | |
4344 | ||
766e6a4e GL |
4345 | /** |
4346 | * struct of_clk_provider - Clock provider registration structure | |
4347 | * @link: Entry in global list of clock providers | |
4348 | * @node: Pointer to device tree node of clock provider | |
4349 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
4350 | * given clock specifier | |
6378cfdc SB |
4351 | * @get_hw: Get clk_hw callback. Returns NULL, ERR_PTR or a |
4352 | * struct clk_hw for the given clock specifier | |
766e6a4e GL |
4353 | * @data: context pointer to be passed into @get callback |
4354 | */ | |
4355 | struct of_clk_provider { | |
4356 | struct list_head link; | |
4357 | ||
4358 | struct device_node *node; | |
4359 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
0861e5b8 | 4360 | struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data); |
766e6a4e GL |
4361 | void *data; |
4362 | }; | |
4363 | ||
30d5a945 | 4364 | extern struct of_device_id __clk_of_table; |
f2f6c255 | 4365 | static const struct of_device_id __clk_of_table_sentinel |
33def849 | 4366 | __used __section("__clk_of_table_end"); |
f2f6c255 | 4367 | |
766e6a4e | 4368 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
4369 | static DEFINE_MUTEX(of_clk_mutex); |
4370 | ||
766e6a4e GL |
4371 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
4372 | void *data) | |
4373 | { | |
4374 | return data; | |
4375 | } | |
4376 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
4377 | ||
0861e5b8 SB |
4378 | struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data) |
4379 | { | |
4380 | return data; | |
4381 | } | |
4382 | EXPORT_SYMBOL_GPL(of_clk_hw_simple_get); | |
4383 | ||
494bfec9 SG |
4384 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
4385 | { | |
4386 | struct clk_onecell_data *clk_data = data; | |
4387 | unsigned int idx = clkspec->args[0]; | |
4388 | ||
4389 | if (idx >= clk_data->clk_num) { | |
7e96353c | 4390 | pr_err("%s: invalid clock index %u\n", __func__, idx); |
494bfec9 SG |
4391 | return ERR_PTR(-EINVAL); |
4392 | } | |
4393 | ||
4394 | return clk_data->clks[idx]; | |
4395 | } | |
4396 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
4397 | ||
0861e5b8 SB |
4398 | struct clk_hw * |
4399 | of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data) | |
4400 | { | |
4401 | struct clk_hw_onecell_data *hw_data = data; | |
4402 | unsigned int idx = clkspec->args[0]; | |
4403 | ||
4404 | if (idx >= hw_data->num) { | |
4405 | pr_err("%s: invalid index %u\n", __func__, idx); | |
4406 | return ERR_PTR(-EINVAL); | |
4407 | } | |
4408 | ||
4409 | return hw_data->hws[idx]; | |
4410 | } | |
4411 | EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get); | |
4412 | ||
766e6a4e GL |
4413 | /** |
4414 | * of_clk_add_provider() - Register a clock provider for a node | |
4415 | * @np: Device node pointer associated with clock provider | |
4416 | * @clk_src_get: callback for decoding clock | |
4417 | * @data: context pointer for @clk_src_get callback. | |
9fe9b7ab SB |
4418 | * |
4419 | * This function is *deprecated*. Use of_clk_add_hw_provider() instead. | |
766e6a4e GL |
4420 | */ |
4421 | int of_clk_add_provider(struct device_node *np, | |
4422 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
4423 | void *data), | |
4424 | void *data) | |
4425 | { | |
4426 | struct of_clk_provider *cp; | |
86be408b | 4427 | int ret; |
766e6a4e | 4428 | |
1808a320 | 4429 | cp = kzalloc(sizeof(*cp), GFP_KERNEL); |
766e6a4e GL |
4430 | if (!cp) |
4431 | return -ENOMEM; | |
4432 | ||
4433 | cp->node = of_node_get(np); | |
4434 | cp->data = data; | |
4435 | cp->get = clk_src_get; | |
4436 | ||
d6782c26 | 4437 | mutex_lock(&of_clk_mutex); |
766e6a4e | 4438 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 4439 | mutex_unlock(&of_clk_mutex); |
16673931 | 4440 | pr_debug("Added clock from %pOF\n", np); |
766e6a4e | 4441 | |
66d95064 JB |
4442 | clk_core_reparent_orphans(); |
4443 | ||
86be408b SN |
4444 | ret = of_clk_set_defaults(np, true); |
4445 | if (ret < 0) | |
4446 | of_clk_del_provider(np); | |
4447 | ||
4448 | return ret; | |
766e6a4e GL |
4449 | } |
4450 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
4451 | ||
0861e5b8 SB |
4452 | /** |
4453 | * of_clk_add_hw_provider() - Register a clock provider for a node | |
4454 | * @np: Device node pointer associated with clock provider | |
4455 | * @get: callback for decoding clk_hw | |
4456 | * @data: context pointer for @get callback. | |
4457 | */ | |
4458 | int of_clk_add_hw_provider(struct device_node *np, | |
4459 | struct clk_hw *(*get)(struct of_phandle_args *clkspec, | |
4460 | void *data), | |
4461 | void *data) | |
4462 | { | |
4463 | struct of_clk_provider *cp; | |
4464 | int ret; | |
4465 | ||
4466 | cp = kzalloc(sizeof(*cp), GFP_KERNEL); | |
4467 | if (!cp) | |
4468 | return -ENOMEM; | |
4469 | ||
4470 | cp->node = of_node_get(np); | |
4471 | cp->data = data; | |
4472 | cp->get_hw = get; | |
4473 | ||
4474 | mutex_lock(&of_clk_mutex); | |
4475 | list_add(&cp->link, &of_clk_providers); | |
4476 | mutex_unlock(&of_clk_mutex); | |
16673931 | 4477 | pr_debug("Added clk_hw provider from %pOF\n", np); |
0861e5b8 | 4478 | |
66d95064 JB |
4479 | clk_core_reparent_orphans(); |
4480 | ||
0861e5b8 SB |
4481 | ret = of_clk_set_defaults(np, true); |
4482 | if (ret < 0) | |
4483 | of_clk_del_provider(np); | |
4484 | ||
4485 | return ret; | |
4486 | } | |
4487 | EXPORT_SYMBOL_GPL(of_clk_add_hw_provider); | |
4488 | ||
aa795c41 SB |
4489 | static void devm_of_clk_release_provider(struct device *dev, void *res) |
4490 | { | |
4491 | of_clk_del_provider(*(struct device_node **)res); | |
4492 | } | |
4493 | ||
05502bf9 MV |
4494 | /* |
4495 | * We allow a child device to use its parent device as the clock provider node | |
4496 | * for cases like MFD sub-devices where the child device driver wants to use | |
4497 | * devm_*() APIs but not list the device in DT as a sub-node. | |
4498 | */ | |
4499 | static struct device_node *get_clk_provider_node(struct device *dev) | |
4500 | { | |
4501 | struct device_node *np, *parent_np; | |
4502 | ||
4503 | np = dev->of_node; | |
4504 | parent_np = dev->parent ? dev->parent->of_node : NULL; | |
4505 | ||
4506 | if (!of_find_property(np, "#clock-cells", NULL)) | |
4507 | if (of_find_property(parent_np, "#clock-cells", NULL)) | |
4508 | np = parent_np; | |
4509 | ||
4510 | return np; | |
4511 | } | |
4512 | ||
e45838b5 MV |
4513 | /** |
4514 | * devm_of_clk_add_hw_provider() - Managed clk provider node registration | |
4515 | * @dev: Device acting as the clock provider (used for DT node and lifetime) | |
4516 | * @get: callback for decoding clk_hw | |
4517 | * @data: context pointer for @get callback | |
4518 | * | |
05502bf9 MV |
4519 | * Registers clock provider for given device's node. If the device has no DT |
4520 | * node or if the device node lacks of clock provider information (#clock-cells) | |
4521 | * then the parent device's node is scanned for this information. If parent node | |
4522 | * has the #clock-cells then it is used in registration. Provider is | |
4523 | * automatically released at device exit. | |
e45838b5 MV |
4524 | * |
4525 | * Return: 0 on success or an errno on failure. | |
4526 | */ | |
aa795c41 SB |
4527 | int devm_of_clk_add_hw_provider(struct device *dev, |
4528 | struct clk_hw *(*get)(struct of_phandle_args *clkspec, | |
4529 | void *data), | |
4530 | void *data) | |
4531 | { | |
4532 | struct device_node **ptr, *np; | |
4533 | int ret; | |
4534 | ||
4535 | ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr), | |
4536 | GFP_KERNEL); | |
4537 | if (!ptr) | |
4538 | return -ENOMEM; | |
4539 | ||
05502bf9 | 4540 | np = get_clk_provider_node(dev); |
aa795c41 SB |
4541 | ret = of_clk_add_hw_provider(np, get, data); |
4542 | if (!ret) { | |
4543 | *ptr = np; | |
4544 | devres_add(dev, ptr); | |
4545 | } else { | |
4546 | devres_free(ptr); | |
4547 | } | |
4548 | ||
4549 | return ret; | |
4550 | } | |
4551 | EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider); | |
4552 | ||
766e6a4e GL |
4553 | /** |
4554 | * of_clk_del_provider() - Remove a previously registered clock provider | |
4555 | * @np: Device node pointer associated with clock provider | |
4556 | */ | |
4557 | void of_clk_del_provider(struct device_node *np) | |
4558 | { | |
4559 | struct of_clk_provider *cp; | |
4560 | ||
d6782c26 | 4561 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
4562 | list_for_each_entry(cp, &of_clk_providers, link) { |
4563 | if (cp->node == np) { | |
4564 | list_del(&cp->link); | |
4565 | of_node_put(cp->node); | |
4566 | kfree(cp); | |
4567 | break; | |
4568 | } | |
4569 | } | |
d6782c26 | 4570 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
4571 | } |
4572 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
4573 | ||
aa795c41 SB |
4574 | static int devm_clk_provider_match(struct device *dev, void *res, void *data) |
4575 | { | |
4576 | struct device_node **np = res; | |
4577 | ||
4578 | if (WARN_ON(!np || !*np)) | |
4579 | return 0; | |
4580 | ||
4581 | return *np == data; | |
4582 | } | |
4583 | ||
e45838b5 MV |
4584 | /** |
4585 | * devm_of_clk_del_provider() - Remove clock provider registered using devm | |
4586 | * @dev: Device to whose lifetime the clock provider was bound | |
4587 | */ | |
aa795c41 SB |
4588 | void devm_of_clk_del_provider(struct device *dev) |
4589 | { | |
4590 | int ret; | |
05502bf9 | 4591 | struct device_node *np = get_clk_provider_node(dev); |
aa795c41 SB |
4592 | |
4593 | ret = devres_release(dev, devm_of_clk_release_provider, | |
05502bf9 | 4594 | devm_clk_provider_match, np); |
aa795c41 SB |
4595 | |
4596 | WARN_ON(ret); | |
4597 | } | |
4598 | EXPORT_SYMBOL(devm_of_clk_del_provider); | |
4599 | ||
226fd702 SB |
4600 | /** |
4601 | * of_parse_clkspec() - Parse a DT clock specifier for a given device node | |
4602 | * @np: device node to parse clock specifier from | |
4603 | * @index: index of phandle to parse clock out of. If index < 0, @name is used | |
4604 | * @name: clock name to find and parse. If name is NULL, the index is used | |
4605 | * @out_args: Result of parsing the clock specifier | |
4606 | * | |
4607 | * Parses a device node's "clocks" and "clock-names" properties to find the | |
4608 | * phandle and cells for the index or name that is desired. The resulting clock | |
4609 | * specifier is placed into @out_args, or an errno is returned when there's a | |
4610 | * parsing error. The @index argument is ignored if @name is non-NULL. | |
4611 | * | |
4612 | * Example: | |
4613 | * | |
4614 | * phandle1: clock-controller@1 { | |
4615 | * #clock-cells = <2>; | |
4616 | * } | |
4617 | * | |
4618 | * phandle2: clock-controller@2 { | |
4619 | * #clock-cells = <1>; | |
4620 | * } | |
4621 | * | |
4622 | * clock-consumer@3 { | |
4623 | * clocks = <&phandle1 1 2 &phandle2 3>; | |
4624 | * clock-names = "name1", "name2"; | |
4625 | * } | |
4626 | * | |
4627 | * To get a device_node for `clock-controller@2' node you may call this | |
4628 | * function a few different ways: | |
4629 | * | |
4630 | * of_parse_clkspec(clock-consumer@3, -1, "name2", &args); | |
4631 | * of_parse_clkspec(clock-consumer@3, 1, NULL, &args); | |
4632 | * of_parse_clkspec(clock-consumer@3, 1, "name2", &args); | |
4633 | * | |
4634 | * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT | |
4635 | * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in | |
4636 | * the "clock-names" property of @np. | |
5dc7e842 | 4637 | */ |
cf13f289 SB |
4638 | static int of_parse_clkspec(const struct device_node *np, int index, |
4639 | const char *name, struct of_phandle_args *out_args) | |
4472287a SB |
4640 | { |
4641 | int ret = -ENOENT; | |
4642 | ||
4643 | /* Walk up the tree of devices looking for a clock property that matches */ | |
4644 | while (np) { | |
4645 | /* | |
4646 | * For named clocks, first look up the name in the | |
4647 | * "clock-names" property. If it cannot be found, then index | |
4648 | * will be an error code and of_parse_phandle_with_args() will | |
4649 | * return -EINVAL. | |
4650 | */ | |
4651 | if (name) | |
4652 | index = of_property_match_string(np, "clock-names", name); | |
4653 | ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells", | |
4654 | index, out_args); | |
4655 | if (!ret) | |
4656 | break; | |
4657 | if (name && index >= 0) | |
4658 | break; | |
4659 | ||
4660 | /* | |
4661 | * No matching clock found on this node. If the parent node | |
4662 | * has a "clock-ranges" property, then we can try one of its | |
4663 | * clocks. | |
4664 | */ | |
4665 | np = np->parent; | |
4666 | if (np && !of_get_property(np, "clock-ranges", NULL)) | |
4667 | break; | |
4668 | index = 0; | |
4669 | } | |
4670 | ||
4671 | return ret; | |
4672 | } | |
4673 | ||
0861e5b8 SB |
4674 | static struct clk_hw * |
4675 | __of_clk_get_hw_from_provider(struct of_clk_provider *provider, | |
4676 | struct of_phandle_args *clkspec) | |
4677 | { | |
4678 | struct clk *clk; | |
0861e5b8 | 4679 | |
74002fcd SB |
4680 | if (provider->get_hw) |
4681 | return provider->get_hw(clkspec, provider->data); | |
0861e5b8 | 4682 | |
74002fcd SB |
4683 | clk = provider->get(clkspec, provider->data); |
4684 | if (IS_ERR(clk)) | |
4685 | return ERR_CAST(clk); | |
4686 | return __clk_get_hw(clk); | |
0861e5b8 SB |
4687 | } |
4688 | ||
cf13f289 SB |
4689 | static struct clk_hw * |
4690 | of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) | |
766e6a4e GL |
4691 | { |
4692 | struct of_clk_provider *provider; | |
1df4046a | 4693 | struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 4694 | |
306c342f SB |
4695 | if (!clkspec) |
4696 | return ERR_PTR(-EINVAL); | |
4697 | ||
306c342f | 4698 | mutex_lock(&of_clk_mutex); |
766e6a4e | 4699 | list_for_each_entry(provider, &of_clk_providers, link) { |
f155d15b | 4700 | if (provider->node == clkspec->np) { |
0861e5b8 | 4701 | hw = __of_clk_get_hw_from_provider(provider, clkspec); |
1df4046a SB |
4702 | if (!IS_ERR(hw)) |
4703 | break; | |
73e0e496 | 4704 | } |
766e6a4e | 4705 | } |
306c342f | 4706 | mutex_unlock(&of_clk_mutex); |
d6782c26 | 4707 | |
4472287a | 4708 | return hw; |
d6782c26 SN |
4709 | } |
4710 | ||
306c342f SB |
4711 | /** |
4712 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
4713 | * @clkspec: pointer to a clock specifier data structure | |
4714 | * | |
4715 | * This function looks up a struct clk from the registered list of clock | |
4716 | * providers, an input is a clock specifier data structure as returned | |
4717 | * from the of_parse_phandle_with_args() function call. | |
4718 | */ | |
d6782c26 SN |
4719 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
4720 | { | |
4472287a SB |
4721 | struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec); |
4722 | ||
efa85048 | 4723 | return clk_hw_create_clk(NULL, hw, NULL, __func__); |
766e6a4e | 4724 | } |
fb4dd222 | 4725 | EXPORT_SYMBOL_GPL(of_clk_get_from_provider); |
766e6a4e | 4726 | |
cf13f289 SB |
4727 | struct clk_hw *of_clk_get_hw(struct device_node *np, int index, |
4728 | const char *con_id) | |
4729 | { | |
4730 | int ret; | |
4731 | struct clk_hw *hw; | |
4732 | struct of_phandle_args clkspec; | |
4733 | ||
4734 | ret = of_parse_clkspec(np, index, con_id, &clkspec); | |
4735 | if (ret) | |
4736 | return ERR_PTR(ret); | |
4737 | ||
4738 | hw = of_clk_get_hw_from_clkspec(&clkspec); | |
4739 | of_node_put(clkspec.np); | |
4740 | ||
4741 | return hw; | |
4742 | } | |
4743 | ||
4744 | static struct clk *__of_clk_get(struct device_node *np, | |
4745 | int index, const char *dev_id, | |
4746 | const char *con_id) | |
4747 | { | |
4748 | struct clk_hw *hw = of_clk_get_hw(np, index, con_id); | |
4749 | ||
4750 | return clk_hw_create_clk(NULL, hw, dev_id, con_id); | |
4751 | } | |
4752 | ||
4753 | struct clk *of_clk_get(struct device_node *np, int index) | |
4754 | { | |
4755 | return __of_clk_get(np, index, np->full_name, NULL); | |
4756 | } | |
4757 | EXPORT_SYMBOL(of_clk_get); | |
4758 | ||
4759 | /** | |
4760 | * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node | |
4761 | * @np: pointer to clock consumer node | |
4762 | * @name: name of consumer's clock input, or NULL for the first clock reference | |
4763 | * | |
4764 | * This function parses the clocks and clock-names properties, | |
4765 | * and uses them to look up the struct clk from the registered list of clock | |
4766 | * providers. | |
4767 | */ | |
4768 | struct clk *of_clk_get_by_name(struct device_node *np, const char *name) | |
4769 | { | |
4770 | if (!np) | |
4771 | return ERR_PTR(-ENOENT); | |
4772 | ||
65cf20ad | 4773 | return __of_clk_get(np, 0, np->full_name, name); |
cf13f289 SB |
4774 | } |
4775 | EXPORT_SYMBOL(of_clk_get_by_name); | |
4776 | ||
929e7f3b SB |
4777 | /** |
4778 | * of_clk_get_parent_count() - Count the number of clocks a device node has | |
4779 | * @np: device node to count | |
4780 | * | |
4781 | * Returns: The number of clocks that are possible parents of this node | |
4782 | */ | |
4a4472fd | 4783 | unsigned int of_clk_get_parent_count(const struct device_node *np) |
f6102742 | 4784 | { |
929e7f3b SB |
4785 | int count; |
4786 | ||
4787 | count = of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
4788 | if (count < 0) | |
4789 | return 0; | |
4790 | ||
4791 | return count; | |
f6102742 MT |
4792 | } |
4793 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
4794 | ||
4a4472fd | 4795 | const char *of_clk_get_parent_name(const struct device_node *np, int index) |
766e6a4e GL |
4796 | { |
4797 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 4798 | struct property *prop; |
766e6a4e | 4799 | const char *clk_name; |
7a0fc1a3 BD |
4800 | const __be32 *vp; |
4801 | u32 pv; | |
766e6a4e | 4802 | int rc; |
7a0fc1a3 | 4803 | int count; |
0a4807c2 | 4804 | struct clk *clk; |
766e6a4e | 4805 | |
766e6a4e GL |
4806 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, |
4807 | &clkspec); | |
4808 | if (rc) | |
4809 | return NULL; | |
4810 | ||
7a0fc1a3 BD |
4811 | index = clkspec.args_count ? clkspec.args[0] : 0; |
4812 | count = 0; | |
4813 | ||
4814 | /* if there is an indices property, use it to transfer the index | |
4815 | * specified into an array offset for the clock-output-names property. | |
4816 | */ | |
4817 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
4818 | if (index == pv) { | |
4819 | index = count; | |
4820 | break; | |
4821 | } | |
4822 | count++; | |
4823 | } | |
8da411cc MY |
4824 | /* We went off the end of 'clock-indices' without finding it */ |
4825 | if (prop && !vp) | |
4826 | return NULL; | |
7a0fc1a3 | 4827 | |
766e6a4e | 4828 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 4829 | index, |
0a4807c2 SB |
4830 | &clk_name) < 0) { |
4831 | /* | |
4832 | * Best effort to get the name if the clock has been | |
4833 | * registered with the framework. If the clock isn't | |
4834 | * registered, we return the node name as the name of | |
4835 | * the clock as long as #clock-cells = 0. | |
4836 | */ | |
4837 | clk = of_clk_get_from_provider(&clkspec); | |
4838 | if (IS_ERR(clk)) { | |
4839 | if (clkspec.args_count == 0) | |
4840 | clk_name = clkspec.np->name; | |
4841 | else | |
4842 | clk_name = NULL; | |
4843 | } else { | |
4844 | clk_name = __clk_get_name(clk); | |
4845 | clk_put(clk); | |
4846 | } | |
4847 | } | |
4848 | ||
766e6a4e GL |
4849 | |
4850 | of_node_put(clkspec.np); | |
4851 | return clk_name; | |
4852 | } | |
4853 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
4854 | ||
2e61dfb3 DN |
4855 | /** |
4856 | * of_clk_parent_fill() - Fill @parents with names of @np's parents and return | |
4857 | * number of parents | |
4858 | * @np: Device node pointer associated with clock provider | |
4859 | * @parents: pointer to char array that hold the parents' names | |
4860 | * @size: size of the @parents array | |
4861 | * | |
4862 | * Return: number of parents for the clock node. | |
4863 | */ | |
4864 | int of_clk_parent_fill(struct device_node *np, const char **parents, | |
4865 | unsigned int size) | |
4866 | { | |
4867 | unsigned int i = 0; | |
4868 | ||
4869 | while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) | |
4870 | i++; | |
4871 | ||
4872 | return i; | |
4873 | } | |
4874 | EXPORT_SYMBOL_GPL(of_clk_parent_fill); | |
4875 | ||
1771b10d | 4876 | struct clock_provider { |
a5970433 | 4877 | void (*clk_init_cb)(struct device_node *); |
1771b10d GC |
4878 | struct device_node *np; |
4879 | struct list_head node; | |
4880 | }; | |
4881 | ||
1771b10d GC |
4882 | /* |
4883 | * This function looks for a parent clock. If there is one, then it | |
4884 | * checks that the provider for this parent clock was initialized, in | |
4885 | * this case the parent clock will be ready. | |
4886 | */ | |
4887 | static int parent_ready(struct device_node *np) | |
4888 | { | |
4889 | int i = 0; | |
4890 | ||
4891 | while (true) { | |
4892 | struct clk *clk = of_clk_get(np, i); | |
4893 | ||
4894 | /* this parent is ready we can check the next one */ | |
4895 | if (!IS_ERR(clk)) { | |
4896 | clk_put(clk); | |
4897 | i++; | |
4898 | continue; | |
4899 | } | |
4900 | ||
4901 | /* at least one parent is not ready, we exit now */ | |
4902 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
4903 | return 0; | |
4904 | ||
4905 | /* | |
4906 | * Here we make assumption that the device tree is | |
4907 | * written correctly. So an error means that there is | |
4908 | * no more parent. As we didn't exit yet, then the | |
4909 | * previous parent are ready. If there is no clock | |
4910 | * parent, no need to wait for them, then we can | |
4911 | * consider their absence as being ready | |
4912 | */ | |
4913 | return 1; | |
4914 | } | |
4915 | } | |
4916 | ||
d56f8994 LJ |
4917 | /** |
4918 | * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree | |
4919 | * @np: Device node pointer associated with clock provider | |
4920 | * @index: clock index | |
f7ae7503 | 4921 | * @flags: pointer to top-level framework flags |
d56f8994 LJ |
4922 | * |
4923 | * Detects if the clock-critical property exists and, if so, sets the | |
4924 | * corresponding CLK_IS_CRITICAL flag. | |
4925 | * | |
4926 | * Do not use this function. It exists only for legacy Device Tree | |
4927 | * bindings, such as the one-clock-per-node style that are outdated. | |
4928 | * Those bindings typically put all clock data into .dts and the Linux | |
4929 | * driver has no clock data, thus making it impossible to set this flag | |
4930 | * correctly from the driver. Only those drivers may call | |
4931 | * of_clk_detect_critical from their setup functions. | |
4932 | * | |
4933 | * Return: error code or zero on success | |
4934 | */ | |
be545c79 GU |
4935 | int of_clk_detect_critical(struct device_node *np, int index, |
4936 | unsigned long *flags) | |
d56f8994 LJ |
4937 | { |
4938 | struct property *prop; | |
4939 | const __be32 *cur; | |
4940 | uint32_t idx; | |
4941 | ||
4942 | if (!np || !flags) | |
4943 | return -EINVAL; | |
4944 | ||
4945 | of_property_for_each_u32(np, "clock-critical", prop, cur, idx) | |
4946 | if (index == idx) | |
4947 | *flags |= CLK_IS_CRITICAL; | |
4948 | ||
4949 | return 0; | |
4950 | } | |
4951 | ||
766e6a4e GL |
4952 | /** |
4953 | * of_clk_init() - Scan and init clock providers from the DT | |
4954 | * @matches: array of compatible values and init functions for providers. | |
4955 | * | |
1771b10d | 4956 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 4957 | * and calls their initialization functions. It also does it by trying |
1771b10d | 4958 | * to follow the dependencies. |
766e6a4e GL |
4959 | */ |
4960 | void __init of_clk_init(const struct of_device_id *matches) | |
4961 | { | |
7f7ed584 | 4962 | const struct of_device_id *match; |
766e6a4e | 4963 | struct device_node *np; |
1771b10d GC |
4964 | struct clock_provider *clk_provider, *next; |
4965 | bool is_init_done; | |
4966 | bool force = false; | |
2573a02a | 4967 | LIST_HEAD(clk_provider_list); |
766e6a4e | 4968 | |
f2f6c255 | 4969 | if (!matches) |
819b4861 | 4970 | matches = &__clk_of_table; |
f2f6c255 | 4971 | |
1771b10d | 4972 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 4973 | for_each_matching_node_and_match(np, matches, &match) { |
2e3b19f1 SB |
4974 | struct clock_provider *parent; |
4975 | ||
3e5dd6f6 GU |
4976 | if (!of_device_is_available(np)) |
4977 | continue; | |
4978 | ||
2e3b19f1 SB |
4979 | parent = kzalloc(sizeof(*parent), GFP_KERNEL); |
4980 | if (!parent) { | |
4981 | list_for_each_entry_safe(clk_provider, next, | |
4982 | &clk_provider_list, node) { | |
4983 | list_del(&clk_provider->node); | |
6bc9d9d6 | 4984 | of_node_put(clk_provider->np); |
2e3b19f1 SB |
4985 | kfree(clk_provider); |
4986 | } | |
6bc9d9d6 | 4987 | of_node_put(np); |
2e3b19f1 SB |
4988 | return; |
4989 | } | |
1771b10d GC |
4990 | |
4991 | parent->clk_init_cb = match->data; | |
6bc9d9d6 | 4992 | parent->np = of_node_get(np); |
3f6d439f | 4993 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
4994 | } |
4995 | ||
4996 | while (!list_empty(&clk_provider_list)) { | |
4997 | is_init_done = false; | |
4998 | list_for_each_entry_safe(clk_provider, next, | |
4999 | &clk_provider_list, node) { | |
5000 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 5001 | |
989eafd0 RR |
5002 | /* Don't populate platform devices */ |
5003 | of_node_set_flag(clk_provider->np, | |
5004 | OF_POPULATED); | |
5005 | ||
1771b10d | 5006 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
5007 | of_clk_set_defaults(clk_provider->np, true); |
5008 | ||
1771b10d | 5009 | list_del(&clk_provider->node); |
6bc9d9d6 | 5010 | of_node_put(clk_provider->np); |
1771b10d GC |
5011 | kfree(clk_provider); |
5012 | is_init_done = true; | |
5013 | } | |
5014 | } | |
5015 | ||
5016 | /* | |
e5ca8fb4 | 5017 | * We didn't manage to initialize any of the |
1771b10d GC |
5018 | * remaining providers during the last loop, so now we |
5019 | * initialize all the remaining ones unconditionally | |
5020 | * in case the clock parent was not mandatory | |
5021 | */ | |
5022 | if (!is_init_done) | |
5023 | force = true; | |
766e6a4e GL |
5024 | } |
5025 | } | |
5026 | #endif |