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Commit | Line | Data |
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b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
b09d6d99 | 12 | #include <linux/clk-provider.h> |
86be408b | 13 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
14 | #include <linux/module.h> |
15 | #include <linux/mutex.h> | |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/slab.h> | |
766e6a4e | 20 | #include <linux/of.h> |
46c8773a | 21 | #include <linux/device.h> |
f2f6c255 | 22 | #include <linux/init.h> |
533ddeb1 | 23 | #include <linux/sched.h> |
b2476490 | 24 | |
d6782c26 SN |
25 | #include "clk.h" |
26 | ||
b2476490 MT |
27 | static DEFINE_SPINLOCK(enable_lock); |
28 | static DEFINE_MUTEX(prepare_lock); | |
29 | ||
533ddeb1 MT |
30 | static struct task_struct *prepare_owner; |
31 | static struct task_struct *enable_owner; | |
32 | ||
33 | static int prepare_refcnt; | |
34 | static int enable_refcnt; | |
35 | ||
b2476490 MT |
36 | static HLIST_HEAD(clk_root_list); |
37 | static HLIST_HEAD(clk_orphan_list); | |
38 | static LIST_HEAD(clk_notifier_list); | |
39 | ||
035a61c3 TV |
40 | static long clk_core_get_accuracy(struct clk_core *clk); |
41 | static unsigned long clk_core_get_rate(struct clk_core *clk); | |
42 | static int clk_core_get_phase(struct clk_core *clk); | |
43 | static bool clk_core_is_prepared(struct clk_core *clk); | |
44 | static bool clk_core_is_enabled(struct clk_core *clk); | |
035a61c3 TV |
45 | static struct clk_core *clk_core_lookup(const char *name); |
46 | ||
b09d6d99 MT |
47 | /*** private data structures ***/ |
48 | ||
49 | struct clk_core { | |
50 | const char *name; | |
51 | const struct clk_ops *ops; | |
52 | struct clk_hw *hw; | |
53 | struct module *owner; | |
54 | struct clk_core *parent; | |
55 | const char **parent_names; | |
56 | struct clk_core **parents; | |
57 | u8 num_parents; | |
58 | u8 new_parent_index; | |
59 | unsigned long rate; | |
1c8e6004 | 60 | unsigned long req_rate; |
b09d6d99 MT |
61 | unsigned long new_rate; |
62 | struct clk_core *new_parent; | |
63 | struct clk_core *new_child; | |
64 | unsigned long flags; | |
65 | unsigned int enable_count; | |
66 | unsigned int prepare_count; | |
67 | unsigned long accuracy; | |
68 | int phase; | |
69 | struct hlist_head children; | |
70 | struct hlist_node child_node; | |
71 | struct hlist_node debug_node; | |
1c8e6004 | 72 | struct hlist_head clks; |
b09d6d99 MT |
73 | unsigned int notifier_count; |
74 | #ifdef CONFIG_DEBUG_FS | |
75 | struct dentry *dentry; | |
76 | #endif | |
77 | struct kref ref; | |
78 | }; | |
79 | ||
dfc202ea SB |
80 | #define CREATE_TRACE_POINTS |
81 | #include <trace/events/clk.h> | |
82 | ||
b09d6d99 MT |
83 | struct clk { |
84 | struct clk_core *core; | |
85 | const char *dev_id; | |
86 | const char *con_id; | |
1c8e6004 TV |
87 | unsigned long min_rate; |
88 | unsigned long max_rate; | |
50595f8b | 89 | struct hlist_node clks_node; |
b09d6d99 MT |
90 | }; |
91 | ||
eab89f69 MT |
92 | /*** locking ***/ |
93 | static void clk_prepare_lock(void) | |
94 | { | |
533ddeb1 MT |
95 | if (!mutex_trylock(&prepare_lock)) { |
96 | if (prepare_owner == current) { | |
97 | prepare_refcnt++; | |
98 | return; | |
99 | } | |
100 | mutex_lock(&prepare_lock); | |
101 | } | |
102 | WARN_ON_ONCE(prepare_owner != NULL); | |
103 | WARN_ON_ONCE(prepare_refcnt != 0); | |
104 | prepare_owner = current; | |
105 | prepare_refcnt = 1; | |
eab89f69 MT |
106 | } |
107 | ||
108 | static void clk_prepare_unlock(void) | |
109 | { | |
533ddeb1 MT |
110 | WARN_ON_ONCE(prepare_owner != current); |
111 | WARN_ON_ONCE(prepare_refcnt == 0); | |
112 | ||
113 | if (--prepare_refcnt) | |
114 | return; | |
115 | prepare_owner = NULL; | |
eab89f69 MT |
116 | mutex_unlock(&prepare_lock); |
117 | } | |
118 | ||
119 | static unsigned long clk_enable_lock(void) | |
120 | { | |
121 | unsigned long flags; | |
533ddeb1 MT |
122 | |
123 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
124 | if (enable_owner == current) { | |
125 | enable_refcnt++; | |
126 | return flags; | |
127 | } | |
128 | spin_lock_irqsave(&enable_lock, flags); | |
129 | } | |
130 | WARN_ON_ONCE(enable_owner != NULL); | |
131 | WARN_ON_ONCE(enable_refcnt != 0); | |
132 | enable_owner = current; | |
133 | enable_refcnt = 1; | |
eab89f69 MT |
134 | return flags; |
135 | } | |
136 | ||
137 | static void clk_enable_unlock(unsigned long flags) | |
138 | { | |
533ddeb1 MT |
139 | WARN_ON_ONCE(enable_owner != current); |
140 | WARN_ON_ONCE(enable_refcnt == 0); | |
141 | ||
142 | if (--enable_refcnt) | |
143 | return; | |
144 | enable_owner = NULL; | |
eab89f69 MT |
145 | spin_unlock_irqrestore(&enable_lock, flags); |
146 | } | |
147 | ||
b2476490 MT |
148 | /*** debugfs support ***/ |
149 | ||
ea72dc2c | 150 | #ifdef CONFIG_DEBUG_FS |
b2476490 MT |
151 | #include <linux/debugfs.h> |
152 | ||
153 | static struct dentry *rootdir; | |
b2476490 | 154 | static int inited = 0; |
6314b679 SB |
155 | static DEFINE_MUTEX(clk_debug_lock); |
156 | static HLIST_HEAD(clk_debug_list); | |
b2476490 | 157 | |
6b44c854 SK |
158 | static struct hlist_head *all_lists[] = { |
159 | &clk_root_list, | |
160 | &clk_orphan_list, | |
161 | NULL, | |
162 | }; | |
163 | ||
164 | static struct hlist_head *orphan_list[] = { | |
165 | &clk_orphan_list, | |
166 | NULL, | |
167 | }; | |
168 | ||
035a61c3 TV |
169 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, |
170 | int level) | |
1af599df PG |
171 | { |
172 | if (!c) | |
173 | return; | |
174 | ||
e59c5371 | 175 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1af599df PG |
176 | level * 3 + 1, "", |
177 | 30 - level * 3, c->name, | |
035a61c3 TV |
178 | c->enable_count, c->prepare_count, clk_core_get_rate(c), |
179 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1af599df PG |
180 | } |
181 | ||
035a61c3 | 182 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
1af599df PG |
183 | int level) |
184 | { | |
035a61c3 | 185 | struct clk_core *child; |
1af599df PG |
186 | |
187 | if (!c) | |
188 | return; | |
189 | ||
190 | clk_summary_show_one(s, c, level); | |
191 | ||
b67bfe0d | 192 | hlist_for_each_entry(child, &c->children, child_node) |
1af599df PG |
193 | clk_summary_show_subtree(s, child, level + 1); |
194 | } | |
195 | ||
196 | static int clk_summary_show(struct seq_file *s, void *data) | |
197 | { | |
035a61c3 | 198 | struct clk_core *c; |
27b8d5f7 | 199 | struct hlist_head **lists = (struct hlist_head **)s->private; |
1af599df | 200 | |
e59c5371 MT |
201 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
202 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
1af599df | 203 | |
eab89f69 | 204 | clk_prepare_lock(); |
1af599df | 205 | |
27b8d5f7 PDS |
206 | for (; *lists; lists++) |
207 | hlist_for_each_entry(c, *lists, child_node) | |
208 | clk_summary_show_subtree(s, c, 0); | |
1af599df | 209 | |
eab89f69 | 210 | clk_prepare_unlock(); |
1af599df PG |
211 | |
212 | return 0; | |
213 | } | |
214 | ||
215 | ||
216 | static int clk_summary_open(struct inode *inode, struct file *file) | |
217 | { | |
218 | return single_open(file, clk_summary_show, inode->i_private); | |
219 | } | |
220 | ||
221 | static const struct file_operations clk_summary_fops = { | |
222 | .open = clk_summary_open, | |
223 | .read = seq_read, | |
224 | .llseek = seq_lseek, | |
225 | .release = single_release, | |
226 | }; | |
227 | ||
035a61c3 | 228 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
bddca894 PG |
229 | { |
230 | if (!c) | |
231 | return; | |
232 | ||
233 | seq_printf(s, "\"%s\": { ", c->name); | |
234 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
235 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
035a61c3 TV |
236 | seq_printf(s, "\"rate\": %lu", clk_core_get_rate(c)); |
237 | seq_printf(s, "\"accuracy\": %lu", clk_core_get_accuracy(c)); | |
238 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); | |
bddca894 PG |
239 | } |
240 | ||
035a61c3 | 241 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
bddca894 | 242 | { |
035a61c3 | 243 | struct clk_core *child; |
bddca894 PG |
244 | |
245 | if (!c) | |
246 | return; | |
247 | ||
248 | clk_dump_one(s, c, level); | |
249 | ||
b67bfe0d | 250 | hlist_for_each_entry(child, &c->children, child_node) { |
bddca894 PG |
251 | seq_printf(s, ","); |
252 | clk_dump_subtree(s, child, level + 1); | |
253 | } | |
254 | ||
255 | seq_printf(s, "}"); | |
256 | } | |
257 | ||
258 | static int clk_dump(struct seq_file *s, void *data) | |
259 | { | |
035a61c3 | 260 | struct clk_core *c; |
bddca894 | 261 | bool first_node = true; |
27b8d5f7 | 262 | struct hlist_head **lists = (struct hlist_head **)s->private; |
bddca894 PG |
263 | |
264 | seq_printf(s, "{"); | |
265 | ||
eab89f69 | 266 | clk_prepare_lock(); |
bddca894 | 267 | |
27b8d5f7 PDS |
268 | for (; *lists; lists++) { |
269 | hlist_for_each_entry(c, *lists, child_node) { | |
270 | if (!first_node) | |
271 | seq_puts(s, ","); | |
272 | first_node = false; | |
273 | clk_dump_subtree(s, c, 0); | |
274 | } | |
bddca894 PG |
275 | } |
276 | ||
eab89f69 | 277 | clk_prepare_unlock(); |
bddca894 PG |
278 | |
279 | seq_printf(s, "}"); | |
280 | return 0; | |
281 | } | |
282 | ||
283 | ||
284 | static int clk_dump_open(struct inode *inode, struct file *file) | |
285 | { | |
286 | return single_open(file, clk_dump, inode->i_private); | |
287 | } | |
288 | ||
289 | static const struct file_operations clk_dump_fops = { | |
290 | .open = clk_dump_open, | |
291 | .read = seq_read, | |
292 | .llseek = seq_lseek, | |
293 | .release = single_release, | |
294 | }; | |
295 | ||
035a61c3 | 296 | static int clk_debug_create_one(struct clk_core *clk, struct dentry *pdentry) |
b2476490 MT |
297 | { |
298 | struct dentry *d; | |
299 | int ret = -ENOMEM; | |
300 | ||
301 | if (!clk || !pdentry) { | |
302 | ret = -EINVAL; | |
303 | goto out; | |
304 | } | |
305 | ||
306 | d = debugfs_create_dir(clk->name, pdentry); | |
307 | if (!d) | |
308 | goto out; | |
309 | ||
310 | clk->dentry = d; | |
311 | ||
312 | d = debugfs_create_u32("clk_rate", S_IRUGO, clk->dentry, | |
313 | (u32 *)&clk->rate); | |
314 | if (!d) | |
315 | goto err_out; | |
316 | ||
5279fc40 BB |
317 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, clk->dentry, |
318 | (u32 *)&clk->accuracy); | |
319 | if (!d) | |
320 | goto err_out; | |
321 | ||
e59c5371 MT |
322 | d = debugfs_create_u32("clk_phase", S_IRUGO, clk->dentry, |
323 | (u32 *)&clk->phase); | |
324 | if (!d) | |
325 | goto err_out; | |
326 | ||
b2476490 MT |
327 | d = debugfs_create_x32("clk_flags", S_IRUGO, clk->dentry, |
328 | (u32 *)&clk->flags); | |
329 | if (!d) | |
330 | goto err_out; | |
331 | ||
332 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, clk->dentry, | |
333 | (u32 *)&clk->prepare_count); | |
334 | if (!d) | |
335 | goto err_out; | |
336 | ||
337 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, clk->dentry, | |
338 | (u32 *)&clk->enable_count); | |
339 | if (!d) | |
340 | goto err_out; | |
341 | ||
342 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, clk->dentry, | |
343 | (u32 *)&clk->notifier_count); | |
344 | if (!d) | |
345 | goto err_out; | |
346 | ||
abeab450 CB |
347 | if (clk->ops->debug_init) { |
348 | ret = clk->ops->debug_init(clk->hw, clk->dentry); | |
349 | if (ret) | |
c646cbf1 | 350 | goto err_out; |
abeab450 | 351 | } |
c646cbf1 | 352 | |
b2476490 MT |
353 | ret = 0; |
354 | goto out; | |
355 | ||
356 | err_out: | |
b5f98e65 AE |
357 | debugfs_remove_recursive(clk->dentry); |
358 | clk->dentry = NULL; | |
b2476490 MT |
359 | out: |
360 | return ret; | |
361 | } | |
362 | ||
b2476490 MT |
363 | /** |
364 | * clk_debug_register - add a clk node to the debugfs clk tree | |
365 | * @clk: the clk being added to the debugfs clk tree | |
366 | * | |
367 | * Dynamically adds a clk to the debugfs clk tree if debugfs has been | |
368 | * initialized. Otherwise it bails out early since the debugfs clk tree | |
369 | * will be created lazily by clk_debug_init as part of a late_initcall. | |
b2476490 | 370 | */ |
035a61c3 | 371 | static int clk_debug_register(struct clk_core *clk) |
b2476490 | 372 | { |
b2476490 MT |
373 | int ret = 0; |
374 | ||
6314b679 SB |
375 | mutex_lock(&clk_debug_lock); |
376 | hlist_add_head(&clk->debug_node, &clk_debug_list); | |
377 | ||
b2476490 | 378 | if (!inited) |
6314b679 | 379 | goto unlock; |
b2476490 | 380 | |
6314b679 SB |
381 | ret = clk_debug_create_one(clk, rootdir); |
382 | unlock: | |
383 | mutex_unlock(&clk_debug_lock); | |
b2476490 | 384 | |
b2476490 MT |
385 | return ret; |
386 | } | |
387 | ||
fcb0ee6a SN |
388 | /** |
389 | * clk_debug_unregister - remove a clk node from the debugfs clk tree | |
390 | * @clk: the clk being removed from the debugfs clk tree | |
391 | * | |
392 | * Dynamically removes a clk and all it's children clk nodes from the | |
393 | * debugfs clk tree if clk->dentry points to debugfs created by | |
394 | * clk_debug_register in __clk_init. | |
fcb0ee6a | 395 | */ |
035a61c3 | 396 | static void clk_debug_unregister(struct clk_core *clk) |
fcb0ee6a | 397 | { |
6314b679 | 398 | mutex_lock(&clk_debug_lock); |
6314b679 | 399 | hlist_del_init(&clk->debug_node); |
fcb0ee6a | 400 | debugfs_remove_recursive(clk->dentry); |
6314b679 | 401 | clk->dentry = NULL; |
6314b679 | 402 | mutex_unlock(&clk_debug_lock); |
fcb0ee6a SN |
403 | } |
404 | ||
61c7cddf | 405 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
fb2b3c9f PDS |
406 | void *data, const struct file_operations *fops) |
407 | { | |
408 | struct dentry *d = NULL; | |
409 | ||
035a61c3 TV |
410 | if (hw->core->dentry) |
411 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
412 | fops); | |
fb2b3c9f PDS |
413 | |
414 | return d; | |
415 | } | |
416 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
417 | ||
b2476490 MT |
418 | /** |
419 | * clk_debug_init - lazily create the debugfs clk tree visualization | |
420 | * | |
421 | * clks are often initialized very early during boot before memory can | |
422 | * be dynamically allocated and well before debugfs is setup. | |
423 | * clk_debug_init walks the clk tree hierarchy while holding | |
424 | * prepare_lock and creates the topology as part of a late_initcall, | |
425 | * thus insuring that clks initialized very early will still be | |
426 | * represented in the debugfs clk tree. This function should only be | |
427 | * called once at boot-time, and all other clks added dynamically will | |
428 | * be done so with clk_debug_register. | |
429 | */ | |
430 | static int __init clk_debug_init(void) | |
431 | { | |
035a61c3 | 432 | struct clk_core *clk; |
1af599df | 433 | struct dentry *d; |
b2476490 MT |
434 | |
435 | rootdir = debugfs_create_dir("clk", NULL); | |
436 | ||
437 | if (!rootdir) | |
438 | return -ENOMEM; | |
439 | ||
27b8d5f7 | 440 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
1af599df PG |
441 | &clk_summary_fops); |
442 | if (!d) | |
443 | return -ENOMEM; | |
444 | ||
27b8d5f7 | 445 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
bddca894 PG |
446 | &clk_dump_fops); |
447 | if (!d) | |
448 | return -ENOMEM; | |
449 | ||
27b8d5f7 PDS |
450 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
451 | &orphan_list, &clk_summary_fops); | |
452 | if (!d) | |
453 | return -ENOMEM; | |
b2476490 | 454 | |
27b8d5f7 PDS |
455 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
456 | &orphan_list, &clk_dump_fops); | |
457 | if (!d) | |
b2476490 MT |
458 | return -ENOMEM; |
459 | ||
6314b679 SB |
460 | mutex_lock(&clk_debug_lock); |
461 | hlist_for_each_entry(clk, &clk_debug_list, debug_node) | |
462 | clk_debug_create_one(clk, rootdir); | |
b2476490 MT |
463 | |
464 | inited = 1; | |
6314b679 | 465 | mutex_unlock(&clk_debug_lock); |
b2476490 MT |
466 | |
467 | return 0; | |
468 | } | |
469 | late_initcall(clk_debug_init); | |
470 | #else | |
035a61c3 TV |
471 | static inline int clk_debug_register(struct clk_core *clk) { return 0; } |
472 | static inline void clk_debug_reparent(struct clk_core *clk, | |
473 | struct clk_core *new_parent) | |
b33d212f UH |
474 | { |
475 | } | |
035a61c3 | 476 | static inline void clk_debug_unregister(struct clk_core *clk) |
fcb0ee6a SN |
477 | { |
478 | } | |
70d347e6 | 479 | #endif |
b2476490 | 480 | |
1c155b3d | 481 | /* caller must hold prepare_lock */ |
035a61c3 | 482 | static void clk_unprepare_unused_subtree(struct clk_core *clk) |
1c155b3d | 483 | { |
035a61c3 | 484 | struct clk_core *child; |
1c155b3d | 485 | |
496eadf8 KK |
486 | lockdep_assert_held(&prepare_lock); |
487 | ||
1c155b3d UH |
488 | hlist_for_each_entry(child, &clk->children, child_node) |
489 | clk_unprepare_unused_subtree(child); | |
490 | ||
491 | if (clk->prepare_count) | |
492 | return; | |
493 | ||
494 | if (clk->flags & CLK_IGNORE_UNUSED) | |
495 | return; | |
496 | ||
035a61c3 | 497 | if (clk_core_is_prepared(clk)) { |
dfc202ea | 498 | trace_clk_unprepare(clk); |
3cc8247f UH |
499 | if (clk->ops->unprepare_unused) |
500 | clk->ops->unprepare_unused(clk->hw); | |
501 | else if (clk->ops->unprepare) | |
1c155b3d | 502 | clk->ops->unprepare(clk->hw); |
dfc202ea | 503 | trace_clk_unprepare_complete(clk); |
3cc8247f | 504 | } |
1c155b3d UH |
505 | } |
506 | ||
b2476490 | 507 | /* caller must hold prepare_lock */ |
035a61c3 | 508 | static void clk_disable_unused_subtree(struct clk_core *clk) |
b2476490 | 509 | { |
035a61c3 | 510 | struct clk_core *child; |
b2476490 MT |
511 | unsigned long flags; |
512 | ||
496eadf8 KK |
513 | lockdep_assert_held(&prepare_lock); |
514 | ||
b67bfe0d | 515 | hlist_for_each_entry(child, &clk->children, child_node) |
b2476490 MT |
516 | clk_disable_unused_subtree(child); |
517 | ||
eab89f69 | 518 | flags = clk_enable_lock(); |
b2476490 MT |
519 | |
520 | if (clk->enable_count) | |
521 | goto unlock_out; | |
522 | ||
523 | if (clk->flags & CLK_IGNORE_UNUSED) | |
524 | goto unlock_out; | |
525 | ||
7c045a55 MT |
526 | /* |
527 | * some gate clocks have special needs during the disable-unused | |
528 | * sequence. call .disable_unused if available, otherwise fall | |
529 | * back to .disable | |
530 | */ | |
035a61c3 | 531 | if (clk_core_is_enabled(clk)) { |
dfc202ea | 532 | trace_clk_disable(clk); |
7c045a55 MT |
533 | if (clk->ops->disable_unused) |
534 | clk->ops->disable_unused(clk->hw); | |
535 | else if (clk->ops->disable) | |
536 | clk->ops->disable(clk->hw); | |
dfc202ea | 537 | trace_clk_disable_complete(clk); |
7c045a55 | 538 | } |
b2476490 MT |
539 | |
540 | unlock_out: | |
eab89f69 | 541 | clk_enable_unlock(flags); |
b2476490 MT |
542 | } |
543 | ||
1e435256 OJ |
544 | static bool clk_ignore_unused; |
545 | static int __init clk_ignore_unused_setup(char *__unused) | |
546 | { | |
547 | clk_ignore_unused = true; | |
548 | return 1; | |
549 | } | |
550 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
551 | ||
b2476490 MT |
552 | static int clk_disable_unused(void) |
553 | { | |
035a61c3 | 554 | struct clk_core *clk; |
b2476490 | 555 | |
1e435256 OJ |
556 | if (clk_ignore_unused) { |
557 | pr_warn("clk: Not disabling unused clocks\n"); | |
558 | return 0; | |
559 | } | |
560 | ||
eab89f69 | 561 | clk_prepare_lock(); |
b2476490 | 562 | |
b67bfe0d | 563 | hlist_for_each_entry(clk, &clk_root_list, child_node) |
b2476490 MT |
564 | clk_disable_unused_subtree(clk); |
565 | ||
b67bfe0d | 566 | hlist_for_each_entry(clk, &clk_orphan_list, child_node) |
b2476490 MT |
567 | clk_disable_unused_subtree(clk); |
568 | ||
1c155b3d UH |
569 | hlist_for_each_entry(clk, &clk_root_list, child_node) |
570 | clk_unprepare_unused_subtree(clk); | |
571 | ||
572 | hlist_for_each_entry(clk, &clk_orphan_list, child_node) | |
573 | clk_unprepare_unused_subtree(clk); | |
574 | ||
eab89f69 | 575 | clk_prepare_unlock(); |
b2476490 MT |
576 | |
577 | return 0; | |
578 | } | |
d41d5805 | 579 | late_initcall_sync(clk_disable_unused); |
b2476490 MT |
580 | |
581 | /*** helper functions ***/ | |
582 | ||
65800b2c | 583 | const char *__clk_get_name(struct clk *clk) |
b2476490 | 584 | { |
035a61c3 | 585 | return !clk ? NULL : clk->core->name; |
b2476490 | 586 | } |
4895084c | 587 | EXPORT_SYMBOL_GPL(__clk_get_name); |
b2476490 | 588 | |
65800b2c | 589 | struct clk_hw *__clk_get_hw(struct clk *clk) |
b2476490 | 590 | { |
035a61c3 | 591 | return !clk ? NULL : clk->core->hw; |
b2476490 | 592 | } |
0b7f04b8 | 593 | EXPORT_SYMBOL_GPL(__clk_get_hw); |
b2476490 | 594 | |
65800b2c | 595 | u8 __clk_get_num_parents(struct clk *clk) |
b2476490 | 596 | { |
035a61c3 | 597 | return !clk ? 0 : clk->core->num_parents; |
b2476490 | 598 | } |
0b7f04b8 | 599 | EXPORT_SYMBOL_GPL(__clk_get_num_parents); |
b2476490 | 600 | |
65800b2c | 601 | struct clk *__clk_get_parent(struct clk *clk) |
b2476490 | 602 | { |
035a61c3 TV |
603 | if (!clk) |
604 | return NULL; | |
605 | ||
606 | /* TODO: Create a per-user clk and change callers to call clk_put */ | |
607 | return !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
b2476490 | 608 | } |
0b7f04b8 | 609 | EXPORT_SYMBOL_GPL(__clk_get_parent); |
b2476490 | 610 | |
035a61c3 TV |
611 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *clk, |
612 | u8 index) | |
7ef3dcc8 JH |
613 | { |
614 | if (!clk || index >= clk->num_parents) | |
615 | return NULL; | |
616 | else if (!clk->parents) | |
035a61c3 | 617 | return clk_core_lookup(clk->parent_names[index]); |
7ef3dcc8 JH |
618 | else if (!clk->parents[index]) |
619 | return clk->parents[index] = | |
035a61c3 | 620 | clk_core_lookup(clk->parent_names[index]); |
7ef3dcc8 JH |
621 | else |
622 | return clk->parents[index]; | |
623 | } | |
035a61c3 TV |
624 | |
625 | struct clk *clk_get_parent_by_index(struct clk *clk, u8 index) | |
626 | { | |
627 | struct clk_core *parent; | |
628 | ||
629 | if (!clk) | |
630 | return NULL; | |
631 | ||
632 | parent = clk_core_get_parent_by_index(clk->core, index); | |
633 | ||
634 | return !parent ? NULL : parent->hw->clk; | |
635 | } | |
0b7f04b8 | 636 | EXPORT_SYMBOL_GPL(clk_get_parent_by_index); |
7ef3dcc8 | 637 | |
65800b2c | 638 | unsigned int __clk_get_enable_count(struct clk *clk) |
b2476490 | 639 | { |
035a61c3 | 640 | return !clk ? 0 : clk->core->enable_count; |
b2476490 MT |
641 | } |
642 | ||
035a61c3 | 643 | static unsigned long clk_core_get_rate_nolock(struct clk_core *clk) |
b2476490 MT |
644 | { |
645 | unsigned long ret; | |
646 | ||
647 | if (!clk) { | |
34e44fe8 | 648 | ret = 0; |
b2476490 MT |
649 | goto out; |
650 | } | |
651 | ||
652 | ret = clk->rate; | |
653 | ||
654 | if (clk->flags & CLK_IS_ROOT) | |
655 | goto out; | |
656 | ||
657 | if (!clk->parent) | |
34e44fe8 | 658 | ret = 0; |
b2476490 MT |
659 | |
660 | out: | |
661 | return ret; | |
662 | } | |
035a61c3 TV |
663 | |
664 | unsigned long __clk_get_rate(struct clk *clk) | |
665 | { | |
666 | if (!clk) | |
667 | return 0; | |
668 | ||
669 | return clk_core_get_rate_nolock(clk->core); | |
670 | } | |
0b7f04b8 | 671 | EXPORT_SYMBOL_GPL(__clk_get_rate); |
b2476490 | 672 | |
035a61c3 | 673 | static unsigned long __clk_get_accuracy(struct clk_core *clk) |
5279fc40 BB |
674 | { |
675 | if (!clk) | |
676 | return 0; | |
677 | ||
678 | return clk->accuracy; | |
679 | } | |
680 | ||
65800b2c | 681 | unsigned long __clk_get_flags(struct clk *clk) |
b2476490 | 682 | { |
035a61c3 | 683 | return !clk ? 0 : clk->core->flags; |
b2476490 | 684 | } |
b05c6836 | 685 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
b2476490 | 686 | |
035a61c3 | 687 | static bool clk_core_is_prepared(struct clk_core *clk) |
3d6ee287 UH |
688 | { |
689 | int ret; | |
690 | ||
691 | if (!clk) | |
692 | return false; | |
693 | ||
694 | /* | |
695 | * .is_prepared is optional for clocks that can prepare | |
696 | * fall back to software usage counter if it is missing | |
697 | */ | |
698 | if (!clk->ops->is_prepared) { | |
699 | ret = clk->prepare_count ? 1 : 0; | |
700 | goto out; | |
701 | } | |
702 | ||
703 | ret = clk->ops->is_prepared(clk->hw); | |
704 | out: | |
705 | return !!ret; | |
706 | } | |
707 | ||
035a61c3 TV |
708 | bool __clk_is_prepared(struct clk *clk) |
709 | { | |
710 | if (!clk) | |
711 | return false; | |
712 | ||
713 | return clk_core_is_prepared(clk->core); | |
714 | } | |
715 | ||
716 | static bool clk_core_is_enabled(struct clk_core *clk) | |
b2476490 MT |
717 | { |
718 | int ret; | |
719 | ||
720 | if (!clk) | |
2ac6b1f5 | 721 | return false; |
b2476490 MT |
722 | |
723 | /* | |
724 | * .is_enabled is only mandatory for clocks that gate | |
725 | * fall back to software usage counter if .is_enabled is missing | |
726 | */ | |
727 | if (!clk->ops->is_enabled) { | |
728 | ret = clk->enable_count ? 1 : 0; | |
729 | goto out; | |
730 | } | |
731 | ||
732 | ret = clk->ops->is_enabled(clk->hw); | |
733 | out: | |
2ac6b1f5 | 734 | return !!ret; |
b2476490 | 735 | } |
035a61c3 TV |
736 | |
737 | bool __clk_is_enabled(struct clk *clk) | |
738 | { | |
739 | if (!clk) | |
740 | return false; | |
741 | ||
742 | return clk_core_is_enabled(clk->core); | |
743 | } | |
0b7f04b8 | 744 | EXPORT_SYMBOL_GPL(__clk_is_enabled); |
b2476490 | 745 | |
035a61c3 TV |
746 | static struct clk_core *__clk_lookup_subtree(const char *name, |
747 | struct clk_core *clk) | |
b2476490 | 748 | { |
035a61c3 TV |
749 | struct clk_core *child; |
750 | struct clk_core *ret; | |
b2476490 MT |
751 | |
752 | if (!strcmp(clk->name, name)) | |
753 | return clk; | |
754 | ||
b67bfe0d | 755 | hlist_for_each_entry(child, &clk->children, child_node) { |
b2476490 MT |
756 | ret = __clk_lookup_subtree(name, child); |
757 | if (ret) | |
758 | return ret; | |
759 | } | |
760 | ||
761 | return NULL; | |
762 | } | |
763 | ||
035a61c3 | 764 | static struct clk_core *clk_core_lookup(const char *name) |
b2476490 | 765 | { |
035a61c3 TV |
766 | struct clk_core *root_clk; |
767 | struct clk_core *ret; | |
b2476490 MT |
768 | |
769 | if (!name) | |
770 | return NULL; | |
771 | ||
772 | /* search the 'proper' clk tree first */ | |
b67bfe0d | 773 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { |
b2476490 MT |
774 | ret = __clk_lookup_subtree(name, root_clk); |
775 | if (ret) | |
776 | return ret; | |
777 | } | |
778 | ||
779 | /* if not found, then search the orphan tree */ | |
b67bfe0d | 780 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { |
b2476490 MT |
781 | ret = __clk_lookup_subtree(name, root_clk); |
782 | if (ret) | |
783 | return ret; | |
784 | } | |
785 | ||
786 | return NULL; | |
787 | } | |
788 | ||
15a02c1f SB |
789 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
790 | unsigned long best, unsigned long flags) | |
e366fdd7 | 791 | { |
15a02c1f SB |
792 | if (flags & CLK_MUX_ROUND_CLOSEST) |
793 | return abs(now - rate) < abs(best - rate); | |
794 | ||
795 | return now <= rate && now > best; | |
796 | } | |
797 | ||
798 | static long | |
799 | clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate, | |
1c8e6004 TV |
800 | unsigned long min_rate, |
801 | unsigned long max_rate, | |
15a02c1f SB |
802 | unsigned long *best_parent_rate, |
803 | struct clk_hw **best_parent_p, | |
804 | unsigned long flags) | |
e366fdd7 | 805 | { |
035a61c3 | 806 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; |
e366fdd7 JH |
807 | int i, num_parents; |
808 | unsigned long parent_rate, best = 0; | |
809 | ||
810 | /* if NO_REPARENT flag set, pass through to current parent */ | |
035a61c3 TV |
811 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { |
812 | parent = core->parent; | |
813 | if (core->flags & CLK_SET_RATE_PARENT) | |
9e0ad7d2 JMC |
814 | best = __clk_determine_rate(parent ? parent->hw : NULL, |
815 | rate, min_rate, max_rate); | |
e366fdd7 | 816 | else if (parent) |
035a61c3 | 817 | best = clk_core_get_rate_nolock(parent); |
e366fdd7 | 818 | else |
035a61c3 | 819 | best = clk_core_get_rate_nolock(core); |
e366fdd7 JH |
820 | goto out; |
821 | } | |
822 | ||
823 | /* find the parent that can provide the fastest rate <= rate */ | |
035a61c3 | 824 | num_parents = core->num_parents; |
e366fdd7 | 825 | for (i = 0; i < num_parents; i++) { |
035a61c3 | 826 | parent = clk_core_get_parent_by_index(core, i); |
e366fdd7 JH |
827 | if (!parent) |
828 | continue; | |
035a61c3 | 829 | if (core->flags & CLK_SET_RATE_PARENT) |
1c8e6004 TV |
830 | parent_rate = __clk_determine_rate(parent->hw, rate, |
831 | min_rate, | |
832 | max_rate); | |
e366fdd7 | 833 | else |
035a61c3 | 834 | parent_rate = clk_core_get_rate_nolock(parent); |
15a02c1f | 835 | if (mux_is_better_rate(rate, parent_rate, best, flags)) { |
e366fdd7 JH |
836 | best_parent = parent; |
837 | best = parent_rate; | |
838 | } | |
839 | } | |
840 | ||
841 | out: | |
842 | if (best_parent) | |
646cafc6 | 843 | *best_parent_p = best_parent->hw; |
e366fdd7 JH |
844 | *best_parent_rate = best; |
845 | ||
846 | return best; | |
847 | } | |
15a02c1f | 848 | |
035a61c3 TV |
849 | struct clk *__clk_lookup(const char *name) |
850 | { | |
851 | struct clk_core *core = clk_core_lookup(name); | |
852 | ||
853 | return !core ? NULL : core->hw->clk; | |
854 | } | |
855 | ||
1c8e6004 TV |
856 | static void clk_core_get_boundaries(struct clk_core *clk, |
857 | unsigned long *min_rate, | |
858 | unsigned long *max_rate) | |
859 | { | |
860 | struct clk *clk_user; | |
861 | ||
862 | *min_rate = 0; | |
863 | *max_rate = ULONG_MAX; | |
864 | ||
50595f8b | 865 | hlist_for_each_entry(clk_user, &clk->clks, clks_node) |
1c8e6004 TV |
866 | *min_rate = max(*min_rate, clk_user->min_rate); |
867 | ||
50595f8b | 868 | hlist_for_each_entry(clk_user, &clk->clks, clks_node) |
1c8e6004 TV |
869 | *max_rate = min(*max_rate, clk_user->max_rate); |
870 | } | |
871 | ||
15a02c1f SB |
872 | /* |
873 | * Helper for finding best parent to provide a given frequency. This can be used | |
874 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
875 | * complex clock that may combine a mux with other operations. | |
876 | */ | |
877 | long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, | |
1c8e6004 TV |
878 | unsigned long min_rate, |
879 | unsigned long max_rate, | |
15a02c1f SB |
880 | unsigned long *best_parent_rate, |
881 | struct clk_hw **best_parent_p) | |
882 | { | |
1c8e6004 TV |
883 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, |
884 | best_parent_rate, | |
15a02c1f SB |
885 | best_parent_p, 0); |
886 | } | |
0b7f04b8 | 887 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
e366fdd7 | 888 | |
15a02c1f | 889 | long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate, |
1c8e6004 TV |
890 | unsigned long min_rate, |
891 | unsigned long max_rate, | |
15a02c1f SB |
892 | unsigned long *best_parent_rate, |
893 | struct clk_hw **best_parent_p) | |
894 | { | |
1c8e6004 TV |
895 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, |
896 | best_parent_rate, | |
15a02c1f SB |
897 | best_parent_p, |
898 | CLK_MUX_ROUND_CLOSEST); | |
899 | } | |
900 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
901 | ||
b2476490 MT |
902 | /*** clk api ***/ |
903 | ||
035a61c3 | 904 | static void clk_core_unprepare(struct clk_core *clk) |
b2476490 MT |
905 | { |
906 | if (!clk) | |
907 | return; | |
908 | ||
909 | if (WARN_ON(clk->prepare_count == 0)) | |
910 | return; | |
911 | ||
912 | if (--clk->prepare_count > 0) | |
913 | return; | |
914 | ||
915 | WARN_ON(clk->enable_count > 0); | |
916 | ||
dfc202ea SB |
917 | trace_clk_unprepare(clk); |
918 | ||
b2476490 MT |
919 | if (clk->ops->unprepare) |
920 | clk->ops->unprepare(clk->hw); | |
921 | ||
dfc202ea | 922 | trace_clk_unprepare_complete(clk); |
035a61c3 | 923 | clk_core_unprepare(clk->parent); |
b2476490 MT |
924 | } |
925 | ||
926 | /** | |
927 | * clk_unprepare - undo preparation of a clock source | |
24ee1a08 | 928 | * @clk: the clk being unprepared |
b2476490 MT |
929 | * |
930 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
931 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
932 | * if the operation may sleep. One example is a clk which is accessed over | |
933 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
934 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
935 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
936 | */ | |
937 | void clk_unprepare(struct clk *clk) | |
938 | { | |
63589e92 SB |
939 | if (IS_ERR_OR_NULL(clk)) |
940 | return; | |
941 | ||
eab89f69 | 942 | clk_prepare_lock(); |
035a61c3 | 943 | clk_core_unprepare(clk->core); |
eab89f69 | 944 | clk_prepare_unlock(); |
b2476490 MT |
945 | } |
946 | EXPORT_SYMBOL_GPL(clk_unprepare); | |
947 | ||
035a61c3 | 948 | static int clk_core_prepare(struct clk_core *clk) |
b2476490 MT |
949 | { |
950 | int ret = 0; | |
951 | ||
952 | if (!clk) | |
953 | return 0; | |
954 | ||
955 | if (clk->prepare_count == 0) { | |
035a61c3 | 956 | ret = clk_core_prepare(clk->parent); |
b2476490 MT |
957 | if (ret) |
958 | return ret; | |
959 | ||
dfc202ea SB |
960 | trace_clk_prepare(clk); |
961 | ||
962 | if (clk->ops->prepare) | |
b2476490 | 963 | ret = clk->ops->prepare(clk->hw); |
dfc202ea SB |
964 | |
965 | trace_clk_prepare_complete(clk); | |
966 | ||
967 | if (ret) { | |
968 | clk_core_unprepare(clk->parent); | |
969 | return ret; | |
b2476490 MT |
970 | } |
971 | } | |
972 | ||
973 | clk->prepare_count++; | |
974 | ||
975 | return 0; | |
976 | } | |
977 | ||
978 | /** | |
979 | * clk_prepare - prepare a clock source | |
980 | * @clk: the clk being prepared | |
981 | * | |
982 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
983 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
984 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
985 | * the complex case a clk ungate operation may require a fast and a slow part. | |
986 | * It is this reason that clk_prepare and clk_enable are not mutually | |
987 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
988 | * Returns 0 on success, -EERROR otherwise. | |
989 | */ | |
990 | int clk_prepare(struct clk *clk) | |
991 | { | |
992 | int ret; | |
993 | ||
035a61c3 TV |
994 | if (!clk) |
995 | return 0; | |
996 | ||
eab89f69 | 997 | clk_prepare_lock(); |
035a61c3 | 998 | ret = clk_core_prepare(clk->core); |
eab89f69 | 999 | clk_prepare_unlock(); |
b2476490 MT |
1000 | |
1001 | return ret; | |
1002 | } | |
1003 | EXPORT_SYMBOL_GPL(clk_prepare); | |
1004 | ||
035a61c3 | 1005 | static void clk_core_disable(struct clk_core *clk) |
b2476490 MT |
1006 | { |
1007 | if (!clk) | |
1008 | return; | |
1009 | ||
1010 | if (WARN_ON(clk->enable_count == 0)) | |
1011 | return; | |
1012 | ||
1013 | if (--clk->enable_count > 0) | |
1014 | return; | |
1015 | ||
dfc202ea SB |
1016 | trace_clk_disable(clk); |
1017 | ||
b2476490 MT |
1018 | if (clk->ops->disable) |
1019 | clk->ops->disable(clk->hw); | |
1020 | ||
dfc202ea SB |
1021 | trace_clk_disable_complete(clk); |
1022 | ||
035a61c3 TV |
1023 | clk_core_disable(clk->parent); |
1024 | } | |
1025 | ||
1026 | static void __clk_disable(struct clk *clk) | |
1027 | { | |
1028 | if (!clk) | |
1029 | return; | |
1030 | ||
1031 | clk_core_disable(clk->core); | |
b2476490 MT |
1032 | } |
1033 | ||
1034 | /** | |
1035 | * clk_disable - gate a clock | |
1036 | * @clk: the clk being gated | |
1037 | * | |
1038 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
1039 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
1040 | * clk if the operation is fast and will never sleep. One example is a | |
1041 | * SoC-internal clk which is controlled via simple register writes. In the | |
1042 | * complex case a clk gate operation may require a fast and a slow part. It is | |
1043 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
1044 | * In fact clk_disable must be called before clk_unprepare. | |
1045 | */ | |
1046 | void clk_disable(struct clk *clk) | |
1047 | { | |
1048 | unsigned long flags; | |
1049 | ||
63589e92 SB |
1050 | if (IS_ERR_OR_NULL(clk)) |
1051 | return; | |
1052 | ||
eab89f69 | 1053 | flags = clk_enable_lock(); |
b2476490 | 1054 | __clk_disable(clk); |
eab89f69 | 1055 | clk_enable_unlock(flags); |
b2476490 MT |
1056 | } |
1057 | EXPORT_SYMBOL_GPL(clk_disable); | |
1058 | ||
035a61c3 | 1059 | static int clk_core_enable(struct clk_core *clk) |
b2476490 MT |
1060 | { |
1061 | int ret = 0; | |
1062 | ||
1063 | if (!clk) | |
1064 | return 0; | |
1065 | ||
1066 | if (WARN_ON(clk->prepare_count == 0)) | |
1067 | return -ESHUTDOWN; | |
1068 | ||
1069 | if (clk->enable_count == 0) { | |
035a61c3 | 1070 | ret = clk_core_enable(clk->parent); |
b2476490 MT |
1071 | |
1072 | if (ret) | |
1073 | return ret; | |
1074 | ||
dfc202ea SB |
1075 | trace_clk_enable(clk); |
1076 | ||
1077 | if (clk->ops->enable) | |
b2476490 | 1078 | ret = clk->ops->enable(clk->hw); |
dfc202ea SB |
1079 | |
1080 | trace_clk_enable_complete(clk); | |
1081 | ||
1082 | if (ret) { | |
1083 | clk_core_disable(clk->parent); | |
1084 | return ret; | |
b2476490 MT |
1085 | } |
1086 | } | |
1087 | ||
1088 | clk->enable_count++; | |
1089 | return 0; | |
1090 | } | |
1091 | ||
035a61c3 TV |
1092 | static int __clk_enable(struct clk *clk) |
1093 | { | |
1094 | if (!clk) | |
1095 | return 0; | |
1096 | ||
1097 | return clk_core_enable(clk->core); | |
1098 | } | |
1099 | ||
b2476490 MT |
1100 | /** |
1101 | * clk_enable - ungate a clock | |
1102 | * @clk: the clk being ungated | |
1103 | * | |
1104 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
1105 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
1106 | * if the operation will never sleep. One example is a SoC-internal clk which | |
1107 | * is controlled via simple register writes. In the complex case a clk ungate | |
1108 | * operation may require a fast and a slow part. It is this reason that | |
1109 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
1110 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
1111 | * otherwise. | |
1112 | */ | |
1113 | int clk_enable(struct clk *clk) | |
1114 | { | |
1115 | unsigned long flags; | |
1116 | int ret; | |
1117 | ||
eab89f69 | 1118 | flags = clk_enable_lock(); |
b2476490 | 1119 | ret = __clk_enable(clk); |
eab89f69 | 1120 | clk_enable_unlock(flags); |
b2476490 MT |
1121 | |
1122 | return ret; | |
1123 | } | |
1124 | EXPORT_SYMBOL_GPL(clk_enable); | |
1125 | ||
035a61c3 | 1126 | static unsigned long clk_core_round_rate_nolock(struct clk_core *clk, |
1c8e6004 TV |
1127 | unsigned long rate, |
1128 | unsigned long min_rate, | |
1129 | unsigned long max_rate) | |
b2476490 | 1130 | { |
81536e07 | 1131 | unsigned long parent_rate = 0; |
035a61c3 | 1132 | struct clk_core *parent; |
646cafc6 | 1133 | struct clk_hw *parent_hw; |
b2476490 | 1134 | |
496eadf8 KK |
1135 | lockdep_assert_held(&prepare_lock); |
1136 | ||
b2476490 | 1137 | if (!clk) |
2ac6b1f5 | 1138 | return 0; |
b2476490 | 1139 | |
71472c0c JH |
1140 | parent = clk->parent; |
1141 | if (parent) | |
1142 | parent_rate = parent->rate; | |
1143 | ||
646cafc6 TV |
1144 | if (clk->ops->determine_rate) { |
1145 | parent_hw = parent ? parent->hw : NULL; | |
1c8e6004 TV |
1146 | return clk->ops->determine_rate(clk->hw, rate, |
1147 | min_rate, max_rate, | |
1148 | &parent_rate, &parent_hw); | |
646cafc6 | 1149 | } else if (clk->ops->round_rate) |
71472c0c JH |
1150 | return clk->ops->round_rate(clk->hw, rate, &parent_rate); |
1151 | else if (clk->flags & CLK_SET_RATE_PARENT) | |
1c8e6004 TV |
1152 | return clk_core_round_rate_nolock(clk->parent, rate, min_rate, |
1153 | max_rate); | |
71472c0c JH |
1154 | else |
1155 | return clk->rate; | |
b2476490 | 1156 | } |
035a61c3 | 1157 | |
1c8e6004 TV |
1158 | /** |
1159 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
1160 | * @hw: determine the rate of this clock | |
1161 | * @rate: target rate | |
1162 | * @min_rate: returned rate must be greater than this rate | |
1163 | * @max_rate: returned rate must be less than this rate | |
1164 | * | |
1165 | * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate and | |
1166 | * .determine_rate. | |
1167 | */ | |
1168 | unsigned long __clk_determine_rate(struct clk_hw *hw, | |
1169 | unsigned long rate, | |
1170 | unsigned long min_rate, | |
1171 | unsigned long max_rate) | |
1172 | { | |
1173 | if (!hw) | |
1174 | return 0; | |
1175 | ||
1176 | return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate); | |
1177 | } | |
1178 | EXPORT_SYMBOL_GPL(__clk_determine_rate); | |
1179 | ||
035a61c3 TV |
1180 | /** |
1181 | * __clk_round_rate - round the given rate for a clk | |
1182 | * @clk: round the rate of this clock | |
1183 | * @rate: the rate which is to be rounded | |
1184 | * | |
1185 | * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate | |
1186 | */ | |
1187 | unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) | |
1188 | { | |
1c8e6004 TV |
1189 | unsigned long min_rate; |
1190 | unsigned long max_rate; | |
1191 | ||
035a61c3 TV |
1192 | if (!clk) |
1193 | return 0; | |
1194 | ||
1c8e6004 TV |
1195 | clk_core_get_boundaries(clk->core, &min_rate, &max_rate); |
1196 | ||
1197 | return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate); | |
035a61c3 | 1198 | } |
1cdf8ee2 | 1199 | EXPORT_SYMBOL_GPL(__clk_round_rate); |
b2476490 MT |
1200 | |
1201 | /** | |
1202 | * clk_round_rate - round the given rate for a clk | |
1203 | * @clk: the clk for which we are rounding a rate | |
1204 | * @rate: the rate which is to be rounded | |
1205 | * | |
1206 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
1207 | * use which is then returned. If clk doesn't support round_rate operation | |
1208 | * then the parent rate is returned. | |
1209 | */ | |
1210 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
1211 | { | |
1212 | unsigned long ret; | |
1213 | ||
035a61c3 TV |
1214 | if (!clk) |
1215 | return 0; | |
1216 | ||
eab89f69 | 1217 | clk_prepare_lock(); |
b2476490 | 1218 | ret = __clk_round_rate(clk, rate); |
eab89f69 | 1219 | clk_prepare_unlock(); |
b2476490 MT |
1220 | |
1221 | return ret; | |
1222 | } | |
1223 | EXPORT_SYMBOL_GPL(clk_round_rate); | |
1224 | ||
1225 | /** | |
1226 | * __clk_notify - call clk notifier chain | |
1227 | * @clk: struct clk * that is changing rate | |
1228 | * @msg: clk notifier type (see include/linux/clk.h) | |
1229 | * @old_rate: old clk rate | |
1230 | * @new_rate: new clk rate | |
1231 | * | |
1232 | * Triggers a notifier call chain on the clk rate-change notification | |
1233 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
1234 | * and current rates to the notifier callback. Intended to be called by | |
1235 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
1236 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
1237 | * a driver returns that. | |
1238 | */ | |
035a61c3 | 1239 | static int __clk_notify(struct clk_core *clk, unsigned long msg, |
b2476490 MT |
1240 | unsigned long old_rate, unsigned long new_rate) |
1241 | { | |
1242 | struct clk_notifier *cn; | |
1243 | struct clk_notifier_data cnd; | |
1244 | int ret = NOTIFY_DONE; | |
1245 | ||
b2476490 MT |
1246 | cnd.old_rate = old_rate; |
1247 | cnd.new_rate = new_rate; | |
1248 | ||
1249 | list_for_each_entry(cn, &clk_notifier_list, node) { | |
035a61c3 TV |
1250 | if (cn->clk->core == clk) { |
1251 | cnd.clk = cn->clk; | |
b2476490 MT |
1252 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, |
1253 | &cnd); | |
b2476490 MT |
1254 | } |
1255 | } | |
1256 | ||
1257 | return ret; | |
1258 | } | |
1259 | ||
5279fc40 BB |
1260 | /** |
1261 | * __clk_recalc_accuracies | |
1262 | * @clk: first clk in the subtree | |
1263 | * | |
1264 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
1265 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
1266 | * callback then it is assumed that the clock will take on the accuracy of it's | |
1267 | * parent. | |
1268 | * | |
1269 | * Caller must hold prepare_lock. | |
1270 | */ | |
035a61c3 | 1271 | static void __clk_recalc_accuracies(struct clk_core *clk) |
5279fc40 BB |
1272 | { |
1273 | unsigned long parent_accuracy = 0; | |
035a61c3 | 1274 | struct clk_core *child; |
5279fc40 | 1275 | |
496eadf8 KK |
1276 | lockdep_assert_held(&prepare_lock); |
1277 | ||
5279fc40 BB |
1278 | if (clk->parent) |
1279 | parent_accuracy = clk->parent->accuracy; | |
1280 | ||
1281 | if (clk->ops->recalc_accuracy) | |
1282 | clk->accuracy = clk->ops->recalc_accuracy(clk->hw, | |
1283 | parent_accuracy); | |
1284 | else | |
1285 | clk->accuracy = parent_accuracy; | |
1286 | ||
1287 | hlist_for_each_entry(child, &clk->children, child_node) | |
1288 | __clk_recalc_accuracies(child); | |
1289 | } | |
1290 | ||
035a61c3 TV |
1291 | static long clk_core_get_accuracy(struct clk_core *clk) |
1292 | { | |
1293 | unsigned long accuracy; | |
1294 | ||
1295 | clk_prepare_lock(); | |
1296 | if (clk && (clk->flags & CLK_GET_ACCURACY_NOCACHE)) | |
1297 | __clk_recalc_accuracies(clk); | |
1298 | ||
1299 | accuracy = __clk_get_accuracy(clk); | |
1300 | clk_prepare_unlock(); | |
1301 | ||
1302 | return accuracy; | |
1303 | } | |
1304 | ||
5279fc40 BB |
1305 | /** |
1306 | * clk_get_accuracy - return the accuracy of clk | |
1307 | * @clk: the clk whose accuracy is being returned | |
1308 | * | |
1309 | * Simply returns the cached accuracy of the clk, unless | |
1310 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
1311 | * issued. | |
1312 | * If clk is NULL then returns 0. | |
1313 | */ | |
1314 | long clk_get_accuracy(struct clk *clk) | |
1315 | { | |
035a61c3 TV |
1316 | if (!clk) |
1317 | return 0; | |
5279fc40 | 1318 | |
035a61c3 | 1319 | return clk_core_get_accuracy(clk->core); |
5279fc40 BB |
1320 | } |
1321 | EXPORT_SYMBOL_GPL(clk_get_accuracy); | |
1322 | ||
035a61c3 TV |
1323 | static unsigned long clk_recalc(struct clk_core *clk, |
1324 | unsigned long parent_rate) | |
8f2c2db1 SB |
1325 | { |
1326 | if (clk->ops->recalc_rate) | |
1327 | return clk->ops->recalc_rate(clk->hw, parent_rate); | |
1328 | return parent_rate; | |
1329 | } | |
1330 | ||
b2476490 MT |
1331 | /** |
1332 | * __clk_recalc_rates | |
1333 | * @clk: first clk in the subtree | |
1334 | * @msg: notification type (see include/linux/clk.h) | |
1335 | * | |
1336 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1337 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
24ee1a08 | 1338 | * it is assumed that the clock will take on the rate of its parent. |
b2476490 MT |
1339 | * |
1340 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1341 | * if necessary. | |
1342 | * | |
1343 | * Caller must hold prepare_lock. | |
1344 | */ | |
035a61c3 | 1345 | static void __clk_recalc_rates(struct clk_core *clk, unsigned long msg) |
b2476490 MT |
1346 | { |
1347 | unsigned long old_rate; | |
1348 | unsigned long parent_rate = 0; | |
035a61c3 | 1349 | struct clk_core *child; |
b2476490 | 1350 | |
496eadf8 KK |
1351 | lockdep_assert_held(&prepare_lock); |
1352 | ||
b2476490 MT |
1353 | old_rate = clk->rate; |
1354 | ||
1355 | if (clk->parent) | |
1356 | parent_rate = clk->parent->rate; | |
1357 | ||
8f2c2db1 | 1358 | clk->rate = clk_recalc(clk, parent_rate); |
b2476490 MT |
1359 | |
1360 | /* | |
1361 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1362 | * & ABORT_RATE_CHANGE notifiers | |
1363 | */ | |
1364 | if (clk->notifier_count && msg) | |
1365 | __clk_notify(clk, msg, old_rate, clk->rate); | |
1366 | ||
b67bfe0d | 1367 | hlist_for_each_entry(child, &clk->children, child_node) |
b2476490 MT |
1368 | __clk_recalc_rates(child, msg); |
1369 | } | |
1370 | ||
035a61c3 | 1371 | static unsigned long clk_core_get_rate(struct clk_core *clk) |
a093bde2 UH |
1372 | { |
1373 | unsigned long rate; | |
1374 | ||
eab89f69 | 1375 | clk_prepare_lock(); |
a093bde2 UH |
1376 | |
1377 | if (clk && (clk->flags & CLK_GET_RATE_NOCACHE)) | |
1378 | __clk_recalc_rates(clk, 0); | |
1379 | ||
035a61c3 | 1380 | rate = clk_core_get_rate_nolock(clk); |
eab89f69 | 1381 | clk_prepare_unlock(); |
a093bde2 UH |
1382 | |
1383 | return rate; | |
1384 | } | |
035a61c3 TV |
1385 | |
1386 | /** | |
1387 | * clk_get_rate - return the rate of clk | |
1388 | * @clk: the clk whose rate is being returned | |
1389 | * | |
1390 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag | |
1391 | * is set, which means a recalc_rate will be issued. | |
1392 | * If clk is NULL then returns 0. | |
1393 | */ | |
1394 | unsigned long clk_get_rate(struct clk *clk) | |
1395 | { | |
1396 | if (!clk) | |
1397 | return 0; | |
1398 | ||
1399 | return clk_core_get_rate(clk->core); | |
1400 | } | |
a093bde2 UH |
1401 | EXPORT_SYMBOL_GPL(clk_get_rate); |
1402 | ||
035a61c3 TV |
1403 | static int clk_fetch_parent_index(struct clk_core *clk, |
1404 | struct clk_core *parent) | |
4935b22c | 1405 | { |
f1c8b2ed | 1406 | int i; |
4935b22c | 1407 | |
f1c8b2ed | 1408 | if (!clk->parents) { |
96a7ed90 TF |
1409 | clk->parents = kcalloc(clk->num_parents, |
1410 | sizeof(struct clk *), GFP_KERNEL); | |
f1c8b2ed TF |
1411 | if (!clk->parents) |
1412 | return -ENOMEM; | |
1413 | } | |
4935b22c JH |
1414 | |
1415 | /* | |
1416 | * find index of new parent clock using cached parent ptrs, | |
1417 | * or if not yet cached, use string name comparison and cache | |
035a61c3 | 1418 | * them now to avoid future calls to clk_core_lookup. |
4935b22c JH |
1419 | */ |
1420 | for (i = 0; i < clk->num_parents; i++) { | |
da0f0b2c | 1421 | if (clk->parents[i] == parent) |
f1c8b2ed | 1422 | return i; |
da0f0b2c TF |
1423 | |
1424 | if (clk->parents[i]) | |
1425 | continue; | |
1426 | ||
1427 | if (!strcmp(clk->parent_names[i], parent->name)) { | |
035a61c3 | 1428 | clk->parents[i] = clk_core_lookup(parent->name); |
f1c8b2ed | 1429 | return i; |
4935b22c JH |
1430 | } |
1431 | } | |
1432 | ||
f1c8b2ed | 1433 | return -EINVAL; |
4935b22c JH |
1434 | } |
1435 | ||
035a61c3 | 1436 | static void clk_reparent(struct clk_core *clk, struct clk_core *new_parent) |
4935b22c JH |
1437 | { |
1438 | hlist_del(&clk->child_node); | |
1439 | ||
903efc55 JH |
1440 | if (new_parent) { |
1441 | /* avoid duplicate POST_RATE_CHANGE notifications */ | |
1442 | if (new_parent->new_child == clk) | |
1443 | new_parent->new_child = NULL; | |
1444 | ||
4935b22c | 1445 | hlist_add_head(&clk->child_node, &new_parent->children); |
903efc55 | 1446 | } else { |
4935b22c | 1447 | hlist_add_head(&clk->child_node, &clk_orphan_list); |
903efc55 | 1448 | } |
4935b22c JH |
1449 | |
1450 | clk->parent = new_parent; | |
1451 | } | |
1452 | ||
035a61c3 TV |
1453 | static struct clk_core *__clk_set_parent_before(struct clk_core *clk, |
1454 | struct clk_core *parent) | |
4935b22c JH |
1455 | { |
1456 | unsigned long flags; | |
035a61c3 | 1457 | struct clk_core *old_parent = clk->parent; |
4935b22c JH |
1458 | |
1459 | /* | |
1460 | * Migrate prepare state between parents and prevent race with | |
1461 | * clk_enable(). | |
1462 | * | |
1463 | * If the clock is not prepared, then a race with | |
1464 | * clk_enable/disable() is impossible since we already have the | |
1465 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1466 | * a clk_prepare()). | |
1467 | * | |
1468 | * If the clock is prepared, migrate the prepared state to the new | |
1469 | * parent and also protect against a race with clk_enable() by | |
1470 | * forcing the clock and the new parent on. This ensures that all | |
1471 | * future calls to clk_enable() are practically NOPs with respect to | |
1472 | * hardware and software states. | |
1473 | * | |
1474 | * See also: Comment for clk_set_parent() below. | |
1475 | */ | |
1476 | if (clk->prepare_count) { | |
035a61c3 TV |
1477 | clk_core_prepare(parent); |
1478 | clk_core_enable(parent); | |
1479 | clk_core_enable(clk); | |
4935b22c JH |
1480 | } |
1481 | ||
1482 | /* update the clk tree topology */ | |
1483 | flags = clk_enable_lock(); | |
1484 | clk_reparent(clk, parent); | |
1485 | clk_enable_unlock(flags); | |
1486 | ||
3fa2252b SB |
1487 | return old_parent; |
1488 | } | |
1489 | ||
035a61c3 TV |
1490 | static void __clk_set_parent_after(struct clk_core *core, |
1491 | struct clk_core *parent, | |
1492 | struct clk_core *old_parent) | |
3fa2252b SB |
1493 | { |
1494 | /* | |
1495 | * Finish the migration of prepare state and undo the changes done | |
1496 | * for preventing a race with clk_enable(). | |
1497 | */ | |
035a61c3 TV |
1498 | if (core->prepare_count) { |
1499 | clk_core_disable(core); | |
1500 | clk_core_disable(old_parent); | |
1501 | clk_core_unprepare(old_parent); | |
3fa2252b | 1502 | } |
3fa2252b SB |
1503 | } |
1504 | ||
035a61c3 TV |
1505 | static int __clk_set_parent(struct clk_core *clk, struct clk_core *parent, |
1506 | u8 p_index) | |
3fa2252b SB |
1507 | { |
1508 | unsigned long flags; | |
1509 | int ret = 0; | |
035a61c3 | 1510 | struct clk_core *old_parent; |
3fa2252b SB |
1511 | |
1512 | old_parent = __clk_set_parent_before(clk, parent); | |
1513 | ||
dfc202ea SB |
1514 | trace_clk_set_parent(clk, parent); |
1515 | ||
4935b22c JH |
1516 | /* change clock input source */ |
1517 | if (parent && clk->ops->set_parent) | |
1518 | ret = clk->ops->set_parent(clk->hw, p_index); | |
1519 | ||
dfc202ea SB |
1520 | trace_clk_set_parent_complete(clk, parent); |
1521 | ||
4935b22c JH |
1522 | if (ret) { |
1523 | flags = clk_enable_lock(); | |
1524 | clk_reparent(clk, old_parent); | |
1525 | clk_enable_unlock(flags); | |
1526 | ||
1527 | if (clk->prepare_count) { | |
035a61c3 TV |
1528 | clk_core_disable(clk); |
1529 | clk_core_disable(parent); | |
1530 | clk_core_unprepare(parent); | |
4935b22c JH |
1531 | } |
1532 | return ret; | |
1533 | } | |
1534 | ||
3fa2252b | 1535 | __clk_set_parent_after(clk, parent, old_parent); |
4935b22c | 1536 | |
4935b22c JH |
1537 | return 0; |
1538 | } | |
1539 | ||
b2476490 MT |
1540 | /** |
1541 | * __clk_speculate_rates | |
1542 | * @clk: first clk in the subtree | |
1543 | * @parent_rate: the "future" rate of clk's parent | |
1544 | * | |
1545 | * Walks the subtree of clks starting with clk, speculating rates as it | |
1546 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1547 | * | |
1548 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1549 | * pre-rate change notifications and returns early if no clks in the | |
1550 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1551 | * implement the .recalc_rate callback then it is assumed that the clock will | |
24ee1a08 | 1552 | * take on the rate of its parent. |
b2476490 MT |
1553 | * |
1554 | * Caller must hold prepare_lock. | |
1555 | */ | |
035a61c3 TV |
1556 | static int __clk_speculate_rates(struct clk_core *clk, |
1557 | unsigned long parent_rate) | |
b2476490 | 1558 | { |
035a61c3 | 1559 | struct clk_core *child; |
b2476490 MT |
1560 | unsigned long new_rate; |
1561 | int ret = NOTIFY_DONE; | |
1562 | ||
496eadf8 KK |
1563 | lockdep_assert_held(&prepare_lock); |
1564 | ||
8f2c2db1 | 1565 | new_rate = clk_recalc(clk, parent_rate); |
b2476490 | 1566 | |
fb72a059 | 1567 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ |
b2476490 MT |
1568 | if (clk->notifier_count) |
1569 | ret = __clk_notify(clk, PRE_RATE_CHANGE, clk->rate, new_rate); | |
1570 | ||
86bcfa2e MT |
1571 | if (ret & NOTIFY_STOP_MASK) { |
1572 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1573 | __func__, clk->name, ret); | |
b2476490 | 1574 | goto out; |
86bcfa2e | 1575 | } |
b2476490 | 1576 | |
b67bfe0d | 1577 | hlist_for_each_entry(child, &clk->children, child_node) { |
b2476490 | 1578 | ret = __clk_speculate_rates(child, new_rate); |
fb72a059 | 1579 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
1580 | break; |
1581 | } | |
1582 | ||
1583 | out: | |
1584 | return ret; | |
1585 | } | |
1586 | ||
035a61c3 TV |
1587 | static void clk_calc_subtree(struct clk_core *clk, unsigned long new_rate, |
1588 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1589 | { |
035a61c3 | 1590 | struct clk_core *child; |
b2476490 MT |
1591 | |
1592 | clk->new_rate = new_rate; | |
71472c0c JH |
1593 | clk->new_parent = new_parent; |
1594 | clk->new_parent_index = p_index; | |
1595 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1596 | clk->new_child = NULL; | |
1597 | if (new_parent && new_parent != clk->parent) | |
1598 | new_parent->new_child = clk; | |
b2476490 | 1599 | |
b67bfe0d | 1600 | hlist_for_each_entry(child, &clk->children, child_node) { |
8f2c2db1 | 1601 | child->new_rate = clk_recalc(child, new_rate); |
71472c0c | 1602 | clk_calc_subtree(child, child->new_rate, NULL, 0); |
b2476490 MT |
1603 | } |
1604 | } | |
1605 | ||
1606 | /* | |
1607 | * calculate the new rates returning the topmost clock that has to be | |
1608 | * changed. | |
1609 | */ | |
035a61c3 TV |
1610 | static struct clk_core *clk_calc_new_rates(struct clk_core *clk, |
1611 | unsigned long rate) | |
b2476490 | 1612 | { |
035a61c3 TV |
1613 | struct clk_core *top = clk; |
1614 | struct clk_core *old_parent, *parent; | |
646cafc6 | 1615 | struct clk_hw *parent_hw; |
81536e07 | 1616 | unsigned long best_parent_rate = 0; |
b2476490 | 1617 | unsigned long new_rate; |
1c8e6004 TV |
1618 | unsigned long min_rate; |
1619 | unsigned long max_rate; | |
f1c8b2ed | 1620 | int p_index = 0; |
b2476490 | 1621 | |
7452b219 MT |
1622 | /* sanity */ |
1623 | if (IS_ERR_OR_NULL(clk)) | |
1624 | return NULL; | |
1625 | ||
63f5c3b2 | 1626 | /* save parent rate, if it exists */ |
71472c0c JH |
1627 | parent = old_parent = clk->parent; |
1628 | if (parent) | |
1629 | best_parent_rate = parent->rate; | |
1630 | ||
1c8e6004 TV |
1631 | clk_core_get_boundaries(clk, &min_rate, &max_rate); |
1632 | ||
71472c0c JH |
1633 | /* find the closest rate and parent clk/rate */ |
1634 | if (clk->ops->determine_rate) { | |
646cafc6 | 1635 | parent_hw = parent ? parent->hw : NULL; |
71472c0c | 1636 | new_rate = clk->ops->determine_rate(clk->hw, rate, |
1c8e6004 TV |
1637 | min_rate, |
1638 | max_rate, | |
71472c0c | 1639 | &best_parent_rate, |
646cafc6 | 1640 | &parent_hw); |
035a61c3 | 1641 | parent = parent_hw ? parent_hw->core : NULL; |
71472c0c JH |
1642 | } else if (clk->ops->round_rate) { |
1643 | new_rate = clk->ops->round_rate(clk->hw, rate, | |
1644 | &best_parent_rate); | |
1c8e6004 TV |
1645 | if (new_rate < min_rate || new_rate > max_rate) |
1646 | return NULL; | |
71472c0c JH |
1647 | } else if (!parent || !(clk->flags & CLK_SET_RATE_PARENT)) { |
1648 | /* pass-through clock without adjustable parent */ | |
1649 | clk->new_rate = clk->rate; | |
1650 | return NULL; | |
1651 | } else { | |
1652 | /* pass-through clock with adjustable parent */ | |
1653 | top = clk_calc_new_rates(parent, rate); | |
1654 | new_rate = parent->new_rate; | |
63f5c3b2 | 1655 | goto out; |
7452b219 MT |
1656 | } |
1657 | ||
71472c0c JH |
1658 | /* some clocks must be gated to change parent */ |
1659 | if (parent != old_parent && | |
1660 | (clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) { | |
1661 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1662 | __func__, clk->name); | |
b2476490 MT |
1663 | return NULL; |
1664 | } | |
1665 | ||
71472c0c | 1666 | /* try finding the new parent index */ |
4526e7b8 | 1667 | if (parent && clk->num_parents > 1) { |
71472c0c | 1668 | p_index = clk_fetch_parent_index(clk, parent); |
f1c8b2ed | 1669 | if (p_index < 0) { |
71472c0c JH |
1670 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
1671 | __func__, parent->name, clk->name); | |
1672 | return NULL; | |
1673 | } | |
b2476490 MT |
1674 | } |
1675 | ||
71472c0c JH |
1676 | if ((clk->flags & CLK_SET_RATE_PARENT) && parent && |
1677 | best_parent_rate != parent->rate) | |
1678 | top = clk_calc_new_rates(parent, best_parent_rate); | |
b2476490 MT |
1679 | |
1680 | out: | |
71472c0c | 1681 | clk_calc_subtree(clk, new_rate, parent, p_index); |
b2476490 MT |
1682 | |
1683 | return top; | |
1684 | } | |
1685 | ||
1686 | /* | |
1687 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1688 | * so that in case of an error we can walk down the whole tree again and | |
1689 | * abort the change. | |
1690 | */ | |
035a61c3 TV |
1691 | static struct clk_core *clk_propagate_rate_change(struct clk_core *clk, |
1692 | unsigned long event) | |
b2476490 | 1693 | { |
035a61c3 | 1694 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1695 | int ret = NOTIFY_DONE; |
1696 | ||
1697 | if (clk->rate == clk->new_rate) | |
5fda6858 | 1698 | return NULL; |
b2476490 MT |
1699 | |
1700 | if (clk->notifier_count) { | |
1701 | ret = __clk_notify(clk, event, clk->rate, clk->new_rate); | |
fb72a059 | 1702 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
1703 | fail_clk = clk; |
1704 | } | |
1705 | ||
b67bfe0d | 1706 | hlist_for_each_entry(child, &clk->children, child_node) { |
71472c0c JH |
1707 | /* Skip children who will be reparented to another clock */ |
1708 | if (child->new_parent && child->new_parent != clk) | |
1709 | continue; | |
1710 | tmp_clk = clk_propagate_rate_change(child, event); | |
1711 | if (tmp_clk) | |
1712 | fail_clk = tmp_clk; | |
1713 | } | |
1714 | ||
1715 | /* handle the new child who might not be in clk->children yet */ | |
1716 | if (clk->new_child) { | |
1717 | tmp_clk = clk_propagate_rate_change(clk->new_child, event); | |
1718 | if (tmp_clk) | |
1719 | fail_clk = tmp_clk; | |
b2476490 MT |
1720 | } |
1721 | ||
1722 | return fail_clk; | |
1723 | } | |
1724 | ||
1725 | /* | |
1726 | * walk down a subtree and set the new rates notifying the rate | |
1727 | * change on the way | |
1728 | */ | |
035a61c3 | 1729 | static void clk_change_rate(struct clk_core *clk) |
b2476490 | 1730 | { |
035a61c3 | 1731 | struct clk_core *child; |
067bb174 | 1732 | struct hlist_node *tmp; |
b2476490 | 1733 | unsigned long old_rate; |
bf47b4fd | 1734 | unsigned long best_parent_rate = 0; |
3fa2252b | 1735 | bool skip_set_rate = false; |
035a61c3 | 1736 | struct clk_core *old_parent; |
b2476490 MT |
1737 | |
1738 | old_rate = clk->rate; | |
1739 | ||
3fa2252b SB |
1740 | if (clk->new_parent) |
1741 | best_parent_rate = clk->new_parent->rate; | |
1742 | else if (clk->parent) | |
bf47b4fd PM |
1743 | best_parent_rate = clk->parent->rate; |
1744 | ||
3fa2252b SB |
1745 | if (clk->new_parent && clk->new_parent != clk->parent) { |
1746 | old_parent = __clk_set_parent_before(clk, clk->new_parent); | |
dfc202ea | 1747 | trace_clk_set_parent(clk, clk->new_parent); |
3fa2252b SB |
1748 | |
1749 | if (clk->ops->set_rate_and_parent) { | |
1750 | skip_set_rate = true; | |
1751 | clk->ops->set_rate_and_parent(clk->hw, clk->new_rate, | |
1752 | best_parent_rate, | |
1753 | clk->new_parent_index); | |
1754 | } else if (clk->ops->set_parent) { | |
1755 | clk->ops->set_parent(clk->hw, clk->new_parent_index); | |
1756 | } | |
1757 | ||
dfc202ea | 1758 | trace_clk_set_parent_complete(clk, clk->new_parent); |
3fa2252b SB |
1759 | __clk_set_parent_after(clk, clk->new_parent, old_parent); |
1760 | } | |
1761 | ||
dfc202ea SB |
1762 | trace_clk_set_rate(clk, clk->new_rate); |
1763 | ||
3fa2252b | 1764 | if (!skip_set_rate && clk->ops->set_rate) |
bf47b4fd | 1765 | clk->ops->set_rate(clk->hw, clk->new_rate, best_parent_rate); |
b2476490 | 1766 | |
dfc202ea SB |
1767 | trace_clk_set_rate_complete(clk, clk->new_rate); |
1768 | ||
8f2c2db1 | 1769 | clk->rate = clk_recalc(clk, best_parent_rate); |
b2476490 MT |
1770 | |
1771 | if (clk->notifier_count && old_rate != clk->rate) | |
1772 | __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate); | |
1773 | ||
067bb174 TK |
1774 | /* |
1775 | * Use safe iteration, as change_rate can actually swap parents | |
1776 | * for certain clock types. | |
1777 | */ | |
1778 | hlist_for_each_entry_safe(child, tmp, &clk->children, child_node) { | |
71472c0c JH |
1779 | /* Skip children who will be reparented to another clock */ |
1780 | if (child->new_parent && child->new_parent != clk) | |
1781 | continue; | |
b2476490 | 1782 | clk_change_rate(child); |
71472c0c JH |
1783 | } |
1784 | ||
1785 | /* handle the new child who might not be in clk->children yet */ | |
1786 | if (clk->new_child) | |
1787 | clk_change_rate(clk->new_child); | |
b2476490 MT |
1788 | } |
1789 | ||
1c8e6004 TV |
1790 | static int clk_core_set_rate_nolock(struct clk_core *clk, |
1791 | unsigned long req_rate) | |
1792 | { | |
1793 | struct clk_core *top, *fail_clk; | |
1794 | unsigned long rate = req_rate; | |
1795 | int ret = 0; | |
1796 | ||
1797 | if (!clk) | |
1798 | return 0; | |
1799 | ||
1800 | /* bail early if nothing to do */ | |
1801 | if (rate == clk_core_get_rate_nolock(clk)) | |
1802 | return 0; | |
1803 | ||
1804 | if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) | |
1805 | return -EBUSY; | |
1806 | ||
1807 | /* calculate new rates and get the topmost changed clock */ | |
1808 | top = clk_calc_new_rates(clk, rate); | |
1809 | if (!top) | |
1810 | return -EINVAL; | |
1811 | ||
1812 | /* notify that we are about to change rates */ | |
1813 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1814 | if (fail_clk) { | |
1815 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1816 | fail_clk->name); | |
1817 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1818 | return -EBUSY; | |
1819 | } | |
1820 | ||
1821 | /* change the rates */ | |
1822 | clk_change_rate(top); | |
1823 | ||
1824 | clk->req_rate = req_rate; | |
1825 | ||
1826 | return ret; | |
1827 | } | |
1828 | ||
b2476490 MT |
1829 | /** |
1830 | * clk_set_rate - specify a new rate for clk | |
1831 | * @clk: the clk whose rate is being changed | |
1832 | * @rate: the new rate for clk | |
1833 | * | |
5654dc94 | 1834 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
b2476490 | 1835 | * |
5654dc94 MT |
1836 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to |
1837 | * propagate up to clk's parent; whether or not this happens depends on the | |
1838 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1839 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1840 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
24ee1a08 | 1841 | * up to clk's parent and set its rate. Upward propagation will continue |
5654dc94 MT |
1842 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or |
1843 | * .round_rate stops requesting changes to clk's parent_rate. | |
b2476490 | 1844 | * |
5654dc94 MT |
1845 | * Rate changes are accomplished via tree traversal that also recalculates the |
1846 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
b2476490 MT |
1847 | * |
1848 | * Returns 0 on success, -EERROR otherwise. | |
1849 | */ | |
1850 | int clk_set_rate(struct clk *clk, unsigned long rate) | |
1851 | { | |
1c8e6004 | 1852 | int ret; |
b2476490 | 1853 | |
89ac8d7a MT |
1854 | if (!clk) |
1855 | return 0; | |
1856 | ||
b2476490 | 1857 | /* prevent racing with updates to the clock topology */ |
eab89f69 | 1858 | clk_prepare_lock(); |
b2476490 | 1859 | |
1c8e6004 | 1860 | ret = clk_core_set_rate_nolock(clk->core, rate); |
b2476490 | 1861 | |
1c8e6004 | 1862 | clk_prepare_unlock(); |
0e1c0301 | 1863 | |
1c8e6004 TV |
1864 | return ret; |
1865 | } | |
1866 | EXPORT_SYMBOL_GPL(clk_set_rate); | |
b2476490 | 1867 | |
1c8e6004 TV |
1868 | /** |
1869 | * clk_set_rate_range - set a rate range for a clock source | |
1870 | * @clk: clock source | |
1871 | * @min: desired minimum clock rate in Hz, inclusive | |
1872 | * @max: desired maximum clock rate in Hz, inclusive | |
1873 | * | |
1874 | * Returns success (0) or negative errno. | |
1875 | */ | |
1876 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
1877 | { | |
1878 | int ret = 0; | |
1879 | ||
1880 | if (!clk) | |
1881 | return 0; | |
1882 | ||
1883 | if (min > max) { | |
1884 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1885 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1886 | min, max); | |
1887 | return -EINVAL; | |
b2476490 MT |
1888 | } |
1889 | ||
1c8e6004 TV |
1890 | clk_prepare_lock(); |
1891 | ||
1892 | if (min != clk->min_rate || max != clk->max_rate) { | |
1893 | clk->min_rate = min; | |
1894 | clk->max_rate = max; | |
1895 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
1896 | } | |
b2476490 | 1897 | |
eab89f69 | 1898 | clk_prepare_unlock(); |
b2476490 MT |
1899 | |
1900 | return ret; | |
1901 | } | |
1c8e6004 TV |
1902 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
1903 | ||
1904 | /** | |
1905 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1906 | * @clk: clock source | |
1907 | * @rate: desired minimum clock rate in Hz, inclusive | |
1908 | * | |
1909 | * Returns success (0) or negative errno. | |
1910 | */ | |
1911 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
1912 | { | |
1913 | if (!clk) | |
1914 | return 0; | |
1915 | ||
1916 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
1917 | } | |
1918 | EXPORT_SYMBOL_GPL(clk_set_min_rate); | |
1919 | ||
1920 | /** | |
1921 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1922 | * @clk: clock source | |
1923 | * @rate: desired maximum clock rate in Hz, inclusive | |
1924 | * | |
1925 | * Returns success (0) or negative errno. | |
1926 | */ | |
1927 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
1928 | { | |
1929 | if (!clk) | |
1930 | return 0; | |
1931 | ||
1932 | return clk_set_rate_range(clk, clk->min_rate, rate); | |
1933 | } | |
1934 | EXPORT_SYMBOL_GPL(clk_set_max_rate); | |
b2476490 MT |
1935 | |
1936 | /** | |
1937 | * clk_get_parent - return the parent of a clk | |
1938 | * @clk: the clk whose parent gets returned | |
1939 | * | |
1940 | * Simply returns clk->parent. Returns NULL if clk is NULL. | |
1941 | */ | |
1942 | struct clk *clk_get_parent(struct clk *clk) | |
1943 | { | |
1944 | struct clk *parent; | |
1945 | ||
eab89f69 | 1946 | clk_prepare_lock(); |
b2476490 | 1947 | parent = __clk_get_parent(clk); |
eab89f69 | 1948 | clk_prepare_unlock(); |
b2476490 MT |
1949 | |
1950 | return parent; | |
1951 | } | |
1952 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
1953 | ||
1954 | /* | |
1955 | * .get_parent is mandatory for clocks with multiple possible parents. It is | |
1956 | * optional for single-parent clocks. Always call .get_parent if it is | |
1957 | * available and WARN if it is missing for multi-parent clocks. | |
1958 | * | |
1959 | * For single-parent clocks without .get_parent, first check to see if the | |
1960 | * .parents array exists, and if so use it to avoid an expensive tree | |
035a61c3 | 1961 | * traversal. If .parents does not exist then walk the tree. |
b2476490 | 1962 | */ |
035a61c3 | 1963 | static struct clk_core *__clk_init_parent(struct clk_core *clk) |
b2476490 | 1964 | { |
035a61c3 | 1965 | struct clk_core *ret = NULL; |
b2476490 MT |
1966 | u8 index; |
1967 | ||
1968 | /* handle the trivial cases */ | |
1969 | ||
1970 | if (!clk->num_parents) | |
1971 | goto out; | |
1972 | ||
1973 | if (clk->num_parents == 1) { | |
1974 | if (IS_ERR_OR_NULL(clk->parent)) | |
035a61c3 | 1975 | clk->parent = clk_core_lookup(clk->parent_names[0]); |
b2476490 MT |
1976 | ret = clk->parent; |
1977 | goto out; | |
1978 | } | |
1979 | ||
1980 | if (!clk->ops->get_parent) { | |
1981 | WARN(!clk->ops->get_parent, | |
1982 | "%s: multi-parent clocks must implement .get_parent\n", | |
1983 | __func__); | |
1984 | goto out; | |
1985 | }; | |
1986 | ||
1987 | /* | |
1988 | * Do our best to cache parent clocks in clk->parents. This prevents | |
035a61c3 TV |
1989 | * unnecessary and expensive lookups. We don't set clk->parent here; |
1990 | * that is done by the calling function. | |
b2476490 MT |
1991 | */ |
1992 | ||
1993 | index = clk->ops->get_parent(clk->hw); | |
1994 | ||
1995 | if (!clk->parents) | |
1996 | clk->parents = | |
96a7ed90 | 1997 | kcalloc(clk->num_parents, sizeof(struct clk *), |
b2476490 MT |
1998 | GFP_KERNEL); |
1999 | ||
035a61c3 | 2000 | ret = clk_core_get_parent_by_index(clk, index); |
b2476490 MT |
2001 | |
2002 | out: | |
2003 | return ret; | |
2004 | } | |
2005 | ||
035a61c3 TV |
2006 | static void clk_core_reparent(struct clk_core *clk, |
2007 | struct clk_core *new_parent) | |
b33d212f UH |
2008 | { |
2009 | clk_reparent(clk, new_parent); | |
5279fc40 | 2010 | __clk_recalc_accuracies(clk); |
b2476490 MT |
2011 | __clk_recalc_rates(clk, POST_RATE_CHANGE); |
2012 | } | |
2013 | ||
b2476490 | 2014 | /** |
4e88f3de TR |
2015 | * clk_has_parent - check if a clock is a possible parent for another |
2016 | * @clk: clock source | |
2017 | * @parent: parent clock source | |
b2476490 | 2018 | * |
4e88f3de TR |
2019 | * This function can be used in drivers that need to check that a clock can be |
2020 | * the parent of another without actually changing the parent. | |
f8aa0bd5 | 2021 | * |
4e88f3de | 2022 | * Returns true if @parent is a possible parent for @clk, false otherwise. |
b2476490 | 2023 | */ |
4e88f3de TR |
2024 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
2025 | { | |
035a61c3 | 2026 | struct clk_core *core, *parent_core; |
4e88f3de TR |
2027 | unsigned int i; |
2028 | ||
2029 | /* NULL clocks should be nops, so return success if either is NULL. */ | |
2030 | if (!clk || !parent) | |
2031 | return true; | |
2032 | ||
035a61c3 TV |
2033 | core = clk->core; |
2034 | parent_core = parent->core; | |
2035 | ||
4e88f3de | 2036 | /* Optimize for the case where the parent is already the parent. */ |
035a61c3 | 2037 | if (core->parent == parent_core) |
4e88f3de TR |
2038 | return true; |
2039 | ||
035a61c3 TV |
2040 | for (i = 0; i < core->num_parents; i++) |
2041 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
4e88f3de TR |
2042 | return true; |
2043 | ||
2044 | return false; | |
2045 | } | |
2046 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
2047 | ||
035a61c3 | 2048 | static int clk_core_set_parent(struct clk_core *clk, struct clk_core *parent) |
b2476490 MT |
2049 | { |
2050 | int ret = 0; | |
f1c8b2ed | 2051 | int p_index = 0; |
031dcc9b | 2052 | unsigned long p_rate = 0; |
b2476490 | 2053 | |
89ac8d7a MT |
2054 | if (!clk) |
2055 | return 0; | |
2056 | ||
b2476490 | 2057 | /* prevent racing with updates to the clock topology */ |
eab89f69 | 2058 | clk_prepare_lock(); |
b2476490 MT |
2059 | |
2060 | if (clk->parent == parent) | |
2061 | goto out; | |
2062 | ||
b61c43c0 SB |
2063 | /* verify ops for for multi-parent clks */ |
2064 | if ((clk->num_parents > 1) && (!clk->ops->set_parent)) { | |
2065 | ret = -ENOSYS; | |
2066 | goto out; | |
2067 | } | |
2068 | ||
031dcc9b UH |
2069 | /* check that we are allowed to re-parent if the clock is in use */ |
2070 | if ((clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) { | |
2071 | ret = -EBUSY; | |
2072 | goto out; | |
2073 | } | |
2074 | ||
2075 | /* try finding the new parent index */ | |
2076 | if (parent) { | |
2077 | p_index = clk_fetch_parent_index(clk, parent); | |
2078 | p_rate = parent->rate; | |
f1c8b2ed | 2079 | if (p_index < 0) { |
031dcc9b UH |
2080 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
2081 | __func__, parent->name, clk->name); | |
f1c8b2ed | 2082 | ret = p_index; |
031dcc9b UH |
2083 | goto out; |
2084 | } | |
2085 | } | |
2086 | ||
b2476490 | 2087 | /* propagate PRE_RATE_CHANGE notifications */ |
f3aab5d6 | 2088 | ret = __clk_speculate_rates(clk, p_rate); |
b2476490 MT |
2089 | |
2090 | /* abort if a driver objects */ | |
fb72a059 | 2091 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
2092 | goto out; |
2093 | ||
031dcc9b UH |
2094 | /* do the re-parent */ |
2095 | ret = __clk_set_parent(clk, parent, p_index); | |
b2476490 | 2096 | |
5279fc40 BB |
2097 | /* propagate rate an accuracy recalculation accordingly */ |
2098 | if (ret) { | |
b2476490 | 2099 | __clk_recalc_rates(clk, ABORT_RATE_CHANGE); |
5279fc40 | 2100 | } else { |
a68de8e4 | 2101 | __clk_recalc_rates(clk, POST_RATE_CHANGE); |
5279fc40 BB |
2102 | __clk_recalc_accuracies(clk); |
2103 | } | |
b2476490 MT |
2104 | |
2105 | out: | |
eab89f69 | 2106 | clk_prepare_unlock(); |
b2476490 MT |
2107 | |
2108 | return ret; | |
2109 | } | |
035a61c3 TV |
2110 | |
2111 | /** | |
2112 | * clk_set_parent - switch the parent of a mux clk | |
2113 | * @clk: the mux clk whose input we are switching | |
2114 | * @parent: the new input to clk | |
2115 | * | |
2116 | * Re-parent clk to use parent as its new input source. If clk is in | |
2117 | * prepared state, the clk will get enabled for the duration of this call. If | |
2118 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
2119 | * that, the reparenting is glitchy in hardware, etc), use the | |
2120 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
2121 | * | |
2122 | * After successfully changing clk's parent clk_set_parent will update the | |
2123 | * clk topology, sysfs topology and propagate rate recalculation via | |
2124 | * __clk_recalc_rates. | |
2125 | * | |
2126 | * Returns 0 on success, -EERROR otherwise. | |
2127 | */ | |
2128 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
2129 | { | |
2130 | if (!clk) | |
2131 | return 0; | |
2132 | ||
2133 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
2134 | } | |
b2476490 MT |
2135 | EXPORT_SYMBOL_GPL(clk_set_parent); |
2136 | ||
e59c5371 MT |
2137 | /** |
2138 | * clk_set_phase - adjust the phase shift of a clock signal | |
2139 | * @clk: clock signal source | |
2140 | * @degrees: number of degrees the signal is shifted | |
2141 | * | |
2142 | * Shifts the phase of a clock signal by the specified | |
2143 | * degrees. Returns 0 on success, -EERROR otherwise. | |
2144 | * | |
2145 | * This function makes no distinction about the input or reference | |
2146 | * signal that we adjust the clock signal phase against. For example | |
2147 | * phase locked-loop clock signal generators we may shift phase with | |
2148 | * respect to feedback clock signal input, but for other cases the | |
2149 | * clock phase may be shifted with respect to some other, unspecified | |
2150 | * signal. | |
2151 | * | |
2152 | * Additionally the concept of phase shift does not propagate through | |
2153 | * the clock tree hierarchy, which sets it apart from clock rates and | |
2154 | * clock accuracy. A parent clock phase attribute does not have an | |
2155 | * impact on the phase attribute of a child clock. | |
2156 | */ | |
2157 | int clk_set_phase(struct clk *clk, int degrees) | |
2158 | { | |
08b95756 | 2159 | int ret = -EINVAL; |
e59c5371 MT |
2160 | |
2161 | if (!clk) | |
08b95756 | 2162 | return 0; |
e59c5371 MT |
2163 | |
2164 | /* sanity check degrees */ | |
2165 | degrees %= 360; | |
2166 | if (degrees < 0) | |
2167 | degrees += 360; | |
2168 | ||
2169 | clk_prepare_lock(); | |
2170 | ||
dfc202ea SB |
2171 | trace_clk_set_phase(clk->core, degrees); |
2172 | ||
08b95756 SB |
2173 | if (clk->core->ops->set_phase) |
2174 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
e59c5371 | 2175 | |
dfc202ea SB |
2176 | trace_clk_set_phase_complete(clk->core, degrees); |
2177 | ||
e59c5371 | 2178 | if (!ret) |
035a61c3 | 2179 | clk->core->phase = degrees; |
e59c5371 | 2180 | |
e59c5371 MT |
2181 | clk_prepare_unlock(); |
2182 | ||
e59c5371 MT |
2183 | return ret; |
2184 | } | |
9767b04f | 2185 | EXPORT_SYMBOL_GPL(clk_set_phase); |
e59c5371 | 2186 | |
035a61c3 | 2187 | static int clk_core_get_phase(struct clk_core *clk) |
e59c5371 MT |
2188 | { |
2189 | int ret = 0; | |
2190 | ||
2191 | if (!clk) | |
2192 | goto out; | |
2193 | ||
2194 | clk_prepare_lock(); | |
2195 | ret = clk->phase; | |
2196 | clk_prepare_unlock(); | |
2197 | ||
2198 | out: | |
2199 | return ret; | |
2200 | } | |
9767b04f | 2201 | EXPORT_SYMBOL_GPL(clk_get_phase); |
e59c5371 | 2202 | |
035a61c3 TV |
2203 | /** |
2204 | * clk_get_phase - return the phase shift of a clock signal | |
2205 | * @clk: clock signal source | |
2206 | * | |
2207 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
2208 | * -EERROR. | |
2209 | */ | |
2210 | int clk_get_phase(struct clk *clk) | |
2211 | { | |
2212 | if (!clk) | |
2213 | return 0; | |
2214 | ||
2215 | return clk_core_get_phase(clk->core); | |
2216 | } | |
e59c5371 | 2217 | |
3d3801ef MT |
2218 | /** |
2219 | * clk_is_match - check if two clk's point to the same hardware clock | |
2220 | * @p: clk compared against q | |
2221 | * @q: clk compared against p | |
2222 | * | |
2223 | * Returns true if the two struct clk pointers both point to the same hardware | |
2224 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
2225 | * share the same struct clk_core object. | |
2226 | * | |
2227 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
2228 | */ | |
2229 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
2230 | { | |
2231 | /* trivial case: identical struct clk's or both NULL */ | |
2232 | if (p == q) | |
2233 | return true; | |
2234 | ||
2235 | /* true if clk->core pointers match. Avoid derefing garbage */ | |
2236 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) | |
2237 | if (p->core == q->core) | |
2238 | return true; | |
2239 | ||
2240 | return false; | |
2241 | } | |
2242 | EXPORT_SYMBOL_GPL(clk_is_match); | |
2243 | ||
b2476490 MT |
2244 | /** |
2245 | * __clk_init - initialize the data structures in a struct clk | |
2246 | * @dev: device initializing this clk, placeholder for now | |
2247 | * @clk: clk being initialized | |
2248 | * | |
035a61c3 | 2249 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2250 | * parent and rate and sets them both. |
b2476490 | 2251 | */ |
b09d6d99 | 2252 | static int __clk_init(struct device *dev, struct clk *clk_user) |
b2476490 | 2253 | { |
d1302a36 | 2254 | int i, ret = 0; |
035a61c3 | 2255 | struct clk_core *orphan; |
b67bfe0d | 2256 | struct hlist_node *tmp2; |
035a61c3 | 2257 | struct clk_core *clk; |
1c8e6004 | 2258 | unsigned long rate; |
b2476490 | 2259 | |
035a61c3 | 2260 | if (!clk_user) |
d1302a36 | 2261 | return -EINVAL; |
b2476490 | 2262 | |
035a61c3 TV |
2263 | clk = clk_user->core; |
2264 | ||
eab89f69 | 2265 | clk_prepare_lock(); |
b2476490 MT |
2266 | |
2267 | /* check to see if a clock with this name is already registered */ | |
035a61c3 | 2268 | if (clk_core_lookup(clk->name)) { |
d1302a36 MT |
2269 | pr_debug("%s: clk %s already initialized\n", |
2270 | __func__, clk->name); | |
2271 | ret = -EEXIST; | |
b2476490 | 2272 | goto out; |
d1302a36 | 2273 | } |
b2476490 | 2274 | |
d4d7e3dd MT |
2275 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
2276 | if (clk->ops->set_rate && | |
71472c0c JH |
2277 | !((clk->ops->round_rate || clk->ops->determine_rate) && |
2278 | clk->ops->recalc_rate)) { | |
2279 | pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", | |
d4d7e3dd | 2280 | __func__, clk->name); |
d1302a36 | 2281 | ret = -EINVAL; |
d4d7e3dd MT |
2282 | goto out; |
2283 | } | |
2284 | ||
2285 | if (clk->ops->set_parent && !clk->ops->get_parent) { | |
2286 | pr_warning("%s: %s must implement .get_parent & .set_parent\n", | |
2287 | __func__, clk->name); | |
d1302a36 | 2288 | ret = -EINVAL; |
d4d7e3dd MT |
2289 | goto out; |
2290 | } | |
2291 | ||
3fa2252b SB |
2292 | if (clk->ops->set_rate_and_parent && |
2293 | !(clk->ops->set_parent && clk->ops->set_rate)) { | |
2294 | pr_warn("%s: %s must implement .set_parent & .set_rate\n", | |
2295 | __func__, clk->name); | |
2296 | ret = -EINVAL; | |
2297 | goto out; | |
2298 | } | |
2299 | ||
b2476490 MT |
2300 | /* throw a WARN if any entries in parent_names are NULL */ |
2301 | for (i = 0; i < clk->num_parents; i++) | |
2302 | WARN(!clk->parent_names[i], | |
2303 | "%s: invalid NULL in %s's .parent_names\n", | |
2304 | __func__, clk->name); | |
2305 | ||
2306 | /* | |
2307 | * Allocate an array of struct clk *'s to avoid unnecessary string | |
2308 | * look-ups of clk's possible parents. This can fail for clocks passed | |
2309 | * in to clk_init during early boot; thus any access to clk->parents[] | |
2310 | * must always check for a NULL pointer and try to populate it if | |
2311 | * necessary. | |
2312 | * | |
2313 | * If clk->parents is not NULL we skip this entire block. This allows | |
2314 | * for clock drivers to statically initialize clk->parents. | |
2315 | */ | |
9ca1c5a4 | 2316 | if (clk->num_parents > 1 && !clk->parents) { |
96a7ed90 TF |
2317 | clk->parents = kcalloc(clk->num_parents, sizeof(struct clk *), |
2318 | GFP_KERNEL); | |
b2476490 | 2319 | /* |
035a61c3 | 2320 | * clk_core_lookup returns NULL for parents that have not been |
b2476490 MT |
2321 | * clk_init'd; thus any access to clk->parents[] must check |
2322 | * for a NULL pointer. We can always perform lazy lookups for | |
2323 | * missing parents later on. | |
2324 | */ | |
2325 | if (clk->parents) | |
2326 | for (i = 0; i < clk->num_parents; i++) | |
2327 | clk->parents[i] = | |
035a61c3 | 2328 | clk_core_lookup(clk->parent_names[i]); |
b2476490 MT |
2329 | } |
2330 | ||
2331 | clk->parent = __clk_init_parent(clk); | |
2332 | ||
2333 | /* | |
2334 | * Populate clk->parent if parent has already been __clk_init'd. If | |
2335 | * parent has not yet been __clk_init'd then place clk in the orphan | |
2336 | * list. If clk has set the CLK_IS_ROOT flag then place it in the root | |
2337 | * clk list. | |
2338 | * | |
2339 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2340 | * clocks and re-parent any that are children of the clock currently | |
2341 | * being clk_init'd. | |
2342 | */ | |
2343 | if (clk->parent) | |
2344 | hlist_add_head(&clk->child_node, | |
2345 | &clk->parent->children); | |
2346 | else if (clk->flags & CLK_IS_ROOT) | |
2347 | hlist_add_head(&clk->child_node, &clk_root_list); | |
2348 | else | |
2349 | hlist_add_head(&clk->child_node, &clk_orphan_list); | |
2350 | ||
5279fc40 BB |
2351 | /* |
2352 | * Set clk's accuracy. The preferred method is to use | |
2353 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2354 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2355 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2356 | * clock). | |
2357 | */ | |
2358 | if (clk->ops->recalc_accuracy) | |
2359 | clk->accuracy = clk->ops->recalc_accuracy(clk->hw, | |
2360 | __clk_get_accuracy(clk->parent)); | |
2361 | else if (clk->parent) | |
2362 | clk->accuracy = clk->parent->accuracy; | |
2363 | else | |
2364 | clk->accuracy = 0; | |
2365 | ||
9824cf73 MR |
2366 | /* |
2367 | * Set clk's phase. | |
2368 | * Since a phase is by definition relative to its parent, just | |
2369 | * query the current clock phase, or just assume it's in phase. | |
2370 | */ | |
2371 | if (clk->ops->get_phase) | |
2372 | clk->phase = clk->ops->get_phase(clk->hw); | |
2373 | else | |
2374 | clk->phase = 0; | |
2375 | ||
b2476490 MT |
2376 | /* |
2377 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2378 | * simple clocks and lazy developers the default fallback is to use the | |
2379 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2380 | * then rate is set to zero. | |
2381 | */ | |
2382 | if (clk->ops->recalc_rate) | |
1c8e6004 | 2383 | rate = clk->ops->recalc_rate(clk->hw, |
035a61c3 | 2384 | clk_core_get_rate_nolock(clk->parent)); |
b2476490 | 2385 | else if (clk->parent) |
1c8e6004 | 2386 | rate = clk->parent->rate; |
b2476490 | 2387 | else |
1c8e6004 TV |
2388 | rate = 0; |
2389 | clk->rate = clk->req_rate = rate; | |
b2476490 MT |
2390 | |
2391 | /* | |
2392 | * walk the list of orphan clocks and reparent any that are children of | |
2393 | * this clock | |
2394 | */ | |
b67bfe0d | 2395 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
12d29886 | 2396 | if (orphan->num_parents && orphan->ops->get_parent) { |
1f61e5f1 MF |
2397 | i = orphan->ops->get_parent(orphan->hw); |
2398 | if (!strcmp(clk->name, orphan->parent_names[i])) | |
035a61c3 | 2399 | clk_core_reparent(orphan, clk); |
1f61e5f1 MF |
2400 | continue; |
2401 | } | |
2402 | ||
b2476490 MT |
2403 | for (i = 0; i < orphan->num_parents; i++) |
2404 | if (!strcmp(clk->name, orphan->parent_names[i])) { | |
035a61c3 | 2405 | clk_core_reparent(orphan, clk); |
b2476490 MT |
2406 | break; |
2407 | } | |
1f61e5f1 | 2408 | } |
b2476490 MT |
2409 | |
2410 | /* | |
2411 | * optional platform-specific magic | |
2412 | * | |
2413 | * The .init callback is not used by any of the basic clock types, but | |
2414 | * exists for weird hardware that must perform initialization magic. | |
2415 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2416 | * using this callback, as its use is discouraged. |
b2476490 MT |
2417 | */ |
2418 | if (clk->ops->init) | |
2419 | clk->ops->init(clk->hw); | |
2420 | ||
fcb0ee6a | 2421 | kref_init(&clk->ref); |
b2476490 | 2422 | out: |
eab89f69 | 2423 | clk_prepare_unlock(); |
b2476490 | 2424 | |
89f7e9de SB |
2425 | if (!ret) |
2426 | clk_debug_register(clk); | |
2427 | ||
d1302a36 | 2428 | return ret; |
b2476490 MT |
2429 | } |
2430 | ||
035a61c3 TV |
2431 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2432 | const char *con_id) | |
0197b3ea | 2433 | { |
0197b3ea SK |
2434 | struct clk *clk; |
2435 | ||
035a61c3 TV |
2436 | /* This is to allow this function to be chained to others */ |
2437 | if (!hw || IS_ERR(hw)) | |
2438 | return (struct clk *) hw; | |
0197b3ea | 2439 | |
035a61c3 TV |
2440 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2441 | if (!clk) | |
2442 | return ERR_PTR(-ENOMEM); | |
2443 | ||
2444 | clk->core = hw->core; | |
2445 | clk->dev_id = dev_id; | |
2446 | clk->con_id = con_id; | |
1c8e6004 TV |
2447 | clk->max_rate = ULONG_MAX; |
2448 | ||
2449 | clk_prepare_lock(); | |
50595f8b | 2450 | hlist_add_head(&clk->clks_node, &hw->core->clks); |
1c8e6004 | 2451 | clk_prepare_unlock(); |
0197b3ea SK |
2452 | |
2453 | return clk; | |
2454 | } | |
035a61c3 | 2455 | |
73e0e496 | 2456 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2457 | { |
2458 | clk_prepare_lock(); | |
50595f8b | 2459 | hlist_del(&clk->clks_node); |
1c8e6004 TV |
2460 | clk_prepare_unlock(); |
2461 | ||
2462 | kfree(clk); | |
2463 | } | |
0197b3ea | 2464 | |
293ba3b4 SB |
2465 | /** |
2466 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2467 | * @dev: device that is registering this clock | |
2468 | * @hw: link to hardware-specific clock data | |
2469 | * | |
2470 | * clk_register is the primary interface for populating the clock tree with new | |
2471 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
2472 | * cannot be dereferenced by driver code but may be used in conjuction with the | |
2473 | * rest of the clock API. In the event of an error clk_register will return an | |
2474 | * error code; drivers must test for an error code after calling clk_register. | |
2475 | */ | |
2476 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2477 | { |
d1302a36 | 2478 | int i, ret; |
035a61c3 | 2479 | struct clk_core *clk; |
293ba3b4 SB |
2480 | |
2481 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); | |
2482 | if (!clk) { | |
2483 | pr_err("%s: could not allocate clk\n", __func__); | |
2484 | ret = -ENOMEM; | |
2485 | goto fail_out; | |
2486 | } | |
b2476490 | 2487 | |
612936f2 | 2488 | clk->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
0197b3ea SK |
2489 | if (!clk->name) { |
2490 | pr_err("%s: could not allocate clk->name\n", __func__); | |
2491 | ret = -ENOMEM; | |
2492 | goto fail_name; | |
2493 | } | |
2494 | clk->ops = hw->init->ops; | |
ac2df527 SN |
2495 | if (dev && dev->driver) |
2496 | clk->owner = dev->driver->owner; | |
b2476490 | 2497 | clk->hw = hw; |
0197b3ea SK |
2498 | clk->flags = hw->init->flags; |
2499 | clk->num_parents = hw->init->num_parents; | |
035a61c3 | 2500 | hw->core = clk; |
b2476490 | 2501 | |
d1302a36 | 2502 | /* allocate local copy in case parent_names is __initdata */ |
96a7ed90 TF |
2503 | clk->parent_names = kcalloc(clk->num_parents, sizeof(char *), |
2504 | GFP_KERNEL); | |
d1302a36 MT |
2505 | |
2506 | if (!clk->parent_names) { | |
2507 | pr_err("%s: could not allocate clk->parent_names\n", __func__); | |
2508 | ret = -ENOMEM; | |
2509 | goto fail_parent_names; | |
2510 | } | |
2511 | ||
2512 | ||
2513 | /* copy each string name in case parent_names is __initdata */ | |
0197b3ea | 2514 | for (i = 0; i < clk->num_parents; i++) { |
612936f2 | 2515 | clk->parent_names[i] = kstrdup_const(hw->init->parent_names[i], |
0197b3ea | 2516 | GFP_KERNEL); |
d1302a36 MT |
2517 | if (!clk->parent_names[i]) { |
2518 | pr_err("%s: could not copy parent_names\n", __func__); | |
2519 | ret = -ENOMEM; | |
2520 | goto fail_parent_names_copy; | |
2521 | } | |
2522 | } | |
2523 | ||
1c8e6004 TV |
2524 | INIT_HLIST_HEAD(&clk->clks); |
2525 | ||
035a61c3 TV |
2526 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2527 | if (IS_ERR(hw->clk)) { | |
2528 | pr_err("%s: could not allocate per-user clk\n", __func__); | |
2529 | ret = PTR_ERR(hw->clk); | |
2530 | goto fail_parent_names_copy; | |
2531 | } | |
2532 | ||
2533 | ret = __clk_init(dev, hw->clk); | |
d1302a36 | 2534 | if (!ret) |
035a61c3 | 2535 | return hw->clk; |
b2476490 | 2536 | |
1c8e6004 | 2537 | __clk_free_clk(hw->clk); |
035a61c3 | 2538 | hw->clk = NULL; |
b2476490 | 2539 | |
d1302a36 MT |
2540 | fail_parent_names_copy: |
2541 | while (--i >= 0) | |
612936f2 | 2542 | kfree_const(clk->parent_names[i]); |
d1302a36 MT |
2543 | kfree(clk->parent_names); |
2544 | fail_parent_names: | |
612936f2 | 2545 | kfree_const(clk->name); |
0197b3ea | 2546 | fail_name: |
d1302a36 MT |
2547 | kfree(clk); |
2548 | fail_out: | |
2549 | return ERR_PTR(ret); | |
b2476490 MT |
2550 | } |
2551 | EXPORT_SYMBOL_GPL(clk_register); | |
2552 | ||
fcb0ee6a SN |
2553 | /* |
2554 | * Free memory allocated for a clock. | |
2555 | * Caller must hold prepare_lock. | |
2556 | */ | |
2557 | static void __clk_release(struct kref *ref) | |
2558 | { | |
035a61c3 | 2559 | struct clk_core *clk = container_of(ref, struct clk_core, ref); |
fcb0ee6a SN |
2560 | int i = clk->num_parents; |
2561 | ||
496eadf8 KK |
2562 | lockdep_assert_held(&prepare_lock); |
2563 | ||
fcb0ee6a SN |
2564 | kfree(clk->parents); |
2565 | while (--i >= 0) | |
612936f2 | 2566 | kfree_const(clk->parent_names[i]); |
fcb0ee6a SN |
2567 | |
2568 | kfree(clk->parent_names); | |
612936f2 | 2569 | kfree_const(clk->name); |
fcb0ee6a SN |
2570 | kfree(clk); |
2571 | } | |
2572 | ||
2573 | /* | |
2574 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2575 | * after clk_unregister() was called on a clock and until last clock | |
2576 | * consumer calls clk_put() and the struct clk object is freed. | |
2577 | */ | |
2578 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2579 | { | |
2580 | return -ENXIO; | |
2581 | } | |
2582 | ||
2583 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2584 | { | |
2585 | WARN_ON_ONCE(1); | |
2586 | } | |
2587 | ||
2588 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2589 | unsigned long parent_rate) | |
2590 | { | |
2591 | return -ENXIO; | |
2592 | } | |
2593 | ||
2594 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2595 | { | |
2596 | return -ENXIO; | |
2597 | } | |
2598 | ||
2599 | static const struct clk_ops clk_nodrv_ops = { | |
2600 | .enable = clk_nodrv_prepare_enable, | |
2601 | .disable = clk_nodrv_disable_unprepare, | |
2602 | .prepare = clk_nodrv_prepare_enable, | |
2603 | .unprepare = clk_nodrv_disable_unprepare, | |
2604 | .set_rate = clk_nodrv_set_rate, | |
2605 | .set_parent = clk_nodrv_set_parent, | |
2606 | }; | |
2607 | ||
1df5c939 MB |
2608 | /** |
2609 | * clk_unregister - unregister a currently registered clock | |
2610 | * @clk: clock to unregister | |
1df5c939 | 2611 | */ |
fcb0ee6a SN |
2612 | void clk_unregister(struct clk *clk) |
2613 | { | |
2614 | unsigned long flags; | |
2615 | ||
6314b679 SB |
2616 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2617 | return; | |
2618 | ||
035a61c3 | 2619 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2620 | |
2621 | clk_prepare_lock(); | |
2622 | ||
035a61c3 TV |
2623 | if (clk->core->ops == &clk_nodrv_ops) { |
2624 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2625 | clk->core->name); | |
6314b679 | 2626 | return; |
fcb0ee6a SN |
2627 | } |
2628 | /* | |
2629 | * Assign empty clock ops for consumers that might still hold | |
2630 | * a reference to this clock. | |
2631 | */ | |
2632 | flags = clk_enable_lock(); | |
035a61c3 | 2633 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2634 | clk_enable_unlock(flags); |
2635 | ||
035a61c3 TV |
2636 | if (!hlist_empty(&clk->core->children)) { |
2637 | struct clk_core *child; | |
874f224c | 2638 | struct hlist_node *t; |
fcb0ee6a SN |
2639 | |
2640 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2641 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2642 | child_node) | |
2643 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2644 | } |
2645 | ||
035a61c3 | 2646 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2647 | |
035a61c3 | 2648 | if (clk->core->prepare_count) |
fcb0ee6a | 2649 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2650 | __func__, clk->core->name); |
2651 | kref_put(&clk->core->ref, __clk_release); | |
6314b679 | 2652 | |
fcb0ee6a SN |
2653 | clk_prepare_unlock(); |
2654 | } | |
1df5c939 MB |
2655 | EXPORT_SYMBOL_GPL(clk_unregister); |
2656 | ||
46c8773a SB |
2657 | static void devm_clk_release(struct device *dev, void *res) |
2658 | { | |
293ba3b4 | 2659 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2660 | } |
2661 | ||
2662 | /** | |
2663 | * devm_clk_register - resource managed clk_register() | |
2664 | * @dev: device that is registering this clock | |
2665 | * @hw: link to hardware-specific clock data | |
2666 | * | |
2667 | * Managed clk_register(). Clocks returned from this function are | |
2668 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2669 | * more information. | |
2670 | */ | |
2671 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2672 | { | |
2673 | struct clk *clk; | |
293ba3b4 | 2674 | struct clk **clkp; |
46c8773a | 2675 | |
293ba3b4 SB |
2676 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2677 | if (!clkp) | |
46c8773a SB |
2678 | return ERR_PTR(-ENOMEM); |
2679 | ||
293ba3b4 SB |
2680 | clk = clk_register(dev, hw); |
2681 | if (!IS_ERR(clk)) { | |
2682 | *clkp = clk; | |
2683 | devres_add(dev, clkp); | |
46c8773a | 2684 | } else { |
293ba3b4 | 2685 | devres_free(clkp); |
46c8773a SB |
2686 | } |
2687 | ||
2688 | return clk; | |
2689 | } | |
2690 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2691 | ||
2692 | static int devm_clk_match(struct device *dev, void *res, void *data) | |
2693 | { | |
2694 | struct clk *c = res; | |
2695 | if (WARN_ON(!c)) | |
2696 | return 0; | |
2697 | return c == data; | |
2698 | } | |
2699 | ||
2700 | /** | |
2701 | * devm_clk_unregister - resource managed clk_unregister() | |
2702 | * @clk: clock to unregister | |
2703 | * | |
2704 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2705 | * this function will not need to be called and the resource management | |
2706 | * code will ensure that the resource is freed. | |
2707 | */ | |
2708 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2709 | { | |
2710 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2711 | } | |
2712 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2713 | ||
ac2df527 SN |
2714 | /* |
2715 | * clkdev helpers | |
2716 | */ | |
2717 | int __clk_get(struct clk *clk) | |
2718 | { | |
035a61c3 TV |
2719 | struct clk_core *core = !clk ? NULL : clk->core; |
2720 | ||
2721 | if (core) { | |
2722 | if (!try_module_get(core->owner)) | |
00efcb1c | 2723 | return 0; |
ac2df527 | 2724 | |
035a61c3 | 2725 | kref_get(&core->ref); |
00efcb1c | 2726 | } |
ac2df527 SN |
2727 | return 1; |
2728 | } | |
2729 | ||
2730 | void __clk_put(struct clk *clk) | |
2731 | { | |
10cdfe54 TV |
2732 | struct module *owner; |
2733 | ||
00efcb1c | 2734 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2735 | return; |
2736 | ||
fcb0ee6a | 2737 | clk_prepare_lock(); |
1c8e6004 | 2738 | |
50595f8b | 2739 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
2740 | if (clk->min_rate > clk->core->req_rate || |
2741 | clk->max_rate < clk->core->req_rate) | |
2742 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2743 | ||
1c8e6004 TV |
2744 | owner = clk->core->owner; |
2745 | kref_put(&clk->core->ref, __clk_release); | |
2746 | ||
fcb0ee6a SN |
2747 | clk_prepare_unlock(); |
2748 | ||
10cdfe54 | 2749 | module_put(owner); |
035a61c3 | 2750 | |
035a61c3 | 2751 | kfree(clk); |
ac2df527 SN |
2752 | } |
2753 | ||
b2476490 MT |
2754 | /*** clk rate change notifiers ***/ |
2755 | ||
2756 | /** | |
2757 | * clk_notifier_register - add a clk rate change notifier | |
2758 | * @clk: struct clk * to watch | |
2759 | * @nb: struct notifier_block * with callback info | |
2760 | * | |
2761 | * Request notification when clk's rate changes. This uses an SRCU | |
2762 | * notifier because we want it to block and notifier unregistrations are | |
2763 | * uncommon. The callbacks associated with the notifier must not | |
2764 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2765 | * this will cause a nested prepare_lock mutex. | |
2766 | * | |
5324fda7 SB |
2767 | * In all notification cases cases (pre, post and abort rate change) the |
2768 | * original clock rate is passed to the callback via struct | |
2769 | * clk_notifier_data.old_rate and the new frequency is passed via struct | |
b2476490 MT |
2770 | * clk_notifier_data.new_rate. |
2771 | * | |
b2476490 MT |
2772 | * clk_notifier_register() must be called from non-atomic context. |
2773 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2774 | * allocation failure; otherwise, passes along the return value of | |
2775 | * srcu_notifier_chain_register(). | |
2776 | */ | |
2777 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2778 | { | |
2779 | struct clk_notifier *cn; | |
2780 | int ret = -ENOMEM; | |
2781 | ||
2782 | if (!clk || !nb) | |
2783 | return -EINVAL; | |
2784 | ||
eab89f69 | 2785 | clk_prepare_lock(); |
b2476490 MT |
2786 | |
2787 | /* search the list of notifiers for this clk */ | |
2788 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2789 | if (cn->clk == clk) | |
2790 | break; | |
2791 | ||
2792 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2793 | if (cn->clk != clk) { | |
2794 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2795 | if (!cn) | |
2796 | goto out; | |
2797 | ||
2798 | cn->clk = clk; | |
2799 | srcu_init_notifier_head(&cn->notifier_head); | |
2800 | ||
2801 | list_add(&cn->node, &clk_notifier_list); | |
2802 | } | |
2803 | ||
2804 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2805 | ||
035a61c3 | 2806 | clk->core->notifier_count++; |
b2476490 MT |
2807 | |
2808 | out: | |
eab89f69 | 2809 | clk_prepare_unlock(); |
b2476490 MT |
2810 | |
2811 | return ret; | |
2812 | } | |
2813 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2814 | ||
2815 | /** | |
2816 | * clk_notifier_unregister - remove a clk rate change notifier | |
2817 | * @clk: struct clk * | |
2818 | * @nb: struct notifier_block * with callback info | |
2819 | * | |
2820 | * Request no further notification for changes to 'clk' and frees memory | |
2821 | * allocated in clk_notifier_register. | |
2822 | * | |
2823 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2824 | * along the return value of srcu_notifier_chain_unregister(). | |
2825 | */ | |
2826 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2827 | { | |
2828 | struct clk_notifier *cn = NULL; | |
2829 | int ret = -EINVAL; | |
2830 | ||
2831 | if (!clk || !nb) | |
2832 | return -EINVAL; | |
2833 | ||
eab89f69 | 2834 | clk_prepare_lock(); |
b2476490 MT |
2835 | |
2836 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2837 | if (cn->clk == clk) | |
2838 | break; | |
2839 | ||
2840 | if (cn->clk == clk) { | |
2841 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2842 | ||
035a61c3 | 2843 | clk->core->notifier_count--; |
b2476490 MT |
2844 | |
2845 | /* XXX the notifier code should handle this better */ | |
2846 | if (!cn->notifier_head.head) { | |
2847 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2848 | list_del(&cn->node); |
b2476490 MT |
2849 | kfree(cn); |
2850 | } | |
2851 | ||
2852 | } else { | |
2853 | ret = -ENOENT; | |
2854 | } | |
2855 | ||
eab89f69 | 2856 | clk_prepare_unlock(); |
b2476490 MT |
2857 | |
2858 | return ret; | |
2859 | } | |
2860 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2861 | |
2862 | #ifdef CONFIG_OF | |
2863 | /** | |
2864 | * struct of_clk_provider - Clock provider registration structure | |
2865 | * @link: Entry in global list of clock providers | |
2866 | * @node: Pointer to device tree node of clock provider | |
2867 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2868 | * given clock specifier | |
2869 | * @data: context pointer to be passed into @get callback | |
2870 | */ | |
2871 | struct of_clk_provider { | |
2872 | struct list_head link; | |
2873 | ||
2874 | struct device_node *node; | |
2875 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
2876 | void *data; | |
2877 | }; | |
2878 | ||
f2f6c255 PG |
2879 | static const struct of_device_id __clk_of_table_sentinel |
2880 | __used __section(__clk_of_table_end); | |
2881 | ||
766e6a4e | 2882 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
2883 | static DEFINE_MUTEX(of_clk_mutex); |
2884 | ||
766e6a4e GL |
2885 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
2886 | void *data) | |
2887 | { | |
2888 | return data; | |
2889 | } | |
2890 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
2891 | ||
494bfec9 SG |
2892 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
2893 | { | |
2894 | struct clk_onecell_data *clk_data = data; | |
2895 | unsigned int idx = clkspec->args[0]; | |
2896 | ||
2897 | if (idx >= clk_data->clk_num) { | |
2898 | pr_err("%s: invalid clock index %d\n", __func__, idx); | |
2899 | return ERR_PTR(-EINVAL); | |
2900 | } | |
2901 | ||
2902 | return clk_data->clks[idx]; | |
2903 | } | |
2904 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
2905 | ||
766e6a4e GL |
2906 | /** |
2907 | * of_clk_add_provider() - Register a clock provider for a node | |
2908 | * @np: Device node pointer associated with clock provider | |
2909 | * @clk_src_get: callback for decoding clock | |
2910 | * @data: context pointer for @clk_src_get callback. | |
2911 | */ | |
2912 | int of_clk_add_provider(struct device_node *np, | |
2913 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
2914 | void *data), | |
2915 | void *data) | |
2916 | { | |
2917 | struct of_clk_provider *cp; | |
86be408b | 2918 | int ret; |
766e6a4e GL |
2919 | |
2920 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
2921 | if (!cp) | |
2922 | return -ENOMEM; | |
2923 | ||
2924 | cp->node = of_node_get(np); | |
2925 | cp->data = data; | |
2926 | cp->get = clk_src_get; | |
2927 | ||
d6782c26 | 2928 | mutex_lock(&of_clk_mutex); |
766e6a4e | 2929 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 2930 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2931 | pr_debug("Added clock from %s\n", np->full_name); |
2932 | ||
86be408b SN |
2933 | ret = of_clk_set_defaults(np, true); |
2934 | if (ret < 0) | |
2935 | of_clk_del_provider(np); | |
2936 | ||
2937 | return ret; | |
766e6a4e GL |
2938 | } |
2939 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
2940 | ||
2941 | /** | |
2942 | * of_clk_del_provider() - Remove a previously registered clock provider | |
2943 | * @np: Device node pointer associated with clock provider | |
2944 | */ | |
2945 | void of_clk_del_provider(struct device_node *np) | |
2946 | { | |
2947 | struct of_clk_provider *cp; | |
2948 | ||
d6782c26 | 2949 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2950 | list_for_each_entry(cp, &of_clk_providers, link) { |
2951 | if (cp->node == np) { | |
2952 | list_del(&cp->link); | |
2953 | of_node_put(cp->node); | |
2954 | kfree(cp); | |
2955 | break; | |
2956 | } | |
2957 | } | |
d6782c26 | 2958 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2959 | } |
2960 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
2961 | ||
73e0e496 SB |
2962 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
2963 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
2964 | { |
2965 | struct of_clk_provider *provider; | |
a34cd466 | 2966 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 2967 | |
306c342f SB |
2968 | if (!clkspec) |
2969 | return ERR_PTR(-EINVAL); | |
2970 | ||
766e6a4e | 2971 | /* Check if we have such a provider in our array */ |
306c342f | 2972 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2973 | list_for_each_entry(provider, &of_clk_providers, link) { |
2974 | if (provider->node == clkspec->np) | |
2975 | clk = provider->get(clkspec, provider->data); | |
73e0e496 SB |
2976 | if (!IS_ERR(clk)) { |
2977 | clk = __clk_create_clk(__clk_get_hw(clk), dev_id, | |
2978 | con_id); | |
2979 | ||
2980 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
2981 | __clk_free_clk(clk); | |
2982 | clk = ERR_PTR(-ENOENT); | |
2983 | } | |
2984 | ||
766e6a4e | 2985 | break; |
73e0e496 | 2986 | } |
766e6a4e | 2987 | } |
306c342f | 2988 | mutex_unlock(&of_clk_mutex); |
d6782c26 SN |
2989 | |
2990 | return clk; | |
2991 | } | |
2992 | ||
306c342f SB |
2993 | /** |
2994 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
2995 | * @clkspec: pointer to a clock specifier data structure | |
2996 | * | |
2997 | * This function looks up a struct clk from the registered list of clock | |
2998 | * providers, an input is a clock specifier data structure as returned | |
2999 | * from the of_parse_phandle_with_args() function call. | |
3000 | */ | |
d6782c26 SN |
3001 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
3002 | { | |
306c342f | 3003 | return __of_clk_get_from_provider(clkspec, NULL, __func__); |
766e6a4e GL |
3004 | } |
3005 | ||
f6102742 MT |
3006 | int of_clk_get_parent_count(struct device_node *np) |
3007 | { | |
3008 | return of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
3009 | } | |
3010 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
3011 | ||
766e6a4e GL |
3012 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
3013 | { | |
3014 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 3015 | struct property *prop; |
766e6a4e | 3016 | const char *clk_name; |
7a0fc1a3 BD |
3017 | const __be32 *vp; |
3018 | u32 pv; | |
766e6a4e | 3019 | int rc; |
7a0fc1a3 | 3020 | int count; |
766e6a4e GL |
3021 | |
3022 | if (index < 0) | |
3023 | return NULL; | |
3024 | ||
3025 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, | |
3026 | &clkspec); | |
3027 | if (rc) | |
3028 | return NULL; | |
3029 | ||
7a0fc1a3 BD |
3030 | index = clkspec.args_count ? clkspec.args[0] : 0; |
3031 | count = 0; | |
3032 | ||
3033 | /* if there is an indices property, use it to transfer the index | |
3034 | * specified into an array offset for the clock-output-names property. | |
3035 | */ | |
3036 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
3037 | if (index == pv) { | |
3038 | index = count; | |
3039 | break; | |
3040 | } | |
3041 | count++; | |
3042 | } | |
3043 | ||
766e6a4e | 3044 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3045 | index, |
766e6a4e GL |
3046 | &clk_name) < 0) |
3047 | clk_name = clkspec.np->name; | |
3048 | ||
3049 | of_node_put(clkspec.np); | |
3050 | return clk_name; | |
3051 | } | |
3052 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3053 | ||
1771b10d GC |
3054 | struct clock_provider { |
3055 | of_clk_init_cb_t clk_init_cb; | |
3056 | struct device_node *np; | |
3057 | struct list_head node; | |
3058 | }; | |
3059 | ||
3060 | static LIST_HEAD(clk_provider_list); | |
3061 | ||
3062 | /* | |
3063 | * This function looks for a parent clock. If there is one, then it | |
3064 | * checks that the provider for this parent clock was initialized, in | |
3065 | * this case the parent clock will be ready. | |
3066 | */ | |
3067 | static int parent_ready(struct device_node *np) | |
3068 | { | |
3069 | int i = 0; | |
3070 | ||
3071 | while (true) { | |
3072 | struct clk *clk = of_clk_get(np, i); | |
3073 | ||
3074 | /* this parent is ready we can check the next one */ | |
3075 | if (!IS_ERR(clk)) { | |
3076 | clk_put(clk); | |
3077 | i++; | |
3078 | continue; | |
3079 | } | |
3080 | ||
3081 | /* at least one parent is not ready, we exit now */ | |
3082 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3083 | return 0; | |
3084 | ||
3085 | /* | |
3086 | * Here we make assumption that the device tree is | |
3087 | * written correctly. So an error means that there is | |
3088 | * no more parent. As we didn't exit yet, then the | |
3089 | * previous parent are ready. If there is no clock | |
3090 | * parent, no need to wait for them, then we can | |
3091 | * consider their absence as being ready | |
3092 | */ | |
3093 | return 1; | |
3094 | } | |
3095 | } | |
3096 | ||
766e6a4e GL |
3097 | /** |
3098 | * of_clk_init() - Scan and init clock providers from the DT | |
3099 | * @matches: array of compatible values and init functions for providers. | |
3100 | * | |
1771b10d | 3101 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3102 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3103 | * to follow the dependencies. |
766e6a4e GL |
3104 | */ |
3105 | void __init of_clk_init(const struct of_device_id *matches) | |
3106 | { | |
7f7ed584 | 3107 | const struct of_device_id *match; |
766e6a4e | 3108 | struct device_node *np; |
1771b10d GC |
3109 | struct clock_provider *clk_provider, *next; |
3110 | bool is_init_done; | |
3111 | bool force = false; | |
766e6a4e | 3112 | |
f2f6c255 | 3113 | if (!matches) |
819b4861 | 3114 | matches = &__clk_of_table; |
f2f6c255 | 3115 | |
1771b10d | 3116 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3117 | for_each_matching_node_and_match(np, matches, &match) { |
1771b10d GC |
3118 | struct clock_provider *parent = |
3119 | kzalloc(sizeof(struct clock_provider), GFP_KERNEL); | |
3120 | ||
3121 | parent->clk_init_cb = match->data; | |
3122 | parent->np = np; | |
3f6d439f | 3123 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3124 | } |
3125 | ||
3126 | while (!list_empty(&clk_provider_list)) { | |
3127 | is_init_done = false; | |
3128 | list_for_each_entry_safe(clk_provider, next, | |
3129 | &clk_provider_list, node) { | |
3130 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3131 | |
1771b10d | 3132 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3133 | of_clk_set_defaults(clk_provider->np, true); |
3134 | ||
1771b10d GC |
3135 | list_del(&clk_provider->node); |
3136 | kfree(clk_provider); | |
3137 | is_init_done = true; | |
3138 | } | |
3139 | } | |
3140 | ||
3141 | /* | |
e5ca8fb4 | 3142 | * We didn't manage to initialize any of the |
1771b10d GC |
3143 | * remaining providers during the last loop, so now we |
3144 | * initialize all the remaining ones unconditionally | |
3145 | * in case the clock parent was not mandatory | |
3146 | */ | |
3147 | if (!is_init_done) | |
3148 | force = true; | |
766e6a4e GL |
3149 | } |
3150 | } | |
3151 | #endif |