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b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
3c373117 | 12 | #include <linux/clk.h> |
b09d6d99 | 13 | #include <linux/clk-provider.h> |
86be408b | 14 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
15 | #include <linux/module.h> |
16 | #include <linux/mutex.h> | |
17 | #include <linux/spinlock.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/slab.h> | |
766e6a4e | 21 | #include <linux/of.h> |
46c8773a | 22 | #include <linux/device.h> |
f2f6c255 | 23 | #include <linux/init.h> |
533ddeb1 | 24 | #include <linux/sched.h> |
562ef0b0 | 25 | #include <linux/clkdev.h> |
b2476490 | 26 | |
d6782c26 SN |
27 | #include "clk.h" |
28 | ||
b2476490 MT |
29 | static DEFINE_SPINLOCK(enable_lock); |
30 | static DEFINE_MUTEX(prepare_lock); | |
31 | ||
533ddeb1 MT |
32 | static struct task_struct *prepare_owner; |
33 | static struct task_struct *enable_owner; | |
34 | ||
35 | static int prepare_refcnt; | |
36 | static int enable_refcnt; | |
37 | ||
b2476490 MT |
38 | static HLIST_HEAD(clk_root_list); |
39 | static HLIST_HEAD(clk_orphan_list); | |
40 | static LIST_HEAD(clk_notifier_list); | |
41 | ||
b09d6d99 MT |
42 | /*** private data structures ***/ |
43 | ||
44 | struct clk_core { | |
45 | const char *name; | |
46 | const struct clk_ops *ops; | |
47 | struct clk_hw *hw; | |
48 | struct module *owner; | |
49 | struct clk_core *parent; | |
50 | const char **parent_names; | |
51 | struct clk_core **parents; | |
52 | u8 num_parents; | |
53 | u8 new_parent_index; | |
54 | unsigned long rate; | |
1c8e6004 | 55 | unsigned long req_rate; |
b09d6d99 MT |
56 | unsigned long new_rate; |
57 | struct clk_core *new_parent; | |
58 | struct clk_core *new_child; | |
59 | unsigned long flags; | |
e6500344 | 60 | bool orphan; |
b09d6d99 MT |
61 | unsigned int enable_count; |
62 | unsigned int prepare_count; | |
9783c0d9 SB |
63 | unsigned long min_rate; |
64 | unsigned long max_rate; | |
b09d6d99 MT |
65 | unsigned long accuracy; |
66 | int phase; | |
67 | struct hlist_head children; | |
68 | struct hlist_node child_node; | |
1c8e6004 | 69 | struct hlist_head clks; |
b09d6d99 MT |
70 | unsigned int notifier_count; |
71 | #ifdef CONFIG_DEBUG_FS | |
72 | struct dentry *dentry; | |
8c9a8a8f | 73 | struct hlist_node debug_node; |
b09d6d99 MT |
74 | #endif |
75 | struct kref ref; | |
76 | }; | |
77 | ||
dfc202ea SB |
78 | #define CREATE_TRACE_POINTS |
79 | #include <trace/events/clk.h> | |
80 | ||
b09d6d99 MT |
81 | struct clk { |
82 | struct clk_core *core; | |
83 | const char *dev_id; | |
84 | const char *con_id; | |
1c8e6004 TV |
85 | unsigned long min_rate; |
86 | unsigned long max_rate; | |
50595f8b | 87 | struct hlist_node clks_node; |
b09d6d99 MT |
88 | }; |
89 | ||
eab89f69 MT |
90 | /*** locking ***/ |
91 | static void clk_prepare_lock(void) | |
92 | { | |
533ddeb1 MT |
93 | if (!mutex_trylock(&prepare_lock)) { |
94 | if (prepare_owner == current) { | |
95 | prepare_refcnt++; | |
96 | return; | |
97 | } | |
98 | mutex_lock(&prepare_lock); | |
99 | } | |
100 | WARN_ON_ONCE(prepare_owner != NULL); | |
101 | WARN_ON_ONCE(prepare_refcnt != 0); | |
102 | prepare_owner = current; | |
103 | prepare_refcnt = 1; | |
eab89f69 MT |
104 | } |
105 | ||
106 | static void clk_prepare_unlock(void) | |
107 | { | |
533ddeb1 MT |
108 | WARN_ON_ONCE(prepare_owner != current); |
109 | WARN_ON_ONCE(prepare_refcnt == 0); | |
110 | ||
111 | if (--prepare_refcnt) | |
112 | return; | |
113 | prepare_owner = NULL; | |
eab89f69 MT |
114 | mutex_unlock(&prepare_lock); |
115 | } | |
116 | ||
117 | static unsigned long clk_enable_lock(void) | |
a57aa185 | 118 | __acquires(enable_lock) |
eab89f69 MT |
119 | { |
120 | unsigned long flags; | |
533ddeb1 MT |
121 | |
122 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
123 | if (enable_owner == current) { | |
124 | enable_refcnt++; | |
a57aa185 | 125 | __acquire(enable_lock); |
533ddeb1 MT |
126 | return flags; |
127 | } | |
128 | spin_lock_irqsave(&enable_lock, flags); | |
129 | } | |
130 | WARN_ON_ONCE(enable_owner != NULL); | |
131 | WARN_ON_ONCE(enable_refcnt != 0); | |
132 | enable_owner = current; | |
133 | enable_refcnt = 1; | |
eab89f69 MT |
134 | return flags; |
135 | } | |
136 | ||
137 | static void clk_enable_unlock(unsigned long flags) | |
a57aa185 | 138 | __releases(enable_lock) |
eab89f69 | 139 | { |
533ddeb1 MT |
140 | WARN_ON_ONCE(enable_owner != current); |
141 | WARN_ON_ONCE(enable_refcnt == 0); | |
142 | ||
a57aa185 SB |
143 | if (--enable_refcnt) { |
144 | __release(enable_lock); | |
533ddeb1 | 145 | return; |
a57aa185 | 146 | } |
533ddeb1 | 147 | enable_owner = NULL; |
eab89f69 MT |
148 | spin_unlock_irqrestore(&enable_lock, flags); |
149 | } | |
150 | ||
4dff95dc SB |
151 | static bool clk_core_is_prepared(struct clk_core *core) |
152 | { | |
153 | /* | |
154 | * .is_prepared is optional for clocks that can prepare | |
155 | * fall back to software usage counter if it is missing | |
156 | */ | |
157 | if (!core->ops->is_prepared) | |
158 | return core->prepare_count; | |
b2476490 | 159 | |
4dff95dc SB |
160 | return core->ops->is_prepared(core->hw); |
161 | } | |
b2476490 | 162 | |
4dff95dc SB |
163 | static bool clk_core_is_enabled(struct clk_core *core) |
164 | { | |
165 | /* | |
166 | * .is_enabled is only mandatory for clocks that gate | |
167 | * fall back to software usage counter if .is_enabled is missing | |
168 | */ | |
169 | if (!core->ops->is_enabled) | |
170 | return core->enable_count; | |
6b44c854 | 171 | |
4dff95dc SB |
172 | return core->ops->is_enabled(core->hw); |
173 | } | |
6b44c854 | 174 | |
4dff95dc | 175 | /*** helper functions ***/ |
1af599df | 176 | |
b76281cb | 177 | const char *__clk_get_name(const struct clk *clk) |
1af599df | 178 | { |
4dff95dc | 179 | return !clk ? NULL : clk->core->name; |
1af599df | 180 | } |
4dff95dc | 181 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 182 | |
e7df6f6e | 183 | const char *clk_hw_get_name(const struct clk_hw *hw) |
1a9c069c SB |
184 | { |
185 | return hw->core->name; | |
186 | } | |
187 | EXPORT_SYMBOL_GPL(clk_hw_get_name); | |
188 | ||
4dff95dc SB |
189 | struct clk_hw *__clk_get_hw(struct clk *clk) |
190 | { | |
191 | return !clk ? NULL : clk->core->hw; | |
192 | } | |
193 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 194 | |
e7df6f6e | 195 | unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) |
1a9c069c SB |
196 | { |
197 | return hw->core->num_parents; | |
198 | } | |
199 | EXPORT_SYMBOL_GPL(clk_hw_get_num_parents); | |
200 | ||
e7df6f6e | 201 | struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) |
1a9c069c SB |
202 | { |
203 | return hw->core->parent ? hw->core->parent->hw : NULL; | |
204 | } | |
205 | EXPORT_SYMBOL_GPL(clk_hw_get_parent); | |
206 | ||
4dff95dc SB |
207 | static struct clk_core *__clk_lookup_subtree(const char *name, |
208 | struct clk_core *core) | |
bddca894 | 209 | { |
035a61c3 | 210 | struct clk_core *child; |
4dff95dc | 211 | struct clk_core *ret; |
bddca894 | 212 | |
4dff95dc SB |
213 | if (!strcmp(core->name, name)) |
214 | return core; | |
bddca894 | 215 | |
4dff95dc SB |
216 | hlist_for_each_entry(child, &core->children, child_node) { |
217 | ret = __clk_lookup_subtree(name, child); | |
218 | if (ret) | |
219 | return ret; | |
bddca894 PG |
220 | } |
221 | ||
4dff95dc | 222 | return NULL; |
bddca894 PG |
223 | } |
224 | ||
4dff95dc | 225 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 226 | { |
4dff95dc SB |
227 | struct clk_core *root_clk; |
228 | struct clk_core *ret; | |
bddca894 | 229 | |
4dff95dc SB |
230 | if (!name) |
231 | return NULL; | |
bddca894 | 232 | |
4dff95dc SB |
233 | /* search the 'proper' clk tree first */ |
234 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
235 | ret = __clk_lookup_subtree(name, root_clk); | |
236 | if (ret) | |
237 | return ret; | |
bddca894 PG |
238 | } |
239 | ||
4dff95dc SB |
240 | /* if not found, then search the orphan tree */ |
241 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
242 | ret = __clk_lookup_subtree(name, root_clk); | |
243 | if (ret) | |
244 | return ret; | |
245 | } | |
bddca894 | 246 | |
4dff95dc | 247 | return NULL; |
bddca894 PG |
248 | } |
249 | ||
4dff95dc SB |
250 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
251 | u8 index) | |
bddca894 | 252 | { |
4dff95dc SB |
253 | if (!core || index >= core->num_parents) |
254 | return NULL; | |
88cfbef2 MY |
255 | |
256 | if (!core->parents[index]) | |
257 | core->parents[index] = | |
258 | clk_core_lookup(core->parent_names[index]); | |
259 | ||
260 | return core->parents[index]; | |
bddca894 PG |
261 | } |
262 | ||
e7df6f6e SB |
263 | struct clk_hw * |
264 | clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) | |
1a9c069c SB |
265 | { |
266 | struct clk_core *parent; | |
267 | ||
268 | parent = clk_core_get_parent_by_index(hw->core, index); | |
269 | ||
270 | return !parent ? NULL : parent->hw; | |
271 | } | |
272 | EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index); | |
273 | ||
4dff95dc SB |
274 | unsigned int __clk_get_enable_count(struct clk *clk) |
275 | { | |
276 | return !clk ? 0 : clk->core->enable_count; | |
277 | } | |
b2476490 | 278 | |
4dff95dc SB |
279 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
280 | { | |
281 | unsigned long ret; | |
b2476490 | 282 | |
4dff95dc SB |
283 | if (!core) { |
284 | ret = 0; | |
285 | goto out; | |
286 | } | |
b2476490 | 287 | |
4dff95dc | 288 | ret = core->rate; |
b2476490 | 289 | |
47b0eeb3 | 290 | if (!core->num_parents) |
4dff95dc | 291 | goto out; |
c646cbf1 | 292 | |
4dff95dc SB |
293 | if (!core->parent) |
294 | ret = 0; | |
b2476490 | 295 | |
b2476490 MT |
296 | out: |
297 | return ret; | |
298 | } | |
299 | ||
e7df6f6e | 300 | unsigned long clk_hw_get_rate(const struct clk_hw *hw) |
1a9c069c SB |
301 | { |
302 | return clk_core_get_rate_nolock(hw->core); | |
303 | } | |
304 | EXPORT_SYMBOL_GPL(clk_hw_get_rate); | |
305 | ||
4dff95dc SB |
306 | static unsigned long __clk_get_accuracy(struct clk_core *core) |
307 | { | |
308 | if (!core) | |
309 | return 0; | |
b2476490 | 310 | |
4dff95dc | 311 | return core->accuracy; |
b2476490 MT |
312 | } |
313 | ||
4dff95dc | 314 | unsigned long __clk_get_flags(struct clk *clk) |
fcb0ee6a | 315 | { |
4dff95dc | 316 | return !clk ? 0 : clk->core->flags; |
fcb0ee6a | 317 | } |
4dff95dc | 318 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
fcb0ee6a | 319 | |
e7df6f6e | 320 | unsigned long clk_hw_get_flags(const struct clk_hw *hw) |
1a9c069c SB |
321 | { |
322 | return hw->core->flags; | |
323 | } | |
324 | EXPORT_SYMBOL_GPL(clk_hw_get_flags); | |
325 | ||
e7df6f6e | 326 | bool clk_hw_is_prepared(const struct clk_hw *hw) |
1a9c069c SB |
327 | { |
328 | return clk_core_is_prepared(hw->core); | |
329 | } | |
330 | ||
be68bf88 JE |
331 | bool clk_hw_is_enabled(const struct clk_hw *hw) |
332 | { | |
333 | return clk_core_is_enabled(hw->core); | |
334 | } | |
335 | ||
4dff95dc | 336 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 337 | { |
4dff95dc SB |
338 | if (!clk) |
339 | return false; | |
b2476490 | 340 | |
4dff95dc SB |
341 | return clk_core_is_enabled(clk->core); |
342 | } | |
343 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 344 | |
4dff95dc SB |
345 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
346 | unsigned long best, unsigned long flags) | |
347 | { | |
348 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
349 | return abs(now - rate) < abs(best - rate); | |
1af599df | 350 | |
4dff95dc SB |
351 | return now <= rate && now > best; |
352 | } | |
bddca894 | 353 | |
0817b62c BB |
354 | static int |
355 | clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req, | |
4dff95dc SB |
356 | unsigned long flags) |
357 | { | |
358 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
0817b62c BB |
359 | int i, num_parents, ret; |
360 | unsigned long best = 0; | |
361 | struct clk_rate_request parent_req = *req; | |
b2476490 | 362 | |
4dff95dc SB |
363 | /* if NO_REPARENT flag set, pass through to current parent */ |
364 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
365 | parent = core->parent; | |
0817b62c BB |
366 | if (core->flags & CLK_SET_RATE_PARENT) { |
367 | ret = __clk_determine_rate(parent ? parent->hw : NULL, | |
368 | &parent_req); | |
369 | if (ret) | |
370 | return ret; | |
371 | ||
372 | best = parent_req.rate; | |
373 | } else if (parent) { | |
4dff95dc | 374 | best = clk_core_get_rate_nolock(parent); |
0817b62c | 375 | } else { |
4dff95dc | 376 | best = clk_core_get_rate_nolock(core); |
0817b62c BB |
377 | } |
378 | ||
4dff95dc SB |
379 | goto out; |
380 | } | |
b2476490 | 381 | |
4dff95dc SB |
382 | /* find the parent that can provide the fastest rate <= rate */ |
383 | num_parents = core->num_parents; | |
384 | for (i = 0; i < num_parents; i++) { | |
385 | parent = clk_core_get_parent_by_index(core, i); | |
386 | if (!parent) | |
387 | continue; | |
0817b62c BB |
388 | |
389 | if (core->flags & CLK_SET_RATE_PARENT) { | |
390 | parent_req = *req; | |
391 | ret = __clk_determine_rate(parent->hw, &parent_req); | |
392 | if (ret) | |
393 | continue; | |
394 | } else { | |
395 | parent_req.rate = clk_core_get_rate_nolock(parent); | |
396 | } | |
397 | ||
398 | if (mux_is_better_rate(req->rate, parent_req.rate, | |
399 | best, flags)) { | |
4dff95dc | 400 | best_parent = parent; |
0817b62c | 401 | best = parent_req.rate; |
4dff95dc SB |
402 | } |
403 | } | |
b2476490 | 404 | |
57d866e6 BB |
405 | if (!best_parent) |
406 | return -EINVAL; | |
407 | ||
4dff95dc SB |
408 | out: |
409 | if (best_parent) | |
0817b62c BB |
410 | req->best_parent_hw = best_parent->hw; |
411 | req->best_parent_rate = best; | |
412 | req->rate = best; | |
b2476490 | 413 | |
0817b62c | 414 | return 0; |
b33d212f | 415 | } |
4dff95dc SB |
416 | |
417 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 418 | { |
4dff95dc SB |
419 | struct clk_core *core = clk_core_lookup(name); |
420 | ||
421 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 422 | } |
b2476490 | 423 | |
4dff95dc SB |
424 | static void clk_core_get_boundaries(struct clk_core *core, |
425 | unsigned long *min_rate, | |
426 | unsigned long *max_rate) | |
1c155b3d | 427 | { |
4dff95dc | 428 | struct clk *clk_user; |
1c155b3d | 429 | |
9783c0d9 SB |
430 | *min_rate = core->min_rate; |
431 | *max_rate = core->max_rate; | |
496eadf8 | 432 | |
4dff95dc SB |
433 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
434 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 435 | |
4dff95dc SB |
436 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
437 | *max_rate = min(*max_rate, clk_user->max_rate); | |
438 | } | |
1c155b3d | 439 | |
9783c0d9 SB |
440 | void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, |
441 | unsigned long max_rate) | |
442 | { | |
443 | hw->core->min_rate = min_rate; | |
444 | hw->core->max_rate = max_rate; | |
445 | } | |
446 | EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); | |
447 | ||
4dff95dc SB |
448 | /* |
449 | * Helper for finding best parent to provide a given frequency. This can be used | |
450 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
451 | * complex clock that may combine a mux with other operations. | |
452 | */ | |
0817b62c BB |
453 | int __clk_mux_determine_rate(struct clk_hw *hw, |
454 | struct clk_rate_request *req) | |
4dff95dc | 455 | { |
0817b62c | 456 | return clk_mux_determine_rate_flags(hw, req, 0); |
1c155b3d | 457 | } |
4dff95dc | 458 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 459 | |
0817b62c BB |
460 | int __clk_mux_determine_rate_closest(struct clk_hw *hw, |
461 | struct clk_rate_request *req) | |
b2476490 | 462 | { |
0817b62c | 463 | return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); |
4dff95dc SB |
464 | } |
465 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 466 | |
4dff95dc | 467 | /*** clk api ***/ |
496eadf8 | 468 | |
4dff95dc SB |
469 | static void clk_core_unprepare(struct clk_core *core) |
470 | { | |
a6334725 SB |
471 | lockdep_assert_held(&prepare_lock); |
472 | ||
4dff95dc SB |
473 | if (!core) |
474 | return; | |
b2476490 | 475 | |
4dff95dc SB |
476 | if (WARN_ON(core->prepare_count == 0)) |
477 | return; | |
b2476490 | 478 | |
2e20fbf5 LJ |
479 | if (WARN_ON(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL)) |
480 | return; | |
481 | ||
4dff95dc SB |
482 | if (--core->prepare_count > 0) |
483 | return; | |
b2476490 | 484 | |
4dff95dc | 485 | WARN_ON(core->enable_count > 0); |
b2476490 | 486 | |
4dff95dc | 487 | trace_clk_unprepare(core); |
b2476490 | 488 | |
4dff95dc SB |
489 | if (core->ops->unprepare) |
490 | core->ops->unprepare(core->hw); | |
491 | ||
492 | trace_clk_unprepare_complete(core); | |
493 | clk_core_unprepare(core->parent); | |
b2476490 MT |
494 | } |
495 | ||
a6adc30b DA |
496 | static void clk_core_unprepare_lock(struct clk_core *core) |
497 | { | |
498 | clk_prepare_lock(); | |
499 | clk_core_unprepare(core); | |
500 | clk_prepare_unlock(); | |
501 | } | |
502 | ||
4dff95dc SB |
503 | /** |
504 | * clk_unprepare - undo preparation of a clock source | |
505 | * @clk: the clk being unprepared | |
506 | * | |
507 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
508 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
509 | * if the operation may sleep. One example is a clk which is accessed over | |
510 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
511 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
512 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
513 | */ | |
514 | void clk_unprepare(struct clk *clk) | |
1e435256 | 515 | { |
4dff95dc SB |
516 | if (IS_ERR_OR_NULL(clk)) |
517 | return; | |
518 | ||
a6adc30b | 519 | clk_core_unprepare_lock(clk->core); |
1e435256 | 520 | } |
4dff95dc | 521 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 522 | |
4dff95dc | 523 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 524 | { |
4dff95dc | 525 | int ret = 0; |
b2476490 | 526 | |
a6334725 SB |
527 | lockdep_assert_held(&prepare_lock); |
528 | ||
4dff95dc | 529 | if (!core) |
1e435256 | 530 | return 0; |
1e435256 | 531 | |
4dff95dc SB |
532 | if (core->prepare_count == 0) { |
533 | ret = clk_core_prepare(core->parent); | |
534 | if (ret) | |
535 | return ret; | |
b2476490 | 536 | |
4dff95dc | 537 | trace_clk_prepare(core); |
b2476490 | 538 | |
4dff95dc SB |
539 | if (core->ops->prepare) |
540 | ret = core->ops->prepare(core->hw); | |
b2476490 | 541 | |
4dff95dc | 542 | trace_clk_prepare_complete(core); |
1c155b3d | 543 | |
4dff95dc SB |
544 | if (ret) { |
545 | clk_core_unprepare(core->parent); | |
546 | return ret; | |
547 | } | |
548 | } | |
1c155b3d | 549 | |
4dff95dc | 550 | core->prepare_count++; |
b2476490 MT |
551 | |
552 | return 0; | |
553 | } | |
b2476490 | 554 | |
a6adc30b DA |
555 | static int clk_core_prepare_lock(struct clk_core *core) |
556 | { | |
557 | int ret; | |
558 | ||
559 | clk_prepare_lock(); | |
560 | ret = clk_core_prepare(core); | |
561 | clk_prepare_unlock(); | |
562 | ||
563 | return ret; | |
564 | } | |
565 | ||
4dff95dc SB |
566 | /** |
567 | * clk_prepare - prepare a clock source | |
568 | * @clk: the clk being prepared | |
569 | * | |
570 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
571 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
572 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
573 | * the complex case a clk ungate operation may require a fast and a slow part. | |
574 | * It is this reason that clk_prepare and clk_enable are not mutually | |
575 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
576 | * Returns 0 on success, -EERROR otherwise. | |
577 | */ | |
578 | int clk_prepare(struct clk *clk) | |
b2476490 | 579 | { |
4dff95dc SB |
580 | if (!clk) |
581 | return 0; | |
b2476490 | 582 | |
a6adc30b | 583 | return clk_core_prepare_lock(clk->core); |
b2476490 | 584 | } |
4dff95dc | 585 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 586 | |
4dff95dc | 587 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 588 | { |
a6334725 SB |
589 | lockdep_assert_held(&enable_lock); |
590 | ||
4dff95dc SB |
591 | if (!core) |
592 | return; | |
035a61c3 | 593 | |
4dff95dc SB |
594 | if (WARN_ON(core->enable_count == 0)) |
595 | return; | |
b2476490 | 596 | |
2e20fbf5 LJ |
597 | if (WARN_ON(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL)) |
598 | return; | |
599 | ||
4dff95dc SB |
600 | if (--core->enable_count > 0) |
601 | return; | |
035a61c3 | 602 | |
2f87a6ea | 603 | trace_clk_disable_rcuidle(core); |
035a61c3 | 604 | |
4dff95dc SB |
605 | if (core->ops->disable) |
606 | core->ops->disable(core->hw); | |
035a61c3 | 607 | |
2f87a6ea | 608 | trace_clk_disable_complete_rcuidle(core); |
035a61c3 | 609 | |
4dff95dc | 610 | clk_core_disable(core->parent); |
035a61c3 | 611 | } |
7ef3dcc8 | 612 | |
a6adc30b DA |
613 | static void clk_core_disable_lock(struct clk_core *core) |
614 | { | |
615 | unsigned long flags; | |
616 | ||
617 | flags = clk_enable_lock(); | |
618 | clk_core_disable(core); | |
619 | clk_enable_unlock(flags); | |
620 | } | |
621 | ||
4dff95dc SB |
622 | /** |
623 | * clk_disable - gate a clock | |
624 | * @clk: the clk being gated | |
625 | * | |
626 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
627 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
628 | * clk if the operation is fast and will never sleep. One example is a | |
629 | * SoC-internal clk which is controlled via simple register writes. In the | |
630 | * complex case a clk gate operation may require a fast and a slow part. It is | |
631 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
632 | * In fact clk_disable must be called before clk_unprepare. | |
633 | */ | |
634 | void clk_disable(struct clk *clk) | |
b2476490 | 635 | { |
4dff95dc SB |
636 | if (IS_ERR_OR_NULL(clk)) |
637 | return; | |
638 | ||
a6adc30b | 639 | clk_core_disable_lock(clk->core); |
b2476490 | 640 | } |
4dff95dc | 641 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 642 | |
4dff95dc | 643 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 644 | { |
4dff95dc | 645 | int ret = 0; |
b2476490 | 646 | |
a6334725 SB |
647 | lockdep_assert_held(&enable_lock); |
648 | ||
4dff95dc SB |
649 | if (!core) |
650 | return 0; | |
b2476490 | 651 | |
4dff95dc SB |
652 | if (WARN_ON(core->prepare_count == 0)) |
653 | return -ESHUTDOWN; | |
b2476490 | 654 | |
4dff95dc SB |
655 | if (core->enable_count == 0) { |
656 | ret = clk_core_enable(core->parent); | |
b2476490 | 657 | |
4dff95dc SB |
658 | if (ret) |
659 | return ret; | |
b2476490 | 660 | |
f17a0dd1 | 661 | trace_clk_enable_rcuidle(core); |
035a61c3 | 662 | |
4dff95dc SB |
663 | if (core->ops->enable) |
664 | ret = core->ops->enable(core->hw); | |
035a61c3 | 665 | |
f17a0dd1 | 666 | trace_clk_enable_complete_rcuidle(core); |
4dff95dc SB |
667 | |
668 | if (ret) { | |
669 | clk_core_disable(core->parent); | |
670 | return ret; | |
671 | } | |
672 | } | |
673 | ||
674 | core->enable_count++; | |
675 | return 0; | |
035a61c3 | 676 | } |
b2476490 | 677 | |
a6adc30b DA |
678 | static int clk_core_enable_lock(struct clk_core *core) |
679 | { | |
680 | unsigned long flags; | |
681 | int ret; | |
682 | ||
683 | flags = clk_enable_lock(); | |
684 | ret = clk_core_enable(core); | |
685 | clk_enable_unlock(flags); | |
686 | ||
687 | return ret; | |
688 | } | |
689 | ||
4dff95dc SB |
690 | /** |
691 | * clk_enable - ungate a clock | |
692 | * @clk: the clk being ungated | |
693 | * | |
694 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
695 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
696 | * if the operation will never sleep. One example is a SoC-internal clk which | |
697 | * is controlled via simple register writes. In the complex case a clk ungate | |
698 | * operation may require a fast and a slow part. It is this reason that | |
699 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
700 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
701 | * otherwise. | |
702 | */ | |
703 | int clk_enable(struct clk *clk) | |
5279fc40 | 704 | { |
4dff95dc | 705 | if (!clk) |
5279fc40 BB |
706 | return 0; |
707 | ||
a6adc30b DA |
708 | return clk_core_enable_lock(clk->core); |
709 | } | |
710 | EXPORT_SYMBOL_GPL(clk_enable); | |
711 | ||
712 | static int clk_core_prepare_enable(struct clk_core *core) | |
713 | { | |
714 | int ret; | |
715 | ||
716 | ret = clk_core_prepare_lock(core); | |
717 | if (ret) | |
718 | return ret; | |
719 | ||
720 | ret = clk_core_enable_lock(core); | |
721 | if (ret) | |
722 | clk_core_unprepare_lock(core); | |
5279fc40 | 723 | |
4dff95dc | 724 | return ret; |
b2476490 | 725 | } |
a6adc30b DA |
726 | |
727 | static void clk_core_disable_unprepare(struct clk_core *core) | |
728 | { | |
729 | clk_core_disable_lock(core); | |
730 | clk_core_unprepare_lock(core); | |
731 | } | |
b2476490 | 732 | |
7ec986ef DA |
733 | static void clk_unprepare_unused_subtree(struct clk_core *core) |
734 | { | |
735 | struct clk_core *child; | |
736 | ||
737 | lockdep_assert_held(&prepare_lock); | |
738 | ||
739 | hlist_for_each_entry(child, &core->children, child_node) | |
740 | clk_unprepare_unused_subtree(child); | |
741 | ||
742 | if (core->prepare_count) | |
743 | return; | |
744 | ||
745 | if (core->flags & CLK_IGNORE_UNUSED) | |
746 | return; | |
747 | ||
748 | if (clk_core_is_prepared(core)) { | |
749 | trace_clk_unprepare(core); | |
750 | if (core->ops->unprepare_unused) | |
751 | core->ops->unprepare_unused(core->hw); | |
752 | else if (core->ops->unprepare) | |
753 | core->ops->unprepare(core->hw); | |
754 | trace_clk_unprepare_complete(core); | |
755 | } | |
756 | } | |
757 | ||
758 | static void clk_disable_unused_subtree(struct clk_core *core) | |
759 | { | |
760 | struct clk_core *child; | |
761 | unsigned long flags; | |
762 | ||
763 | lockdep_assert_held(&prepare_lock); | |
764 | ||
765 | hlist_for_each_entry(child, &core->children, child_node) | |
766 | clk_disable_unused_subtree(child); | |
767 | ||
a4b3518d DA |
768 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
769 | clk_core_prepare_enable(core->parent); | |
770 | ||
7ec986ef DA |
771 | flags = clk_enable_lock(); |
772 | ||
773 | if (core->enable_count) | |
774 | goto unlock_out; | |
775 | ||
776 | if (core->flags & CLK_IGNORE_UNUSED) | |
777 | goto unlock_out; | |
778 | ||
779 | /* | |
780 | * some gate clocks have special needs during the disable-unused | |
781 | * sequence. call .disable_unused if available, otherwise fall | |
782 | * back to .disable | |
783 | */ | |
784 | if (clk_core_is_enabled(core)) { | |
785 | trace_clk_disable(core); | |
786 | if (core->ops->disable_unused) | |
787 | core->ops->disable_unused(core->hw); | |
788 | else if (core->ops->disable) | |
789 | core->ops->disable(core->hw); | |
790 | trace_clk_disable_complete(core); | |
791 | } | |
792 | ||
793 | unlock_out: | |
794 | clk_enable_unlock(flags); | |
a4b3518d DA |
795 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
796 | clk_core_disable_unprepare(core->parent); | |
7ec986ef DA |
797 | } |
798 | ||
799 | static bool clk_ignore_unused; | |
800 | static int __init clk_ignore_unused_setup(char *__unused) | |
801 | { | |
802 | clk_ignore_unused = true; | |
803 | return 1; | |
804 | } | |
805 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
806 | ||
807 | static int clk_disable_unused(void) | |
808 | { | |
809 | struct clk_core *core; | |
810 | ||
811 | if (clk_ignore_unused) { | |
812 | pr_warn("clk: Not disabling unused clocks\n"); | |
813 | return 0; | |
814 | } | |
815 | ||
816 | clk_prepare_lock(); | |
817 | ||
818 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
819 | clk_disable_unused_subtree(core); | |
820 | ||
821 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
822 | clk_disable_unused_subtree(core); | |
823 | ||
824 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
825 | clk_unprepare_unused_subtree(core); | |
826 | ||
827 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
828 | clk_unprepare_unused_subtree(core); | |
829 | ||
830 | clk_prepare_unlock(); | |
831 | ||
832 | return 0; | |
833 | } | |
834 | late_initcall_sync(clk_disable_unused); | |
835 | ||
0817b62c BB |
836 | static int clk_core_round_rate_nolock(struct clk_core *core, |
837 | struct clk_rate_request *req) | |
3d6ee287 | 838 | { |
4dff95dc | 839 | struct clk_core *parent; |
0817b62c | 840 | long rate; |
4dff95dc SB |
841 | |
842 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 843 | |
d6968fca | 844 | if (!core) |
4dff95dc | 845 | return 0; |
3d6ee287 | 846 | |
4dff95dc | 847 | parent = core->parent; |
0817b62c BB |
848 | if (parent) { |
849 | req->best_parent_hw = parent->hw; | |
850 | req->best_parent_rate = parent->rate; | |
851 | } else { | |
852 | req->best_parent_hw = NULL; | |
853 | req->best_parent_rate = 0; | |
854 | } | |
3d6ee287 | 855 | |
4dff95dc | 856 | if (core->ops->determine_rate) { |
0817b62c BB |
857 | return core->ops->determine_rate(core->hw, req); |
858 | } else if (core->ops->round_rate) { | |
859 | rate = core->ops->round_rate(core->hw, req->rate, | |
860 | &req->best_parent_rate); | |
861 | if (rate < 0) | |
862 | return rate; | |
863 | ||
864 | req->rate = rate; | |
865 | } else if (core->flags & CLK_SET_RATE_PARENT) { | |
866 | return clk_core_round_rate_nolock(parent, req); | |
867 | } else { | |
868 | req->rate = core->rate; | |
869 | } | |
870 | ||
871 | return 0; | |
3d6ee287 UH |
872 | } |
873 | ||
4dff95dc SB |
874 | /** |
875 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
876 | * @hw: determine the rate of this clock | |
2d5b520c | 877 | * @req: target rate request |
4dff95dc | 878 | * |
6e5ab41b | 879 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc | 880 | */ |
0817b62c | 881 | int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) |
035a61c3 | 882 | { |
0817b62c BB |
883 | if (!hw) { |
884 | req->rate = 0; | |
4dff95dc | 885 | return 0; |
0817b62c | 886 | } |
035a61c3 | 887 | |
0817b62c | 888 | return clk_core_round_rate_nolock(hw->core, req); |
035a61c3 | 889 | } |
4dff95dc | 890 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 891 | |
1a9c069c SB |
892 | unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) |
893 | { | |
894 | int ret; | |
895 | struct clk_rate_request req; | |
896 | ||
897 | clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate); | |
898 | req.rate = rate; | |
899 | ||
900 | ret = clk_core_round_rate_nolock(hw->core, &req); | |
901 | if (ret) | |
902 | return 0; | |
903 | ||
904 | return req.rate; | |
905 | } | |
906 | EXPORT_SYMBOL_GPL(clk_hw_round_rate); | |
907 | ||
4dff95dc SB |
908 | /** |
909 | * clk_round_rate - round the given rate for a clk | |
910 | * @clk: the clk for which we are rounding a rate | |
911 | * @rate: the rate which is to be rounded | |
912 | * | |
913 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
914 | * use which is then returned. If clk doesn't support round_rate operation | |
915 | * then the parent rate is returned. | |
916 | */ | |
917 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 918 | { |
fc4a05d4 SB |
919 | struct clk_rate_request req; |
920 | int ret; | |
4dff95dc | 921 | |
035a61c3 | 922 | if (!clk) |
4dff95dc | 923 | return 0; |
035a61c3 | 924 | |
4dff95dc | 925 | clk_prepare_lock(); |
fc4a05d4 SB |
926 | |
927 | clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate); | |
928 | req.rate = rate; | |
929 | ||
930 | ret = clk_core_round_rate_nolock(clk->core, &req); | |
4dff95dc SB |
931 | clk_prepare_unlock(); |
932 | ||
fc4a05d4 SB |
933 | if (ret) |
934 | return ret; | |
935 | ||
936 | return req.rate; | |
035a61c3 | 937 | } |
4dff95dc | 938 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 939 | |
4dff95dc SB |
940 | /** |
941 | * __clk_notify - call clk notifier chain | |
942 | * @core: clk that is changing rate | |
943 | * @msg: clk notifier type (see include/linux/clk.h) | |
944 | * @old_rate: old clk rate | |
945 | * @new_rate: new clk rate | |
946 | * | |
947 | * Triggers a notifier call chain on the clk rate-change notification | |
948 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
949 | * and current rates to the notifier callback. Intended to be called by | |
950 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
951 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
952 | * a driver returns that. | |
953 | */ | |
954 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
955 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 956 | { |
4dff95dc SB |
957 | struct clk_notifier *cn; |
958 | struct clk_notifier_data cnd; | |
959 | int ret = NOTIFY_DONE; | |
b2476490 | 960 | |
4dff95dc SB |
961 | cnd.old_rate = old_rate; |
962 | cnd.new_rate = new_rate; | |
b2476490 | 963 | |
4dff95dc SB |
964 | list_for_each_entry(cn, &clk_notifier_list, node) { |
965 | if (cn->clk->core == core) { | |
966 | cnd.clk = cn->clk; | |
967 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
968 | &cnd); | |
969 | } | |
b2476490 MT |
970 | } |
971 | ||
4dff95dc | 972 | return ret; |
b2476490 MT |
973 | } |
974 | ||
4dff95dc SB |
975 | /** |
976 | * __clk_recalc_accuracies | |
977 | * @core: first clk in the subtree | |
978 | * | |
979 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
980 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 981 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 982 | * parent. |
4dff95dc SB |
983 | */ |
984 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 985 | { |
4dff95dc SB |
986 | unsigned long parent_accuracy = 0; |
987 | struct clk_core *child; | |
b2476490 | 988 | |
4dff95dc | 989 | lockdep_assert_held(&prepare_lock); |
b2476490 | 990 | |
4dff95dc SB |
991 | if (core->parent) |
992 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 993 | |
4dff95dc SB |
994 | if (core->ops->recalc_accuracy) |
995 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
996 | parent_accuracy); | |
997 | else | |
998 | core->accuracy = parent_accuracy; | |
b2476490 | 999 | |
4dff95dc SB |
1000 | hlist_for_each_entry(child, &core->children, child_node) |
1001 | __clk_recalc_accuracies(child); | |
b2476490 MT |
1002 | } |
1003 | ||
4dff95dc | 1004 | static long clk_core_get_accuracy(struct clk_core *core) |
e366fdd7 | 1005 | { |
4dff95dc | 1006 | unsigned long accuracy; |
15a02c1f | 1007 | |
4dff95dc SB |
1008 | clk_prepare_lock(); |
1009 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) | |
1010 | __clk_recalc_accuracies(core); | |
15a02c1f | 1011 | |
4dff95dc SB |
1012 | accuracy = __clk_get_accuracy(core); |
1013 | clk_prepare_unlock(); | |
e366fdd7 | 1014 | |
4dff95dc | 1015 | return accuracy; |
e366fdd7 | 1016 | } |
15a02c1f | 1017 | |
4dff95dc SB |
1018 | /** |
1019 | * clk_get_accuracy - return the accuracy of clk | |
1020 | * @clk: the clk whose accuracy is being returned | |
1021 | * | |
1022 | * Simply returns the cached accuracy of the clk, unless | |
1023 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
1024 | * issued. | |
1025 | * If clk is NULL then returns 0. | |
1026 | */ | |
1027 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 1028 | { |
4dff95dc SB |
1029 | if (!clk) |
1030 | return 0; | |
035a61c3 | 1031 | |
4dff95dc | 1032 | return clk_core_get_accuracy(clk->core); |
035a61c3 | 1033 | } |
4dff95dc | 1034 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 1035 | |
4dff95dc SB |
1036 | static unsigned long clk_recalc(struct clk_core *core, |
1037 | unsigned long parent_rate) | |
1c8e6004 | 1038 | { |
4dff95dc SB |
1039 | if (core->ops->recalc_rate) |
1040 | return core->ops->recalc_rate(core->hw, parent_rate); | |
1041 | return parent_rate; | |
1c8e6004 TV |
1042 | } |
1043 | ||
4dff95dc SB |
1044 | /** |
1045 | * __clk_recalc_rates | |
1046 | * @core: first clk in the subtree | |
1047 | * @msg: notification type (see include/linux/clk.h) | |
1048 | * | |
1049 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1050 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
1051 | * it is assumed that the clock will take on the rate of its parent. | |
1052 | * | |
1053 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1054 | * if necessary. | |
15a02c1f | 1055 | */ |
4dff95dc | 1056 | static void __clk_recalc_rates(struct clk_core *core, unsigned long msg) |
15a02c1f | 1057 | { |
4dff95dc SB |
1058 | unsigned long old_rate; |
1059 | unsigned long parent_rate = 0; | |
1060 | struct clk_core *child; | |
e366fdd7 | 1061 | |
4dff95dc | 1062 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 1063 | |
4dff95dc | 1064 | old_rate = core->rate; |
b2476490 | 1065 | |
4dff95dc SB |
1066 | if (core->parent) |
1067 | parent_rate = core->parent->rate; | |
b2476490 | 1068 | |
4dff95dc | 1069 | core->rate = clk_recalc(core, parent_rate); |
b2476490 | 1070 | |
4dff95dc SB |
1071 | /* |
1072 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1073 | * & ABORT_RATE_CHANGE notifiers | |
1074 | */ | |
1075 | if (core->notifier_count && msg) | |
1076 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 1077 | |
4dff95dc SB |
1078 | hlist_for_each_entry(child, &core->children, child_node) |
1079 | __clk_recalc_rates(child, msg); | |
1080 | } | |
b2476490 | 1081 | |
4dff95dc SB |
1082 | static unsigned long clk_core_get_rate(struct clk_core *core) |
1083 | { | |
1084 | unsigned long rate; | |
dfc202ea | 1085 | |
4dff95dc | 1086 | clk_prepare_lock(); |
b2476490 | 1087 | |
4dff95dc SB |
1088 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
1089 | __clk_recalc_rates(core, 0); | |
1090 | ||
1091 | rate = clk_core_get_rate_nolock(core); | |
1092 | clk_prepare_unlock(); | |
1093 | ||
1094 | return rate; | |
b2476490 MT |
1095 | } |
1096 | ||
1097 | /** | |
4dff95dc SB |
1098 | * clk_get_rate - return the rate of clk |
1099 | * @clk: the clk whose rate is being returned | |
b2476490 | 1100 | * |
4dff95dc SB |
1101 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
1102 | * is set, which means a recalc_rate will be issued. | |
1103 | * If clk is NULL then returns 0. | |
b2476490 | 1104 | */ |
4dff95dc | 1105 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1106 | { |
4dff95dc SB |
1107 | if (!clk) |
1108 | return 0; | |
63589e92 | 1109 | |
4dff95dc | 1110 | return clk_core_get_rate(clk->core); |
b2476490 | 1111 | } |
4dff95dc | 1112 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1113 | |
4dff95dc SB |
1114 | static int clk_fetch_parent_index(struct clk_core *core, |
1115 | struct clk_core *parent) | |
b2476490 | 1116 | { |
4dff95dc | 1117 | int i; |
b2476490 | 1118 | |
508f884a MY |
1119 | if (!parent) |
1120 | return -EINVAL; | |
1121 | ||
470b5e2f MY |
1122 | for (i = 0; i < core->num_parents; i++) |
1123 | if (clk_core_get_parent_by_index(core, i) == parent) | |
4dff95dc | 1124 | return i; |
b2476490 | 1125 | |
4dff95dc | 1126 | return -EINVAL; |
b2476490 MT |
1127 | } |
1128 | ||
e6500344 HS |
1129 | /* |
1130 | * Update the orphan status of @core and all its children. | |
1131 | */ | |
1132 | static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan) | |
1133 | { | |
1134 | struct clk_core *child; | |
1135 | ||
1136 | core->orphan = is_orphan; | |
1137 | ||
1138 | hlist_for_each_entry(child, &core->children, child_node) | |
1139 | clk_core_update_orphan_status(child, is_orphan); | |
1140 | } | |
1141 | ||
4dff95dc | 1142 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1143 | { |
e6500344 HS |
1144 | bool was_orphan = core->orphan; |
1145 | ||
4dff95dc | 1146 | hlist_del(&core->child_node); |
035a61c3 | 1147 | |
4dff95dc | 1148 | if (new_parent) { |
e6500344 HS |
1149 | bool becomes_orphan = new_parent->orphan; |
1150 | ||
4dff95dc SB |
1151 | /* avoid duplicate POST_RATE_CHANGE notifications */ |
1152 | if (new_parent->new_child == core) | |
1153 | new_parent->new_child = NULL; | |
b2476490 | 1154 | |
4dff95dc | 1155 | hlist_add_head(&core->child_node, &new_parent->children); |
e6500344 HS |
1156 | |
1157 | if (was_orphan != becomes_orphan) | |
1158 | clk_core_update_orphan_status(core, becomes_orphan); | |
4dff95dc SB |
1159 | } else { |
1160 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
e6500344 HS |
1161 | if (!was_orphan) |
1162 | clk_core_update_orphan_status(core, true); | |
4dff95dc | 1163 | } |
dfc202ea | 1164 | |
4dff95dc | 1165 | core->parent = new_parent; |
035a61c3 TV |
1166 | } |
1167 | ||
4dff95dc SB |
1168 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1169 | struct clk_core *parent) | |
b2476490 MT |
1170 | { |
1171 | unsigned long flags; | |
4dff95dc | 1172 | struct clk_core *old_parent = core->parent; |
b2476490 | 1173 | |
4dff95dc SB |
1174 | /* |
1175 | * Migrate prepare state between parents and prevent race with | |
1176 | * clk_enable(). | |
1177 | * | |
1178 | * If the clock is not prepared, then a race with | |
1179 | * clk_enable/disable() is impossible since we already have the | |
1180 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1181 | * a clk_prepare()). | |
1182 | * | |
1183 | * If the clock is prepared, migrate the prepared state to the new | |
1184 | * parent and also protect against a race with clk_enable() by | |
1185 | * forcing the clock and the new parent on. This ensures that all | |
1186 | * future calls to clk_enable() are practically NOPs with respect to | |
1187 | * hardware and software states. | |
1188 | * | |
1189 | * See also: Comment for clk_set_parent() below. | |
1190 | */ | |
1191 | if (core->prepare_count) { | |
1192 | clk_core_prepare(parent); | |
d2a5d46b | 1193 | flags = clk_enable_lock(); |
4dff95dc SB |
1194 | clk_core_enable(parent); |
1195 | clk_core_enable(core); | |
d2a5d46b | 1196 | clk_enable_unlock(flags); |
4dff95dc | 1197 | } |
63589e92 | 1198 | |
4dff95dc | 1199 | /* update the clk tree topology */ |
eab89f69 | 1200 | flags = clk_enable_lock(); |
4dff95dc | 1201 | clk_reparent(core, parent); |
eab89f69 | 1202 | clk_enable_unlock(flags); |
4dff95dc SB |
1203 | |
1204 | return old_parent; | |
b2476490 | 1205 | } |
b2476490 | 1206 | |
4dff95dc SB |
1207 | static void __clk_set_parent_after(struct clk_core *core, |
1208 | struct clk_core *parent, | |
1209 | struct clk_core *old_parent) | |
b2476490 | 1210 | { |
d2a5d46b DA |
1211 | unsigned long flags; |
1212 | ||
4dff95dc SB |
1213 | /* |
1214 | * Finish the migration of prepare state and undo the changes done | |
1215 | * for preventing a race with clk_enable(). | |
1216 | */ | |
1217 | if (core->prepare_count) { | |
d2a5d46b | 1218 | flags = clk_enable_lock(); |
4dff95dc SB |
1219 | clk_core_disable(core); |
1220 | clk_core_disable(old_parent); | |
d2a5d46b | 1221 | clk_enable_unlock(flags); |
4dff95dc SB |
1222 | clk_core_unprepare(old_parent); |
1223 | } | |
1224 | } | |
b2476490 | 1225 | |
4dff95dc SB |
1226 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
1227 | u8 p_index) | |
1228 | { | |
1229 | unsigned long flags; | |
1230 | int ret = 0; | |
1231 | struct clk_core *old_parent; | |
b2476490 | 1232 | |
4dff95dc | 1233 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 1234 | |
4dff95dc | 1235 | trace_clk_set_parent(core, parent); |
b2476490 | 1236 | |
4dff95dc SB |
1237 | /* change clock input source */ |
1238 | if (parent && core->ops->set_parent) | |
1239 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 1240 | |
4dff95dc | 1241 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 1242 | |
4dff95dc SB |
1243 | if (ret) { |
1244 | flags = clk_enable_lock(); | |
1245 | clk_reparent(core, old_parent); | |
1246 | clk_enable_unlock(flags); | |
c660b2eb | 1247 | __clk_set_parent_after(core, old_parent, parent); |
dfc202ea | 1248 | |
4dff95dc | 1249 | return ret; |
b2476490 MT |
1250 | } |
1251 | ||
4dff95dc SB |
1252 | __clk_set_parent_after(core, parent, old_parent); |
1253 | ||
b2476490 MT |
1254 | return 0; |
1255 | } | |
1256 | ||
1257 | /** | |
4dff95dc SB |
1258 | * __clk_speculate_rates |
1259 | * @core: first clk in the subtree | |
1260 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 1261 | * |
4dff95dc SB |
1262 | * Walks the subtree of clks starting with clk, speculating rates as it |
1263 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1264 | * | |
1265 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1266 | * pre-rate change notifications and returns early if no clks in the | |
1267 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1268 | * implement the .recalc_rate callback then it is assumed that the clock will | |
1269 | * take on the rate of its parent. | |
b2476490 | 1270 | */ |
4dff95dc SB |
1271 | static int __clk_speculate_rates(struct clk_core *core, |
1272 | unsigned long parent_rate) | |
b2476490 | 1273 | { |
4dff95dc SB |
1274 | struct clk_core *child; |
1275 | unsigned long new_rate; | |
1276 | int ret = NOTIFY_DONE; | |
b2476490 | 1277 | |
4dff95dc | 1278 | lockdep_assert_held(&prepare_lock); |
864e160a | 1279 | |
4dff95dc SB |
1280 | new_rate = clk_recalc(core, parent_rate); |
1281 | ||
1282 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
1283 | if (core->notifier_count) | |
1284 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
1285 | ||
1286 | if (ret & NOTIFY_STOP_MASK) { | |
1287 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1288 | __func__, core->name, ret); | |
1289 | goto out; | |
1290 | } | |
1291 | ||
1292 | hlist_for_each_entry(child, &core->children, child_node) { | |
1293 | ret = __clk_speculate_rates(child, new_rate); | |
1294 | if (ret & NOTIFY_STOP_MASK) | |
1295 | break; | |
1296 | } | |
b2476490 | 1297 | |
4dff95dc | 1298 | out: |
b2476490 MT |
1299 | return ret; |
1300 | } | |
b2476490 | 1301 | |
4dff95dc SB |
1302 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
1303 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1304 | { |
4dff95dc | 1305 | struct clk_core *child; |
b2476490 | 1306 | |
4dff95dc SB |
1307 | core->new_rate = new_rate; |
1308 | core->new_parent = new_parent; | |
1309 | core->new_parent_index = p_index; | |
1310 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1311 | core->new_child = NULL; | |
1312 | if (new_parent && new_parent != core->parent) | |
1313 | new_parent->new_child = core; | |
496eadf8 | 1314 | |
4dff95dc SB |
1315 | hlist_for_each_entry(child, &core->children, child_node) { |
1316 | child->new_rate = clk_recalc(child, new_rate); | |
1317 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
1318 | } | |
1319 | } | |
b2476490 | 1320 | |
4dff95dc SB |
1321 | /* |
1322 | * calculate the new rates returning the topmost clock that has to be | |
1323 | * changed. | |
1324 | */ | |
1325 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
1326 | unsigned long rate) | |
1327 | { | |
1328 | struct clk_core *top = core; | |
1329 | struct clk_core *old_parent, *parent; | |
4dff95dc SB |
1330 | unsigned long best_parent_rate = 0; |
1331 | unsigned long new_rate; | |
1332 | unsigned long min_rate; | |
1333 | unsigned long max_rate; | |
1334 | int p_index = 0; | |
1335 | long ret; | |
1336 | ||
1337 | /* sanity */ | |
1338 | if (IS_ERR_OR_NULL(core)) | |
1339 | return NULL; | |
1340 | ||
1341 | /* save parent rate, if it exists */ | |
1342 | parent = old_parent = core->parent; | |
71472c0c | 1343 | if (parent) |
4dff95dc | 1344 | best_parent_rate = parent->rate; |
71472c0c | 1345 | |
4dff95dc SB |
1346 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
1347 | ||
1348 | /* find the closest rate and parent clk/rate */ | |
d6968fca | 1349 | if (core->ops->determine_rate) { |
0817b62c BB |
1350 | struct clk_rate_request req; |
1351 | ||
1352 | req.rate = rate; | |
1353 | req.min_rate = min_rate; | |
1354 | req.max_rate = max_rate; | |
1355 | if (parent) { | |
1356 | req.best_parent_hw = parent->hw; | |
1357 | req.best_parent_rate = parent->rate; | |
1358 | } else { | |
1359 | req.best_parent_hw = NULL; | |
1360 | req.best_parent_rate = 0; | |
1361 | } | |
1362 | ||
1363 | ret = core->ops->determine_rate(core->hw, &req); | |
4dff95dc SB |
1364 | if (ret < 0) |
1365 | return NULL; | |
1c8e6004 | 1366 | |
0817b62c BB |
1367 | best_parent_rate = req.best_parent_rate; |
1368 | new_rate = req.rate; | |
1369 | parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; | |
4dff95dc SB |
1370 | } else if (core->ops->round_rate) { |
1371 | ret = core->ops->round_rate(core->hw, rate, | |
0817b62c | 1372 | &best_parent_rate); |
4dff95dc SB |
1373 | if (ret < 0) |
1374 | return NULL; | |
035a61c3 | 1375 | |
4dff95dc SB |
1376 | new_rate = ret; |
1377 | if (new_rate < min_rate || new_rate > max_rate) | |
1378 | return NULL; | |
1379 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
1380 | /* pass-through clock without adjustable parent */ | |
1381 | core->new_rate = core->rate; | |
1382 | return NULL; | |
1383 | } else { | |
1384 | /* pass-through clock with adjustable parent */ | |
1385 | top = clk_calc_new_rates(parent, rate); | |
1386 | new_rate = parent->new_rate; | |
1387 | goto out; | |
1388 | } | |
1c8e6004 | 1389 | |
4dff95dc SB |
1390 | /* some clocks must be gated to change parent */ |
1391 | if (parent != old_parent && | |
1392 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1393 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1394 | __func__, core->name); | |
1395 | return NULL; | |
1396 | } | |
b2476490 | 1397 | |
4dff95dc SB |
1398 | /* try finding the new parent index */ |
1399 | if (parent && core->num_parents > 1) { | |
1400 | p_index = clk_fetch_parent_index(core, parent); | |
1401 | if (p_index < 0) { | |
1402 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
1403 | __func__, parent->name, core->name); | |
1404 | return NULL; | |
1405 | } | |
1406 | } | |
b2476490 | 1407 | |
4dff95dc SB |
1408 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
1409 | best_parent_rate != parent->rate) | |
1410 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 1411 | |
4dff95dc SB |
1412 | out: |
1413 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 1414 | |
4dff95dc | 1415 | return top; |
b2476490 | 1416 | } |
b2476490 | 1417 | |
4dff95dc SB |
1418 | /* |
1419 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1420 | * so that in case of an error we can walk down the whole tree again and | |
1421 | * abort the change. | |
b2476490 | 1422 | */ |
4dff95dc SB |
1423 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
1424 | unsigned long event) | |
b2476490 | 1425 | { |
4dff95dc | 1426 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1427 | int ret = NOTIFY_DONE; |
1428 | ||
4dff95dc SB |
1429 | if (core->rate == core->new_rate) |
1430 | return NULL; | |
b2476490 | 1431 | |
4dff95dc SB |
1432 | if (core->notifier_count) { |
1433 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
1434 | if (ret & NOTIFY_STOP_MASK) | |
1435 | fail_clk = core; | |
b2476490 MT |
1436 | } |
1437 | ||
4dff95dc SB |
1438 | hlist_for_each_entry(child, &core->children, child_node) { |
1439 | /* Skip children who will be reparented to another clock */ | |
1440 | if (child->new_parent && child->new_parent != core) | |
1441 | continue; | |
1442 | tmp_clk = clk_propagate_rate_change(child, event); | |
1443 | if (tmp_clk) | |
1444 | fail_clk = tmp_clk; | |
1445 | } | |
5279fc40 | 1446 | |
4dff95dc SB |
1447 | /* handle the new child who might not be in core->children yet */ |
1448 | if (core->new_child) { | |
1449 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
1450 | if (tmp_clk) | |
1451 | fail_clk = tmp_clk; | |
1452 | } | |
5279fc40 | 1453 | |
4dff95dc | 1454 | return fail_clk; |
5279fc40 BB |
1455 | } |
1456 | ||
4dff95dc SB |
1457 | /* |
1458 | * walk down a subtree and set the new rates notifying the rate | |
1459 | * change on the way | |
1460 | */ | |
1461 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 1462 | { |
4dff95dc SB |
1463 | struct clk_core *child; |
1464 | struct hlist_node *tmp; | |
1465 | unsigned long old_rate; | |
1466 | unsigned long best_parent_rate = 0; | |
1467 | bool skip_set_rate = false; | |
1468 | struct clk_core *old_parent; | |
035a61c3 | 1469 | |
4dff95dc | 1470 | old_rate = core->rate; |
035a61c3 | 1471 | |
4dff95dc SB |
1472 | if (core->new_parent) |
1473 | best_parent_rate = core->new_parent->rate; | |
1474 | else if (core->parent) | |
1475 | best_parent_rate = core->parent->rate; | |
035a61c3 | 1476 | |
2eb8c710 HS |
1477 | if (core->flags & CLK_SET_RATE_UNGATE) { |
1478 | unsigned long flags; | |
1479 | ||
1480 | clk_core_prepare(core); | |
1481 | flags = clk_enable_lock(); | |
1482 | clk_core_enable(core); | |
1483 | clk_enable_unlock(flags); | |
1484 | } | |
1485 | ||
4dff95dc SB |
1486 | if (core->new_parent && core->new_parent != core->parent) { |
1487 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
1488 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 1489 | |
4dff95dc SB |
1490 | if (core->ops->set_rate_and_parent) { |
1491 | skip_set_rate = true; | |
1492 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
1493 | best_parent_rate, | |
1494 | core->new_parent_index); | |
1495 | } else if (core->ops->set_parent) { | |
1496 | core->ops->set_parent(core->hw, core->new_parent_index); | |
1497 | } | |
5279fc40 | 1498 | |
4dff95dc SB |
1499 | trace_clk_set_parent_complete(core, core->new_parent); |
1500 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
1501 | } | |
8f2c2db1 | 1502 | |
4dff95dc | 1503 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 1504 | |
4dff95dc SB |
1505 | if (!skip_set_rate && core->ops->set_rate) |
1506 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 1507 | |
4dff95dc | 1508 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 1509 | |
4dff95dc | 1510 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 1511 | |
2eb8c710 HS |
1512 | if (core->flags & CLK_SET_RATE_UNGATE) { |
1513 | unsigned long flags; | |
1514 | ||
1515 | flags = clk_enable_lock(); | |
1516 | clk_core_disable(core); | |
1517 | clk_enable_unlock(flags); | |
1518 | clk_core_unprepare(core); | |
1519 | } | |
1520 | ||
4dff95dc SB |
1521 | if (core->notifier_count && old_rate != core->rate) |
1522 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 | 1523 | |
85e88fab MT |
1524 | if (core->flags & CLK_RECALC_NEW_RATES) |
1525 | (void)clk_calc_new_rates(core, core->new_rate); | |
d8d91987 | 1526 | |
b2476490 | 1527 | /* |
4dff95dc SB |
1528 | * Use safe iteration, as change_rate can actually swap parents |
1529 | * for certain clock types. | |
b2476490 | 1530 | */ |
4dff95dc SB |
1531 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
1532 | /* Skip children who will be reparented to another clock */ | |
1533 | if (child->new_parent && child->new_parent != core) | |
1534 | continue; | |
1535 | clk_change_rate(child); | |
1536 | } | |
b2476490 | 1537 | |
4dff95dc SB |
1538 | /* handle the new child who might not be in core->children yet */ |
1539 | if (core->new_child) | |
1540 | clk_change_rate(core->new_child); | |
b2476490 MT |
1541 | } |
1542 | ||
4dff95dc SB |
1543 | static int clk_core_set_rate_nolock(struct clk_core *core, |
1544 | unsigned long req_rate) | |
a093bde2 | 1545 | { |
4dff95dc SB |
1546 | struct clk_core *top, *fail_clk; |
1547 | unsigned long rate = req_rate; | |
a093bde2 | 1548 | |
4dff95dc SB |
1549 | if (!core) |
1550 | return 0; | |
a093bde2 | 1551 | |
4dff95dc SB |
1552 | /* bail early if nothing to do */ |
1553 | if (rate == clk_core_get_rate_nolock(core)) | |
1554 | return 0; | |
a093bde2 | 1555 | |
4dff95dc SB |
1556 | if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count) |
1557 | return -EBUSY; | |
a093bde2 | 1558 | |
4dff95dc SB |
1559 | /* calculate new rates and get the topmost changed clock */ |
1560 | top = clk_calc_new_rates(core, rate); | |
1561 | if (!top) | |
1562 | return -EINVAL; | |
1563 | ||
1564 | /* notify that we are about to change rates */ | |
1565 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1566 | if (fail_clk) { | |
1567 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1568 | fail_clk->name); | |
1569 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1570 | return -EBUSY; | |
1571 | } | |
1572 | ||
1573 | /* change the rates */ | |
1574 | clk_change_rate(top); | |
1575 | ||
1576 | core->req_rate = req_rate; | |
1577 | ||
06b37e4a | 1578 | return 0; |
a093bde2 | 1579 | } |
035a61c3 TV |
1580 | |
1581 | /** | |
4dff95dc SB |
1582 | * clk_set_rate - specify a new rate for clk |
1583 | * @clk: the clk whose rate is being changed | |
1584 | * @rate: the new rate for clk | |
035a61c3 | 1585 | * |
4dff95dc SB |
1586 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
1587 | * | |
1588 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
1589 | * propagate up to clk's parent; whether or not this happens depends on the | |
1590 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1591 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1592 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
1593 | * up to clk's parent and set its rate. Upward propagation will continue | |
1594 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
1595 | * .round_rate stops requesting changes to clk's parent_rate. | |
1596 | * | |
1597 | * Rate changes are accomplished via tree traversal that also recalculates the | |
1598 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
1599 | * | |
1600 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 1601 | */ |
4dff95dc | 1602 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 1603 | { |
4dff95dc SB |
1604 | int ret; |
1605 | ||
035a61c3 TV |
1606 | if (!clk) |
1607 | return 0; | |
1608 | ||
4dff95dc SB |
1609 | /* prevent racing with updates to the clock topology */ |
1610 | clk_prepare_lock(); | |
da0f0b2c | 1611 | |
4dff95dc | 1612 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 1613 | |
4dff95dc | 1614 | clk_prepare_unlock(); |
4935b22c | 1615 | |
4dff95dc | 1616 | return ret; |
4935b22c | 1617 | } |
4dff95dc | 1618 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 1619 | |
4dff95dc SB |
1620 | /** |
1621 | * clk_set_rate_range - set a rate range for a clock source | |
1622 | * @clk: clock source | |
1623 | * @min: desired minimum clock rate in Hz, inclusive | |
1624 | * @max: desired maximum clock rate in Hz, inclusive | |
1625 | * | |
1626 | * Returns success (0) or negative errno. | |
1627 | */ | |
1628 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
4935b22c | 1629 | { |
4dff95dc | 1630 | int ret = 0; |
4935b22c | 1631 | |
4dff95dc SB |
1632 | if (!clk) |
1633 | return 0; | |
903efc55 | 1634 | |
4dff95dc SB |
1635 | if (min > max) { |
1636 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1637 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1638 | min, max); | |
1639 | return -EINVAL; | |
903efc55 | 1640 | } |
4935b22c | 1641 | |
4dff95dc | 1642 | clk_prepare_lock(); |
4935b22c | 1643 | |
4dff95dc SB |
1644 | if (min != clk->min_rate || max != clk->max_rate) { |
1645 | clk->min_rate = min; | |
1646 | clk->max_rate = max; | |
1647 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
4935b22c JH |
1648 | } |
1649 | ||
4dff95dc | 1650 | clk_prepare_unlock(); |
4935b22c | 1651 | |
4dff95dc | 1652 | return ret; |
3fa2252b | 1653 | } |
4dff95dc | 1654 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 1655 | |
4dff95dc SB |
1656 | /** |
1657 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1658 | * @clk: clock source | |
1659 | * @rate: desired minimum clock rate in Hz, inclusive | |
1660 | * | |
1661 | * Returns success (0) or negative errno. | |
1662 | */ | |
1663 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1664 | { |
4dff95dc SB |
1665 | if (!clk) |
1666 | return 0; | |
1667 | ||
1668 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
3fa2252b | 1669 | } |
4dff95dc | 1670 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 1671 | |
4dff95dc SB |
1672 | /** |
1673 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1674 | * @clk: clock source | |
1675 | * @rate: desired maximum clock rate in Hz, inclusive | |
1676 | * | |
1677 | * Returns success (0) or negative errno. | |
1678 | */ | |
1679 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1680 | { |
4dff95dc SB |
1681 | if (!clk) |
1682 | return 0; | |
4935b22c | 1683 | |
4dff95dc | 1684 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 1685 | } |
4dff95dc | 1686 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 1687 | |
b2476490 | 1688 | /** |
4dff95dc SB |
1689 | * clk_get_parent - return the parent of a clk |
1690 | * @clk: the clk whose parent gets returned | |
b2476490 | 1691 | * |
4dff95dc | 1692 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 1693 | */ |
4dff95dc | 1694 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 1695 | { |
4dff95dc | 1696 | struct clk *parent; |
b2476490 | 1697 | |
fc4a05d4 SB |
1698 | if (!clk) |
1699 | return NULL; | |
1700 | ||
4dff95dc | 1701 | clk_prepare_lock(); |
fc4a05d4 SB |
1702 | /* TODO: Create a per-user clk and change callers to call clk_put */ |
1703 | parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
4dff95dc | 1704 | clk_prepare_unlock(); |
496eadf8 | 1705 | |
4dff95dc SB |
1706 | return parent; |
1707 | } | |
1708 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 1709 | |
4dff95dc SB |
1710 | static struct clk_core *__clk_init_parent(struct clk_core *core) |
1711 | { | |
5146e0b0 | 1712 | u8 index = 0; |
4dff95dc | 1713 | |
2430a94d | 1714 | if (core->num_parents > 1 && core->ops->get_parent) |
5146e0b0 | 1715 | index = core->ops->get_parent(core->hw); |
b2476490 | 1716 | |
5146e0b0 | 1717 | return clk_core_get_parent_by_index(core, index); |
b2476490 MT |
1718 | } |
1719 | ||
4dff95dc SB |
1720 | static void clk_core_reparent(struct clk_core *core, |
1721 | struct clk_core *new_parent) | |
b2476490 | 1722 | { |
4dff95dc SB |
1723 | clk_reparent(core, new_parent); |
1724 | __clk_recalc_accuracies(core); | |
1725 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
b2476490 MT |
1726 | } |
1727 | ||
42c86547 TV |
1728 | void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) |
1729 | { | |
1730 | if (!hw) | |
1731 | return; | |
1732 | ||
1733 | clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); | |
1734 | } | |
1735 | ||
4dff95dc SB |
1736 | /** |
1737 | * clk_has_parent - check if a clock is a possible parent for another | |
1738 | * @clk: clock source | |
1739 | * @parent: parent clock source | |
1740 | * | |
1741 | * This function can be used in drivers that need to check that a clock can be | |
1742 | * the parent of another without actually changing the parent. | |
1743 | * | |
1744 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 1745 | */ |
4dff95dc | 1746 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
b2476490 | 1747 | { |
4dff95dc SB |
1748 | struct clk_core *core, *parent_core; |
1749 | unsigned int i; | |
b2476490 | 1750 | |
4dff95dc SB |
1751 | /* NULL clocks should be nops, so return success if either is NULL. */ |
1752 | if (!clk || !parent) | |
1753 | return true; | |
7452b219 | 1754 | |
4dff95dc SB |
1755 | core = clk->core; |
1756 | parent_core = parent->core; | |
71472c0c | 1757 | |
4dff95dc SB |
1758 | /* Optimize for the case where the parent is already the parent. */ |
1759 | if (core->parent == parent_core) | |
1760 | return true; | |
1c8e6004 | 1761 | |
4dff95dc SB |
1762 | for (i = 0; i < core->num_parents; i++) |
1763 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
1764 | return true; | |
03bc10ab | 1765 | |
4dff95dc SB |
1766 | return false; |
1767 | } | |
1768 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 1769 | |
4dff95dc SB |
1770 | static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent) |
1771 | { | |
1772 | int ret = 0; | |
1773 | int p_index = 0; | |
1774 | unsigned long p_rate = 0; | |
1775 | ||
1776 | if (!core) | |
1777 | return 0; | |
1778 | ||
1779 | /* prevent racing with updates to the clock topology */ | |
1780 | clk_prepare_lock(); | |
1781 | ||
1782 | if (core->parent == parent) | |
1783 | goto out; | |
1784 | ||
1785 | /* verify ops for for multi-parent clks */ | |
1786 | if ((core->num_parents > 1) && (!core->ops->set_parent)) { | |
1787 | ret = -ENOSYS; | |
63f5c3b2 | 1788 | goto out; |
7452b219 MT |
1789 | } |
1790 | ||
4dff95dc SB |
1791 | /* check that we are allowed to re-parent if the clock is in use */ |
1792 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1793 | ret = -EBUSY; | |
1794 | goto out; | |
b2476490 MT |
1795 | } |
1796 | ||
71472c0c | 1797 | /* try finding the new parent index */ |
4dff95dc | 1798 | if (parent) { |
d6968fca | 1799 | p_index = clk_fetch_parent_index(core, parent); |
f1c8b2ed | 1800 | if (p_index < 0) { |
71472c0c | 1801 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc SB |
1802 | __func__, parent->name, core->name); |
1803 | ret = p_index; | |
1804 | goto out; | |
71472c0c | 1805 | } |
e8f0e68e | 1806 | p_rate = parent->rate; |
b2476490 MT |
1807 | } |
1808 | ||
4dff95dc SB |
1809 | /* propagate PRE_RATE_CHANGE notifications */ |
1810 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 1811 | |
4dff95dc SB |
1812 | /* abort if a driver objects */ |
1813 | if (ret & NOTIFY_STOP_MASK) | |
1814 | goto out; | |
b2476490 | 1815 | |
4dff95dc SB |
1816 | /* do the re-parent */ |
1817 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 1818 | |
4dff95dc SB |
1819 | /* propagate rate an accuracy recalculation accordingly */ |
1820 | if (ret) { | |
1821 | __clk_recalc_rates(core, ABORT_RATE_CHANGE); | |
1822 | } else { | |
1823 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
1824 | __clk_recalc_accuracies(core); | |
b2476490 MT |
1825 | } |
1826 | ||
4dff95dc SB |
1827 | out: |
1828 | clk_prepare_unlock(); | |
71472c0c | 1829 | |
4dff95dc SB |
1830 | return ret; |
1831 | } | |
b2476490 | 1832 | |
4dff95dc SB |
1833 | /** |
1834 | * clk_set_parent - switch the parent of a mux clk | |
1835 | * @clk: the mux clk whose input we are switching | |
1836 | * @parent: the new input to clk | |
1837 | * | |
1838 | * Re-parent clk to use parent as its new input source. If clk is in | |
1839 | * prepared state, the clk will get enabled for the duration of this call. If | |
1840 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
1841 | * that, the reparenting is glitchy in hardware, etc), use the | |
1842 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
1843 | * | |
1844 | * After successfully changing clk's parent clk_set_parent will update the | |
1845 | * clk topology, sysfs topology and propagate rate recalculation via | |
1846 | * __clk_recalc_rates. | |
1847 | * | |
1848 | * Returns 0 on success, -EERROR otherwise. | |
1849 | */ | |
1850 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
1851 | { | |
1852 | if (!clk) | |
1853 | return 0; | |
1854 | ||
1855 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
b2476490 | 1856 | } |
4dff95dc | 1857 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 1858 | |
4dff95dc SB |
1859 | /** |
1860 | * clk_set_phase - adjust the phase shift of a clock signal | |
1861 | * @clk: clock signal source | |
1862 | * @degrees: number of degrees the signal is shifted | |
1863 | * | |
1864 | * Shifts the phase of a clock signal by the specified | |
1865 | * degrees. Returns 0 on success, -EERROR otherwise. | |
1866 | * | |
1867 | * This function makes no distinction about the input or reference | |
1868 | * signal that we adjust the clock signal phase against. For example | |
1869 | * phase locked-loop clock signal generators we may shift phase with | |
1870 | * respect to feedback clock signal input, but for other cases the | |
1871 | * clock phase may be shifted with respect to some other, unspecified | |
1872 | * signal. | |
1873 | * | |
1874 | * Additionally the concept of phase shift does not propagate through | |
1875 | * the clock tree hierarchy, which sets it apart from clock rates and | |
1876 | * clock accuracy. A parent clock phase attribute does not have an | |
1877 | * impact on the phase attribute of a child clock. | |
b2476490 | 1878 | */ |
4dff95dc | 1879 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 1880 | { |
4dff95dc | 1881 | int ret = -EINVAL; |
b2476490 | 1882 | |
4dff95dc SB |
1883 | if (!clk) |
1884 | return 0; | |
b2476490 | 1885 | |
4dff95dc SB |
1886 | /* sanity check degrees */ |
1887 | degrees %= 360; | |
1888 | if (degrees < 0) | |
1889 | degrees += 360; | |
bf47b4fd | 1890 | |
4dff95dc | 1891 | clk_prepare_lock(); |
3fa2252b | 1892 | |
023bd716 SL |
1893 | /* bail early if nothing to do */ |
1894 | if (degrees == clk->core->phase) | |
1895 | goto out; | |
1896 | ||
4dff95dc | 1897 | trace_clk_set_phase(clk->core, degrees); |
3fa2252b | 1898 | |
4dff95dc SB |
1899 | if (clk->core->ops->set_phase) |
1900 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
3fa2252b | 1901 | |
4dff95dc | 1902 | trace_clk_set_phase_complete(clk->core, degrees); |
dfc202ea | 1903 | |
4dff95dc SB |
1904 | if (!ret) |
1905 | clk->core->phase = degrees; | |
b2476490 | 1906 | |
023bd716 | 1907 | out: |
4dff95dc | 1908 | clk_prepare_unlock(); |
dfc202ea | 1909 | |
4dff95dc SB |
1910 | return ret; |
1911 | } | |
1912 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 1913 | |
4dff95dc SB |
1914 | static int clk_core_get_phase(struct clk_core *core) |
1915 | { | |
1916 | int ret; | |
b2476490 | 1917 | |
4dff95dc SB |
1918 | clk_prepare_lock(); |
1919 | ret = core->phase; | |
1920 | clk_prepare_unlock(); | |
71472c0c | 1921 | |
4dff95dc | 1922 | return ret; |
b2476490 MT |
1923 | } |
1924 | ||
4dff95dc SB |
1925 | /** |
1926 | * clk_get_phase - return the phase shift of a clock signal | |
1927 | * @clk: clock signal source | |
1928 | * | |
1929 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
1930 | * -EERROR. | |
1931 | */ | |
1932 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 1933 | { |
4dff95dc | 1934 | if (!clk) |
1c8e6004 TV |
1935 | return 0; |
1936 | ||
4dff95dc SB |
1937 | return clk_core_get_phase(clk->core); |
1938 | } | |
1939 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 1940 | |
4dff95dc SB |
1941 | /** |
1942 | * clk_is_match - check if two clk's point to the same hardware clock | |
1943 | * @p: clk compared against q | |
1944 | * @q: clk compared against p | |
1945 | * | |
1946 | * Returns true if the two struct clk pointers both point to the same hardware | |
1947 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
1948 | * share the same struct clk_core object. | |
1949 | * | |
1950 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
1951 | */ | |
1952 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
1953 | { | |
1954 | /* trivial case: identical struct clk's or both NULL */ | |
1955 | if (p == q) | |
1956 | return true; | |
1c8e6004 | 1957 | |
3fe003f9 | 1958 | /* true if clk->core pointers match. Avoid dereferencing garbage */ |
4dff95dc SB |
1959 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) |
1960 | if (p->core == q->core) | |
1961 | return true; | |
1c8e6004 | 1962 | |
4dff95dc SB |
1963 | return false; |
1964 | } | |
1965 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 1966 | |
4dff95dc | 1967 | /*** debugfs support ***/ |
1c8e6004 | 1968 | |
4dff95dc SB |
1969 | #ifdef CONFIG_DEBUG_FS |
1970 | #include <linux/debugfs.h> | |
1c8e6004 | 1971 | |
4dff95dc SB |
1972 | static struct dentry *rootdir; |
1973 | static int inited = 0; | |
1974 | static DEFINE_MUTEX(clk_debug_lock); | |
1975 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 1976 | |
4dff95dc SB |
1977 | static struct hlist_head *all_lists[] = { |
1978 | &clk_root_list, | |
1979 | &clk_orphan_list, | |
1980 | NULL, | |
1981 | }; | |
1982 | ||
1983 | static struct hlist_head *orphan_list[] = { | |
1984 | &clk_orphan_list, | |
1985 | NULL, | |
1986 | }; | |
1987 | ||
1988 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
1989 | int level) | |
b2476490 | 1990 | { |
4dff95dc SB |
1991 | if (!c) |
1992 | return; | |
b2476490 | 1993 | |
4dff95dc SB |
1994 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1995 | level * 3 + 1, "", | |
1996 | 30 - level * 3, c->name, | |
1997 | c->enable_count, c->prepare_count, clk_core_get_rate(c), | |
1998 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1999 | } | |
89ac8d7a | 2000 | |
4dff95dc SB |
2001 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
2002 | int level) | |
2003 | { | |
2004 | struct clk_core *child; | |
b2476490 | 2005 | |
4dff95dc SB |
2006 | if (!c) |
2007 | return; | |
b2476490 | 2008 | |
4dff95dc | 2009 | clk_summary_show_one(s, c, level); |
0e1c0301 | 2010 | |
4dff95dc SB |
2011 | hlist_for_each_entry(child, &c->children, child_node) |
2012 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 2013 | } |
b2476490 | 2014 | |
4dff95dc | 2015 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 2016 | { |
4dff95dc SB |
2017 | struct clk_core *c; |
2018 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
1c8e6004 | 2019 | |
4dff95dc SB |
2020 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
2021 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
b2476490 | 2022 | |
1c8e6004 TV |
2023 | clk_prepare_lock(); |
2024 | ||
4dff95dc SB |
2025 | for (; *lists; lists++) |
2026 | hlist_for_each_entry(c, *lists, child_node) | |
2027 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 2028 | |
eab89f69 | 2029 | clk_prepare_unlock(); |
b2476490 | 2030 | |
4dff95dc | 2031 | return 0; |
b2476490 | 2032 | } |
1c8e6004 | 2033 | |
1c8e6004 | 2034 | |
4dff95dc | 2035 | static int clk_summary_open(struct inode *inode, struct file *file) |
1c8e6004 | 2036 | { |
4dff95dc | 2037 | return single_open(file, clk_summary_show, inode->i_private); |
1c8e6004 | 2038 | } |
b2476490 | 2039 | |
4dff95dc SB |
2040 | static const struct file_operations clk_summary_fops = { |
2041 | .open = clk_summary_open, | |
2042 | .read = seq_read, | |
2043 | .llseek = seq_lseek, | |
2044 | .release = single_release, | |
2045 | }; | |
b2476490 | 2046 | |
4dff95dc SB |
2047 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
2048 | { | |
2049 | if (!c) | |
2050 | return; | |
b2476490 | 2051 | |
7cb81136 | 2052 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
2053 | seq_printf(s, "\"%s\": { ", c->name); |
2054 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
2055 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
7cb81136 SW |
2056 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c)); |
2057 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c)); | |
4dff95dc | 2058 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); |
b2476490 | 2059 | } |
b2476490 | 2060 | |
4dff95dc | 2061 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 2062 | { |
4dff95dc | 2063 | struct clk_core *child; |
b2476490 | 2064 | |
4dff95dc SB |
2065 | if (!c) |
2066 | return; | |
b2476490 | 2067 | |
4dff95dc | 2068 | clk_dump_one(s, c, level); |
b2476490 | 2069 | |
4dff95dc SB |
2070 | hlist_for_each_entry(child, &c->children, child_node) { |
2071 | seq_printf(s, ","); | |
2072 | clk_dump_subtree(s, child, level + 1); | |
b2476490 MT |
2073 | } |
2074 | ||
4dff95dc | 2075 | seq_printf(s, "}"); |
b2476490 MT |
2076 | } |
2077 | ||
4dff95dc | 2078 | static int clk_dump(struct seq_file *s, void *data) |
4e88f3de | 2079 | { |
4dff95dc SB |
2080 | struct clk_core *c; |
2081 | bool first_node = true; | |
2082 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
4e88f3de | 2083 | |
4dff95dc | 2084 | seq_printf(s, "{"); |
4e88f3de | 2085 | |
4dff95dc | 2086 | clk_prepare_lock(); |
035a61c3 | 2087 | |
4dff95dc SB |
2088 | for (; *lists; lists++) { |
2089 | hlist_for_each_entry(c, *lists, child_node) { | |
2090 | if (!first_node) | |
2091 | seq_puts(s, ","); | |
2092 | first_node = false; | |
2093 | clk_dump_subtree(s, c, 0); | |
2094 | } | |
2095 | } | |
4e88f3de | 2096 | |
4dff95dc | 2097 | clk_prepare_unlock(); |
4e88f3de | 2098 | |
70e9f4dd | 2099 | seq_puts(s, "}\n"); |
4dff95dc | 2100 | return 0; |
4e88f3de | 2101 | } |
4e88f3de | 2102 | |
4dff95dc SB |
2103 | |
2104 | static int clk_dump_open(struct inode *inode, struct file *file) | |
b2476490 | 2105 | { |
4dff95dc SB |
2106 | return single_open(file, clk_dump, inode->i_private); |
2107 | } | |
b2476490 | 2108 | |
4dff95dc SB |
2109 | static const struct file_operations clk_dump_fops = { |
2110 | .open = clk_dump_open, | |
2111 | .read = seq_read, | |
2112 | .llseek = seq_lseek, | |
2113 | .release = single_release, | |
2114 | }; | |
89ac8d7a | 2115 | |
4dff95dc SB |
2116 | static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
2117 | { | |
2118 | struct dentry *d; | |
2119 | int ret = -ENOMEM; | |
b2476490 | 2120 | |
4dff95dc SB |
2121 | if (!core || !pdentry) { |
2122 | ret = -EINVAL; | |
b2476490 | 2123 | goto out; |
4dff95dc | 2124 | } |
b2476490 | 2125 | |
4dff95dc SB |
2126 | d = debugfs_create_dir(core->name, pdentry); |
2127 | if (!d) | |
b61c43c0 | 2128 | goto out; |
b61c43c0 | 2129 | |
4dff95dc SB |
2130 | core->dentry = d; |
2131 | ||
2132 | d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry, | |
2133 | (u32 *)&core->rate); | |
2134 | if (!d) | |
2135 | goto err_out; | |
2136 | ||
2137 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry, | |
2138 | (u32 *)&core->accuracy); | |
2139 | if (!d) | |
2140 | goto err_out; | |
2141 | ||
2142 | d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry, | |
2143 | (u32 *)&core->phase); | |
2144 | if (!d) | |
2145 | goto err_out; | |
031dcc9b | 2146 | |
4dff95dc SB |
2147 | d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry, |
2148 | (u32 *)&core->flags); | |
2149 | if (!d) | |
2150 | goto err_out; | |
031dcc9b | 2151 | |
4dff95dc SB |
2152 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry, |
2153 | (u32 *)&core->prepare_count); | |
2154 | if (!d) | |
2155 | goto err_out; | |
b2476490 | 2156 | |
4dff95dc SB |
2157 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry, |
2158 | (u32 *)&core->enable_count); | |
2159 | if (!d) | |
2160 | goto err_out; | |
b2476490 | 2161 | |
4dff95dc SB |
2162 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry, |
2163 | (u32 *)&core->notifier_count); | |
2164 | if (!d) | |
2165 | goto err_out; | |
b2476490 | 2166 | |
4dff95dc SB |
2167 | if (core->ops->debug_init) { |
2168 | ret = core->ops->debug_init(core->hw, core->dentry); | |
2169 | if (ret) | |
2170 | goto err_out; | |
5279fc40 | 2171 | } |
b2476490 | 2172 | |
4dff95dc SB |
2173 | ret = 0; |
2174 | goto out; | |
b2476490 | 2175 | |
4dff95dc SB |
2176 | err_out: |
2177 | debugfs_remove_recursive(core->dentry); | |
2178 | core->dentry = NULL; | |
2179 | out: | |
b2476490 MT |
2180 | return ret; |
2181 | } | |
035a61c3 TV |
2182 | |
2183 | /** | |
6e5ab41b SB |
2184 | * clk_debug_register - add a clk node to the debugfs clk directory |
2185 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 2186 | * |
6e5ab41b SB |
2187 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
2188 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 2189 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 2190 | */ |
4dff95dc | 2191 | static int clk_debug_register(struct clk_core *core) |
035a61c3 | 2192 | { |
4dff95dc | 2193 | int ret = 0; |
035a61c3 | 2194 | |
4dff95dc SB |
2195 | mutex_lock(&clk_debug_lock); |
2196 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
2197 | ||
2198 | if (!inited) | |
2199 | goto unlock; | |
2200 | ||
2201 | ret = clk_debug_create_one(core, rootdir); | |
2202 | unlock: | |
2203 | mutex_unlock(&clk_debug_lock); | |
2204 | ||
2205 | return ret; | |
035a61c3 | 2206 | } |
b2476490 | 2207 | |
4dff95dc | 2208 | /** |
6e5ab41b SB |
2209 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
2210 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 2211 | * |
6e5ab41b SB |
2212 | * Dynamically removes a clk and all its child nodes from the |
2213 | * debugfs clk directory if clk->dentry points to debugfs created by | |
706d5c73 | 2214 | * clk_debug_register in __clk_core_init. |
e59c5371 | 2215 | */ |
4dff95dc | 2216 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 2217 | { |
4dff95dc SB |
2218 | mutex_lock(&clk_debug_lock); |
2219 | hlist_del_init(&core->debug_node); | |
2220 | debugfs_remove_recursive(core->dentry); | |
2221 | core->dentry = NULL; | |
2222 | mutex_unlock(&clk_debug_lock); | |
2223 | } | |
e59c5371 | 2224 | |
4dff95dc SB |
2225 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
2226 | void *data, const struct file_operations *fops) | |
2227 | { | |
2228 | struct dentry *d = NULL; | |
e59c5371 | 2229 | |
4dff95dc SB |
2230 | if (hw->core->dentry) |
2231 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
2232 | fops); | |
e59c5371 | 2233 | |
4dff95dc SB |
2234 | return d; |
2235 | } | |
2236 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
e59c5371 | 2237 | |
4dff95dc | 2238 | /** |
6e5ab41b | 2239 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 2240 | * |
6e5ab41b SB |
2241 | * clks are often initialized very early during boot before memory can be |
2242 | * dynamically allocated and well before debugfs is setup. This function | |
2243 | * populates the debugfs clk directory once at boot-time when we know that | |
2244 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
2245 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
2246 | */ |
2247 | static int __init clk_debug_init(void) | |
2248 | { | |
2249 | struct clk_core *core; | |
2250 | struct dentry *d; | |
dfc202ea | 2251 | |
4dff95dc | 2252 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 2253 | |
4dff95dc SB |
2254 | if (!rootdir) |
2255 | return -ENOMEM; | |
dfc202ea | 2256 | |
4dff95dc SB |
2257 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
2258 | &clk_summary_fops); | |
2259 | if (!d) | |
2260 | return -ENOMEM; | |
e59c5371 | 2261 | |
4dff95dc SB |
2262 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
2263 | &clk_dump_fops); | |
2264 | if (!d) | |
2265 | return -ENOMEM; | |
e59c5371 | 2266 | |
4dff95dc SB |
2267 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
2268 | &orphan_list, &clk_summary_fops); | |
2269 | if (!d) | |
2270 | return -ENOMEM; | |
e59c5371 | 2271 | |
4dff95dc SB |
2272 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
2273 | &orphan_list, &clk_dump_fops); | |
2274 | if (!d) | |
2275 | return -ENOMEM; | |
e59c5371 | 2276 | |
4dff95dc SB |
2277 | mutex_lock(&clk_debug_lock); |
2278 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
2279 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 2280 | |
4dff95dc SB |
2281 | inited = 1; |
2282 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 2283 | |
4dff95dc SB |
2284 | return 0; |
2285 | } | |
2286 | late_initcall(clk_debug_init); | |
2287 | #else | |
2288 | static inline int clk_debug_register(struct clk_core *core) { return 0; } | |
2289 | static inline void clk_debug_reparent(struct clk_core *core, | |
2290 | struct clk_core *new_parent) | |
035a61c3 | 2291 | { |
035a61c3 | 2292 | } |
4dff95dc | 2293 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 2294 | { |
3d3801ef | 2295 | } |
4dff95dc | 2296 | #endif |
3d3801ef | 2297 | |
b2476490 | 2298 | /** |
be45ebf2 | 2299 | * __clk_core_init - initialize the data structures in a struct clk_core |
d35c80c2 | 2300 | * @core: clk_core being initialized |
b2476490 | 2301 | * |
035a61c3 | 2302 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2303 | * parent and rate and sets them both. |
b2476490 | 2304 | */ |
be45ebf2 | 2305 | static int __clk_core_init(struct clk_core *core) |
b2476490 | 2306 | { |
d1302a36 | 2307 | int i, ret = 0; |
035a61c3 | 2308 | struct clk_core *orphan; |
b67bfe0d | 2309 | struct hlist_node *tmp2; |
1c8e6004 | 2310 | unsigned long rate; |
b2476490 | 2311 | |
d35c80c2 | 2312 | if (!core) |
d1302a36 | 2313 | return -EINVAL; |
b2476490 | 2314 | |
eab89f69 | 2315 | clk_prepare_lock(); |
b2476490 MT |
2316 | |
2317 | /* check to see if a clock with this name is already registered */ | |
d6968fca | 2318 | if (clk_core_lookup(core->name)) { |
d1302a36 | 2319 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 2320 | __func__, core->name); |
d1302a36 | 2321 | ret = -EEXIST; |
b2476490 | 2322 | goto out; |
d1302a36 | 2323 | } |
b2476490 | 2324 | |
d4d7e3dd | 2325 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
d6968fca SB |
2326 | if (core->ops->set_rate && |
2327 | !((core->ops->round_rate || core->ops->determine_rate) && | |
2328 | core->ops->recalc_rate)) { | |
c44fccb5 MY |
2329 | pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
2330 | __func__, core->name); | |
d1302a36 | 2331 | ret = -EINVAL; |
d4d7e3dd MT |
2332 | goto out; |
2333 | } | |
2334 | ||
d6968fca | 2335 | if (core->ops->set_parent && !core->ops->get_parent) { |
c44fccb5 MY |
2336 | pr_err("%s: %s must implement .get_parent & .set_parent\n", |
2337 | __func__, core->name); | |
d1302a36 | 2338 | ret = -EINVAL; |
d4d7e3dd MT |
2339 | goto out; |
2340 | } | |
2341 | ||
3c8e77dd MY |
2342 | if (core->num_parents > 1 && !core->ops->get_parent) { |
2343 | pr_err("%s: %s must implement .get_parent as it has multi parents\n", | |
2344 | __func__, core->name); | |
2345 | ret = -EINVAL; | |
2346 | goto out; | |
2347 | } | |
2348 | ||
d6968fca SB |
2349 | if (core->ops->set_rate_and_parent && |
2350 | !(core->ops->set_parent && core->ops->set_rate)) { | |
c44fccb5 | 2351 | pr_err("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 2352 | __func__, core->name); |
3fa2252b SB |
2353 | ret = -EINVAL; |
2354 | goto out; | |
2355 | } | |
2356 | ||
b2476490 | 2357 | /* throw a WARN if any entries in parent_names are NULL */ |
d6968fca SB |
2358 | for (i = 0; i < core->num_parents; i++) |
2359 | WARN(!core->parent_names[i], | |
b2476490 | 2360 | "%s: invalid NULL in %s's .parent_names\n", |
d6968fca | 2361 | __func__, core->name); |
b2476490 | 2362 | |
d6968fca | 2363 | core->parent = __clk_init_parent(core); |
b2476490 MT |
2364 | |
2365 | /* | |
706d5c73 SB |
2366 | * Populate core->parent if parent has already been clk_core_init'd. If |
2367 | * parent has not yet been clk_core_init'd then place clk in the orphan | |
47b0eeb3 | 2368 | * list. If clk doesn't have any parents then place it in the root |
b2476490 MT |
2369 | * clk list. |
2370 | * | |
2371 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2372 | * clocks and re-parent any that are children of the clock currently | |
2373 | * being clk_init'd. | |
2374 | */ | |
e6500344 | 2375 | if (core->parent) { |
d6968fca SB |
2376 | hlist_add_head(&core->child_node, |
2377 | &core->parent->children); | |
e6500344 | 2378 | core->orphan = core->parent->orphan; |
47b0eeb3 | 2379 | } else if (!core->num_parents) { |
d6968fca | 2380 | hlist_add_head(&core->child_node, &clk_root_list); |
e6500344 HS |
2381 | core->orphan = false; |
2382 | } else { | |
d6968fca | 2383 | hlist_add_head(&core->child_node, &clk_orphan_list); |
e6500344 HS |
2384 | core->orphan = true; |
2385 | } | |
b2476490 | 2386 | |
5279fc40 BB |
2387 | /* |
2388 | * Set clk's accuracy. The preferred method is to use | |
2389 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2390 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2391 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2392 | * clock). | |
2393 | */ | |
d6968fca SB |
2394 | if (core->ops->recalc_accuracy) |
2395 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
2396 | __clk_get_accuracy(core->parent)); | |
2397 | else if (core->parent) | |
2398 | core->accuracy = core->parent->accuracy; | |
5279fc40 | 2399 | else |
d6968fca | 2400 | core->accuracy = 0; |
5279fc40 | 2401 | |
9824cf73 MR |
2402 | /* |
2403 | * Set clk's phase. | |
2404 | * Since a phase is by definition relative to its parent, just | |
2405 | * query the current clock phase, or just assume it's in phase. | |
2406 | */ | |
d6968fca SB |
2407 | if (core->ops->get_phase) |
2408 | core->phase = core->ops->get_phase(core->hw); | |
9824cf73 | 2409 | else |
d6968fca | 2410 | core->phase = 0; |
9824cf73 | 2411 | |
b2476490 MT |
2412 | /* |
2413 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2414 | * simple clocks and lazy developers the default fallback is to use the | |
2415 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2416 | * then rate is set to zero. | |
2417 | */ | |
d6968fca SB |
2418 | if (core->ops->recalc_rate) |
2419 | rate = core->ops->recalc_rate(core->hw, | |
2420 | clk_core_get_rate_nolock(core->parent)); | |
2421 | else if (core->parent) | |
2422 | rate = core->parent->rate; | |
b2476490 | 2423 | else |
1c8e6004 | 2424 | rate = 0; |
d6968fca | 2425 | core->rate = core->req_rate = rate; |
b2476490 MT |
2426 | |
2427 | /* | |
0e8f6e49 MY |
2428 | * walk the list of orphan clocks and reparent any that newly finds a |
2429 | * parent. | |
b2476490 | 2430 | */ |
b67bfe0d | 2431 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
0e8f6e49 | 2432 | struct clk_core *parent = __clk_init_parent(orphan); |
1f61e5f1 | 2433 | |
0e8f6e49 MY |
2434 | if (parent) |
2435 | clk_core_reparent(orphan, parent); | |
2436 | } | |
b2476490 MT |
2437 | |
2438 | /* | |
2439 | * optional platform-specific magic | |
2440 | * | |
2441 | * The .init callback is not used by any of the basic clock types, but | |
2442 | * exists for weird hardware that must perform initialization magic. | |
2443 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2444 | * using this callback, as its use is discouraged. |
b2476490 | 2445 | */ |
d6968fca SB |
2446 | if (core->ops->init) |
2447 | core->ops->init(core->hw); | |
b2476490 | 2448 | |
32b9b109 | 2449 | if (core->flags & CLK_IS_CRITICAL) { |
ef56b79b MR |
2450 | unsigned long flags; |
2451 | ||
32b9b109 | 2452 | clk_core_prepare(core); |
ef56b79b MR |
2453 | |
2454 | flags = clk_enable_lock(); | |
32b9b109 | 2455 | clk_core_enable(core); |
ef56b79b | 2456 | clk_enable_unlock(flags); |
32b9b109 LJ |
2457 | } |
2458 | ||
d6968fca | 2459 | kref_init(&core->ref); |
b2476490 | 2460 | out: |
eab89f69 | 2461 | clk_prepare_unlock(); |
b2476490 | 2462 | |
89f7e9de | 2463 | if (!ret) |
d6968fca | 2464 | clk_debug_register(core); |
89f7e9de | 2465 | |
d1302a36 | 2466 | return ret; |
b2476490 MT |
2467 | } |
2468 | ||
035a61c3 TV |
2469 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2470 | const char *con_id) | |
0197b3ea | 2471 | { |
0197b3ea SK |
2472 | struct clk *clk; |
2473 | ||
035a61c3 | 2474 | /* This is to allow this function to be chained to others */ |
c1de1357 | 2475 | if (IS_ERR_OR_NULL(hw)) |
035a61c3 | 2476 | return (struct clk *) hw; |
0197b3ea | 2477 | |
035a61c3 TV |
2478 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2479 | if (!clk) | |
2480 | return ERR_PTR(-ENOMEM); | |
2481 | ||
2482 | clk->core = hw->core; | |
2483 | clk->dev_id = dev_id; | |
2484 | clk->con_id = con_id; | |
1c8e6004 TV |
2485 | clk->max_rate = ULONG_MAX; |
2486 | ||
2487 | clk_prepare_lock(); | |
50595f8b | 2488 | hlist_add_head(&clk->clks_node, &hw->core->clks); |
1c8e6004 | 2489 | clk_prepare_unlock(); |
0197b3ea SK |
2490 | |
2491 | return clk; | |
2492 | } | |
035a61c3 | 2493 | |
73e0e496 | 2494 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2495 | { |
2496 | clk_prepare_lock(); | |
50595f8b | 2497 | hlist_del(&clk->clks_node); |
1c8e6004 TV |
2498 | clk_prepare_unlock(); |
2499 | ||
2500 | kfree(clk); | |
2501 | } | |
0197b3ea | 2502 | |
293ba3b4 SB |
2503 | /** |
2504 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2505 | * @dev: device that is registering this clock | |
2506 | * @hw: link to hardware-specific clock data | |
2507 | * | |
2508 | * clk_register is the primary interface for populating the clock tree with new | |
2509 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
a59a5163 | 2510 | * cannot be dereferenced by driver code but may be used in conjunction with the |
293ba3b4 SB |
2511 | * rest of the clock API. In the event of an error clk_register will return an |
2512 | * error code; drivers must test for an error code after calling clk_register. | |
2513 | */ | |
2514 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2515 | { |
d1302a36 | 2516 | int i, ret; |
d6968fca | 2517 | struct clk_core *core; |
293ba3b4 | 2518 | |
d6968fca SB |
2519 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
2520 | if (!core) { | |
293ba3b4 SB |
2521 | ret = -ENOMEM; |
2522 | goto fail_out; | |
2523 | } | |
b2476490 | 2524 | |
d6968fca SB |
2525 | core->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
2526 | if (!core->name) { | |
0197b3ea SK |
2527 | ret = -ENOMEM; |
2528 | goto fail_name; | |
2529 | } | |
d6968fca | 2530 | core->ops = hw->init->ops; |
ac2df527 | 2531 | if (dev && dev->driver) |
d6968fca SB |
2532 | core->owner = dev->driver->owner; |
2533 | core->hw = hw; | |
2534 | core->flags = hw->init->flags; | |
2535 | core->num_parents = hw->init->num_parents; | |
9783c0d9 SB |
2536 | core->min_rate = 0; |
2537 | core->max_rate = ULONG_MAX; | |
d6968fca | 2538 | hw->core = core; |
b2476490 | 2539 | |
d1302a36 | 2540 | /* allocate local copy in case parent_names is __initdata */ |
d6968fca | 2541 | core->parent_names = kcalloc(core->num_parents, sizeof(char *), |
96a7ed90 | 2542 | GFP_KERNEL); |
d1302a36 | 2543 | |
d6968fca | 2544 | if (!core->parent_names) { |
d1302a36 MT |
2545 | ret = -ENOMEM; |
2546 | goto fail_parent_names; | |
2547 | } | |
2548 | ||
2549 | ||
2550 | /* copy each string name in case parent_names is __initdata */ | |
d6968fca SB |
2551 | for (i = 0; i < core->num_parents; i++) { |
2552 | core->parent_names[i] = kstrdup_const(hw->init->parent_names[i], | |
0197b3ea | 2553 | GFP_KERNEL); |
d6968fca | 2554 | if (!core->parent_names[i]) { |
d1302a36 MT |
2555 | ret = -ENOMEM; |
2556 | goto fail_parent_names_copy; | |
2557 | } | |
2558 | } | |
2559 | ||
176d1169 MY |
2560 | /* avoid unnecessary string look-ups of clk_core's possible parents. */ |
2561 | core->parents = kcalloc(core->num_parents, sizeof(*core->parents), | |
2562 | GFP_KERNEL); | |
2563 | if (!core->parents) { | |
2564 | ret = -ENOMEM; | |
2565 | goto fail_parents; | |
2566 | }; | |
2567 | ||
d6968fca | 2568 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 2569 | |
035a61c3 TV |
2570 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2571 | if (IS_ERR(hw->clk)) { | |
035a61c3 | 2572 | ret = PTR_ERR(hw->clk); |
176d1169 | 2573 | goto fail_parents; |
035a61c3 TV |
2574 | } |
2575 | ||
be45ebf2 | 2576 | ret = __clk_core_init(core); |
d1302a36 | 2577 | if (!ret) |
035a61c3 | 2578 | return hw->clk; |
b2476490 | 2579 | |
1c8e6004 | 2580 | __clk_free_clk(hw->clk); |
035a61c3 | 2581 | hw->clk = NULL; |
b2476490 | 2582 | |
176d1169 MY |
2583 | fail_parents: |
2584 | kfree(core->parents); | |
d1302a36 MT |
2585 | fail_parent_names_copy: |
2586 | while (--i >= 0) | |
d6968fca SB |
2587 | kfree_const(core->parent_names[i]); |
2588 | kfree(core->parent_names); | |
d1302a36 | 2589 | fail_parent_names: |
d6968fca | 2590 | kfree_const(core->name); |
0197b3ea | 2591 | fail_name: |
d6968fca | 2592 | kfree(core); |
d1302a36 MT |
2593 | fail_out: |
2594 | return ERR_PTR(ret); | |
b2476490 MT |
2595 | } |
2596 | EXPORT_SYMBOL_GPL(clk_register); | |
2597 | ||
4143804c SB |
2598 | /** |
2599 | * clk_hw_register - register a clk_hw and return an error code | |
2600 | * @dev: device that is registering this clock | |
2601 | * @hw: link to hardware-specific clock data | |
2602 | * | |
2603 | * clk_hw_register is the primary interface for populating the clock tree with | |
2604 | * new clock nodes. It returns an integer equal to zero indicating success or | |
2605 | * less than zero indicating failure. Drivers must test for an error code after | |
2606 | * calling clk_hw_register(). | |
2607 | */ | |
2608 | int clk_hw_register(struct device *dev, struct clk_hw *hw) | |
2609 | { | |
2610 | return PTR_ERR_OR_ZERO(clk_register(dev, hw)); | |
2611 | } | |
2612 | EXPORT_SYMBOL_GPL(clk_hw_register); | |
2613 | ||
6e5ab41b | 2614 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
2615 | static void __clk_release(struct kref *ref) |
2616 | { | |
d6968fca SB |
2617 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
2618 | int i = core->num_parents; | |
fcb0ee6a | 2619 | |
496eadf8 KK |
2620 | lockdep_assert_held(&prepare_lock); |
2621 | ||
d6968fca | 2622 | kfree(core->parents); |
fcb0ee6a | 2623 | while (--i >= 0) |
d6968fca | 2624 | kfree_const(core->parent_names[i]); |
fcb0ee6a | 2625 | |
d6968fca SB |
2626 | kfree(core->parent_names); |
2627 | kfree_const(core->name); | |
2628 | kfree(core); | |
fcb0ee6a SN |
2629 | } |
2630 | ||
2631 | /* | |
2632 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2633 | * after clk_unregister() was called on a clock and until last clock | |
2634 | * consumer calls clk_put() and the struct clk object is freed. | |
2635 | */ | |
2636 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2637 | { | |
2638 | return -ENXIO; | |
2639 | } | |
2640 | ||
2641 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2642 | { | |
2643 | WARN_ON_ONCE(1); | |
2644 | } | |
2645 | ||
2646 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2647 | unsigned long parent_rate) | |
2648 | { | |
2649 | return -ENXIO; | |
2650 | } | |
2651 | ||
2652 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2653 | { | |
2654 | return -ENXIO; | |
2655 | } | |
2656 | ||
2657 | static const struct clk_ops clk_nodrv_ops = { | |
2658 | .enable = clk_nodrv_prepare_enable, | |
2659 | .disable = clk_nodrv_disable_unprepare, | |
2660 | .prepare = clk_nodrv_prepare_enable, | |
2661 | .unprepare = clk_nodrv_disable_unprepare, | |
2662 | .set_rate = clk_nodrv_set_rate, | |
2663 | .set_parent = clk_nodrv_set_parent, | |
2664 | }; | |
2665 | ||
1df5c939 MB |
2666 | /** |
2667 | * clk_unregister - unregister a currently registered clock | |
2668 | * @clk: clock to unregister | |
1df5c939 | 2669 | */ |
fcb0ee6a SN |
2670 | void clk_unregister(struct clk *clk) |
2671 | { | |
2672 | unsigned long flags; | |
2673 | ||
6314b679 SB |
2674 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2675 | return; | |
2676 | ||
035a61c3 | 2677 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2678 | |
2679 | clk_prepare_lock(); | |
2680 | ||
035a61c3 TV |
2681 | if (clk->core->ops == &clk_nodrv_ops) { |
2682 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2683 | clk->core->name); | |
4106a3d9 | 2684 | goto unlock; |
fcb0ee6a SN |
2685 | } |
2686 | /* | |
2687 | * Assign empty clock ops for consumers that might still hold | |
2688 | * a reference to this clock. | |
2689 | */ | |
2690 | flags = clk_enable_lock(); | |
035a61c3 | 2691 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2692 | clk_enable_unlock(flags); |
2693 | ||
035a61c3 TV |
2694 | if (!hlist_empty(&clk->core->children)) { |
2695 | struct clk_core *child; | |
874f224c | 2696 | struct hlist_node *t; |
fcb0ee6a SN |
2697 | |
2698 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2699 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2700 | child_node) | |
2701 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2702 | } |
2703 | ||
035a61c3 | 2704 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2705 | |
035a61c3 | 2706 | if (clk->core->prepare_count) |
fcb0ee6a | 2707 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2708 | __func__, clk->core->name); |
2709 | kref_put(&clk->core->ref, __clk_release); | |
4106a3d9 | 2710 | unlock: |
fcb0ee6a SN |
2711 | clk_prepare_unlock(); |
2712 | } | |
1df5c939 MB |
2713 | EXPORT_SYMBOL_GPL(clk_unregister); |
2714 | ||
4143804c SB |
2715 | /** |
2716 | * clk_hw_unregister - unregister a currently registered clk_hw | |
2717 | * @hw: hardware-specific clock data to unregister | |
2718 | */ | |
2719 | void clk_hw_unregister(struct clk_hw *hw) | |
2720 | { | |
2721 | clk_unregister(hw->clk); | |
2722 | } | |
2723 | EXPORT_SYMBOL_GPL(clk_hw_unregister); | |
2724 | ||
46c8773a SB |
2725 | static void devm_clk_release(struct device *dev, void *res) |
2726 | { | |
293ba3b4 | 2727 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2728 | } |
2729 | ||
4143804c SB |
2730 | static void devm_clk_hw_release(struct device *dev, void *res) |
2731 | { | |
2732 | clk_hw_unregister(*(struct clk_hw **)res); | |
2733 | } | |
2734 | ||
46c8773a SB |
2735 | /** |
2736 | * devm_clk_register - resource managed clk_register() | |
2737 | * @dev: device that is registering this clock | |
2738 | * @hw: link to hardware-specific clock data | |
2739 | * | |
2740 | * Managed clk_register(). Clocks returned from this function are | |
2741 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2742 | * more information. | |
2743 | */ | |
2744 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2745 | { | |
2746 | struct clk *clk; | |
293ba3b4 | 2747 | struct clk **clkp; |
46c8773a | 2748 | |
293ba3b4 SB |
2749 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2750 | if (!clkp) | |
46c8773a SB |
2751 | return ERR_PTR(-ENOMEM); |
2752 | ||
293ba3b4 SB |
2753 | clk = clk_register(dev, hw); |
2754 | if (!IS_ERR(clk)) { | |
2755 | *clkp = clk; | |
2756 | devres_add(dev, clkp); | |
46c8773a | 2757 | } else { |
293ba3b4 | 2758 | devres_free(clkp); |
46c8773a SB |
2759 | } |
2760 | ||
2761 | return clk; | |
2762 | } | |
2763 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2764 | ||
4143804c SB |
2765 | /** |
2766 | * devm_clk_hw_register - resource managed clk_hw_register() | |
2767 | * @dev: device that is registering this clock | |
2768 | * @hw: link to hardware-specific clock data | |
2769 | * | |
c47265ad | 2770 | * Managed clk_hw_register(). Clocks registered by this function are |
4143804c SB |
2771 | * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register() |
2772 | * for more information. | |
2773 | */ | |
2774 | int devm_clk_hw_register(struct device *dev, struct clk_hw *hw) | |
2775 | { | |
2776 | struct clk_hw **hwp; | |
2777 | int ret; | |
2778 | ||
2779 | hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL); | |
2780 | if (!hwp) | |
2781 | return -ENOMEM; | |
2782 | ||
2783 | ret = clk_hw_register(dev, hw); | |
2784 | if (!ret) { | |
2785 | *hwp = hw; | |
2786 | devres_add(dev, hwp); | |
2787 | } else { | |
2788 | devres_free(hwp); | |
2789 | } | |
2790 | ||
2791 | return ret; | |
2792 | } | |
2793 | EXPORT_SYMBOL_GPL(devm_clk_hw_register); | |
2794 | ||
46c8773a SB |
2795 | static int devm_clk_match(struct device *dev, void *res, void *data) |
2796 | { | |
2797 | struct clk *c = res; | |
2798 | if (WARN_ON(!c)) | |
2799 | return 0; | |
2800 | return c == data; | |
2801 | } | |
2802 | ||
4143804c SB |
2803 | static int devm_clk_hw_match(struct device *dev, void *res, void *data) |
2804 | { | |
2805 | struct clk_hw *hw = res; | |
2806 | ||
2807 | if (WARN_ON(!hw)) | |
2808 | return 0; | |
2809 | return hw == data; | |
2810 | } | |
2811 | ||
46c8773a SB |
2812 | /** |
2813 | * devm_clk_unregister - resource managed clk_unregister() | |
2814 | * @clk: clock to unregister | |
2815 | * | |
2816 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2817 | * this function will not need to be called and the resource management | |
2818 | * code will ensure that the resource is freed. | |
2819 | */ | |
2820 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2821 | { | |
2822 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2823 | } | |
2824 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2825 | ||
4143804c SB |
2826 | /** |
2827 | * devm_clk_hw_unregister - resource managed clk_hw_unregister() | |
2828 | * @dev: device that is unregistering the hardware-specific clock data | |
2829 | * @hw: link to hardware-specific clock data | |
2830 | * | |
2831 | * Unregister a clk_hw registered with devm_clk_hw_register(). Normally | |
2832 | * this function will not need to be called and the resource management | |
2833 | * code will ensure that the resource is freed. | |
2834 | */ | |
2835 | void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw) | |
2836 | { | |
2837 | WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match, | |
2838 | hw)); | |
2839 | } | |
2840 | EXPORT_SYMBOL_GPL(devm_clk_hw_unregister); | |
2841 | ||
ac2df527 SN |
2842 | /* |
2843 | * clkdev helpers | |
2844 | */ | |
2845 | int __clk_get(struct clk *clk) | |
2846 | { | |
035a61c3 TV |
2847 | struct clk_core *core = !clk ? NULL : clk->core; |
2848 | ||
2849 | if (core) { | |
2850 | if (!try_module_get(core->owner)) | |
00efcb1c | 2851 | return 0; |
ac2df527 | 2852 | |
035a61c3 | 2853 | kref_get(&core->ref); |
00efcb1c | 2854 | } |
ac2df527 SN |
2855 | return 1; |
2856 | } | |
2857 | ||
2858 | void __clk_put(struct clk *clk) | |
2859 | { | |
10cdfe54 TV |
2860 | struct module *owner; |
2861 | ||
00efcb1c | 2862 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2863 | return; |
2864 | ||
fcb0ee6a | 2865 | clk_prepare_lock(); |
1c8e6004 | 2866 | |
50595f8b | 2867 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
2868 | if (clk->min_rate > clk->core->req_rate || |
2869 | clk->max_rate < clk->core->req_rate) | |
2870 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2871 | ||
1c8e6004 TV |
2872 | owner = clk->core->owner; |
2873 | kref_put(&clk->core->ref, __clk_release); | |
2874 | ||
fcb0ee6a SN |
2875 | clk_prepare_unlock(); |
2876 | ||
10cdfe54 | 2877 | module_put(owner); |
035a61c3 | 2878 | |
035a61c3 | 2879 | kfree(clk); |
ac2df527 SN |
2880 | } |
2881 | ||
b2476490 MT |
2882 | /*** clk rate change notifiers ***/ |
2883 | ||
2884 | /** | |
2885 | * clk_notifier_register - add a clk rate change notifier | |
2886 | * @clk: struct clk * to watch | |
2887 | * @nb: struct notifier_block * with callback info | |
2888 | * | |
2889 | * Request notification when clk's rate changes. This uses an SRCU | |
2890 | * notifier because we want it to block and notifier unregistrations are | |
2891 | * uncommon. The callbacks associated with the notifier must not | |
2892 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2893 | * this will cause a nested prepare_lock mutex. | |
2894 | * | |
198bb594 MY |
2895 | * In all notification cases (pre, post and abort rate change) the original |
2896 | * clock rate is passed to the callback via struct clk_notifier_data.old_rate | |
2897 | * and the new frequency is passed via struct clk_notifier_data.new_rate. | |
b2476490 | 2898 | * |
b2476490 MT |
2899 | * clk_notifier_register() must be called from non-atomic context. |
2900 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2901 | * allocation failure; otherwise, passes along the return value of | |
2902 | * srcu_notifier_chain_register(). | |
2903 | */ | |
2904 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2905 | { | |
2906 | struct clk_notifier *cn; | |
2907 | int ret = -ENOMEM; | |
2908 | ||
2909 | if (!clk || !nb) | |
2910 | return -EINVAL; | |
2911 | ||
eab89f69 | 2912 | clk_prepare_lock(); |
b2476490 MT |
2913 | |
2914 | /* search the list of notifiers for this clk */ | |
2915 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2916 | if (cn->clk == clk) | |
2917 | break; | |
2918 | ||
2919 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2920 | if (cn->clk != clk) { | |
2921 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2922 | if (!cn) | |
2923 | goto out; | |
2924 | ||
2925 | cn->clk = clk; | |
2926 | srcu_init_notifier_head(&cn->notifier_head); | |
2927 | ||
2928 | list_add(&cn->node, &clk_notifier_list); | |
2929 | } | |
2930 | ||
2931 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2932 | ||
035a61c3 | 2933 | clk->core->notifier_count++; |
b2476490 MT |
2934 | |
2935 | out: | |
eab89f69 | 2936 | clk_prepare_unlock(); |
b2476490 MT |
2937 | |
2938 | return ret; | |
2939 | } | |
2940 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2941 | ||
2942 | /** | |
2943 | * clk_notifier_unregister - remove a clk rate change notifier | |
2944 | * @clk: struct clk * | |
2945 | * @nb: struct notifier_block * with callback info | |
2946 | * | |
2947 | * Request no further notification for changes to 'clk' and frees memory | |
2948 | * allocated in clk_notifier_register. | |
2949 | * | |
2950 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2951 | * along the return value of srcu_notifier_chain_unregister(). | |
2952 | */ | |
2953 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2954 | { | |
2955 | struct clk_notifier *cn = NULL; | |
2956 | int ret = -EINVAL; | |
2957 | ||
2958 | if (!clk || !nb) | |
2959 | return -EINVAL; | |
2960 | ||
eab89f69 | 2961 | clk_prepare_lock(); |
b2476490 MT |
2962 | |
2963 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2964 | if (cn->clk == clk) | |
2965 | break; | |
2966 | ||
2967 | if (cn->clk == clk) { | |
2968 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2969 | ||
035a61c3 | 2970 | clk->core->notifier_count--; |
b2476490 MT |
2971 | |
2972 | /* XXX the notifier code should handle this better */ | |
2973 | if (!cn->notifier_head.head) { | |
2974 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2975 | list_del(&cn->node); |
b2476490 MT |
2976 | kfree(cn); |
2977 | } | |
2978 | ||
2979 | } else { | |
2980 | ret = -ENOENT; | |
2981 | } | |
2982 | ||
eab89f69 | 2983 | clk_prepare_unlock(); |
b2476490 MT |
2984 | |
2985 | return ret; | |
2986 | } | |
2987 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2988 | |
2989 | #ifdef CONFIG_OF | |
2990 | /** | |
2991 | * struct of_clk_provider - Clock provider registration structure | |
2992 | * @link: Entry in global list of clock providers | |
2993 | * @node: Pointer to device tree node of clock provider | |
2994 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2995 | * given clock specifier | |
2996 | * @data: context pointer to be passed into @get callback | |
2997 | */ | |
2998 | struct of_clk_provider { | |
2999 | struct list_head link; | |
3000 | ||
3001 | struct device_node *node; | |
3002 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
0861e5b8 | 3003 | struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data); |
766e6a4e GL |
3004 | void *data; |
3005 | }; | |
3006 | ||
f2f6c255 PG |
3007 | static const struct of_device_id __clk_of_table_sentinel |
3008 | __used __section(__clk_of_table_end); | |
3009 | ||
766e6a4e | 3010 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
3011 | static DEFINE_MUTEX(of_clk_mutex); |
3012 | ||
766e6a4e GL |
3013 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
3014 | void *data) | |
3015 | { | |
3016 | return data; | |
3017 | } | |
3018 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
3019 | ||
0861e5b8 SB |
3020 | struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data) |
3021 | { | |
3022 | return data; | |
3023 | } | |
3024 | EXPORT_SYMBOL_GPL(of_clk_hw_simple_get); | |
3025 | ||
494bfec9 SG |
3026 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
3027 | { | |
3028 | struct clk_onecell_data *clk_data = data; | |
3029 | unsigned int idx = clkspec->args[0]; | |
3030 | ||
3031 | if (idx >= clk_data->clk_num) { | |
7e96353c | 3032 | pr_err("%s: invalid clock index %u\n", __func__, idx); |
494bfec9 SG |
3033 | return ERR_PTR(-EINVAL); |
3034 | } | |
3035 | ||
3036 | return clk_data->clks[idx]; | |
3037 | } | |
3038 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
3039 | ||
0861e5b8 SB |
3040 | struct clk_hw * |
3041 | of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data) | |
3042 | { | |
3043 | struct clk_hw_onecell_data *hw_data = data; | |
3044 | unsigned int idx = clkspec->args[0]; | |
3045 | ||
3046 | if (idx >= hw_data->num) { | |
3047 | pr_err("%s: invalid index %u\n", __func__, idx); | |
3048 | return ERR_PTR(-EINVAL); | |
3049 | } | |
3050 | ||
3051 | return hw_data->hws[idx]; | |
3052 | } | |
3053 | EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get); | |
3054 | ||
766e6a4e GL |
3055 | /** |
3056 | * of_clk_add_provider() - Register a clock provider for a node | |
3057 | * @np: Device node pointer associated with clock provider | |
3058 | * @clk_src_get: callback for decoding clock | |
3059 | * @data: context pointer for @clk_src_get callback. | |
3060 | */ | |
3061 | int of_clk_add_provider(struct device_node *np, | |
3062 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
3063 | void *data), | |
3064 | void *data) | |
3065 | { | |
3066 | struct of_clk_provider *cp; | |
86be408b | 3067 | int ret; |
766e6a4e GL |
3068 | |
3069 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
3070 | if (!cp) | |
3071 | return -ENOMEM; | |
3072 | ||
3073 | cp->node = of_node_get(np); | |
3074 | cp->data = data; | |
3075 | cp->get = clk_src_get; | |
3076 | ||
d6782c26 | 3077 | mutex_lock(&of_clk_mutex); |
766e6a4e | 3078 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 3079 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
3080 | pr_debug("Added clock from %s\n", np->full_name); |
3081 | ||
86be408b SN |
3082 | ret = of_clk_set_defaults(np, true); |
3083 | if (ret < 0) | |
3084 | of_clk_del_provider(np); | |
3085 | ||
3086 | return ret; | |
766e6a4e GL |
3087 | } |
3088 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
3089 | ||
0861e5b8 SB |
3090 | /** |
3091 | * of_clk_add_hw_provider() - Register a clock provider for a node | |
3092 | * @np: Device node pointer associated with clock provider | |
3093 | * @get: callback for decoding clk_hw | |
3094 | * @data: context pointer for @get callback. | |
3095 | */ | |
3096 | int of_clk_add_hw_provider(struct device_node *np, | |
3097 | struct clk_hw *(*get)(struct of_phandle_args *clkspec, | |
3098 | void *data), | |
3099 | void *data) | |
3100 | { | |
3101 | struct of_clk_provider *cp; | |
3102 | int ret; | |
3103 | ||
3104 | cp = kzalloc(sizeof(*cp), GFP_KERNEL); | |
3105 | if (!cp) | |
3106 | return -ENOMEM; | |
3107 | ||
3108 | cp->node = of_node_get(np); | |
3109 | cp->data = data; | |
3110 | cp->get_hw = get; | |
3111 | ||
3112 | mutex_lock(&of_clk_mutex); | |
3113 | list_add(&cp->link, &of_clk_providers); | |
3114 | mutex_unlock(&of_clk_mutex); | |
3115 | pr_debug("Added clk_hw provider from %s\n", np->full_name); | |
3116 | ||
3117 | ret = of_clk_set_defaults(np, true); | |
3118 | if (ret < 0) | |
3119 | of_clk_del_provider(np); | |
3120 | ||
3121 | return ret; | |
3122 | } | |
3123 | EXPORT_SYMBOL_GPL(of_clk_add_hw_provider); | |
3124 | ||
766e6a4e GL |
3125 | /** |
3126 | * of_clk_del_provider() - Remove a previously registered clock provider | |
3127 | * @np: Device node pointer associated with clock provider | |
3128 | */ | |
3129 | void of_clk_del_provider(struct device_node *np) | |
3130 | { | |
3131 | struct of_clk_provider *cp; | |
3132 | ||
d6782c26 | 3133 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
3134 | list_for_each_entry(cp, &of_clk_providers, link) { |
3135 | if (cp->node == np) { | |
3136 | list_del(&cp->link); | |
3137 | of_node_put(cp->node); | |
3138 | kfree(cp); | |
3139 | break; | |
3140 | } | |
3141 | } | |
d6782c26 | 3142 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
3143 | } |
3144 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
3145 | ||
0861e5b8 SB |
3146 | static struct clk_hw * |
3147 | __of_clk_get_hw_from_provider(struct of_clk_provider *provider, | |
3148 | struct of_phandle_args *clkspec) | |
3149 | { | |
3150 | struct clk *clk; | |
3151 | struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); | |
3152 | ||
3153 | if (provider->get_hw) { | |
3154 | hw = provider->get_hw(clkspec, provider->data); | |
3155 | } else if (provider->get) { | |
3156 | clk = provider->get(clkspec, provider->data); | |
3157 | if (!IS_ERR(clk)) | |
3158 | hw = __clk_get_hw(clk); | |
3159 | else | |
3160 | hw = ERR_CAST(clk); | |
3161 | } | |
3162 | ||
3163 | return hw; | |
3164 | } | |
3165 | ||
73e0e496 SB |
3166 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
3167 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
3168 | { |
3169 | struct of_clk_provider *provider; | |
a34cd466 | 3170 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
0861e5b8 | 3171 | struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 3172 | |
306c342f SB |
3173 | if (!clkspec) |
3174 | return ERR_PTR(-EINVAL); | |
3175 | ||
766e6a4e | 3176 | /* Check if we have such a provider in our array */ |
306c342f | 3177 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
3178 | list_for_each_entry(provider, &of_clk_providers, link) { |
3179 | if (provider->node == clkspec->np) | |
0861e5b8 SB |
3180 | hw = __of_clk_get_hw_from_provider(provider, clkspec); |
3181 | if (!IS_ERR(hw)) { | |
3182 | clk = __clk_create_clk(hw, dev_id, con_id); | |
73e0e496 SB |
3183 | |
3184 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
3185 | __clk_free_clk(clk); | |
3186 | clk = ERR_PTR(-ENOENT); | |
3187 | } | |
3188 | ||
766e6a4e | 3189 | break; |
73e0e496 | 3190 | } |
766e6a4e | 3191 | } |
306c342f | 3192 | mutex_unlock(&of_clk_mutex); |
d6782c26 SN |
3193 | |
3194 | return clk; | |
3195 | } | |
3196 | ||
306c342f SB |
3197 | /** |
3198 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
3199 | * @clkspec: pointer to a clock specifier data structure | |
3200 | * | |
3201 | * This function looks up a struct clk from the registered list of clock | |
3202 | * providers, an input is a clock specifier data structure as returned | |
3203 | * from the of_parse_phandle_with_args() function call. | |
3204 | */ | |
d6782c26 SN |
3205 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
3206 | { | |
306c342f | 3207 | return __of_clk_get_from_provider(clkspec, NULL, __func__); |
766e6a4e | 3208 | } |
fb4dd222 | 3209 | EXPORT_SYMBOL_GPL(of_clk_get_from_provider); |
766e6a4e | 3210 | |
929e7f3b SB |
3211 | /** |
3212 | * of_clk_get_parent_count() - Count the number of clocks a device node has | |
3213 | * @np: device node to count | |
3214 | * | |
3215 | * Returns: The number of clocks that are possible parents of this node | |
3216 | */ | |
3217 | unsigned int of_clk_get_parent_count(struct device_node *np) | |
f6102742 | 3218 | { |
929e7f3b SB |
3219 | int count; |
3220 | ||
3221 | count = of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
3222 | if (count < 0) | |
3223 | return 0; | |
3224 | ||
3225 | return count; | |
f6102742 MT |
3226 | } |
3227 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
3228 | ||
766e6a4e GL |
3229 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
3230 | { | |
3231 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 3232 | struct property *prop; |
766e6a4e | 3233 | const char *clk_name; |
7a0fc1a3 BD |
3234 | const __be32 *vp; |
3235 | u32 pv; | |
766e6a4e | 3236 | int rc; |
7a0fc1a3 | 3237 | int count; |
0a4807c2 | 3238 | struct clk *clk; |
766e6a4e | 3239 | |
766e6a4e GL |
3240 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, |
3241 | &clkspec); | |
3242 | if (rc) | |
3243 | return NULL; | |
3244 | ||
7a0fc1a3 BD |
3245 | index = clkspec.args_count ? clkspec.args[0] : 0; |
3246 | count = 0; | |
3247 | ||
3248 | /* if there is an indices property, use it to transfer the index | |
3249 | * specified into an array offset for the clock-output-names property. | |
3250 | */ | |
3251 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
3252 | if (index == pv) { | |
3253 | index = count; | |
3254 | break; | |
3255 | } | |
3256 | count++; | |
3257 | } | |
8da411cc MY |
3258 | /* We went off the end of 'clock-indices' without finding it */ |
3259 | if (prop && !vp) | |
3260 | return NULL; | |
7a0fc1a3 | 3261 | |
766e6a4e | 3262 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3263 | index, |
0a4807c2 SB |
3264 | &clk_name) < 0) { |
3265 | /* | |
3266 | * Best effort to get the name if the clock has been | |
3267 | * registered with the framework. If the clock isn't | |
3268 | * registered, we return the node name as the name of | |
3269 | * the clock as long as #clock-cells = 0. | |
3270 | */ | |
3271 | clk = of_clk_get_from_provider(&clkspec); | |
3272 | if (IS_ERR(clk)) { | |
3273 | if (clkspec.args_count == 0) | |
3274 | clk_name = clkspec.np->name; | |
3275 | else | |
3276 | clk_name = NULL; | |
3277 | } else { | |
3278 | clk_name = __clk_get_name(clk); | |
3279 | clk_put(clk); | |
3280 | } | |
3281 | } | |
3282 | ||
766e6a4e GL |
3283 | |
3284 | of_node_put(clkspec.np); | |
3285 | return clk_name; | |
3286 | } | |
3287 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3288 | ||
2e61dfb3 DN |
3289 | /** |
3290 | * of_clk_parent_fill() - Fill @parents with names of @np's parents and return | |
3291 | * number of parents | |
3292 | * @np: Device node pointer associated with clock provider | |
3293 | * @parents: pointer to char array that hold the parents' names | |
3294 | * @size: size of the @parents array | |
3295 | * | |
3296 | * Return: number of parents for the clock node. | |
3297 | */ | |
3298 | int of_clk_parent_fill(struct device_node *np, const char **parents, | |
3299 | unsigned int size) | |
3300 | { | |
3301 | unsigned int i = 0; | |
3302 | ||
3303 | while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) | |
3304 | i++; | |
3305 | ||
3306 | return i; | |
3307 | } | |
3308 | EXPORT_SYMBOL_GPL(of_clk_parent_fill); | |
3309 | ||
1771b10d GC |
3310 | struct clock_provider { |
3311 | of_clk_init_cb_t clk_init_cb; | |
3312 | struct device_node *np; | |
3313 | struct list_head node; | |
3314 | }; | |
3315 | ||
1771b10d GC |
3316 | /* |
3317 | * This function looks for a parent clock. If there is one, then it | |
3318 | * checks that the provider for this parent clock was initialized, in | |
3319 | * this case the parent clock will be ready. | |
3320 | */ | |
3321 | static int parent_ready(struct device_node *np) | |
3322 | { | |
3323 | int i = 0; | |
3324 | ||
3325 | while (true) { | |
3326 | struct clk *clk = of_clk_get(np, i); | |
3327 | ||
3328 | /* this parent is ready we can check the next one */ | |
3329 | if (!IS_ERR(clk)) { | |
3330 | clk_put(clk); | |
3331 | i++; | |
3332 | continue; | |
3333 | } | |
3334 | ||
3335 | /* at least one parent is not ready, we exit now */ | |
3336 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3337 | return 0; | |
3338 | ||
3339 | /* | |
3340 | * Here we make assumption that the device tree is | |
3341 | * written correctly. So an error means that there is | |
3342 | * no more parent. As we didn't exit yet, then the | |
3343 | * previous parent are ready. If there is no clock | |
3344 | * parent, no need to wait for them, then we can | |
3345 | * consider their absence as being ready | |
3346 | */ | |
3347 | return 1; | |
3348 | } | |
3349 | } | |
3350 | ||
d56f8994 LJ |
3351 | /** |
3352 | * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree | |
3353 | * @np: Device node pointer associated with clock provider | |
3354 | * @index: clock index | |
3355 | * @flags: pointer to clk_core->flags | |
3356 | * | |
3357 | * Detects if the clock-critical property exists and, if so, sets the | |
3358 | * corresponding CLK_IS_CRITICAL flag. | |
3359 | * | |
3360 | * Do not use this function. It exists only for legacy Device Tree | |
3361 | * bindings, such as the one-clock-per-node style that are outdated. | |
3362 | * Those bindings typically put all clock data into .dts and the Linux | |
3363 | * driver has no clock data, thus making it impossible to set this flag | |
3364 | * correctly from the driver. Only those drivers may call | |
3365 | * of_clk_detect_critical from their setup functions. | |
3366 | * | |
3367 | * Return: error code or zero on success | |
3368 | */ | |
3369 | int of_clk_detect_critical(struct device_node *np, | |
3370 | int index, unsigned long *flags) | |
3371 | { | |
3372 | struct property *prop; | |
3373 | const __be32 *cur; | |
3374 | uint32_t idx; | |
3375 | ||
3376 | if (!np || !flags) | |
3377 | return -EINVAL; | |
3378 | ||
3379 | of_property_for_each_u32(np, "clock-critical", prop, cur, idx) | |
3380 | if (index == idx) | |
3381 | *flags |= CLK_IS_CRITICAL; | |
3382 | ||
3383 | return 0; | |
3384 | } | |
3385 | ||
766e6a4e GL |
3386 | /** |
3387 | * of_clk_init() - Scan and init clock providers from the DT | |
3388 | * @matches: array of compatible values and init functions for providers. | |
3389 | * | |
1771b10d | 3390 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3391 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3392 | * to follow the dependencies. |
766e6a4e GL |
3393 | */ |
3394 | void __init of_clk_init(const struct of_device_id *matches) | |
3395 | { | |
7f7ed584 | 3396 | const struct of_device_id *match; |
766e6a4e | 3397 | struct device_node *np; |
1771b10d GC |
3398 | struct clock_provider *clk_provider, *next; |
3399 | bool is_init_done; | |
3400 | bool force = false; | |
2573a02a | 3401 | LIST_HEAD(clk_provider_list); |
766e6a4e | 3402 | |
f2f6c255 | 3403 | if (!matches) |
819b4861 | 3404 | matches = &__clk_of_table; |
f2f6c255 | 3405 | |
1771b10d | 3406 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3407 | for_each_matching_node_and_match(np, matches, &match) { |
2e3b19f1 SB |
3408 | struct clock_provider *parent; |
3409 | ||
3e5dd6f6 GU |
3410 | if (!of_device_is_available(np)) |
3411 | continue; | |
3412 | ||
2e3b19f1 SB |
3413 | parent = kzalloc(sizeof(*parent), GFP_KERNEL); |
3414 | if (!parent) { | |
3415 | list_for_each_entry_safe(clk_provider, next, | |
3416 | &clk_provider_list, node) { | |
3417 | list_del(&clk_provider->node); | |
6bc9d9d6 | 3418 | of_node_put(clk_provider->np); |
2e3b19f1 SB |
3419 | kfree(clk_provider); |
3420 | } | |
6bc9d9d6 | 3421 | of_node_put(np); |
2e3b19f1 SB |
3422 | return; |
3423 | } | |
1771b10d GC |
3424 | |
3425 | parent->clk_init_cb = match->data; | |
6bc9d9d6 | 3426 | parent->np = of_node_get(np); |
3f6d439f | 3427 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3428 | } |
3429 | ||
3430 | while (!list_empty(&clk_provider_list)) { | |
3431 | is_init_done = false; | |
3432 | list_for_each_entry_safe(clk_provider, next, | |
3433 | &clk_provider_list, node) { | |
3434 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3435 | |
1771b10d | 3436 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3437 | of_clk_set_defaults(clk_provider->np, true); |
3438 | ||
1771b10d | 3439 | list_del(&clk_provider->node); |
6bc9d9d6 | 3440 | of_node_put(clk_provider->np); |
1771b10d GC |
3441 | kfree(clk_provider); |
3442 | is_init_done = true; | |
3443 | } | |
3444 | } | |
3445 | ||
3446 | /* | |
e5ca8fb4 | 3447 | * We didn't manage to initialize any of the |
1771b10d GC |
3448 | * remaining providers during the last loop, so now we |
3449 | * initialize all the remaining ones unconditionally | |
3450 | * in case the clock parent was not mandatory | |
3451 | */ | |
3452 | if (!is_init_done) | |
3453 | force = true; | |
766e6a4e GL |
3454 | } |
3455 | } | |
3456 | #endif |