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Merge tag 'for-v3.19-exynos-clk-2' of git://linuxtv.org/snawrocki/samsung into clk...
[mirror_ubuntu-bionic-kernel.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
12#include <linux/clk-private.h>
86be408b 13#include <linux/clk/clk-conf.h>
b2476490
MT
14#include <linux/module.h>
15#include <linux/mutex.h>
16#include <linux/spinlock.h>
17#include <linux/err.h>
18#include <linux/list.h>
19#include <linux/slab.h>
766e6a4e 20#include <linux/of.h>
46c8773a 21#include <linux/device.h>
f2f6c255 22#include <linux/init.h>
533ddeb1 23#include <linux/sched.h>
b2476490 24
d6782c26
SN
25#include "clk.h"
26
b2476490
MT
27static DEFINE_SPINLOCK(enable_lock);
28static DEFINE_MUTEX(prepare_lock);
29
533ddeb1
MT
30static struct task_struct *prepare_owner;
31static struct task_struct *enable_owner;
32
33static int prepare_refcnt;
34static int enable_refcnt;
35
b2476490
MT
36static HLIST_HEAD(clk_root_list);
37static HLIST_HEAD(clk_orphan_list);
38static LIST_HEAD(clk_notifier_list);
39
eab89f69
MT
40/*** locking ***/
41static void clk_prepare_lock(void)
42{
533ddeb1
MT
43 if (!mutex_trylock(&prepare_lock)) {
44 if (prepare_owner == current) {
45 prepare_refcnt++;
46 return;
47 }
48 mutex_lock(&prepare_lock);
49 }
50 WARN_ON_ONCE(prepare_owner != NULL);
51 WARN_ON_ONCE(prepare_refcnt != 0);
52 prepare_owner = current;
53 prepare_refcnt = 1;
eab89f69
MT
54}
55
56static void clk_prepare_unlock(void)
57{
533ddeb1
MT
58 WARN_ON_ONCE(prepare_owner != current);
59 WARN_ON_ONCE(prepare_refcnt == 0);
60
61 if (--prepare_refcnt)
62 return;
63 prepare_owner = NULL;
eab89f69
MT
64 mutex_unlock(&prepare_lock);
65}
66
67static unsigned long clk_enable_lock(void)
68{
69 unsigned long flags;
533ddeb1
MT
70
71 if (!spin_trylock_irqsave(&enable_lock, flags)) {
72 if (enable_owner == current) {
73 enable_refcnt++;
74 return flags;
75 }
76 spin_lock_irqsave(&enable_lock, flags);
77 }
78 WARN_ON_ONCE(enable_owner != NULL);
79 WARN_ON_ONCE(enable_refcnt != 0);
80 enable_owner = current;
81 enable_refcnt = 1;
eab89f69
MT
82 return flags;
83}
84
85static void clk_enable_unlock(unsigned long flags)
86{
533ddeb1
MT
87 WARN_ON_ONCE(enable_owner != current);
88 WARN_ON_ONCE(enable_refcnt == 0);
89
90 if (--enable_refcnt)
91 return;
92 enable_owner = NULL;
eab89f69
MT
93 spin_unlock_irqrestore(&enable_lock, flags);
94}
95
b2476490
MT
96/*** debugfs support ***/
97
ea72dc2c 98#ifdef CONFIG_DEBUG_FS
b2476490
MT
99#include <linux/debugfs.h>
100
101static struct dentry *rootdir;
b2476490 102static int inited = 0;
6314b679
SB
103static DEFINE_MUTEX(clk_debug_lock);
104static HLIST_HEAD(clk_debug_list);
b2476490 105
6b44c854
SK
106static struct hlist_head *all_lists[] = {
107 &clk_root_list,
108 &clk_orphan_list,
109 NULL,
110};
111
112static struct hlist_head *orphan_list[] = {
113 &clk_orphan_list,
114 NULL,
115};
116
1af599df
PG
117static void clk_summary_show_one(struct seq_file *s, struct clk *c, int level)
118{
119 if (!c)
120 return;
121
e59c5371 122 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1af599df
PG
123 level * 3 + 1, "",
124 30 - level * 3, c->name,
5279fc40 125 c->enable_count, c->prepare_count, clk_get_rate(c),
e59c5371 126 clk_get_accuracy(c), clk_get_phase(c));
1af599df
PG
127}
128
129static void clk_summary_show_subtree(struct seq_file *s, struct clk *c,
130 int level)
131{
132 struct clk *child;
1af599df
PG
133
134 if (!c)
135 return;
136
137 clk_summary_show_one(s, c, level);
138
b67bfe0d 139 hlist_for_each_entry(child, &c->children, child_node)
1af599df
PG
140 clk_summary_show_subtree(s, child, level + 1);
141}
142
143static int clk_summary_show(struct seq_file *s, void *data)
144{
145 struct clk *c;
27b8d5f7 146 struct hlist_head **lists = (struct hlist_head **)s->private;
1af599df 147
e59c5371
MT
148 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
149 seq_puts(s, "----------------------------------------------------------------------------------------\n");
1af599df 150
eab89f69 151 clk_prepare_lock();
1af599df 152
27b8d5f7
PDS
153 for (; *lists; lists++)
154 hlist_for_each_entry(c, *lists, child_node)
155 clk_summary_show_subtree(s, c, 0);
1af599df 156
eab89f69 157 clk_prepare_unlock();
1af599df
PG
158
159 return 0;
160}
161
162
163static int clk_summary_open(struct inode *inode, struct file *file)
164{
165 return single_open(file, clk_summary_show, inode->i_private);
166}
167
168static const struct file_operations clk_summary_fops = {
169 .open = clk_summary_open,
170 .read = seq_read,
171 .llseek = seq_lseek,
172 .release = single_release,
173};
174
bddca894
PG
175static void clk_dump_one(struct seq_file *s, struct clk *c, int level)
176{
177 if (!c)
178 return;
179
180 seq_printf(s, "\"%s\": { ", c->name);
181 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
182 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
670decdd 183 seq_printf(s, "\"rate\": %lu", clk_get_rate(c));
5279fc40 184 seq_printf(s, "\"accuracy\": %lu", clk_get_accuracy(c));
e59c5371 185 seq_printf(s, "\"phase\": %d", clk_get_phase(c));
bddca894
PG
186}
187
188static void clk_dump_subtree(struct seq_file *s, struct clk *c, int level)
189{
190 struct clk *child;
bddca894
PG
191
192 if (!c)
193 return;
194
195 clk_dump_one(s, c, level);
196
b67bfe0d 197 hlist_for_each_entry(child, &c->children, child_node) {
bddca894
PG
198 seq_printf(s, ",");
199 clk_dump_subtree(s, child, level + 1);
200 }
201
202 seq_printf(s, "}");
203}
204
205static int clk_dump(struct seq_file *s, void *data)
206{
207 struct clk *c;
bddca894 208 bool first_node = true;
27b8d5f7 209 struct hlist_head **lists = (struct hlist_head **)s->private;
bddca894
PG
210
211 seq_printf(s, "{");
212
eab89f69 213 clk_prepare_lock();
bddca894 214
27b8d5f7
PDS
215 for (; *lists; lists++) {
216 hlist_for_each_entry(c, *lists, child_node) {
217 if (!first_node)
218 seq_puts(s, ",");
219 first_node = false;
220 clk_dump_subtree(s, c, 0);
221 }
bddca894
PG
222 }
223
eab89f69 224 clk_prepare_unlock();
bddca894
PG
225
226 seq_printf(s, "}");
227 return 0;
228}
229
230
231static int clk_dump_open(struct inode *inode, struct file *file)
232{
233 return single_open(file, clk_dump, inode->i_private);
234}
235
236static const struct file_operations clk_dump_fops = {
237 .open = clk_dump_open,
238 .read = seq_read,
239 .llseek = seq_lseek,
240 .release = single_release,
241};
242
b2476490
MT
243/* caller must hold prepare_lock */
244static int clk_debug_create_one(struct clk *clk, struct dentry *pdentry)
245{
246 struct dentry *d;
247 int ret = -ENOMEM;
248
249 if (!clk || !pdentry) {
250 ret = -EINVAL;
251 goto out;
252 }
253
254 d = debugfs_create_dir(clk->name, pdentry);
255 if (!d)
256 goto out;
257
258 clk->dentry = d;
259
260 d = debugfs_create_u32("clk_rate", S_IRUGO, clk->dentry,
261 (u32 *)&clk->rate);
262 if (!d)
263 goto err_out;
264
5279fc40
BB
265 d = debugfs_create_u32("clk_accuracy", S_IRUGO, clk->dentry,
266 (u32 *)&clk->accuracy);
267 if (!d)
268 goto err_out;
269
e59c5371
MT
270 d = debugfs_create_u32("clk_phase", S_IRUGO, clk->dentry,
271 (u32 *)&clk->phase);
272 if (!d)
273 goto err_out;
274
b2476490
MT
275 d = debugfs_create_x32("clk_flags", S_IRUGO, clk->dentry,
276 (u32 *)&clk->flags);
277 if (!d)
278 goto err_out;
279
280 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, clk->dentry,
281 (u32 *)&clk->prepare_count);
282 if (!d)
283 goto err_out;
284
285 d = debugfs_create_u32("clk_enable_count", S_IRUGO, clk->dentry,
286 (u32 *)&clk->enable_count);
287 if (!d)
288 goto err_out;
289
290 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, clk->dentry,
291 (u32 *)&clk->notifier_count);
292 if (!d)
293 goto err_out;
294
abeab450
CB
295 if (clk->ops->debug_init) {
296 ret = clk->ops->debug_init(clk->hw, clk->dentry);
297 if (ret)
c646cbf1 298 goto err_out;
abeab450 299 }
c646cbf1 300
b2476490
MT
301 ret = 0;
302 goto out;
303
304err_out:
b5f98e65
AE
305 debugfs_remove_recursive(clk->dentry);
306 clk->dentry = NULL;
b2476490
MT
307out:
308 return ret;
309}
310
b2476490
MT
311/**
312 * clk_debug_register - add a clk node to the debugfs clk tree
313 * @clk: the clk being added to the debugfs clk tree
314 *
315 * Dynamically adds a clk to the debugfs clk tree if debugfs has been
316 * initialized. Otherwise it bails out early since the debugfs clk tree
317 * will be created lazily by clk_debug_init as part of a late_initcall.
b2476490
MT
318 */
319static int clk_debug_register(struct clk *clk)
320{
b2476490
MT
321 int ret = 0;
322
6314b679
SB
323 mutex_lock(&clk_debug_lock);
324 hlist_add_head(&clk->debug_node, &clk_debug_list);
325
b2476490 326 if (!inited)
6314b679 327 goto unlock;
b2476490 328
6314b679
SB
329 ret = clk_debug_create_one(clk, rootdir);
330unlock:
331 mutex_unlock(&clk_debug_lock);
b2476490 332
b2476490
MT
333 return ret;
334}
335
fcb0ee6a
SN
336 /**
337 * clk_debug_unregister - remove a clk node from the debugfs clk tree
338 * @clk: the clk being removed from the debugfs clk tree
339 *
340 * Dynamically removes a clk and all it's children clk nodes from the
341 * debugfs clk tree if clk->dentry points to debugfs created by
342 * clk_debug_register in __clk_init.
fcb0ee6a
SN
343 */
344static void clk_debug_unregister(struct clk *clk)
345{
6314b679
SB
346 mutex_lock(&clk_debug_lock);
347 if (!clk->dentry)
348 goto out;
349
350 hlist_del_init(&clk->debug_node);
fcb0ee6a 351 debugfs_remove_recursive(clk->dentry);
6314b679
SB
352 clk->dentry = NULL;
353out:
354 mutex_unlock(&clk_debug_lock);
fcb0ee6a
SN
355}
356
61c7cddf 357struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
fb2b3c9f
PDS
358 void *data, const struct file_operations *fops)
359{
360 struct dentry *d = NULL;
361
61c7cddf
TV
362 if (hw->clk->dentry)
363 d = debugfs_create_file(name, mode, hw->clk->dentry, data, fops);
fb2b3c9f
PDS
364
365 return d;
366}
367EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
368
b2476490
MT
369/**
370 * clk_debug_init - lazily create the debugfs clk tree visualization
371 *
372 * clks are often initialized very early during boot before memory can
373 * be dynamically allocated and well before debugfs is setup.
374 * clk_debug_init walks the clk tree hierarchy while holding
375 * prepare_lock and creates the topology as part of a late_initcall,
376 * thus insuring that clks initialized very early will still be
377 * represented in the debugfs clk tree. This function should only be
378 * called once at boot-time, and all other clks added dynamically will
379 * be done so with clk_debug_register.
380 */
381static int __init clk_debug_init(void)
382{
383 struct clk *clk;
1af599df 384 struct dentry *d;
b2476490
MT
385
386 rootdir = debugfs_create_dir("clk", NULL);
387
388 if (!rootdir)
389 return -ENOMEM;
390
27b8d5f7 391 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
1af599df
PG
392 &clk_summary_fops);
393 if (!d)
394 return -ENOMEM;
395
27b8d5f7 396 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
bddca894
PG
397 &clk_dump_fops);
398 if (!d)
399 return -ENOMEM;
400
27b8d5f7
PDS
401 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
402 &orphan_list, &clk_summary_fops);
403 if (!d)
404 return -ENOMEM;
b2476490 405
27b8d5f7
PDS
406 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
407 &orphan_list, &clk_dump_fops);
408 if (!d)
b2476490
MT
409 return -ENOMEM;
410
6314b679
SB
411 mutex_lock(&clk_debug_lock);
412 hlist_for_each_entry(clk, &clk_debug_list, debug_node)
413 clk_debug_create_one(clk, rootdir);
b2476490
MT
414
415 inited = 1;
6314b679 416 mutex_unlock(&clk_debug_lock);
b2476490
MT
417
418 return 0;
419}
420late_initcall(clk_debug_init);
421#else
422static inline int clk_debug_register(struct clk *clk) { return 0; }
b33d212f
UH
423static inline void clk_debug_reparent(struct clk *clk, struct clk *new_parent)
424{
425}
fcb0ee6a
SN
426static inline void clk_debug_unregister(struct clk *clk)
427{
428}
70d347e6 429#endif
b2476490 430
1c155b3d
UH
431/* caller must hold prepare_lock */
432static void clk_unprepare_unused_subtree(struct clk *clk)
433{
434 struct clk *child;
435
436 if (!clk)
437 return;
438
439 hlist_for_each_entry(child, &clk->children, child_node)
440 clk_unprepare_unused_subtree(child);
441
442 if (clk->prepare_count)
443 return;
444
445 if (clk->flags & CLK_IGNORE_UNUSED)
446 return;
447
3cc8247f
UH
448 if (__clk_is_prepared(clk)) {
449 if (clk->ops->unprepare_unused)
450 clk->ops->unprepare_unused(clk->hw);
451 else if (clk->ops->unprepare)
1c155b3d 452 clk->ops->unprepare(clk->hw);
3cc8247f 453 }
1c155b3d
UH
454}
455
b2476490
MT
456/* caller must hold prepare_lock */
457static void clk_disable_unused_subtree(struct clk *clk)
458{
459 struct clk *child;
b2476490
MT
460 unsigned long flags;
461
462 if (!clk)
463 goto out;
464
b67bfe0d 465 hlist_for_each_entry(child, &clk->children, child_node)
b2476490
MT
466 clk_disable_unused_subtree(child);
467
eab89f69 468 flags = clk_enable_lock();
b2476490
MT
469
470 if (clk->enable_count)
471 goto unlock_out;
472
473 if (clk->flags & CLK_IGNORE_UNUSED)
474 goto unlock_out;
475
7c045a55
MT
476 /*
477 * some gate clocks have special needs during the disable-unused
478 * sequence. call .disable_unused if available, otherwise fall
479 * back to .disable
480 */
481 if (__clk_is_enabled(clk)) {
482 if (clk->ops->disable_unused)
483 clk->ops->disable_unused(clk->hw);
484 else if (clk->ops->disable)
485 clk->ops->disable(clk->hw);
486 }
b2476490
MT
487
488unlock_out:
eab89f69 489 clk_enable_unlock(flags);
b2476490
MT
490
491out:
492 return;
493}
494
1e435256
OJ
495static bool clk_ignore_unused;
496static int __init clk_ignore_unused_setup(char *__unused)
497{
498 clk_ignore_unused = true;
499 return 1;
500}
501__setup("clk_ignore_unused", clk_ignore_unused_setup);
502
b2476490
MT
503static int clk_disable_unused(void)
504{
505 struct clk *clk;
b2476490 506
1e435256
OJ
507 if (clk_ignore_unused) {
508 pr_warn("clk: Not disabling unused clocks\n");
509 return 0;
510 }
511
eab89f69 512 clk_prepare_lock();
b2476490 513
b67bfe0d 514 hlist_for_each_entry(clk, &clk_root_list, child_node)
b2476490
MT
515 clk_disable_unused_subtree(clk);
516
b67bfe0d 517 hlist_for_each_entry(clk, &clk_orphan_list, child_node)
b2476490
MT
518 clk_disable_unused_subtree(clk);
519
1c155b3d
UH
520 hlist_for_each_entry(clk, &clk_root_list, child_node)
521 clk_unprepare_unused_subtree(clk);
522
523 hlist_for_each_entry(clk, &clk_orphan_list, child_node)
524 clk_unprepare_unused_subtree(clk);
525
eab89f69 526 clk_prepare_unlock();
b2476490
MT
527
528 return 0;
529}
d41d5805 530late_initcall_sync(clk_disable_unused);
b2476490
MT
531
532/*** helper functions ***/
533
65800b2c 534const char *__clk_get_name(struct clk *clk)
b2476490
MT
535{
536 return !clk ? NULL : clk->name;
537}
4895084c 538EXPORT_SYMBOL_GPL(__clk_get_name);
b2476490 539
65800b2c 540struct clk_hw *__clk_get_hw(struct clk *clk)
b2476490
MT
541{
542 return !clk ? NULL : clk->hw;
543}
0b7f04b8 544EXPORT_SYMBOL_GPL(__clk_get_hw);
b2476490 545
65800b2c 546u8 __clk_get_num_parents(struct clk *clk)
b2476490 547{
2ac6b1f5 548 return !clk ? 0 : clk->num_parents;
b2476490 549}
0b7f04b8 550EXPORT_SYMBOL_GPL(__clk_get_num_parents);
b2476490 551
65800b2c 552struct clk *__clk_get_parent(struct clk *clk)
b2476490
MT
553{
554 return !clk ? NULL : clk->parent;
555}
0b7f04b8 556EXPORT_SYMBOL_GPL(__clk_get_parent);
b2476490 557
7ef3dcc8
JH
558struct clk *clk_get_parent_by_index(struct clk *clk, u8 index)
559{
560 if (!clk || index >= clk->num_parents)
561 return NULL;
562 else if (!clk->parents)
563 return __clk_lookup(clk->parent_names[index]);
564 else if (!clk->parents[index])
565 return clk->parents[index] =
566 __clk_lookup(clk->parent_names[index]);
567 else
568 return clk->parents[index];
569}
0b7f04b8 570EXPORT_SYMBOL_GPL(clk_get_parent_by_index);
7ef3dcc8 571
65800b2c 572unsigned int __clk_get_enable_count(struct clk *clk)
b2476490 573{
2ac6b1f5 574 return !clk ? 0 : clk->enable_count;
b2476490
MT
575}
576
b2476490
MT
577unsigned long __clk_get_rate(struct clk *clk)
578{
579 unsigned long ret;
580
581 if (!clk) {
34e44fe8 582 ret = 0;
b2476490
MT
583 goto out;
584 }
585
586 ret = clk->rate;
587
588 if (clk->flags & CLK_IS_ROOT)
589 goto out;
590
591 if (!clk->parent)
34e44fe8 592 ret = 0;
b2476490
MT
593
594out:
595 return ret;
596}
0b7f04b8 597EXPORT_SYMBOL_GPL(__clk_get_rate);
b2476490 598
920f1c74 599static unsigned long __clk_get_accuracy(struct clk *clk)
5279fc40
BB
600{
601 if (!clk)
602 return 0;
603
604 return clk->accuracy;
605}
606
65800b2c 607unsigned long __clk_get_flags(struct clk *clk)
b2476490 608{
2ac6b1f5 609 return !clk ? 0 : clk->flags;
b2476490 610}
b05c6836 611EXPORT_SYMBOL_GPL(__clk_get_flags);
b2476490 612
3d6ee287
UH
613bool __clk_is_prepared(struct clk *clk)
614{
615 int ret;
616
617 if (!clk)
618 return false;
619
620 /*
621 * .is_prepared is optional for clocks that can prepare
622 * fall back to software usage counter if it is missing
623 */
624 if (!clk->ops->is_prepared) {
625 ret = clk->prepare_count ? 1 : 0;
626 goto out;
627 }
628
629 ret = clk->ops->is_prepared(clk->hw);
630out:
631 return !!ret;
632}
633
2ac6b1f5 634bool __clk_is_enabled(struct clk *clk)
b2476490
MT
635{
636 int ret;
637
638 if (!clk)
2ac6b1f5 639 return false;
b2476490
MT
640
641 /*
642 * .is_enabled is only mandatory for clocks that gate
643 * fall back to software usage counter if .is_enabled is missing
644 */
645 if (!clk->ops->is_enabled) {
646 ret = clk->enable_count ? 1 : 0;
647 goto out;
648 }
649
650 ret = clk->ops->is_enabled(clk->hw);
651out:
2ac6b1f5 652 return !!ret;
b2476490 653}
0b7f04b8 654EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490
MT
655
656static struct clk *__clk_lookup_subtree(const char *name, struct clk *clk)
657{
658 struct clk *child;
659 struct clk *ret;
b2476490
MT
660
661 if (!strcmp(clk->name, name))
662 return clk;
663
b67bfe0d 664 hlist_for_each_entry(child, &clk->children, child_node) {
b2476490
MT
665 ret = __clk_lookup_subtree(name, child);
666 if (ret)
667 return ret;
668 }
669
670 return NULL;
671}
672
673struct clk *__clk_lookup(const char *name)
674{
675 struct clk *root_clk;
676 struct clk *ret;
b2476490
MT
677
678 if (!name)
679 return NULL;
680
681 /* search the 'proper' clk tree first */
b67bfe0d 682 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
b2476490
MT
683 ret = __clk_lookup_subtree(name, root_clk);
684 if (ret)
685 return ret;
686 }
687
688 /* if not found, then search the orphan tree */
b67bfe0d 689 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
b2476490
MT
690 ret = __clk_lookup_subtree(name, root_clk);
691 if (ret)
692 return ret;
693 }
694
695 return NULL;
696}
697
e366fdd7
JH
698/*
699 * Helper for finding best parent to provide a given frequency. This can be used
700 * directly as a determine_rate callback (e.g. for a mux), or from a more
701 * complex clock that may combine a mux with other operations.
702 */
703long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
704 unsigned long *best_parent_rate,
646cafc6 705 struct clk_hw **best_parent_p)
e366fdd7
JH
706{
707 struct clk *clk = hw->clk, *parent, *best_parent = NULL;
708 int i, num_parents;
709 unsigned long parent_rate, best = 0;
710
711 /* if NO_REPARENT flag set, pass through to current parent */
712 if (clk->flags & CLK_SET_RATE_NO_REPARENT) {
713 parent = clk->parent;
714 if (clk->flags & CLK_SET_RATE_PARENT)
715 best = __clk_round_rate(parent, rate);
716 else if (parent)
717 best = __clk_get_rate(parent);
718 else
719 best = __clk_get_rate(clk);
720 goto out;
721 }
722
723 /* find the parent that can provide the fastest rate <= rate */
724 num_parents = clk->num_parents;
725 for (i = 0; i < num_parents; i++) {
726 parent = clk_get_parent_by_index(clk, i);
727 if (!parent)
728 continue;
729 if (clk->flags & CLK_SET_RATE_PARENT)
730 parent_rate = __clk_round_rate(parent, rate);
731 else
732 parent_rate = __clk_get_rate(parent);
733 if (parent_rate <= rate && parent_rate > best) {
734 best_parent = parent;
735 best = parent_rate;
736 }
737 }
738
739out:
740 if (best_parent)
646cafc6 741 *best_parent_p = best_parent->hw;
e366fdd7
JH
742 *best_parent_rate = best;
743
744 return best;
745}
0b7f04b8 746EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
e366fdd7 747
b2476490
MT
748/*** clk api ***/
749
750void __clk_unprepare(struct clk *clk)
751{
752 if (!clk)
753 return;
754
755 if (WARN_ON(clk->prepare_count == 0))
756 return;
757
758 if (--clk->prepare_count > 0)
759 return;
760
761 WARN_ON(clk->enable_count > 0);
762
763 if (clk->ops->unprepare)
764 clk->ops->unprepare(clk->hw);
765
766 __clk_unprepare(clk->parent);
767}
768
769/**
770 * clk_unprepare - undo preparation of a clock source
24ee1a08 771 * @clk: the clk being unprepared
b2476490
MT
772 *
773 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
774 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
775 * if the operation may sleep. One example is a clk which is accessed over
776 * I2c. In the complex case a clk gate operation may require a fast and a slow
777 * part. It is this reason that clk_unprepare and clk_disable are not mutually
778 * exclusive. In fact clk_disable must be called before clk_unprepare.
779 */
780void clk_unprepare(struct clk *clk)
781{
63589e92
SB
782 if (IS_ERR_OR_NULL(clk))
783 return;
784
eab89f69 785 clk_prepare_lock();
b2476490 786 __clk_unprepare(clk);
eab89f69 787 clk_prepare_unlock();
b2476490
MT
788}
789EXPORT_SYMBOL_GPL(clk_unprepare);
790
791int __clk_prepare(struct clk *clk)
792{
793 int ret = 0;
794
795 if (!clk)
796 return 0;
797
798 if (clk->prepare_count == 0) {
799 ret = __clk_prepare(clk->parent);
800 if (ret)
801 return ret;
802
803 if (clk->ops->prepare) {
804 ret = clk->ops->prepare(clk->hw);
805 if (ret) {
806 __clk_unprepare(clk->parent);
807 return ret;
808 }
809 }
810 }
811
812 clk->prepare_count++;
813
814 return 0;
815}
816
817/**
818 * clk_prepare - prepare a clock source
819 * @clk: the clk being prepared
820 *
821 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
822 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
823 * operation may sleep. One example is a clk which is accessed over I2c. In
824 * the complex case a clk ungate operation may require a fast and a slow part.
825 * It is this reason that clk_prepare and clk_enable are not mutually
826 * exclusive. In fact clk_prepare must be called before clk_enable.
827 * Returns 0 on success, -EERROR otherwise.
828 */
829int clk_prepare(struct clk *clk)
830{
831 int ret;
832
eab89f69 833 clk_prepare_lock();
b2476490 834 ret = __clk_prepare(clk);
eab89f69 835 clk_prepare_unlock();
b2476490
MT
836
837 return ret;
838}
839EXPORT_SYMBOL_GPL(clk_prepare);
840
841static void __clk_disable(struct clk *clk)
842{
843 if (!clk)
844 return;
845
846 if (WARN_ON(clk->enable_count == 0))
847 return;
848
849 if (--clk->enable_count > 0)
850 return;
851
852 if (clk->ops->disable)
853 clk->ops->disable(clk->hw);
854
855 __clk_disable(clk->parent);
856}
857
858/**
859 * clk_disable - gate a clock
860 * @clk: the clk being gated
861 *
862 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
863 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
864 * clk if the operation is fast and will never sleep. One example is a
865 * SoC-internal clk which is controlled via simple register writes. In the
866 * complex case a clk gate operation may require a fast and a slow part. It is
867 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
868 * In fact clk_disable must be called before clk_unprepare.
869 */
870void clk_disable(struct clk *clk)
871{
872 unsigned long flags;
873
63589e92
SB
874 if (IS_ERR_OR_NULL(clk))
875 return;
876
eab89f69 877 flags = clk_enable_lock();
b2476490 878 __clk_disable(clk);
eab89f69 879 clk_enable_unlock(flags);
b2476490
MT
880}
881EXPORT_SYMBOL_GPL(clk_disable);
882
883static int __clk_enable(struct clk *clk)
884{
885 int ret = 0;
886
887 if (!clk)
888 return 0;
889
890 if (WARN_ON(clk->prepare_count == 0))
891 return -ESHUTDOWN;
892
893 if (clk->enable_count == 0) {
894 ret = __clk_enable(clk->parent);
895
896 if (ret)
897 return ret;
898
899 if (clk->ops->enable) {
900 ret = clk->ops->enable(clk->hw);
901 if (ret) {
902 __clk_disable(clk->parent);
903 return ret;
904 }
905 }
906 }
907
908 clk->enable_count++;
909 return 0;
910}
911
912/**
913 * clk_enable - ungate a clock
914 * @clk: the clk being ungated
915 *
916 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
917 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
918 * if the operation will never sleep. One example is a SoC-internal clk which
919 * is controlled via simple register writes. In the complex case a clk ungate
920 * operation may require a fast and a slow part. It is this reason that
921 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
922 * must be called before clk_enable. Returns 0 on success, -EERROR
923 * otherwise.
924 */
925int clk_enable(struct clk *clk)
926{
927 unsigned long flags;
928 int ret;
929
eab89f69 930 flags = clk_enable_lock();
b2476490 931 ret = __clk_enable(clk);
eab89f69 932 clk_enable_unlock(flags);
b2476490
MT
933
934 return ret;
935}
936EXPORT_SYMBOL_GPL(clk_enable);
937
b2476490
MT
938/**
939 * __clk_round_rate - round the given rate for a clk
940 * @clk: round the rate of this clock
24ee1a08 941 * @rate: the rate which is to be rounded
b2476490
MT
942 *
943 * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate
944 */
945unsigned long __clk_round_rate(struct clk *clk, unsigned long rate)
946{
81536e07 947 unsigned long parent_rate = 0;
71472c0c 948 struct clk *parent;
646cafc6 949 struct clk_hw *parent_hw;
b2476490
MT
950
951 if (!clk)
2ac6b1f5 952 return 0;
b2476490 953
71472c0c
JH
954 parent = clk->parent;
955 if (parent)
956 parent_rate = parent->rate;
957
646cafc6
TV
958 if (clk->ops->determine_rate) {
959 parent_hw = parent ? parent->hw : NULL;
71472c0c 960 return clk->ops->determine_rate(clk->hw, rate, &parent_rate,
646cafc6
TV
961 &parent_hw);
962 } else if (clk->ops->round_rate)
71472c0c
JH
963 return clk->ops->round_rate(clk->hw, rate, &parent_rate);
964 else if (clk->flags & CLK_SET_RATE_PARENT)
965 return __clk_round_rate(clk->parent, rate);
966 else
967 return clk->rate;
b2476490 968}
1cdf8ee2 969EXPORT_SYMBOL_GPL(__clk_round_rate);
b2476490
MT
970
971/**
972 * clk_round_rate - round the given rate for a clk
973 * @clk: the clk for which we are rounding a rate
974 * @rate: the rate which is to be rounded
975 *
976 * Takes in a rate as input and rounds it to a rate that the clk can actually
977 * use which is then returned. If clk doesn't support round_rate operation
978 * then the parent rate is returned.
979 */
980long clk_round_rate(struct clk *clk, unsigned long rate)
981{
982 unsigned long ret;
983
eab89f69 984 clk_prepare_lock();
b2476490 985 ret = __clk_round_rate(clk, rate);
eab89f69 986 clk_prepare_unlock();
b2476490
MT
987
988 return ret;
989}
990EXPORT_SYMBOL_GPL(clk_round_rate);
991
992/**
993 * __clk_notify - call clk notifier chain
994 * @clk: struct clk * that is changing rate
995 * @msg: clk notifier type (see include/linux/clk.h)
996 * @old_rate: old clk rate
997 * @new_rate: new clk rate
998 *
999 * Triggers a notifier call chain on the clk rate-change notification
1000 * for 'clk'. Passes a pointer to the struct clk and the previous
1001 * and current rates to the notifier callback. Intended to be called by
1002 * internal clock code only. Returns NOTIFY_DONE from the last driver
1003 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1004 * a driver returns that.
1005 */
1006static int __clk_notify(struct clk *clk, unsigned long msg,
1007 unsigned long old_rate, unsigned long new_rate)
1008{
1009 struct clk_notifier *cn;
1010 struct clk_notifier_data cnd;
1011 int ret = NOTIFY_DONE;
1012
1013 cnd.clk = clk;
1014 cnd.old_rate = old_rate;
1015 cnd.new_rate = new_rate;
1016
1017 list_for_each_entry(cn, &clk_notifier_list, node) {
1018 if (cn->clk == clk) {
1019 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1020 &cnd);
1021 break;
1022 }
1023 }
1024
1025 return ret;
1026}
1027
5279fc40
BB
1028/**
1029 * __clk_recalc_accuracies
1030 * @clk: first clk in the subtree
1031 *
1032 * Walks the subtree of clks starting with clk and recalculates accuracies as
1033 * it goes. Note that if a clk does not implement the .recalc_accuracy
1034 * callback then it is assumed that the clock will take on the accuracy of it's
1035 * parent.
1036 *
1037 * Caller must hold prepare_lock.
1038 */
1039static void __clk_recalc_accuracies(struct clk *clk)
1040{
1041 unsigned long parent_accuracy = 0;
1042 struct clk *child;
1043
1044 if (clk->parent)
1045 parent_accuracy = clk->parent->accuracy;
1046
1047 if (clk->ops->recalc_accuracy)
1048 clk->accuracy = clk->ops->recalc_accuracy(clk->hw,
1049 parent_accuracy);
1050 else
1051 clk->accuracy = parent_accuracy;
1052
1053 hlist_for_each_entry(child, &clk->children, child_node)
1054 __clk_recalc_accuracies(child);
1055}
1056
1057/**
1058 * clk_get_accuracy - return the accuracy of clk
1059 * @clk: the clk whose accuracy is being returned
1060 *
1061 * Simply returns the cached accuracy of the clk, unless
1062 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1063 * issued.
1064 * If clk is NULL then returns 0.
1065 */
1066long clk_get_accuracy(struct clk *clk)
1067{
1068 unsigned long accuracy;
1069
1070 clk_prepare_lock();
1071 if (clk && (clk->flags & CLK_GET_ACCURACY_NOCACHE))
1072 __clk_recalc_accuracies(clk);
1073
1074 accuracy = __clk_get_accuracy(clk);
1075 clk_prepare_unlock();
1076
1077 return accuracy;
1078}
1079EXPORT_SYMBOL_GPL(clk_get_accuracy);
1080
8f2c2db1
SB
1081static unsigned long clk_recalc(struct clk *clk, unsigned long parent_rate)
1082{
1083 if (clk->ops->recalc_rate)
1084 return clk->ops->recalc_rate(clk->hw, parent_rate);
1085 return parent_rate;
1086}
1087
b2476490
MT
1088/**
1089 * __clk_recalc_rates
1090 * @clk: first clk in the subtree
1091 * @msg: notification type (see include/linux/clk.h)
1092 *
1093 * Walks the subtree of clks starting with clk and recalculates rates as it
1094 * goes. Note that if a clk does not implement the .recalc_rate callback then
24ee1a08 1095 * it is assumed that the clock will take on the rate of its parent.
b2476490
MT
1096 *
1097 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1098 * if necessary.
1099 *
1100 * Caller must hold prepare_lock.
1101 */
1102static void __clk_recalc_rates(struct clk *clk, unsigned long msg)
1103{
1104 unsigned long old_rate;
1105 unsigned long parent_rate = 0;
b2476490
MT
1106 struct clk *child;
1107
1108 old_rate = clk->rate;
1109
1110 if (clk->parent)
1111 parent_rate = clk->parent->rate;
1112
8f2c2db1 1113 clk->rate = clk_recalc(clk, parent_rate);
b2476490
MT
1114
1115 /*
1116 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1117 * & ABORT_RATE_CHANGE notifiers
1118 */
1119 if (clk->notifier_count && msg)
1120 __clk_notify(clk, msg, old_rate, clk->rate);
1121
b67bfe0d 1122 hlist_for_each_entry(child, &clk->children, child_node)
b2476490
MT
1123 __clk_recalc_rates(child, msg);
1124}
1125
a093bde2
UH
1126/**
1127 * clk_get_rate - return the rate of clk
1128 * @clk: the clk whose rate is being returned
1129 *
1130 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1131 * is set, which means a recalc_rate will be issued.
1132 * If clk is NULL then returns 0.
1133 */
1134unsigned long clk_get_rate(struct clk *clk)
1135{
1136 unsigned long rate;
1137
eab89f69 1138 clk_prepare_lock();
a093bde2
UH
1139
1140 if (clk && (clk->flags & CLK_GET_RATE_NOCACHE))
1141 __clk_recalc_rates(clk, 0);
1142
1143 rate = __clk_get_rate(clk);
eab89f69 1144 clk_prepare_unlock();
a093bde2
UH
1145
1146 return rate;
1147}
1148EXPORT_SYMBOL_GPL(clk_get_rate);
1149
f1c8b2ed 1150static int clk_fetch_parent_index(struct clk *clk, struct clk *parent)
4935b22c 1151{
f1c8b2ed 1152 int i;
4935b22c 1153
f1c8b2ed 1154 if (!clk->parents) {
96a7ed90
TF
1155 clk->parents = kcalloc(clk->num_parents,
1156 sizeof(struct clk *), GFP_KERNEL);
f1c8b2ed
TF
1157 if (!clk->parents)
1158 return -ENOMEM;
1159 }
4935b22c
JH
1160
1161 /*
1162 * find index of new parent clock using cached parent ptrs,
1163 * or if not yet cached, use string name comparison and cache
1164 * them now to avoid future calls to __clk_lookup.
1165 */
1166 for (i = 0; i < clk->num_parents; i++) {
da0f0b2c 1167 if (clk->parents[i] == parent)
f1c8b2ed 1168 return i;
da0f0b2c
TF
1169
1170 if (clk->parents[i])
1171 continue;
1172
1173 if (!strcmp(clk->parent_names[i], parent->name)) {
1174 clk->parents[i] = __clk_lookup(parent->name);
f1c8b2ed 1175 return i;
4935b22c
JH
1176 }
1177 }
1178
f1c8b2ed 1179 return -EINVAL;
4935b22c
JH
1180}
1181
1182static void clk_reparent(struct clk *clk, struct clk *new_parent)
1183{
1184 hlist_del(&clk->child_node);
1185
903efc55
JH
1186 if (new_parent) {
1187 /* avoid duplicate POST_RATE_CHANGE notifications */
1188 if (new_parent->new_child == clk)
1189 new_parent->new_child = NULL;
1190
4935b22c 1191 hlist_add_head(&clk->child_node, &new_parent->children);
903efc55 1192 } else {
4935b22c 1193 hlist_add_head(&clk->child_node, &clk_orphan_list);
903efc55 1194 }
4935b22c
JH
1195
1196 clk->parent = new_parent;
1197}
1198
3fa2252b 1199static struct clk *__clk_set_parent_before(struct clk *clk, struct clk *parent)
4935b22c
JH
1200{
1201 unsigned long flags;
4935b22c
JH
1202 struct clk *old_parent = clk->parent;
1203
1204 /*
1205 * Migrate prepare state between parents and prevent race with
1206 * clk_enable().
1207 *
1208 * If the clock is not prepared, then a race with
1209 * clk_enable/disable() is impossible since we already have the
1210 * prepare lock (future calls to clk_enable() need to be preceded by
1211 * a clk_prepare()).
1212 *
1213 * If the clock is prepared, migrate the prepared state to the new
1214 * parent and also protect against a race with clk_enable() by
1215 * forcing the clock and the new parent on. This ensures that all
1216 * future calls to clk_enable() are practically NOPs with respect to
1217 * hardware and software states.
1218 *
1219 * See also: Comment for clk_set_parent() below.
1220 */
1221 if (clk->prepare_count) {
1222 __clk_prepare(parent);
1223 clk_enable(parent);
1224 clk_enable(clk);
1225 }
1226
1227 /* update the clk tree topology */
1228 flags = clk_enable_lock();
1229 clk_reparent(clk, parent);
1230 clk_enable_unlock(flags);
1231
3fa2252b
SB
1232 return old_parent;
1233}
1234
1235static void __clk_set_parent_after(struct clk *clk, struct clk *parent,
1236 struct clk *old_parent)
1237{
1238 /*
1239 * Finish the migration of prepare state and undo the changes done
1240 * for preventing a race with clk_enable().
1241 */
1242 if (clk->prepare_count) {
1243 clk_disable(clk);
1244 clk_disable(old_parent);
1245 __clk_unprepare(old_parent);
1246 }
3fa2252b
SB
1247}
1248
1249static int __clk_set_parent(struct clk *clk, struct clk *parent, u8 p_index)
1250{
1251 unsigned long flags;
1252 int ret = 0;
1253 struct clk *old_parent;
1254
1255 old_parent = __clk_set_parent_before(clk, parent);
1256
4935b22c
JH
1257 /* change clock input source */
1258 if (parent && clk->ops->set_parent)
1259 ret = clk->ops->set_parent(clk->hw, p_index);
1260
1261 if (ret) {
1262 flags = clk_enable_lock();
1263 clk_reparent(clk, old_parent);
1264 clk_enable_unlock(flags);
1265
1266 if (clk->prepare_count) {
1267 clk_disable(clk);
1268 clk_disable(parent);
1269 __clk_unprepare(parent);
1270 }
1271 return ret;
1272 }
1273
3fa2252b 1274 __clk_set_parent_after(clk, parent, old_parent);
4935b22c 1275
4935b22c
JH
1276 return 0;
1277}
1278
b2476490
MT
1279/**
1280 * __clk_speculate_rates
1281 * @clk: first clk in the subtree
1282 * @parent_rate: the "future" rate of clk's parent
1283 *
1284 * Walks the subtree of clks starting with clk, speculating rates as it
1285 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1286 *
1287 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1288 * pre-rate change notifications and returns early if no clks in the
1289 * subtree have subscribed to the notifications. Note that if a clk does not
1290 * implement the .recalc_rate callback then it is assumed that the clock will
24ee1a08 1291 * take on the rate of its parent.
b2476490
MT
1292 *
1293 * Caller must hold prepare_lock.
1294 */
1295static int __clk_speculate_rates(struct clk *clk, unsigned long parent_rate)
1296{
b2476490
MT
1297 struct clk *child;
1298 unsigned long new_rate;
1299 int ret = NOTIFY_DONE;
1300
8f2c2db1 1301 new_rate = clk_recalc(clk, parent_rate);
b2476490 1302
fb72a059 1303 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
b2476490
MT
1304 if (clk->notifier_count)
1305 ret = __clk_notify(clk, PRE_RATE_CHANGE, clk->rate, new_rate);
1306
86bcfa2e
MT
1307 if (ret & NOTIFY_STOP_MASK) {
1308 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1309 __func__, clk->name, ret);
b2476490 1310 goto out;
86bcfa2e 1311 }
b2476490 1312
b67bfe0d 1313 hlist_for_each_entry(child, &clk->children, child_node) {
b2476490 1314 ret = __clk_speculate_rates(child, new_rate);
fb72a059 1315 if (ret & NOTIFY_STOP_MASK)
b2476490
MT
1316 break;
1317 }
1318
1319out:
1320 return ret;
1321}
1322
71472c0c
JH
1323static void clk_calc_subtree(struct clk *clk, unsigned long new_rate,
1324 struct clk *new_parent, u8 p_index)
b2476490
MT
1325{
1326 struct clk *child;
b2476490
MT
1327
1328 clk->new_rate = new_rate;
71472c0c
JH
1329 clk->new_parent = new_parent;
1330 clk->new_parent_index = p_index;
1331 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1332 clk->new_child = NULL;
1333 if (new_parent && new_parent != clk->parent)
1334 new_parent->new_child = clk;
b2476490 1335
b67bfe0d 1336 hlist_for_each_entry(child, &clk->children, child_node) {
8f2c2db1 1337 child->new_rate = clk_recalc(child, new_rate);
71472c0c 1338 clk_calc_subtree(child, child->new_rate, NULL, 0);
b2476490
MT
1339 }
1340}
1341
1342/*
1343 * calculate the new rates returning the topmost clock that has to be
1344 * changed.
1345 */
1346static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate)
1347{
1348 struct clk *top = clk;
71472c0c 1349 struct clk *old_parent, *parent;
646cafc6 1350 struct clk_hw *parent_hw;
81536e07 1351 unsigned long best_parent_rate = 0;
b2476490 1352 unsigned long new_rate;
f1c8b2ed 1353 int p_index = 0;
b2476490 1354
7452b219
MT
1355 /* sanity */
1356 if (IS_ERR_OR_NULL(clk))
1357 return NULL;
1358
63f5c3b2 1359 /* save parent rate, if it exists */
71472c0c
JH
1360 parent = old_parent = clk->parent;
1361 if (parent)
1362 best_parent_rate = parent->rate;
1363
1364 /* find the closest rate and parent clk/rate */
1365 if (clk->ops->determine_rate) {
646cafc6 1366 parent_hw = parent ? parent->hw : NULL;
71472c0c
JH
1367 new_rate = clk->ops->determine_rate(clk->hw, rate,
1368 &best_parent_rate,
646cafc6
TV
1369 &parent_hw);
1370 parent = parent_hw->clk;
71472c0c
JH
1371 } else if (clk->ops->round_rate) {
1372 new_rate = clk->ops->round_rate(clk->hw, rate,
1373 &best_parent_rate);
1374 } else if (!parent || !(clk->flags & CLK_SET_RATE_PARENT)) {
1375 /* pass-through clock without adjustable parent */
1376 clk->new_rate = clk->rate;
1377 return NULL;
1378 } else {
1379 /* pass-through clock with adjustable parent */
1380 top = clk_calc_new_rates(parent, rate);
1381 new_rate = parent->new_rate;
63f5c3b2 1382 goto out;
7452b219
MT
1383 }
1384
71472c0c
JH
1385 /* some clocks must be gated to change parent */
1386 if (parent != old_parent &&
1387 (clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) {
1388 pr_debug("%s: %s not gated but wants to reparent\n",
1389 __func__, clk->name);
b2476490
MT
1390 return NULL;
1391 }
1392
71472c0c
JH
1393 /* try finding the new parent index */
1394 if (parent) {
1395 p_index = clk_fetch_parent_index(clk, parent);
f1c8b2ed 1396 if (p_index < 0) {
71472c0c
JH
1397 pr_debug("%s: clk %s can not be parent of clk %s\n",
1398 __func__, parent->name, clk->name);
1399 return NULL;
1400 }
b2476490
MT
1401 }
1402
71472c0c
JH
1403 if ((clk->flags & CLK_SET_RATE_PARENT) && parent &&
1404 best_parent_rate != parent->rate)
1405 top = clk_calc_new_rates(parent, best_parent_rate);
b2476490
MT
1406
1407out:
71472c0c 1408 clk_calc_subtree(clk, new_rate, parent, p_index);
b2476490
MT
1409
1410 return top;
1411}
1412
1413/*
1414 * Notify about rate changes in a subtree. Always walk down the whole tree
1415 * so that in case of an error we can walk down the whole tree again and
1416 * abort the change.
1417 */
1418static struct clk *clk_propagate_rate_change(struct clk *clk, unsigned long event)
1419{
71472c0c 1420 struct clk *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1421 int ret = NOTIFY_DONE;
1422
1423 if (clk->rate == clk->new_rate)
5fda6858 1424 return NULL;
b2476490
MT
1425
1426 if (clk->notifier_count) {
1427 ret = __clk_notify(clk, event, clk->rate, clk->new_rate);
fb72a059 1428 if (ret & NOTIFY_STOP_MASK)
b2476490
MT
1429 fail_clk = clk;
1430 }
1431
b67bfe0d 1432 hlist_for_each_entry(child, &clk->children, child_node) {
71472c0c
JH
1433 /* Skip children who will be reparented to another clock */
1434 if (child->new_parent && child->new_parent != clk)
1435 continue;
1436 tmp_clk = clk_propagate_rate_change(child, event);
1437 if (tmp_clk)
1438 fail_clk = tmp_clk;
1439 }
1440
1441 /* handle the new child who might not be in clk->children yet */
1442 if (clk->new_child) {
1443 tmp_clk = clk_propagate_rate_change(clk->new_child, event);
1444 if (tmp_clk)
1445 fail_clk = tmp_clk;
b2476490
MT
1446 }
1447
1448 return fail_clk;
1449}
1450
1451/*
1452 * walk down a subtree and set the new rates notifying the rate
1453 * change on the way
1454 */
1455static void clk_change_rate(struct clk *clk)
1456{
1457 struct clk *child;
067bb174 1458 struct hlist_node *tmp;
b2476490 1459 unsigned long old_rate;
bf47b4fd 1460 unsigned long best_parent_rate = 0;
3fa2252b
SB
1461 bool skip_set_rate = false;
1462 struct clk *old_parent;
b2476490
MT
1463
1464 old_rate = clk->rate;
1465
3fa2252b
SB
1466 if (clk->new_parent)
1467 best_parent_rate = clk->new_parent->rate;
1468 else if (clk->parent)
bf47b4fd
PM
1469 best_parent_rate = clk->parent->rate;
1470
3fa2252b
SB
1471 if (clk->new_parent && clk->new_parent != clk->parent) {
1472 old_parent = __clk_set_parent_before(clk, clk->new_parent);
1473
1474 if (clk->ops->set_rate_and_parent) {
1475 skip_set_rate = true;
1476 clk->ops->set_rate_and_parent(clk->hw, clk->new_rate,
1477 best_parent_rate,
1478 clk->new_parent_index);
1479 } else if (clk->ops->set_parent) {
1480 clk->ops->set_parent(clk->hw, clk->new_parent_index);
1481 }
1482
1483 __clk_set_parent_after(clk, clk->new_parent, old_parent);
1484 }
1485
1486 if (!skip_set_rate && clk->ops->set_rate)
bf47b4fd 1487 clk->ops->set_rate(clk->hw, clk->new_rate, best_parent_rate);
b2476490 1488
8f2c2db1 1489 clk->rate = clk_recalc(clk, best_parent_rate);
b2476490
MT
1490
1491 if (clk->notifier_count && old_rate != clk->rate)
1492 __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate);
1493
067bb174
TK
1494 /*
1495 * Use safe iteration, as change_rate can actually swap parents
1496 * for certain clock types.
1497 */
1498 hlist_for_each_entry_safe(child, tmp, &clk->children, child_node) {
71472c0c
JH
1499 /* Skip children who will be reparented to another clock */
1500 if (child->new_parent && child->new_parent != clk)
1501 continue;
b2476490 1502 clk_change_rate(child);
71472c0c
JH
1503 }
1504
1505 /* handle the new child who might not be in clk->children yet */
1506 if (clk->new_child)
1507 clk_change_rate(clk->new_child);
b2476490
MT
1508}
1509
1510/**
1511 * clk_set_rate - specify a new rate for clk
1512 * @clk: the clk whose rate is being changed
1513 * @rate: the new rate for clk
1514 *
5654dc94 1515 * In the simplest case clk_set_rate will only adjust the rate of clk.
b2476490 1516 *
5654dc94
MT
1517 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1518 * propagate up to clk's parent; whether or not this happens depends on the
1519 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1520 * after calling .round_rate then upstream parent propagation is ignored. If
1521 * *parent_rate comes back with a new rate for clk's parent then we propagate
24ee1a08 1522 * up to clk's parent and set its rate. Upward propagation will continue
5654dc94
MT
1523 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1524 * .round_rate stops requesting changes to clk's parent_rate.
b2476490 1525 *
5654dc94
MT
1526 * Rate changes are accomplished via tree traversal that also recalculates the
1527 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
b2476490
MT
1528 *
1529 * Returns 0 on success, -EERROR otherwise.
1530 */
1531int clk_set_rate(struct clk *clk, unsigned long rate)
1532{
1533 struct clk *top, *fail_clk;
1534 int ret = 0;
1535
89ac8d7a
MT
1536 if (!clk)
1537 return 0;
1538
b2476490 1539 /* prevent racing with updates to the clock topology */
eab89f69 1540 clk_prepare_lock();
b2476490
MT
1541
1542 /* bail early if nothing to do */
34e452a1 1543 if (rate == clk_get_rate(clk))
b2476490
MT
1544 goto out;
1545
7e0fa1b5 1546 if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) {
0e1c0301
VK
1547 ret = -EBUSY;
1548 goto out;
1549 }
1550
b2476490
MT
1551 /* calculate new rates and get the topmost changed clock */
1552 top = clk_calc_new_rates(clk, rate);
1553 if (!top) {
1554 ret = -EINVAL;
1555 goto out;
1556 }
1557
1558 /* notify that we are about to change rates */
1559 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1560 if (fail_clk) {
f7363861 1561 pr_debug("%s: failed to set %s rate\n", __func__,
b2476490
MT
1562 fail_clk->name);
1563 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1564 ret = -EBUSY;
1565 goto out;
1566 }
1567
1568 /* change the rates */
1569 clk_change_rate(top);
1570
b2476490 1571out:
eab89f69 1572 clk_prepare_unlock();
b2476490
MT
1573
1574 return ret;
1575}
1576EXPORT_SYMBOL_GPL(clk_set_rate);
1577
1578/**
1579 * clk_get_parent - return the parent of a clk
1580 * @clk: the clk whose parent gets returned
1581 *
1582 * Simply returns clk->parent. Returns NULL if clk is NULL.
1583 */
1584struct clk *clk_get_parent(struct clk *clk)
1585{
1586 struct clk *parent;
1587
eab89f69 1588 clk_prepare_lock();
b2476490 1589 parent = __clk_get_parent(clk);
eab89f69 1590 clk_prepare_unlock();
b2476490
MT
1591
1592 return parent;
1593}
1594EXPORT_SYMBOL_GPL(clk_get_parent);
1595
1596/*
1597 * .get_parent is mandatory for clocks with multiple possible parents. It is
1598 * optional for single-parent clocks. Always call .get_parent if it is
1599 * available and WARN if it is missing for multi-parent clocks.
1600 *
1601 * For single-parent clocks without .get_parent, first check to see if the
1602 * .parents array exists, and if so use it to avoid an expensive tree
1603 * traversal. If .parents does not exist then walk the tree with __clk_lookup.
1604 */
1605static struct clk *__clk_init_parent(struct clk *clk)
1606{
1607 struct clk *ret = NULL;
1608 u8 index;
1609
1610 /* handle the trivial cases */
1611
1612 if (!clk->num_parents)
1613 goto out;
1614
1615 if (clk->num_parents == 1) {
1616 if (IS_ERR_OR_NULL(clk->parent))
40ba3f0f 1617 clk->parent = __clk_lookup(clk->parent_names[0]);
b2476490
MT
1618 ret = clk->parent;
1619 goto out;
1620 }
1621
1622 if (!clk->ops->get_parent) {
1623 WARN(!clk->ops->get_parent,
1624 "%s: multi-parent clocks must implement .get_parent\n",
1625 __func__);
1626 goto out;
1627 };
1628
1629 /*
1630 * Do our best to cache parent clocks in clk->parents. This prevents
1631 * unnecessary and expensive calls to __clk_lookup. We don't set
1632 * clk->parent here; that is done by the calling function
1633 */
1634
1635 index = clk->ops->get_parent(clk->hw);
1636
1637 if (!clk->parents)
1638 clk->parents =
96a7ed90 1639 kcalloc(clk->num_parents, sizeof(struct clk *),
b2476490
MT
1640 GFP_KERNEL);
1641
7ef3dcc8 1642 ret = clk_get_parent_by_index(clk, index);
b2476490
MT
1643
1644out:
1645 return ret;
1646}
1647
b33d212f
UH
1648void __clk_reparent(struct clk *clk, struct clk *new_parent)
1649{
1650 clk_reparent(clk, new_parent);
5279fc40 1651 __clk_recalc_accuracies(clk);
b2476490
MT
1652 __clk_recalc_rates(clk, POST_RATE_CHANGE);
1653}
1654
b2476490
MT
1655/**
1656 * clk_set_parent - switch the parent of a mux clk
1657 * @clk: the mux clk whose input we are switching
1658 * @parent: the new input to clk
1659 *
f8aa0bd5
SK
1660 * Re-parent clk to use parent as its new input source. If clk is in
1661 * prepared state, the clk will get enabled for the duration of this call. If
1662 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1663 * that, the reparenting is glitchy in hardware, etc), use the
1664 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1665 *
1666 * After successfully changing clk's parent clk_set_parent will update the
1667 * clk topology, sysfs topology and propagate rate recalculation via
1668 * __clk_recalc_rates.
1669 *
1670 * Returns 0 on success, -EERROR otherwise.
b2476490
MT
1671 */
1672int clk_set_parent(struct clk *clk, struct clk *parent)
1673{
1674 int ret = 0;
f1c8b2ed 1675 int p_index = 0;
031dcc9b 1676 unsigned long p_rate = 0;
b2476490 1677
89ac8d7a
MT
1678 if (!clk)
1679 return 0;
1680
031dcc9b
UH
1681 /* verify ops for for multi-parent clks */
1682 if ((clk->num_parents > 1) && (!clk->ops->set_parent))
b2476490
MT
1683 return -ENOSYS;
1684
1685 /* prevent racing with updates to the clock topology */
eab89f69 1686 clk_prepare_lock();
b2476490
MT
1687
1688 if (clk->parent == parent)
1689 goto out;
1690
031dcc9b
UH
1691 /* check that we are allowed to re-parent if the clock is in use */
1692 if ((clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) {
1693 ret = -EBUSY;
1694 goto out;
1695 }
1696
1697 /* try finding the new parent index */
1698 if (parent) {
1699 p_index = clk_fetch_parent_index(clk, parent);
1700 p_rate = parent->rate;
f1c8b2ed 1701 if (p_index < 0) {
031dcc9b
UH
1702 pr_debug("%s: clk %s can not be parent of clk %s\n",
1703 __func__, parent->name, clk->name);
f1c8b2ed 1704 ret = p_index;
031dcc9b
UH
1705 goto out;
1706 }
1707 }
1708
b2476490 1709 /* propagate PRE_RATE_CHANGE notifications */
f3aab5d6 1710 ret = __clk_speculate_rates(clk, p_rate);
b2476490
MT
1711
1712 /* abort if a driver objects */
fb72a059 1713 if (ret & NOTIFY_STOP_MASK)
b2476490
MT
1714 goto out;
1715
031dcc9b
UH
1716 /* do the re-parent */
1717 ret = __clk_set_parent(clk, parent, p_index);
b2476490 1718
5279fc40
BB
1719 /* propagate rate an accuracy recalculation accordingly */
1720 if (ret) {
b2476490 1721 __clk_recalc_rates(clk, ABORT_RATE_CHANGE);
5279fc40 1722 } else {
a68de8e4 1723 __clk_recalc_rates(clk, POST_RATE_CHANGE);
5279fc40
BB
1724 __clk_recalc_accuracies(clk);
1725 }
b2476490
MT
1726
1727out:
eab89f69 1728 clk_prepare_unlock();
b2476490
MT
1729
1730 return ret;
1731}
1732EXPORT_SYMBOL_GPL(clk_set_parent);
1733
e59c5371
MT
1734/**
1735 * clk_set_phase - adjust the phase shift of a clock signal
1736 * @clk: clock signal source
1737 * @degrees: number of degrees the signal is shifted
1738 *
1739 * Shifts the phase of a clock signal by the specified
1740 * degrees. Returns 0 on success, -EERROR otherwise.
1741 *
1742 * This function makes no distinction about the input or reference
1743 * signal that we adjust the clock signal phase against. For example
1744 * phase locked-loop clock signal generators we may shift phase with
1745 * respect to feedback clock signal input, but for other cases the
1746 * clock phase may be shifted with respect to some other, unspecified
1747 * signal.
1748 *
1749 * Additionally the concept of phase shift does not propagate through
1750 * the clock tree hierarchy, which sets it apart from clock rates and
1751 * clock accuracy. A parent clock phase attribute does not have an
1752 * impact on the phase attribute of a child clock.
1753 */
1754int clk_set_phase(struct clk *clk, int degrees)
1755{
1756 int ret = 0;
1757
1758 if (!clk)
1759 goto out;
1760
1761 /* sanity check degrees */
1762 degrees %= 360;
1763 if (degrees < 0)
1764 degrees += 360;
1765
1766 clk_prepare_lock();
1767
1768 if (!clk->ops->set_phase)
1769 goto out_unlock;
1770
1771 ret = clk->ops->set_phase(clk->hw, degrees);
1772
1773 if (!ret)
1774 clk->phase = degrees;
1775
1776out_unlock:
1777 clk_prepare_unlock();
1778
1779out:
1780 return ret;
1781}
1782
1783/**
1784 * clk_get_phase - return the phase shift of a clock signal
1785 * @clk: clock signal source
1786 *
1787 * Returns the phase shift of a clock node in degrees, otherwise returns
1788 * -EERROR.
1789 */
1790int clk_get_phase(struct clk *clk)
1791{
1792 int ret = 0;
1793
1794 if (!clk)
1795 goto out;
1796
1797 clk_prepare_lock();
1798 ret = clk->phase;
1799 clk_prepare_unlock();
1800
1801out:
1802 return ret;
1803}
1804
b2476490
MT
1805/**
1806 * __clk_init - initialize the data structures in a struct clk
1807 * @dev: device initializing this clk, placeholder for now
1808 * @clk: clk being initialized
1809 *
1810 * Initializes the lists in struct clk, queries the hardware for the
1811 * parent and rate and sets them both.
b2476490 1812 */
d1302a36 1813int __clk_init(struct device *dev, struct clk *clk)
b2476490 1814{
d1302a36 1815 int i, ret = 0;
b2476490 1816 struct clk *orphan;
b67bfe0d 1817 struct hlist_node *tmp2;
b2476490
MT
1818
1819 if (!clk)
d1302a36 1820 return -EINVAL;
b2476490 1821
eab89f69 1822 clk_prepare_lock();
b2476490
MT
1823
1824 /* check to see if a clock with this name is already registered */
d1302a36
MT
1825 if (__clk_lookup(clk->name)) {
1826 pr_debug("%s: clk %s already initialized\n",
1827 __func__, clk->name);
1828 ret = -EEXIST;
b2476490 1829 goto out;
d1302a36 1830 }
b2476490 1831
d4d7e3dd
MT
1832 /* check that clk_ops are sane. See Documentation/clk.txt */
1833 if (clk->ops->set_rate &&
71472c0c
JH
1834 !((clk->ops->round_rate || clk->ops->determine_rate) &&
1835 clk->ops->recalc_rate)) {
1836 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d4d7e3dd 1837 __func__, clk->name);
d1302a36 1838 ret = -EINVAL;
d4d7e3dd
MT
1839 goto out;
1840 }
1841
1842 if (clk->ops->set_parent && !clk->ops->get_parent) {
1843 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
1844 __func__, clk->name);
d1302a36 1845 ret = -EINVAL;
d4d7e3dd
MT
1846 goto out;
1847 }
1848
3fa2252b
SB
1849 if (clk->ops->set_rate_and_parent &&
1850 !(clk->ops->set_parent && clk->ops->set_rate)) {
1851 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
1852 __func__, clk->name);
1853 ret = -EINVAL;
1854 goto out;
1855 }
1856
b2476490
MT
1857 /* throw a WARN if any entries in parent_names are NULL */
1858 for (i = 0; i < clk->num_parents; i++)
1859 WARN(!clk->parent_names[i],
1860 "%s: invalid NULL in %s's .parent_names\n",
1861 __func__, clk->name);
1862
1863 /*
1864 * Allocate an array of struct clk *'s to avoid unnecessary string
1865 * look-ups of clk's possible parents. This can fail for clocks passed
1866 * in to clk_init during early boot; thus any access to clk->parents[]
1867 * must always check for a NULL pointer and try to populate it if
1868 * necessary.
1869 *
1870 * If clk->parents is not NULL we skip this entire block. This allows
1871 * for clock drivers to statically initialize clk->parents.
1872 */
9ca1c5a4 1873 if (clk->num_parents > 1 && !clk->parents) {
96a7ed90
TF
1874 clk->parents = kcalloc(clk->num_parents, sizeof(struct clk *),
1875 GFP_KERNEL);
b2476490
MT
1876 /*
1877 * __clk_lookup returns NULL for parents that have not been
1878 * clk_init'd; thus any access to clk->parents[] must check
1879 * for a NULL pointer. We can always perform lazy lookups for
1880 * missing parents later on.
1881 */
1882 if (clk->parents)
1883 for (i = 0; i < clk->num_parents; i++)
1884 clk->parents[i] =
1885 __clk_lookup(clk->parent_names[i]);
1886 }
1887
1888 clk->parent = __clk_init_parent(clk);
1889
1890 /*
1891 * Populate clk->parent if parent has already been __clk_init'd. If
1892 * parent has not yet been __clk_init'd then place clk in the orphan
1893 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
1894 * clk list.
1895 *
1896 * Every time a new clk is clk_init'd then we walk the list of orphan
1897 * clocks and re-parent any that are children of the clock currently
1898 * being clk_init'd.
1899 */
1900 if (clk->parent)
1901 hlist_add_head(&clk->child_node,
1902 &clk->parent->children);
1903 else if (clk->flags & CLK_IS_ROOT)
1904 hlist_add_head(&clk->child_node, &clk_root_list);
1905 else
1906 hlist_add_head(&clk->child_node, &clk_orphan_list);
1907
5279fc40
BB
1908 /*
1909 * Set clk's accuracy. The preferred method is to use
1910 * .recalc_accuracy. For simple clocks and lazy developers the default
1911 * fallback is to use the parent's accuracy. If a clock doesn't have a
1912 * parent (or is orphaned) then accuracy is set to zero (perfect
1913 * clock).
1914 */
1915 if (clk->ops->recalc_accuracy)
1916 clk->accuracy = clk->ops->recalc_accuracy(clk->hw,
1917 __clk_get_accuracy(clk->parent));
1918 else if (clk->parent)
1919 clk->accuracy = clk->parent->accuracy;
1920 else
1921 clk->accuracy = 0;
1922
9824cf73
MR
1923 /*
1924 * Set clk's phase.
1925 * Since a phase is by definition relative to its parent, just
1926 * query the current clock phase, or just assume it's in phase.
1927 */
1928 if (clk->ops->get_phase)
1929 clk->phase = clk->ops->get_phase(clk->hw);
1930 else
1931 clk->phase = 0;
1932
b2476490
MT
1933 /*
1934 * Set clk's rate. The preferred method is to use .recalc_rate. For
1935 * simple clocks and lazy developers the default fallback is to use the
1936 * parent's rate. If a clock doesn't have a parent (or is orphaned)
1937 * then rate is set to zero.
1938 */
1939 if (clk->ops->recalc_rate)
1940 clk->rate = clk->ops->recalc_rate(clk->hw,
1941 __clk_get_rate(clk->parent));
1942 else if (clk->parent)
1943 clk->rate = clk->parent->rate;
1944 else
1945 clk->rate = 0;
1946
3a5aec24 1947 clk_debug_register(clk);
b2476490
MT
1948 /*
1949 * walk the list of orphan clocks and reparent any that are children of
1950 * this clock
1951 */
b67bfe0d 1952 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 1953 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1
MF
1954 i = orphan->ops->get_parent(orphan->hw);
1955 if (!strcmp(clk->name, orphan->parent_names[i]))
1956 __clk_reparent(orphan, clk);
1957 continue;
1958 }
1959
b2476490
MT
1960 for (i = 0; i < orphan->num_parents; i++)
1961 if (!strcmp(clk->name, orphan->parent_names[i])) {
1962 __clk_reparent(orphan, clk);
1963 break;
1964 }
1f61e5f1 1965 }
b2476490
MT
1966
1967 /*
1968 * optional platform-specific magic
1969 *
1970 * The .init callback is not used by any of the basic clock types, but
1971 * exists for weird hardware that must perform initialization magic.
1972 * Please consider other ways of solving initialization problems before
24ee1a08 1973 * using this callback, as its use is discouraged.
b2476490
MT
1974 */
1975 if (clk->ops->init)
1976 clk->ops->init(clk->hw);
1977
fcb0ee6a 1978 kref_init(&clk->ref);
b2476490 1979out:
eab89f69 1980 clk_prepare_unlock();
b2476490 1981
d1302a36 1982 return ret;
b2476490
MT
1983}
1984
0197b3ea
SK
1985/**
1986 * __clk_register - register a clock and return a cookie.
1987 *
1988 * Same as clk_register, except that the .clk field inside hw shall point to a
1989 * preallocated (generally statically allocated) struct clk. None of the fields
1990 * of the struct clk need to be initialized.
1991 *
1992 * The data pointed to by .init and .clk field shall NOT be marked as init
1993 * data.
1994 *
1995 * __clk_register is only exposed via clk-private.h and is intended for use with
1996 * very large numbers of clocks that need to be statically initialized. It is
1997 * a layering violation to include clk-private.h from any code which implements
1998 * a clock's .ops; as such any statically initialized clock data MUST be in a
24ee1a08 1999 * separate C file from the logic that implements its operations. Returns 0
0197b3ea
SK
2000 * on success, otherwise an error code.
2001 */
2002struct clk *__clk_register(struct device *dev, struct clk_hw *hw)
2003{
2004 int ret;
2005 struct clk *clk;
2006
2007 clk = hw->clk;
2008 clk->name = hw->init->name;
2009 clk->ops = hw->init->ops;
2010 clk->hw = hw;
2011 clk->flags = hw->init->flags;
2012 clk->parent_names = hw->init->parent_names;
2013 clk->num_parents = hw->init->num_parents;
ac2df527
SN
2014 if (dev && dev->driver)
2015 clk->owner = dev->driver->owner;
2016 else
2017 clk->owner = NULL;
0197b3ea
SK
2018
2019 ret = __clk_init(dev, clk);
2020 if (ret)
2021 return ERR_PTR(ret);
2022
2023 return clk;
2024}
2025EXPORT_SYMBOL_GPL(__clk_register);
2026
293ba3b4
SB
2027/**
2028 * clk_register - allocate a new clock, register it and return an opaque cookie
2029 * @dev: device that is registering this clock
2030 * @hw: link to hardware-specific clock data
2031 *
2032 * clk_register is the primary interface for populating the clock tree with new
2033 * clock nodes. It returns a pointer to the newly allocated struct clk which
2034 * cannot be dereferenced by driver code but may be used in conjuction with the
2035 * rest of the clock API. In the event of an error clk_register will return an
2036 * error code; drivers must test for an error code after calling clk_register.
2037 */
2038struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2039{
d1302a36 2040 int i, ret;
293ba3b4
SB
2041 struct clk *clk;
2042
2043 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2044 if (!clk) {
2045 pr_err("%s: could not allocate clk\n", __func__);
2046 ret = -ENOMEM;
2047 goto fail_out;
2048 }
b2476490 2049
0197b3ea
SK
2050 clk->name = kstrdup(hw->init->name, GFP_KERNEL);
2051 if (!clk->name) {
2052 pr_err("%s: could not allocate clk->name\n", __func__);
2053 ret = -ENOMEM;
2054 goto fail_name;
2055 }
2056 clk->ops = hw->init->ops;
ac2df527
SN
2057 if (dev && dev->driver)
2058 clk->owner = dev->driver->owner;
b2476490 2059 clk->hw = hw;
0197b3ea
SK
2060 clk->flags = hw->init->flags;
2061 clk->num_parents = hw->init->num_parents;
b2476490
MT
2062 hw->clk = clk;
2063
d1302a36 2064 /* allocate local copy in case parent_names is __initdata */
96a7ed90
TF
2065 clk->parent_names = kcalloc(clk->num_parents, sizeof(char *),
2066 GFP_KERNEL);
d1302a36
MT
2067
2068 if (!clk->parent_names) {
2069 pr_err("%s: could not allocate clk->parent_names\n", __func__);
2070 ret = -ENOMEM;
2071 goto fail_parent_names;
2072 }
2073
2074
2075 /* copy each string name in case parent_names is __initdata */
0197b3ea
SK
2076 for (i = 0; i < clk->num_parents; i++) {
2077 clk->parent_names[i] = kstrdup(hw->init->parent_names[i],
2078 GFP_KERNEL);
d1302a36
MT
2079 if (!clk->parent_names[i]) {
2080 pr_err("%s: could not copy parent_names\n", __func__);
2081 ret = -ENOMEM;
2082 goto fail_parent_names_copy;
2083 }
2084 }
2085
2086 ret = __clk_init(dev, clk);
2087 if (!ret)
293ba3b4 2088 return clk;
b2476490 2089
d1302a36
MT
2090fail_parent_names_copy:
2091 while (--i >= 0)
2092 kfree(clk->parent_names[i]);
2093 kfree(clk->parent_names);
2094fail_parent_names:
0197b3ea
SK
2095 kfree(clk->name);
2096fail_name:
d1302a36
MT
2097 kfree(clk);
2098fail_out:
2099 return ERR_PTR(ret);
b2476490
MT
2100}
2101EXPORT_SYMBOL_GPL(clk_register);
2102
fcb0ee6a
SN
2103/*
2104 * Free memory allocated for a clock.
2105 * Caller must hold prepare_lock.
2106 */
2107static void __clk_release(struct kref *ref)
2108{
2109 struct clk *clk = container_of(ref, struct clk, ref);
2110 int i = clk->num_parents;
2111
2112 kfree(clk->parents);
2113 while (--i >= 0)
2114 kfree(clk->parent_names[i]);
2115
2116 kfree(clk->parent_names);
2117 kfree(clk->name);
2118 kfree(clk);
2119}
2120
2121/*
2122 * Empty clk_ops for unregistered clocks. These are used temporarily
2123 * after clk_unregister() was called on a clock and until last clock
2124 * consumer calls clk_put() and the struct clk object is freed.
2125 */
2126static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2127{
2128 return -ENXIO;
2129}
2130
2131static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2132{
2133 WARN_ON_ONCE(1);
2134}
2135
2136static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2137 unsigned long parent_rate)
2138{
2139 return -ENXIO;
2140}
2141
2142static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2143{
2144 return -ENXIO;
2145}
2146
2147static const struct clk_ops clk_nodrv_ops = {
2148 .enable = clk_nodrv_prepare_enable,
2149 .disable = clk_nodrv_disable_unprepare,
2150 .prepare = clk_nodrv_prepare_enable,
2151 .unprepare = clk_nodrv_disable_unprepare,
2152 .set_rate = clk_nodrv_set_rate,
2153 .set_parent = clk_nodrv_set_parent,
2154};
2155
1df5c939
MB
2156/**
2157 * clk_unregister - unregister a currently registered clock
2158 * @clk: clock to unregister
1df5c939 2159 */
fcb0ee6a
SN
2160void clk_unregister(struct clk *clk)
2161{
2162 unsigned long flags;
2163
6314b679
SB
2164 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2165 return;
2166
2167 clk_debug_unregister(clk);
fcb0ee6a
SN
2168
2169 clk_prepare_lock();
2170
2171 if (clk->ops == &clk_nodrv_ops) {
2172 pr_err("%s: unregistered clock: %s\n", __func__, clk->name);
6314b679 2173 return;
fcb0ee6a
SN
2174 }
2175 /*
2176 * Assign empty clock ops for consumers that might still hold
2177 * a reference to this clock.
2178 */
2179 flags = clk_enable_lock();
2180 clk->ops = &clk_nodrv_ops;
2181 clk_enable_unlock(flags);
2182
2183 if (!hlist_empty(&clk->children)) {
2184 struct clk *child;
874f224c 2185 struct hlist_node *t;
fcb0ee6a
SN
2186
2187 /* Reparent all children to the orphan list. */
874f224c 2188 hlist_for_each_entry_safe(child, t, &clk->children, child_node)
fcb0ee6a
SN
2189 clk_set_parent(child, NULL);
2190 }
2191
fcb0ee6a
SN
2192 hlist_del_init(&clk->child_node);
2193
2194 if (clk->prepare_count)
2195 pr_warn("%s: unregistering prepared clock: %s\n",
2196 __func__, clk->name);
fcb0ee6a 2197 kref_put(&clk->ref, __clk_release);
6314b679 2198
fcb0ee6a
SN
2199 clk_prepare_unlock();
2200}
1df5c939
MB
2201EXPORT_SYMBOL_GPL(clk_unregister);
2202
46c8773a
SB
2203static void devm_clk_release(struct device *dev, void *res)
2204{
293ba3b4 2205 clk_unregister(*(struct clk **)res);
46c8773a
SB
2206}
2207
2208/**
2209 * devm_clk_register - resource managed clk_register()
2210 * @dev: device that is registering this clock
2211 * @hw: link to hardware-specific clock data
2212 *
2213 * Managed clk_register(). Clocks returned from this function are
2214 * automatically clk_unregister()ed on driver detach. See clk_register() for
2215 * more information.
2216 */
2217struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2218{
2219 struct clk *clk;
293ba3b4 2220 struct clk **clkp;
46c8773a 2221
293ba3b4
SB
2222 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2223 if (!clkp)
46c8773a
SB
2224 return ERR_PTR(-ENOMEM);
2225
293ba3b4
SB
2226 clk = clk_register(dev, hw);
2227 if (!IS_ERR(clk)) {
2228 *clkp = clk;
2229 devres_add(dev, clkp);
46c8773a 2230 } else {
293ba3b4 2231 devres_free(clkp);
46c8773a
SB
2232 }
2233
2234 return clk;
2235}
2236EXPORT_SYMBOL_GPL(devm_clk_register);
2237
2238static int devm_clk_match(struct device *dev, void *res, void *data)
2239{
2240 struct clk *c = res;
2241 if (WARN_ON(!c))
2242 return 0;
2243 return c == data;
2244}
2245
2246/**
2247 * devm_clk_unregister - resource managed clk_unregister()
2248 * @clk: clock to unregister
2249 *
2250 * Deallocate a clock allocated with devm_clk_register(). Normally
2251 * this function will not need to be called and the resource management
2252 * code will ensure that the resource is freed.
2253 */
2254void devm_clk_unregister(struct device *dev, struct clk *clk)
2255{
2256 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2257}
2258EXPORT_SYMBOL_GPL(devm_clk_unregister);
2259
ac2df527
SN
2260/*
2261 * clkdev helpers
2262 */
2263int __clk_get(struct clk *clk)
2264{
00efcb1c
SN
2265 if (clk) {
2266 if (!try_module_get(clk->owner))
2267 return 0;
ac2df527 2268
00efcb1c
SN
2269 kref_get(&clk->ref);
2270 }
ac2df527
SN
2271 return 1;
2272}
2273
2274void __clk_put(struct clk *clk)
2275{
10cdfe54
TV
2276 struct module *owner;
2277
00efcb1c 2278 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2279 return;
2280
fcb0ee6a 2281 clk_prepare_lock();
10cdfe54 2282 owner = clk->owner;
fcb0ee6a
SN
2283 kref_put(&clk->ref, __clk_release);
2284 clk_prepare_unlock();
2285
10cdfe54 2286 module_put(owner);
ac2df527
SN
2287}
2288
b2476490
MT
2289/*** clk rate change notifiers ***/
2290
2291/**
2292 * clk_notifier_register - add a clk rate change notifier
2293 * @clk: struct clk * to watch
2294 * @nb: struct notifier_block * with callback info
2295 *
2296 * Request notification when clk's rate changes. This uses an SRCU
2297 * notifier because we want it to block and notifier unregistrations are
2298 * uncommon. The callbacks associated with the notifier must not
2299 * re-enter into the clk framework by calling any top-level clk APIs;
2300 * this will cause a nested prepare_lock mutex.
2301 *
5324fda7
SB
2302 * In all notification cases cases (pre, post and abort rate change) the
2303 * original clock rate is passed to the callback via struct
2304 * clk_notifier_data.old_rate and the new frequency is passed via struct
b2476490
MT
2305 * clk_notifier_data.new_rate.
2306 *
b2476490
MT
2307 * clk_notifier_register() must be called from non-atomic context.
2308 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2309 * allocation failure; otherwise, passes along the return value of
2310 * srcu_notifier_chain_register().
2311 */
2312int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2313{
2314 struct clk_notifier *cn;
2315 int ret = -ENOMEM;
2316
2317 if (!clk || !nb)
2318 return -EINVAL;
2319
eab89f69 2320 clk_prepare_lock();
b2476490
MT
2321
2322 /* search the list of notifiers for this clk */
2323 list_for_each_entry(cn, &clk_notifier_list, node)
2324 if (cn->clk == clk)
2325 break;
2326
2327 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2328 if (cn->clk != clk) {
2329 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2330 if (!cn)
2331 goto out;
2332
2333 cn->clk = clk;
2334 srcu_init_notifier_head(&cn->notifier_head);
2335
2336 list_add(&cn->node, &clk_notifier_list);
2337 }
2338
2339 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2340
2341 clk->notifier_count++;
2342
2343out:
eab89f69 2344 clk_prepare_unlock();
b2476490
MT
2345
2346 return ret;
2347}
2348EXPORT_SYMBOL_GPL(clk_notifier_register);
2349
2350/**
2351 * clk_notifier_unregister - remove a clk rate change notifier
2352 * @clk: struct clk *
2353 * @nb: struct notifier_block * with callback info
2354 *
2355 * Request no further notification for changes to 'clk' and frees memory
2356 * allocated in clk_notifier_register.
2357 *
2358 * Returns -EINVAL if called with null arguments; otherwise, passes
2359 * along the return value of srcu_notifier_chain_unregister().
2360 */
2361int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2362{
2363 struct clk_notifier *cn = NULL;
2364 int ret = -EINVAL;
2365
2366 if (!clk || !nb)
2367 return -EINVAL;
2368
eab89f69 2369 clk_prepare_lock();
b2476490
MT
2370
2371 list_for_each_entry(cn, &clk_notifier_list, node)
2372 if (cn->clk == clk)
2373 break;
2374
2375 if (cn->clk == clk) {
2376 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2377
2378 clk->notifier_count--;
2379
2380 /* XXX the notifier code should handle this better */
2381 if (!cn->notifier_head.head) {
2382 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2383 list_del(&cn->node);
b2476490
MT
2384 kfree(cn);
2385 }
2386
2387 } else {
2388 ret = -ENOENT;
2389 }
2390
eab89f69 2391 clk_prepare_unlock();
b2476490
MT
2392
2393 return ret;
2394}
2395EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2396
2397#ifdef CONFIG_OF
2398/**
2399 * struct of_clk_provider - Clock provider registration structure
2400 * @link: Entry in global list of clock providers
2401 * @node: Pointer to device tree node of clock provider
2402 * @get: Get clock callback. Returns NULL or a struct clk for the
2403 * given clock specifier
2404 * @data: context pointer to be passed into @get callback
2405 */
2406struct of_clk_provider {
2407 struct list_head link;
2408
2409 struct device_node *node;
2410 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2411 void *data;
2412};
2413
f2f6c255
PG
2414static const struct of_device_id __clk_of_table_sentinel
2415 __used __section(__clk_of_table_end);
2416
766e6a4e 2417static LIST_HEAD(of_clk_providers);
d6782c26
SN
2418static DEFINE_MUTEX(of_clk_mutex);
2419
2420/* of_clk_provider list locking helpers */
2421void of_clk_lock(void)
2422{
2423 mutex_lock(&of_clk_mutex);
2424}
2425
2426void of_clk_unlock(void)
2427{
2428 mutex_unlock(&of_clk_mutex);
2429}
766e6a4e
GL
2430
2431struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2432 void *data)
2433{
2434 return data;
2435}
2436EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2437
494bfec9
SG
2438struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2439{
2440 struct clk_onecell_data *clk_data = data;
2441 unsigned int idx = clkspec->args[0];
2442
2443 if (idx >= clk_data->clk_num) {
2444 pr_err("%s: invalid clock index %d\n", __func__, idx);
2445 return ERR_PTR(-EINVAL);
2446 }
2447
2448 return clk_data->clks[idx];
2449}
2450EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2451
766e6a4e
GL
2452/**
2453 * of_clk_add_provider() - Register a clock provider for a node
2454 * @np: Device node pointer associated with clock provider
2455 * @clk_src_get: callback for decoding clock
2456 * @data: context pointer for @clk_src_get callback.
2457 */
2458int of_clk_add_provider(struct device_node *np,
2459 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2460 void *data),
2461 void *data)
2462{
2463 struct of_clk_provider *cp;
86be408b 2464 int ret;
766e6a4e
GL
2465
2466 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2467 if (!cp)
2468 return -ENOMEM;
2469
2470 cp->node = of_node_get(np);
2471 cp->data = data;
2472 cp->get = clk_src_get;
2473
d6782c26 2474 mutex_lock(&of_clk_mutex);
766e6a4e 2475 list_add(&cp->link, &of_clk_providers);
d6782c26 2476 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2477 pr_debug("Added clock from %s\n", np->full_name);
2478
86be408b
SN
2479 ret = of_clk_set_defaults(np, true);
2480 if (ret < 0)
2481 of_clk_del_provider(np);
2482
2483 return ret;
766e6a4e
GL
2484}
2485EXPORT_SYMBOL_GPL(of_clk_add_provider);
2486
2487/**
2488 * of_clk_del_provider() - Remove a previously registered clock provider
2489 * @np: Device node pointer associated with clock provider
2490 */
2491void of_clk_del_provider(struct device_node *np)
2492{
2493 struct of_clk_provider *cp;
2494
d6782c26 2495 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2496 list_for_each_entry(cp, &of_clk_providers, link) {
2497 if (cp->node == np) {
2498 list_del(&cp->link);
2499 of_node_put(cp->node);
2500 kfree(cp);
2501 break;
2502 }
2503 }
d6782c26 2504 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2505}
2506EXPORT_SYMBOL_GPL(of_clk_del_provider);
2507
d6782c26 2508struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec)
766e6a4e
GL
2509{
2510 struct of_clk_provider *provider;
a34cd466 2511 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e
GL
2512
2513 /* Check if we have such a provider in our array */
766e6a4e
GL
2514 list_for_each_entry(provider, &of_clk_providers, link) {
2515 if (provider->node == clkspec->np)
2516 clk = provider->get(clkspec, provider->data);
2517 if (!IS_ERR(clk))
2518 break;
2519 }
d6782c26
SN
2520
2521 return clk;
2522}
2523
2524struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
2525{
2526 struct clk *clk;
2527
2528 mutex_lock(&of_clk_mutex);
2529 clk = __of_clk_get_from_provider(clkspec);
2530 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2531
2532 return clk;
2533}
2534
f6102742
MT
2535int of_clk_get_parent_count(struct device_node *np)
2536{
2537 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
2538}
2539EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
2540
766e6a4e
GL
2541const char *of_clk_get_parent_name(struct device_node *np, int index)
2542{
2543 struct of_phandle_args clkspec;
7a0fc1a3 2544 struct property *prop;
766e6a4e 2545 const char *clk_name;
7a0fc1a3
BD
2546 const __be32 *vp;
2547 u32 pv;
766e6a4e 2548 int rc;
7a0fc1a3 2549 int count;
766e6a4e
GL
2550
2551 if (index < 0)
2552 return NULL;
2553
2554 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
2555 &clkspec);
2556 if (rc)
2557 return NULL;
2558
7a0fc1a3
BD
2559 index = clkspec.args_count ? clkspec.args[0] : 0;
2560 count = 0;
2561
2562 /* if there is an indices property, use it to transfer the index
2563 * specified into an array offset for the clock-output-names property.
2564 */
2565 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
2566 if (index == pv) {
2567 index = count;
2568 break;
2569 }
2570 count++;
2571 }
2572
766e6a4e 2573 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 2574 index,
766e6a4e
GL
2575 &clk_name) < 0)
2576 clk_name = clkspec.np->name;
2577
2578 of_node_put(clkspec.np);
2579 return clk_name;
2580}
2581EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
2582
1771b10d
GC
2583struct clock_provider {
2584 of_clk_init_cb_t clk_init_cb;
2585 struct device_node *np;
2586 struct list_head node;
2587};
2588
2589static LIST_HEAD(clk_provider_list);
2590
2591/*
2592 * This function looks for a parent clock. If there is one, then it
2593 * checks that the provider for this parent clock was initialized, in
2594 * this case the parent clock will be ready.
2595 */
2596static int parent_ready(struct device_node *np)
2597{
2598 int i = 0;
2599
2600 while (true) {
2601 struct clk *clk = of_clk_get(np, i);
2602
2603 /* this parent is ready we can check the next one */
2604 if (!IS_ERR(clk)) {
2605 clk_put(clk);
2606 i++;
2607 continue;
2608 }
2609
2610 /* at least one parent is not ready, we exit now */
2611 if (PTR_ERR(clk) == -EPROBE_DEFER)
2612 return 0;
2613
2614 /*
2615 * Here we make assumption that the device tree is
2616 * written correctly. So an error means that there is
2617 * no more parent. As we didn't exit yet, then the
2618 * previous parent are ready. If there is no clock
2619 * parent, no need to wait for them, then we can
2620 * consider their absence as being ready
2621 */
2622 return 1;
2623 }
2624}
2625
766e6a4e
GL
2626/**
2627 * of_clk_init() - Scan and init clock providers from the DT
2628 * @matches: array of compatible values and init functions for providers.
2629 *
1771b10d 2630 * This function scans the device tree for matching clock providers
e5ca8fb4 2631 * and calls their initialization functions. It also does it by trying
1771b10d 2632 * to follow the dependencies.
766e6a4e
GL
2633 */
2634void __init of_clk_init(const struct of_device_id *matches)
2635{
7f7ed584 2636 const struct of_device_id *match;
766e6a4e 2637 struct device_node *np;
1771b10d
GC
2638 struct clock_provider *clk_provider, *next;
2639 bool is_init_done;
2640 bool force = false;
766e6a4e 2641
f2f6c255 2642 if (!matches)
819b4861 2643 matches = &__clk_of_table;
f2f6c255 2644
1771b10d 2645 /* First prepare the list of the clocks providers */
7f7ed584 2646 for_each_matching_node_and_match(np, matches, &match) {
1771b10d
GC
2647 struct clock_provider *parent =
2648 kzalloc(sizeof(struct clock_provider), GFP_KERNEL);
2649
2650 parent->clk_init_cb = match->data;
2651 parent->np = np;
3f6d439f 2652 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
2653 }
2654
2655 while (!list_empty(&clk_provider_list)) {
2656 is_init_done = false;
2657 list_for_each_entry_safe(clk_provider, next,
2658 &clk_provider_list, node) {
2659 if (force || parent_ready(clk_provider->np)) {
86be408b 2660
1771b10d 2661 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
2662 of_clk_set_defaults(clk_provider->np, true);
2663
1771b10d
GC
2664 list_del(&clk_provider->node);
2665 kfree(clk_provider);
2666 is_init_done = true;
2667 }
2668 }
2669
2670 /*
e5ca8fb4 2671 * We didn't manage to initialize any of the
1771b10d
GC
2672 * remaining providers during the last loop, so now we
2673 * initialize all the remaining ones unconditionally
2674 * in case the clock parent was not mandatory
2675 */
2676 if (!is_init_done)
2677 force = true;
766e6a4e
GL
2678 }
2679}
2680#endif