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clk: imx: Remove CLK_IS_ROOT
[mirror_ubuntu-bionic-kernel.git] / drivers / clk / imx / clk.h
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6c7b0685
SH
1#ifndef __MACH_IMX_CLK_H
2#define __MACH_IMX_CLK_H
3
4#include <linux/spinlock.h>
5#include <linux/clk-provider.h>
3a84d17b
SH
6
7extern spinlock_t imx_ccm_lock;
6c7b0685 8
229be9c1 9void imx_check_clocks(struct clk *clks[], unsigned int count);
55adc61c 10void imx_register_uart_clocks(struct clk ** const clks[]);
229be9c1 11
dfd87144
LY
12extern void imx_cscmr1_fixup(u32 *val);
13
3bec5f81
SG
14enum imx_pllv1_type {
15 IMX_PLLV1_IMX1,
16 IMX_PLLV1_IMX21,
17 IMX_PLLV1_IMX25,
18 IMX_PLLV1_IMX27,
19 IMX_PLLV1_IMX31,
20 IMX_PLLV1_IMX35,
21};
22
23struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name,
24 const char *parent, void __iomem *base);
6c7b0685 25
a547b816
SH
26struct clk *imx_clk_pllv2(const char *name, const char *parent,
27 void __iomem *base);
28
a3f6b9db
SG
29enum imx_pllv3_type {
30 IMX_PLLV3_GENERIC,
31 IMX_PLLV3_SYS,
32 IMX_PLLV3_USB,
60ad8467 33 IMX_PLLV3_USB_VF610,
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SG
34 IMX_PLLV3_AV,
35 IMX_PLLV3_ENET,
f5394745 36 IMX_PLLV3_ENET_IMX7,
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SG
37};
38
39struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
2b254693 40 const char *parent_name, void __iomem *base, u32 div_mask);
a3f6b9db 41
b75c0151
SH
42struct clk *clk_register_gate2(struct device *dev, const char *name,
43 const char *parent_name, unsigned long flags,
44 void __iomem *reg, u8 bit_idx,
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45 u8 clk_gate_flags, spinlock_t *lock,
46 unsigned int *share_count);
b75c0151 47
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MF
48struct clk * imx_obtain_fixed_clock(
49 const char *name, unsigned long rate);
50
19d86344
SG
51struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
52 void __iomem *reg, u8 shift, u32 exclusive_mask);
53
b75c0151
SH
54static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
55 void __iomem *reg, u8 shift)
56{
57 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
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SG
58 shift, 0, &imx_ccm_lock, NULL);
59}
60
61static inline struct clk *imx_clk_gate2_shared(const char *name,
62 const char *parent, void __iomem *reg, u8 shift,
63 unsigned int *share_count)
64{
65 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
66 shift, 0, &imx_ccm_lock, share_count);
b75c0151
SH
67}
68
a10bd67f
SG
69struct clk *imx_clk_pfd(const char *name, const char *parent_name,
70 void __iomem *reg, u8 idx);
71
32af7a83
SG
72struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
73 void __iomem *reg, u8 shift, u8 width,
74 void __iomem *busy_reg, u8 busy_shift);
75
76struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
77 u8 width, void __iomem *busy_reg, u8 busy_shift,
78 const char **parent_names, int num_parents);
79
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80struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
81 void __iomem *reg, u8 shift, u8 width,
82 void (*fixup)(u32 *val));
83
a49e6c4b
LY
84struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
85 u8 shift, u8 width, const char **parents,
86 int num_parents, void (*fixup)(u32 *val));
87
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88static inline struct clk *imx_clk_fixed(const char *name, int rate)
89{
38c7035f 90 return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
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SH
91}
92
93static inline struct clk *imx_clk_divider(const char *name, const char *parent,
94 void __iomem *reg, u8 shift, u8 width)
95{
96 return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
97 reg, shift, width, 0, &imx_ccm_lock);
98}
99
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PZ
100static inline struct clk *imx_clk_divider_flags(const char *name,
101 const char *parent, void __iomem *reg, u8 shift, u8 width,
102 unsigned long flags)
103{
104 return clk_register_divider(NULL, name, parent, flags,
105 reg, shift, width, 0, &imx_ccm_lock);
106}
107
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108static inline struct clk *imx_clk_gate(const char *name, const char *parent,
109 void __iomem *reg, u8 shift)
110{
111 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
112 shift, 0, &imx_ccm_lock);
113}
114
65251690
AS
115static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
116 void __iomem *reg, u8 shift)
117{
118 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
119 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
120}
121
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122static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
123 u8 shift, u8 width, const char **parents, int num_parents)
124{
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125 return clk_register_mux(NULL, name, parents, num_parents,
126 CLK_SET_RATE_NO_REPARENT, reg, shift,
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127 width, 0, &imx_ccm_lock);
128}
129
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130static inline struct clk *imx_clk_mux_flags(const char *name,
131 void __iomem *reg, u8 shift, u8 width, const char **parents,
132 int num_parents, unsigned long flags)
133{
134 return clk_register_mux(NULL, name, parents, num_parents,
819c1de3 135 flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
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PZ
136 &imx_ccm_lock);
137}
138
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SH
139static inline struct clk *imx_clk_fixed_factor(const char *name,
140 const char *parent, unsigned int mult, unsigned int div)
141{
142 return clk_register_fixed_factor(NULL, name, parent,
143 CLK_SET_RATE_PARENT, mult, div);
144}
145
e0fed513
LS
146struct clk *imx_clk_cpu(const char *name, const char *parent_name,
147 struct clk *div, struct clk *mux, struct clk *pll,
148 struct clk *step);
149
6c7b0685 150#endif