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5b1defde GU |
1 | /* |
2 | * R-Car Gen3 Clock Pulse Generator | |
3 | * | |
4 | * Copyright (C) 2015-2016 Glider bvba | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; version 2 of the License. | |
9 | */ | |
10 | ||
11 | #ifndef __CLK_RENESAS_RCAR_GEN3_CPG_H__ | |
12 | #define __CLK_RENESAS_RCAR_GEN3_CPG_H__ | |
13 | ||
14 | enum rcar_gen3_clk_types { | |
15 | CLK_TYPE_GEN3_MAIN = CLK_TYPE_CUSTOM, | |
16 | CLK_TYPE_GEN3_PLL0, | |
17 | CLK_TYPE_GEN3_PLL1, | |
18 | CLK_TYPE_GEN3_PLL2, | |
19 | CLK_TYPE_GEN3_PLL3, | |
20 | CLK_TYPE_GEN3_PLL4, | |
21 | CLK_TYPE_GEN3_SD, | |
22 | CLK_TYPE_GEN3_R, | |
23 | }; | |
24 | ||
25 | #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ | |
26 | DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) | |
27 | ||
28 | struct rcar_gen3_cpg_pll_config { | |
29 | unsigned int extal_div; | |
30 | unsigned int pll1_mult; | |
31 | unsigned int pll3_mult; | |
32 | }; | |
33 | ||
34 | #define CPG_RCKCR 0x240 | |
35 | ||
36 | u32 rcar_gen3_read_mode_pins(void); | |
37 | struct clk *rcar_gen3_cpg_clk_register(struct device *dev, | |
38 | const struct cpg_core_clk *core, const struct cpg_mssr_info *info, | |
39 | struct clk **clks, void __iomem *base); | |
40 | int rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config, | |
41 | unsigned int clk_extalr); | |
42 | ||
43 | #endif |