[mirror_ubuntu-bionic-kernel.git] / drivers / clk / st / clkgen-mux.c

/*
 * clkgen-mux.c: ST GEN-MUX Clock driver
 *
 * Copyright (C) 2014 STMicroelectronics (R&D) Limited
 *
 * Authors: Stephen Gallimore <stephen.gallimore@st.com>
 *	    Pankaj Dev <pankaj.dev@st.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 */

#include <linux/slab.h>
#include <linux/of_address.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include "clkgen.h"

static const char ** __init clkgen_mux_get_parents(struct device_node *np,
						       int *num_parents)
{
	const char **parents;
	unsigned int nparents;

	nparents = of_clk_get_parent_count(np);
	if (WARN_ON(!nparents))
		return ERR_PTR(-EINVAL);

	parents = kcalloc(nparents, sizeof(const char *), GFP_KERNEL);
	if (!parents)
		return ERR_PTR(-ENOMEM);

	*num_parents = of_clk_parent_fill(np, parents, nparents);
	return parents;
}

struct clkgen_mux_data {
	u32 offset;
	u8 shift;
	u8 width;
	spinlock_t *lock;
	unsigned long clk_flags;
	u8 mux_flags;
};

static struct clkgen_mux_data stih407_a9_mux_data = {
	.offset = 0x1a4,
	.shift = 0,
	.width = 2,
	.lock = &clkgen_a9_lock,
};

static void __init st_of_clkgen_mux_setup(struct device_node *np,
		struct clkgen_mux_data *data)
{
	struct clk *clk;
	void __iomem *reg;
	const char **parents;
	int num_parents = 0;

	reg = of_iomap(np, 0);
	if (!reg) {
		pr_err("%s: Failed to get base address\n", __func__);
		return;
	}

	parents = clkgen_mux_get_parents(np, &num_parents);
	if (IS_ERR(parents)) {
		pr_err("%s: Failed to get parents (%ld)\n",
				__func__, PTR_ERR(parents));
		goto err_parents;
	}

	clk = clk_register_mux(NULL, np->name, parents, num_parents,
				data->clk_flags | CLK_SET_RATE_PARENT,
				reg + data->offset,
				data->shift, data->width, data->mux_flags,
				data->lock);
	if (IS_ERR(clk))
		goto err;

	pr_debug("%s: parent %s rate %u\n",
			__clk_get_name(clk),
			__clk_get_name(clk_get_parent(clk)),
			(unsigned int)clk_get_rate(clk));

	kfree(parents);
	of_clk_add_provider(np, of_clk_src_simple_get, clk);
	return;

err:
	kfree(parents);
err_parents:
	iounmap(reg);
}

static void __init st_of_clkgen_a9_mux_setup(struct device_node *np)
{
	st_of_clkgen_mux_setup(np, &stih407_a9_mux_data);
}
CLK_OF_DECLARE(clkgen_a9mux, "st,stih407-clkgen-a9-mux",
		st_of_clkgen_a9_mux_setup);
Commit	Line	Data
94885faf GF	1	/*
	2	* clkgen-mux.c: ST GEN-MUX Clock driver
	3	*
	4	* Copyright (C) 2014 STMicroelectronics (R&D) Limited
	5	*
	6	* Authors: Stephen Gallimore <stephen.gallimore@st.com>
	7	* Pankaj Dev <pankaj.dev@st.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	*/
	15
	16	#include <linux/slab.h>
	17	#include <linux/of_address.h>
d5f728ac	18	#include <linux/clk.h>
94885faf	19	#include <linux/clk-provider.h>
46a57afd	20	#include "clkgen.h"
94885faf	21
94885faf GF	22	static const char ** __init clkgen_mux_get_parents(struct device_node *np,
	23	int *num_parents)
	24	{
	25	const char **parents;
caeb057c	26	unsigned int nparents;
94885faf	27
0a65239c	28	nparents = of_clk_get_parent_count(np);
caeb057c	29	if (WARN_ON(!nparents))
94885faf GF	30	return ERR_PTR(-EINVAL);
94885faf GF	31
86665d28	32	parents = kcalloc(nparents, sizeof(const char *), GFP_KERNEL);
94885faf GF	33	if (!parents)
	34	return ERR_PTR(-ENOMEM);
	35
0b4e7f08	36	*num_parents = of_clk_parent_fill(np, parents, nparents);
94885faf GF	37	return parents;
	38	}
	39
44993d38 GF	40	struct clkgen_mux_data {
	41	u32 offset;
	42	u8 shift;
	43	u8 width;
	44	spinlock_t *lock;
	45	unsigned long clk_flags;
	46	u8 mux_flags;
	47	};
	48
13e6f2da GF	49	static struct clkgen_mux_data stih407_a9_mux_data = {
13e6f2da GF	50	.offset = 0x1a4,
3be6d8ce	51	.shift = 0,
13e6f2da	52	.width = 2,
46a57afd	53	.lock = &clkgen_a9_lock,
13e6f2da	54	};
ab35dc13	55
880d54ff GF	56	static void __init st_of_clkgen_mux_setup(struct device_node *np,
880d54ff GF	57	struct clkgen_mux_data *data)
44993d38	58	{
44993d38 GF	59	struct clk *clk;
	60	void __iomem *reg;
	61	const char **parents;
7df404c9	62	int num_parents = 0;
44993d38 GF	63
	64	reg = of_iomap(np, 0);
	65	if (!reg) {
	66	pr_err("%s: Failed to get base address\n", __func__);
	67	return;
	68	}
	69
	70	parents = clkgen_mux_get_parents(np, &num_parents);
	71	if (IS_ERR(parents)) {
	72	pr_err("%s: Failed to get parents (%ld)\n",
	73	__func__, PTR_ERR(parents));
86665d28	74	goto err_parents;
44993d38 GF	75	}
	76
	77	clk = clk_register_mux(NULL, np->name, parents, num_parents,
	78	data->clk_flags \| CLK_SET_RATE_PARENT,
	79	reg + data->offset,
	80	data->shift, data->width, data->mux_flags,
	81	data->lock);
	82	if (IS_ERR(clk))
	83	goto err;
	84
	85	pr_debug("%s: parent %s rate %u\n",
	86	__clk_get_name(clk),
	87	__clk_get_name(clk_get_parent(clk)),
	88	(unsigned int)clk_get_rate(clk));
	89
86665d28	90	kfree(parents);
44993d38	91	of_clk_add_provider(np, of_clk_src_simple_get, clk);
86665d28	92	return;
44993d38 GF	93
	94	err:
	95	kfree(parents);
86665d28 SB	96	err_parents:
86665d28 SB	97	iounmap(reg);
44993d38	98	}
880d54ff GF	99
	100	static void __init st_of_clkgen_a9_mux_setup(struct device_node *np)
	101	{
	102	st_of_clkgen_mux_setup(np, &stih407_a9_mux_data);
	103	}
	104	CLK_OF_DECLARE(clkgen_a9mux, "st,stih407-clkgen-a9-mux",
	105	st_of_clkgen_a9_mux_setup);