[mirror_ubuntu-bionic-kernel.git] / drivers / clk / sunxi-ng / ccu-sun6i-a31.h

/*
 * Copyright 2016 Chen-Yu Tsai
 *
 * Chen-Yu Tsai <wens@csie.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef _CCU_SUN6I_A31_H_
#define _CCU_SUN6I_A31_H_

#include <dt-bindings/clock/sun6i-a31-ccu.h>
#include <dt-bindings/reset/sun6i-a31-ccu.h>

#define CLK_PLL_CPU		0
#define CLK_PLL_AUDIO_BASE	1
#define CLK_PLL_AUDIO		2
#define CLK_PLL_AUDIO_2X	3
#define CLK_PLL_AUDIO_4X	4
#define CLK_PLL_AUDIO_8X	5
#define CLK_PLL_VIDEO0		6

/* The PLL_VIDEO0_2X clock is exported */

#define CLK_PLL_VE		8
#define CLK_PLL_DDR		9

/* The PLL_PERIPH clock is exported */

#define CLK_PLL_PERIPH_2X	11
#define CLK_PLL_VIDEO1		12

/* The PLL_VIDEO1_2X clock is exported */

#define CLK_PLL_GPU		14
#define CLK_PLL_MIPI		15
#define CLK_PLL9		16
#define CLK_PLL10		17

/* The CPUX clock is exported */

#define CLK_AXI			19
#define CLK_AHB1		20
#define CLK_APB1		21
#define CLK_APB2		22

/* All the bus gates are exported */

/* The first bunch of module clocks are exported */

/* EMAC clock is not implemented */

#define CLK_MDFS		107
#define CLK_SDRAM0		108
#define CLK_SDRAM1		109

/* All the DRAM gates are exported */

/* Some more module clocks are exported */

#define CLK_MBUS0		141
#define CLK_MBUS1		142

/* Some more module clocks and external clock outputs are exported */

#define CLK_NUMBER		(CLK_OUT_C + 1)

#endif /* _CCU_SUN6I_A31_H_ */
Commit	Line	Data
c6e6c96d CYT	1	/*
	2	* Copyright 2016 Chen-Yu Tsai
	3	*
	4	* Chen-Yu Tsai <wens@csie.org>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*/
	16
	17	#ifndef _CCU_SUN6I_A31_H_
	18	#define _CCU_SUN6I_A31_H_
	19
	20	#include <dt-bindings/clock/sun6i-a31-ccu.h>
	21	#include <dt-bindings/reset/sun6i-a31-ccu.h>
	22
	23	#define CLK_PLL_CPU 0
	24	#define CLK_PLL_AUDIO_BASE 1
	25	#define CLK_PLL_AUDIO 2
	26	#define CLK_PLL_AUDIO_2X 3
	27	#define CLK_PLL_AUDIO_4X 4
	28	#define CLK_PLL_AUDIO_8X 5
	29	#define CLK_PLL_VIDEO0 6
80815004 CYT	30
	31	/* The PLL_VIDEO0_2X clock is exported */
	32
c6e6c96d CYT	33	#define CLK_PLL_VE 8
	34	#define CLK_PLL_DDR 9
	35
	36	/* The PLL_PERIPH clock is exported */
	37
	38	#define CLK_PLL_PERIPH_2X 11
	39	#define CLK_PLL_VIDEO1 12
80815004 CYT	40
	41	/* The PLL_VIDEO1_2X clock is exported */
	42
c6e6c96d CYT	43	#define CLK_PLL_GPU 14
	44	#define CLK_PLL_MIPI 15
	45	#define CLK_PLL9 16
	46	#define CLK_PLL10 17
	47
	48	/* The CPUX clock is exported */
	49
	50	#define CLK_AXI 19
	51	#define CLK_AHB1 20
	52	#define CLK_APB1 21
	53	#define CLK_APB2 22
	54
	55	/* All the bus gates are exported */
	56
	57	/* The first bunch of module clocks are exported */
	58
	59	/* EMAC clock is not implemented */
	60
	61	#define CLK_MDFS 107
	62	#define CLK_SDRAM0 108
	63	#define CLK_SDRAM1 109
	64
	65	/* All the DRAM gates are exported */
	66
	67	/* Some more module clocks are exported */
	68
	69	#define CLK_MBUS0 141
	70	#define CLK_MBUS1 142
	71
	72	/* Some more module clocks and external clock outputs are exported */
	73
	74	#define CLK_NUMBER (CLK_OUT_C + 1)
	75
	76	#endif /* _CCU_SUN6I_A31_H_ */