[mirror_ubuntu-bionic-kernel.git] / drivers / clk / sunxi-ng / ccu-sun8i-h3.h

/*
 * Copyright 2016 Maxime Ripard
 *
 * Maxime Ripard <maxime.ripard@free-electrons.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef _CCU_SUN8I_H3_H_
#define _CCU_SUN8I_H3_H_

#include <dt-bindings/clock/sun8i-h3-ccu.h>
#include <dt-bindings/reset/sun8i-h3-ccu.h>

#define CLK_PLL_CPUX		0
#define CLK_PLL_AUDIO_BASE	1
#define CLK_PLL_AUDIO		2
#define CLK_PLL_AUDIO_2X	3
#define CLK_PLL_AUDIO_4X	4
#define CLK_PLL_AUDIO_8X	5
#define CLK_PLL_VIDEO		6
#define CLK_PLL_VE		7
#define CLK_PLL_DDR		8

/* PLL_PERIPH0 exported for PRCM */

#define CLK_PLL_PERIPH0_2X	10
#define CLK_PLL_GPU		11
#define CLK_PLL_PERIPH1		12
#define CLK_PLL_DE		13

/* The CPUX clock is exported */

#define CLK_AXI			15
#define CLK_AHB1		16
#define CLK_APB1		17
#define CLK_APB2		18
#define CLK_AHB2		19

/* All the bus gates are exported */

/* The first bunch of module clocks are exported */

#define CLK_DRAM		96

/* All the DRAM gates are exported */

/* Some more module clocks are exported */

#define CLK_MBUS		113

/* And the GPU module clock is exported */

#define CLK_NUMBER_H3		(CLK_GPU + 1)
#define CLK_NUMBER_H5		(CLK_BUS_SCR1 + 1)

#endif /* _CCU_SUN8I_H3_H_ */
Commit	Line	Data
0577e485 MR	1	/*
	2	* Copyright 2016 Maxime Ripard
	3	*
	4	* Maxime Ripard <maxime.ripard@free-electrons.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*/
	16
	17	#ifndef _CCU_SUN8I_H3_H_
	18	#define _CCU_SUN8I_H3_H_
	19
	20	#include <dt-bindings/clock/sun8i-h3-ccu.h>
	21	#include <dt-bindings/reset/sun8i-h3-ccu.h>
	22
	23	#define CLK_PLL_CPUX 0
	24	#define CLK_PLL_AUDIO_BASE 1
	25	#define CLK_PLL_AUDIO 2
	26	#define CLK_PLL_AUDIO_2X 3
	27	#define CLK_PLL_AUDIO_4X 4
	28	#define CLK_PLL_AUDIO_8X 5
	29	#define CLK_PLL_VIDEO 6
	30	#define CLK_PLL_VE 7
	31	#define CLK_PLL_DDR 8
c4be8c68 CYT	32
	33	/* PLL_PERIPH0 exported for PRCM */
	34
0577e485 MR	35	#define CLK_PLL_PERIPH0_2X 10
	36	#define CLK_PLL_GPU 11
	37	#define CLK_PLL_PERIPH1 12
	38	#define CLK_PLL_DE 13
	39
	40	/* The CPUX clock is exported */
	41
	42	#define CLK_AXI 15
	43	#define CLK_AHB1 16
	44	#define CLK_APB1 17
	45	#define CLK_APB2 18
	46	#define CLK_AHB2 19
	47
	48	/* All the bus gates are exported */
	49
	50	/* The first bunch of module clocks are exported */
	51
	52	#define CLK_DRAM 96
	53
	54	/* All the DRAM gates are exported */
	55
	56	/* Some more module clocks are exported */
	57
	58	#define CLK_MBUS 113
	59
	60	/* And the GPU module clock is exported */
	61
9be1c8af IZ	62	#define CLK_NUMBER_H3 (CLK_GPU + 1)
9be1c8af IZ	63	#define CLK_NUMBER_H5 (CLK_BUS_SCR1 + 1)
0577e485 MR	64
0577e485 MR	65	#endif /* _CCU_SUN8I_H3_H_ */