[mirror_ubuntu-bionic-kernel.git] / drivers / clk / sunxi-ng / ccu_mult.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _CCU_MULT_H_
#define _CCU_MULT_H_

#include "ccu_common.h"
#include "ccu_frac.h"
#include "ccu_mux.h"

struct ccu_mult_internal {
	u8	offset;
	u8	shift;
	u8	width;
	u8	min;
	u8	max;
};

#define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \
	{								\
		.min	= _min,						\
		.max	= _max,						\
		.offset	= _offset,					\
		.shift	= _shift,					\
		.width	= _width,					\
	}

#define _SUNXI_CCU_MULT_MIN(_shift, _width, _min)	\
	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, _min, 0)

#define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset)	\
	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)

#define _SUNXI_CCU_MULT(_shift, _width)		\
	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, 1, 0)

struct ccu_mult {
	u32			enable;
	u32			lock;

	struct ccu_frac_internal	frac;
	struct ccu_mult_internal	mult;
	struct ccu_mux_internal	mux;
	struct ccu_common	common;
};

#define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
				   _mshift, _mwidth, _gate, _lock,	\
				   _flags)				\
	struct ccu_mult _struct = {					\
		.enable	= _gate,					\
		.lock	= _lock,					\
		.mult	= _SUNXI_CCU_MULT(_mshift, _mwidth),		\
		.common	= {						\
			.reg		= _reg,				\
			.hw.init	= CLK_HW_INIT(_name,		\
						      _parent,		\
						      &ccu_mult_ops,	\
						      _flags),		\
		},							\
	}

static inline struct ccu_mult *hw_to_ccu_mult(struct clk_hw *hw)
{
	struct ccu_common *common = hw_to_ccu_common(hw);

	return container_of(common, struct ccu_mult, common);
}

extern const struct clk_ops ccu_mult_ops;

#endif /* _CCU_MULT_H_ */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1d80c142 MR	2	#ifndef _CCU_MULT_H_
	3	#define _CCU_MULT_H_
	4
aa152335	5	#include "ccu_common.h"
d77e8135	6	#include "ccu_frac.h"
aa152335 MR	7	#include "ccu_mux.h"
aa152335 MR	8
a501a14e	9	struct ccu_mult_internal {
e66f81bb	10	u8 offset;
1d80c142 MR	11	u8 shift;
1d80c142 MR	12	u8 width;
2beaa601	13	u8 min;
0c3c8e13	14	u8 max;
1d80c142 MR	15	};
1d80c142 MR	16
0c3c8e13	17	#define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \
e66f81bb MR	18	{ \
e66f81bb MR	19	.min = _min, \
0c3c8e13	20	.max = _max, \
e66f81bb MR	21	.offset = _offset, \
	22	.shift = _shift, \
	23	.width = _width, \
1d80c142 MR	24	}
1d80c142 MR	25
e66f81bb	26	#define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \
0c3c8e13	27	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, _min, 0)
e66f81bb MR	28
e66f81bb MR	29	#define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \
0c3c8e13	30	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
e66f81bb	31
2beaa601	32	#define _SUNXI_CCU_MULT(_shift, _width) \
0c3c8e13	33	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, 1, 0)
2beaa601	34
aa152335 MR	35	struct ccu_mult {
aa152335 MR	36	u32 enable;
cf719012	37	u32 lock;
aa152335	38
d77e8135	39	struct ccu_frac_internal frac;
a501a14e	40	struct ccu_mult_internal mult;
aa152335 MR	41	struct ccu_mux_internal mux;
	42	struct ccu_common common;
	43	};
	44
	45	#define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
	46	_mshift, _mwidth, _gate, _lock, \
	47	_flags) \
	48	struct ccu_mult _struct = { \
	49	.enable = _gate, \
cf719012	50	.lock = _lock, \
aa152335 MR	51	.mult = _SUNXI_CCU_MULT(_mshift, _mwidth), \
	52	.common = { \
	53	.reg = _reg, \
	54	.hw.init = CLK_HW_INIT(_name, \
	55	_parent, \
	56	&ccu_mult_ops, \
	57	_flags), \
	58	}, \
	59	}
	60
	61	static inline struct ccu_mult hw_to_ccu_mult(struct clk_hw hw)
	62	{
	63	struct ccu_common *common = hw_to_ccu_common(hw);
	64
	65	return container_of(common, struct ccu_mult, common);
	66	}
	67
	68	extern const struct clk_ops ccu_mult_ops;
	69
1d80c142	70	#endif /* _CCU_MULT_H_ */