[mirror_ubuntu-bionic-kernel.git] / drivers / clk / sunxi-ng / ccu_nkm.h

/*
 * Copyright (c) 2016 Maxime Ripard. All rights reserved.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef _CCU_NKM_H_
#define _CCU_NKM_H_

#include <linux/clk-provider.h>

#include "ccu_common.h"
#include "ccu_div.h"
#include "ccu_mult.h"

/*
 * struct ccu_nkm - Definition of an N-K-M clock
 *
 * Clocks based on the formula parent * N * K / M
 */
struct ccu_nkm {
	u32			enable;
	u32			lock;

	struct ccu_mult_internal	n;
	struct ccu_mult_internal	k;
	struct ccu_div_internal		m;
	struct ccu_mux_internal	mux;

	unsigned int		fixed_post_div;

	struct ccu_common	common;
};

#define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \
					 _nshift, _nwidth,		\
					 _kshift, _kwidth,		\
					 _mshift, _mwidth,		\
					 _muxshift, _muxwidth,		\
					 _gate, _lock, _flags)		\
	struct ccu_nkm _struct = {					\
		.enable		= _gate,				\
		.lock		= _lock,				\
		.k		= _SUNXI_CCU_MULT(_kshift, _kwidth),	\
		.n		= _SUNXI_CCU_MULT(_nshift, _nwidth),	\
		.m		= _SUNXI_CCU_DIV(_mshift, _mwidth),	\
		.mux		= _SUNXI_CCU_MUX(_muxshift, _muxwidth),	\
		.common		= {					\
			.reg		= _reg,				\
			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\
						      _parents,		\
						      &ccu_nkm_ops,	\
						      _flags),		\
		},							\
	}

#define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
				     _nshift, _nwidth,			\
				     _kshift, _kwidth,			\
				     _mshift, _mwidth,			\
				     _gate, _lock, _flags)		\
	struct ccu_nkm _struct = {					\
		.enable		= _gate,				\
		.lock		= _lock,				\
		.k		= _SUNXI_CCU_MULT(_kshift, _kwidth),	\
		.n		= _SUNXI_CCU_MULT(_nshift, _nwidth),	\
		.m		= _SUNXI_CCU_DIV(_mshift, _mwidth),	\
		.common		= {					\
			.reg		= _reg,				\
			.hw.init	= CLK_HW_INIT(_name,		\
						      _parent,		\
						      &ccu_nkm_ops,	\
						      _flags),		\
		},							\
	}

static inline struct ccu_nkm *hw_to_ccu_nkm(struct clk_hw *hw)
{
	struct ccu_common *common = hw_to_ccu_common(hw);

	return container_of(common, struct ccu_nkm, common);
}

extern const struct clk_ops ccu_nkm_ops;

#endif /* _CCU_NKM_H_ */
Commit	Line	Data
df6561e6 MR	1	/*
	2	* Copyright (c) 2016 Maxime Ripard. All rights reserved.
	3	*
	4	* This software is licensed under the terms of the GNU General Public
	5	* License version 2, as published by the Free Software Foundation, and
	6	* may be copied, distributed, and modified under those terms.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
	14	#ifndef _CCU_NKM_H_
	15	#define _CCU_NKM_H_
	16
	17	#include <linux/clk-provider.h>
	18
	19	#include "ccu_common.h"
	20	#include "ccu_div.h"
	21	#include "ccu_mult.h"
	22
	23	/*
	24	* struct ccu_nkm - Definition of an N-K-M clock
	25	*
	26	* Clocks based on the formula parent * N * K / M
	27	*/
	28	struct ccu_nkm {
	29	u32 enable;
	30	u32 lock;
	31
a501a14e MR	32	struct ccu_mult_internal n;
	33	struct ccu_mult_internal k;
	34	struct ccu_div_internal m;
a3658359	35	struct ccu_mux_internal mux;
df6561e6	36
a6653773 IZ	37	unsigned int fixed_post_div;
a6653773 IZ	38
df6561e6 MR	39	struct ccu_common common;
	40	};
	41
a3658359 CYT	42	#define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \
	43	_nshift, _nwidth, \
	44	_kshift, _kwidth, \
	45	_mshift, _mwidth, \
	46	_muxshift, _muxwidth, \
	47	_gate, _lock, _flags) \
	48	struct ccu_nkm _struct = { \
	49	.enable = _gate, \
	50	.lock = _lock, \
	51	.k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
	52	.n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
	53	.m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
89af8525	54	.mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
a3658359 CYT	55	.common = { \
	56	.reg = _reg, \
	57	.hw.init = CLK_HW_INIT_PARENTS(_name, \
	58	_parents, \
	59	&ccu_nkm_ops, \
	60	_flags), \
	61	}, \
	62	}
	63
df6561e6 MR	64	#define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
	65	_nshift, _nwidth, \
	66	_kshift, _kwidth, \
	67	_mshift, _mwidth, \
	68	_gate, _lock, _flags) \
	69	struct ccu_nkm _struct = { \
	70	.enable = _gate, \
	71	.lock = _lock, \
	72	.k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
	73	.n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
	74	.m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
	75	.common = { \
	76	.reg = _reg, \
	77	.hw.init = CLK_HW_INIT(_name, \
	78	_parent, \
	79	&ccu_nkm_ops, \
	80	_flags), \
	81	}, \
	82	}
	83
	84	static inline struct ccu_nkm hw_to_ccu_nkm(struct clk_hw hw)
	85	{
	86	struct ccu_common *common = hw_to_ccu_common(hw);
	87
	88	return container_of(common, struct ccu_nkm, common);
	89	}
	90
	91	extern const struct clk_ops ccu_nkm_ops;
	92
	93	#endif /* _CCU_NKM_H_ */