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701190fd MW |
1 | /* |
2 | * Intel Lynxpoint LPSS clocks. | |
3 | * | |
4 | * Copyright (C) 2013, Intel Corporation | |
5 | * Authors: Mika Westerberg <mika.westerberg@linux.intel.com> | |
6 | * Heikki Krogerus <heikki.krogerus@linux.intel.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/acpi.h> | |
14 | #include <linux/clk.h> | |
15 | #include <linux/clkdev.h> | |
16 | #include <linux/clk-provider.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/platform_device.h> | |
20 | ||
21 | #include "clk-lpss.h" | |
22 | ||
23 | #define PRV_CLOCK_PARAMS 0x800 | |
24 | ||
25 | static int lpt_clk_probe(struct platform_device *pdev) | |
26 | { | |
27 | struct clk *clk; | |
28 | ||
29 | /* LPSS free running clock */ | |
30 | clk = clk_register_fixed_rate(&pdev->dev, "lpss_clk", NULL, CLK_IS_ROOT, | |
31 | 100000000); | |
32 | if (IS_ERR(clk)) | |
33 | return PTR_ERR(clk); | |
34 | ||
35 | /* Shared DMA clock */ | |
36 | clk_register_clkdev(clk, "hclk", "INTL9C60.0.auto"); | |
37 | ||
38 | /* SPI clocks */ | |
39 | clk = clk_register_lpss_gate("spi0_clk", "lpss_clk", "INT33C0", NULL, | |
40 | PRV_CLOCK_PARAMS); | |
41 | if (!IS_ERR(clk)) | |
42 | clk_register_clkdev(clk, NULL, "INT33C0:00"); | |
43 | ||
44 | clk = clk_register_lpss_gate("spi1_clk", "lpss_clk", "INT33C1", NULL, | |
45 | PRV_CLOCK_PARAMS); | |
46 | if (!IS_ERR(clk)) | |
47 | clk_register_clkdev(clk, NULL, "INT33C1:00"); | |
48 | ||
49 | /* I2C clocks */ | |
50 | clk = clk_register_lpss_gate("i2c0_clk", "lpss_clk", "INT33C2", NULL, | |
51 | PRV_CLOCK_PARAMS); | |
52 | if (!IS_ERR(clk)) | |
53 | clk_register_clkdev(clk, NULL, "INT33C2:00"); | |
54 | ||
55 | clk = clk_register_lpss_gate("i2c1_clk", "lpss_clk", "INT33C3", NULL, | |
56 | PRV_CLOCK_PARAMS); | |
57 | if (!IS_ERR(clk)) | |
58 | clk_register_clkdev(clk, NULL, "INT33C3:00"); | |
59 | ||
60 | /* UART clocks */ | |
61 | clk = clk_register_lpss_gate("uart0_clk", "lpss_clk", "INT33C4", NULL, | |
62 | PRV_CLOCK_PARAMS); | |
63 | if (!IS_ERR(clk)) | |
64 | clk_register_clkdev(clk, NULL, "INT33C4:00"); | |
65 | ||
66 | clk = clk_register_lpss_gate("uart1_clk", "lpss_clk", "INT33C5", NULL, | |
67 | PRV_CLOCK_PARAMS); | |
68 | if (!IS_ERR(clk)) | |
69 | clk_register_clkdev(clk, NULL, "INT33C5:00"); | |
70 | ||
71 | return 0; | |
72 | } | |
73 | ||
74 | static struct platform_driver lpt_clk_driver = { | |
75 | .driver = { | |
76 | .name = "clk-lpt", | |
77 | .owner = THIS_MODULE, | |
78 | }, | |
79 | .probe = lpt_clk_probe, | |
80 | }; | |
81 | ||
82 | static int __init lpt_clk_init(void) | |
83 | { | |
84 | return platform_driver_register(&lpt_clk_driver); | |
85 | } | |
86 | arch_initcall(lpt_clk_init); |