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Commit | Line | Data |
---|---|---|
58394271 | 1 | menu "Clock Source drivers" |
2f8a26c1 | 2 | depends on GENERIC_CLOCKEVENTS |
58394271 | 3 | |
bb0eb050 | 4 | config TIMER_OF |
ae278a93 | 5 | bool |
bb0eb050 | 6 | select TIMER_PROBE |
aad83b15 | 7 | |
fa1bffab | 8 | config TIMER_ACPI |
aad83b15 | 9 | bool |
bb0eb050 | 10 | select TIMER_PROBE |
aad83b15 | 11 | |
bb0eb050 | 12 | config TIMER_PROBE |
aad83b15 | 13 | bool |
ae278a93 | 14 | |
89c0b8e2 RK |
15 | config CLKSRC_I8253 |
16 | bool | |
442c8176 | 17 | |
e6220bdc TG |
18 | config CLKEVT_I8253 |
19 | bool | |
20 | ||
15f304b6 RB |
21 | config I8253_LOCK |
22 | bool | |
23 | ||
af04aa85 K |
24 | config OMAP_DM_TIMER |
25 | bool | |
26 | ||
15f304b6 | 27 | config CLKBLD_I8253 |
e6220bdc | 28 | def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK |
15f304b6 | 29 | |
442c8176 RK |
30 | config CLKSRC_MMIO |
31 | bool | |
06c3df49 | 32 | |
2ea879a7 DL |
33 | config BCM2835_TIMER |
34 | bool "BCM2835 timer driver" if COMPILE_TEST | |
2ea879a7 DL |
35 | select CLKSRC_MMIO |
36 | help | |
37 | Enables the support for the BCM2835 timer driver. | |
38 | ||
1cad71e3 DL |
39 | config BCM_KONA_TIMER |
40 | bool "BCM mobile timer driver" if COMPILE_TEST | |
1cad71e3 DL |
41 | select CLKSRC_MMIO |
42 | help | |
43 | Enables the support for the BCM Kona mobile timer driver. | |
44 | ||
9b8bb773 | 45 | config DIGICOLOR_TIMER |
e6c1db13 | 46 | bool "Digicolor timer driver" if COMPILE_TEST |
2be6d9bf | 47 | select CLKSRC_MMIO |
d7023e62 | 48 | depends on HAS_IOMEM |
e6c1db13 DL |
49 | help |
50 | Enables the support for the digicolor timer driver. | |
9b8bb773 | 51 | |
06c3df49 | 52 | config DW_APB_TIMER |
5b097f6b DL |
53 | bool "DW APB timer driver" if COMPILE_TEST |
54 | help | |
55 | Enables the support for the dw_apb timer. | |
489bccea | 56 | |
cfda5901 DN |
57 | config DW_APB_TIMER_OF |
58 | bool | |
1b4eca0f | 59 | select DW_APB_TIMER |
bb0eb050 | 60 | select TIMER_OF |
cfda5901 | 61 | |
f5bf0ee4 LW |
62 | config FTTMR010_TIMER |
63 | bool "Faraday Technology timer driver" if COMPILE_TEST | |
4750535b LW |
64 | depends on HAS_IOMEM |
65 | select CLKSRC_MMIO | |
bb0eb050 | 66 | select TIMER_OF |
4750535b LW |
67 | select MFD_SYSCON |
68 | help | |
f5bf0ee4 LW |
69 | Enables support for the Faraday Technology timer block |
70 | FTTMR010. | |
4750535b | 71 | |
468b8c4c | 72 | config ROCKCHIP_TIMER |
40ada2aa DL |
73 | bool "Rockchip timer driver" if COMPILE_TEST |
74 | depends on ARM || ARM64 | |
bb0eb050 | 75 | select TIMER_OF |
5e0a39d0 | 76 | select CLKSRC_MMIO |
40ada2aa DL |
77 | help |
78 | Enables the support for the rockchip timer driver. | |
468b8c4c | 79 | |
6fe9cbd1 | 80 | config ARMADA_370_XP_TIMER |
9519e80c DL |
81 | bool "Armada 370 and XP timer driver" if COMPILE_TEST |
82 | depends on ARM | |
bb0eb050 | 83 | select TIMER_OF |
2be6d9bf | 84 | select CLKSRC_MMIO |
9519e80c DL |
85 | help |
86 | Enables the support for the Armada 370 and XP timer driver. | |
6fe9cbd1 | 87 | |
e4a6b378 | 88 | config MESON6_TIMER |
0b7a7bb7 | 89 | bool "Meson6 timer driver" if COMPILE_TEST |
7b6b0a45 | 90 | select CLKSRC_MMIO |
0b7a7bb7 DL |
91 | help |
92 | Enables the support for the Meson6 timer driver. | |
e4a6b378 | 93 | |
0c1dcfd5 | 94 | config ORION_TIMER |
c9165549 DL |
95 | bool "Orion timer driver" if COMPILE_TEST |
96 | depends on ARM | |
bb0eb050 | 97 | select TIMER_OF |
0c1dcfd5 | 98 | select CLKSRC_MMIO |
c9165549 DL |
99 | help |
100 | Enables the support for the Orion timer driver | |
0c1dcfd5 | 101 | |
4be78a86 AF |
102 | config OWL_TIMER |
103 | bool "Owl timer driver" if COMPILE_TEST | |
4be78a86 AF |
104 | select CLKSRC_MMIO |
105 | help | |
106 | Enables the support for the Actions Semi Owl timer driver. | |
107 | ||
7f83a132 MS |
108 | config RDA_TIMER |
109 | bool "RDA timer driver" if COMPILE_TEST | |
110 | depends on GENERIC_CLOCKEVENTS | |
111 | select CLKSRC_MMIO | |
112 | select TIMER_OF | |
113 | help | |
114 | Enables the support for the RDA Micro timer driver. | |
115 | ||
119fd635 | 116 | config SUN4I_TIMER |
b4fcd48b | 117 | bool "Sun4i timer driver" if COMPILE_TEST |
d7023e62 | 118 | depends on HAS_IOMEM |
71c568c0 | 119 | select CLKSRC_MMIO |
239751ed | 120 | select TIMER_OF |
b4fcd48b DL |
121 | help |
122 | Enables support for the Sun4i timer. | |
b2ac5d75 | 123 | |
67905540 | 124 | config SUN5I_HSTIMER |
f0c5afb7 | 125 | bool "Sun5i timer driver" if COMPILE_TEST |
67905540 | 126 | select CLKSRC_MMIO |
f0c5afb7 DL |
127 | depends on COMMON_CLK |
128 | help | |
129 | Enables support the Sun5i timer. | |
67905540 | 130 | |
910978e7 | 131 | config TEGRA_TIMER |
adce4bc8 | 132 | bool "Tegra timer driver" if COMPILE_TEST |
2be6d9bf | 133 | select CLKSRC_MMIO |
b4822dc7 JL |
134 | select TIMER_OF |
135 | depends on ARM || ARM64 | |
adce4bc8 DL |
136 | help |
137 | Enables support for the Tegra driver. | |
910978e7 | 138 | |
ff7ec345 | 139 | config VT8500_TIMER |
b4bdf7ef | 140 | bool "VT8500 timer driver" if COMPILE_TEST |
d7023e62 | 141 | depends on HAS_IOMEM |
b4bdf7ef DL |
142 | help |
143 | Enables support for the VT8500 driver. | |
ff7ec345 | 144 | |
1c00289e TM |
145 | config NPCM7XX_TIMER |
146 | bool "NPCM7xx timer driver" if COMPILE_TEST | |
147 | depends on HAS_IOMEM | |
148 | select CLKSRC_MMIO | |
149 | help | |
150 | Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture, | |
151 | While TIMER0 serves as clockevent and TIMER1 serves as clocksource. | |
152 | ||
4f0f234f | 153 | config CADENCE_TTC_TIMER |
57f49318 DL |
154 | bool "Cadence TTC timer driver" if COMPILE_TEST |
155 | depends on COMMON_CLK | |
156 | help | |
157 | Enables support for the cadence ttc driver. | |
4f0f234f | 158 | |
a8b1b9fc | 159 | config ASM9260_TIMER |
b9755841 | 160 | bool "ASM9260 timer driver" if COMPILE_TEST |
a8b1b9fc | 161 | select CLKSRC_MMIO |
bb0eb050 | 162 | select TIMER_OF |
b9755841 DL |
163 | help |
164 | Enables support for the ASM9260 timer. | |
a8b1b9fc | 165 | |
694e33a7 | 166 | config CLKSRC_NOMADIK_MTU |
70329653 DL |
167 | bool "Nomakdik clocksource driver" if COMPILE_TEST |
168 | depends on ARM | |
694e33a7 LW |
169 | select CLKSRC_MMIO |
170 | help | |
171 | Support for Multi Timer Unit. MTU provides access | |
172 | to multiple interrupt generating programmable | |
173 | 32-bit free running decrementing counters. | |
174 | ||
489bccea | 175 | config CLKSRC_DBX500_PRCMU |
1becd6ed | 176 | bool "Clocksource PRCMU Timer" if COMPILE_TEST |
d7023e62 | 177 | depends on HAS_IOMEM |
489bccea MW |
178 | help |
179 | Use the always on PRCMU Timer as clocksource | |
180 | ||
ecf0efdc DL |
181 | config CLPS711X_TIMER |
182 | bool "Cirrus logic timer driver" if COMPILE_TEST | |
ecf0efdc DL |
183 | select CLKSRC_MMIO |
184 | help | |
185 | Enables support for the Cirrus Logic PS711 timer. | |
186 | ||
b56d5d21 DL |
187 | config ATLAS7_TIMER |
188 | bool "Atlas7 timer driver" if COMPILE_TEST | |
b56d5d21 DL |
189 | select CLKSRC_MMIO |
190 | help | |
191 | Enables support for the Atlas7 timer. | |
192 | ||
d81c50a0 DL |
193 | config MXS_TIMER |
194 | bool "Mxs timer driver" if COMPILE_TEST | |
d81c50a0 DL |
195 | select CLKSRC_MMIO |
196 | select STMP_DEVICE | |
197 | help | |
198 | Enables support for the Mxs timer. | |
199 | ||
f3550d49 DL |
200 | config PRIMA2_TIMER |
201 | bool "Prima2 timer driver" if COMPILE_TEST | |
f3550d49 DL |
202 | select CLKSRC_MMIO |
203 | help | |
204 | Enables support for the Prima2 timer. | |
205 | ||
85f98db4 DL |
206 | config U300_TIMER |
207 | bool "U300 timer driver" if COMPILE_TEST | |
85f98db4 DL |
208 | depends on ARM |
209 | select CLKSRC_MMIO | |
210 | help | |
211 | Enables support for the U300 timer. | |
212 | ||
d683b9dc DL |
213 | config NSPIRE_TIMER |
214 | bool "NSpire timer driver" if COMPILE_TEST | |
d683b9dc DL |
215 | select CLKSRC_MMIO |
216 | help | |
217 | Enables support for the Nspire timer. | |
218 | ||
c12547a0 DL |
219 | config KEYSTONE_TIMER |
220 | bool "Keystone timer driver" if COMPILE_TEST | |
c12547a0 DL |
221 | depends on ARM || ARM64 |
222 | select CLKSRC_MMIO | |
223 | help | |
224 | Enables support for the Keystone timer. | |
225 | ||
568c0342 DL |
226 | config INTEGRATOR_AP_TIMER |
227 | bool "Integrator-ap timer driver" if COMPILE_TEST | |
568c0342 DL |
228 | select CLKSRC_MMIO |
229 | help | |
230 | Enables support for the Integrator-ap timer. | |
231 | ||
9c9b7818 UKK |
232 | config CLKSRC_EFM32 |
233 | bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 | |
234 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) | |
09ca2757 | 235 | select CLKSRC_MMIO |
9c9b7818 UKK |
236 | default ARCH_EFM32 |
237 | help | |
238 | Support to use the timers of EFM32 SoCs as clock source and clock | |
239 | event device. | |
240 | ||
050dd322 | 241 | config CLKSRC_LPC32XX |
ddcf48c7 | 242 | bool "Clocksource for LPC32XX" if COMPILE_TEST |
2f8a26c1 | 243 | depends on HAS_IOMEM |
1b18fd20 | 244 | depends on ARM |
050dd322 | 245 | select CLKSRC_MMIO |
bb0eb050 | 246 | select TIMER_OF |
ddcf48c7 DL |
247 | help |
248 | Support for the LPC32XX clocksource. | |
050dd322 | 249 | |
84583983 | 250 | config CLKSRC_PISTACHIO |
dfdb1652 | 251 | bool "Clocksource for Pistachio SoC" if COMPILE_TEST |
2f8a26c1 | 252 | depends on HAS_IOMEM |
bb0eb050 | 253 | select TIMER_OF |
dfdb1652 DL |
254 | help |
255 | Enables the clocksource for the Pistachio SoC. | |
84583983 | 256 | |
fe851f56 FB |
257 | config CLKSRC_TI_32K |
258 | bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST | |
dfedaf10 | 259 | depends on GENERIC_SCHED_CLOCK |
bb0eb050 | 260 | select TIMER_OF if OF |
fe851f56 FB |
261 | help |
262 | This option enables support for Texas Instruments 32.768 Hz clocksource | |
263 | available on many OMAP-like platforms. | |
264 | ||
a5322457 NC |
265 | config CLKSRC_NPS |
266 | bool "NPS400 clocksource driver" if COMPILE_TEST | |
267 | depends on !PHYS_ADDR_T_64BIT | |
268 | select CLKSRC_MMIO | |
bb0eb050 | 269 | select TIMER_OF if OF |
a5322457 NC |
270 | help |
271 | NPS400 clocksource support. | |
272 | Got 64 bit counter with update rate up to 1000MHz. | |
273 | This counter is accessed via couple of 32 bit memory mapped registers. | |
274 | ||
e37e4593 | 275 | config CLKSRC_STM32 |
1cb6c215 PG |
276 | bool "Clocksource for STM32 SoCs" if !ARCH_STM32 |
277 | depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST) | |
e37e4593 | 278 | select CLKSRC_MMIO |
d04af490 | 279 | select TIMER_OF |
e37e4593 | 280 | |
0302637f VM |
281 | config CLKSRC_MPS2 |
282 | bool "Clocksource for MPS2 SoCs" if COMPILE_TEST | |
283 | depends on GENERIC_SCHED_CLOCK | |
284 | select CLKSRC_MMIO | |
bb0eb050 | 285 | select TIMER_OF |
0302637f | 286 | |
c4c9a040 VG |
287 | config ARC_TIMERS |
288 | bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST | |
bf287607 | 289 | depends on GENERIC_SCHED_CLOCK |
bb0eb050 | 290 | select TIMER_OF |
c4c9a040 VG |
291 | help |
292 | These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores | |
293 | (ARC700 as well as ARC HS38). | |
294 | TIMER0 serves as clockevent while TIMER1 provides clocksource | |
295 | ||
296 | config ARC_TIMERS_64BIT | |
297 | bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST | |
c4c9a040 | 298 | depends on ARC_TIMERS |
bb0eb050 | 299 | select TIMER_OF |
c4c9a040 VG |
300 | help |
301 | This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP) | |
302 | RTC is implemented inside the core, while GFRC sits outside the core in | |
303 | ARConnect IP block. Driver automatically picks one of them for clocksource | |
304 | as appropriate. | |
305 | ||
8a4da6e3 MR |
306 | config ARM_ARCH_TIMER |
307 | bool | |
bb0eb050 | 308 | select TIMER_OF if OF |
fa1bffab | 309 | select TIMER_ACPI if ACPI |
a2c5d4ed | 310 | |
037f6377 | 311 | config ARM_ARCH_TIMER_EVTSTREAM |
46fd5c6b | 312 | bool "Enable ARM architected timer event stream generation by default" |
037f6377 | 313 | default y if ARM_ARCH_TIMER |
77f7ce9a | 314 | depends on ARM_ARCH_TIMER |
037f6377 | 315 | help |
46fd5c6b WD |
316 | This option enables support by default for event stream generation |
317 | based on the ARM architected timer. It is used for waking up CPUs | |
318 | executing the wfe instruction at a frequency represented as a | |
319 | power-of-2 divisor of the clock rate. The behaviour can also be | |
320 | overridden on the command line using the | |
321 | clocksource.arm_arch_timer.evtstream parameter. | |
037f6377 WD |
322 | The main use of the event stream is wfe-based timeouts of userspace |
323 | locking implementations. It might also be useful for imposing timeout | |
324 | on wfe to safeguard against any programming errors in case an expected | |
325 | event is not generated. | |
326 | This must be disabled for hardware validation purposes to detect any | |
327 | hardware anomalies of missing events. | |
328 | ||
16d10ef2 DT |
329 | config ARM_ARCH_TIMER_OOL_WORKAROUND |
330 | bool | |
331 | ||
f6dc1576 SW |
332 | config FSL_ERRATUM_A008585 |
333 | bool "Workaround for Freescale/NXP Erratum A-008585" | |
334 | default y | |
335 | depends on ARM_ARCH_TIMER && ARM64 | |
16d10ef2 | 336 | select ARM_ARCH_TIMER_OOL_WORKAROUND |
f6dc1576 SW |
337 | help |
338 | This option enables a workaround for Freescale/NXP Erratum | |
339 | A-008585 ("ARM generic timer may contain an erroneous | |
340 | value"). The workaround will only be active if the | |
341 | fsl,erratum-a008585 property is found in the timer node. | |
342 | ||
bb42ca47 DT |
343 | config HISILICON_ERRATUM_161010101 |
344 | bool "Workaround for Hisilicon Erratum 161010101" | |
345 | default y | |
346 | select ARM_ARCH_TIMER_OOL_WORKAROUND | |
347 | depends on ARM_ARCH_TIMER && ARM64 | |
348 | help | |
349 | This option enables a workaround for Hisilicon Erratum | |
350 | 161010101. The workaround will be active if the hisilicon,erratum-161010101 | |
351 | property is found in the timer node. | |
352 | ||
fa8d815f MZ |
353 | config ARM64_ERRATUM_858921 |
354 | bool "Workaround for Cortex-A73 erratum 858921" | |
355 | default y | |
356 | select ARM_ARCH_TIMER_OOL_WORKAROUND | |
357 | depends on ARM_ARCH_TIMER && ARM64 | |
358 | help | |
359 | This option enables a workaround applicable to Cortex-A73 | |
360 | (all versions), whose counter may return incorrect values. | |
361 | The workaround will be dynamically enabled when an affected | |
362 | core is detected. | |
363 | ||
c950ca8c SH |
364 | config SUN50I_ERRATUM_UNKNOWN1 |
365 | bool "Workaround for Allwinner A64 erratum UNKNOWN1" | |
366 | default y | |
367 | depends on ARM_ARCH_TIMER && ARM64 && ARCH_SUNXI | |
368 | select ARM_ARCH_TIMER_OOL_WORKAROUND | |
369 | help | |
370 | This option enables a workaround for instability in the timer on | |
371 | the Allwinner A64 SoC. The workaround will only be active if the | |
372 | allwinner,erratum-unknown1 property is found in the timer node. | |
373 | ||
c1b40e44 | 374 | config ARM_GLOBAL_TIMER |
67a87a43 | 375 | bool "Support for the ARM global timer" if COMPILE_TEST |
bb0eb050 | 376 | select TIMER_OF if OF |
67a87a43 | 377 | depends on ARM |
c1b40e44 SM |
378 | help |
379 | This options enables support for the ARM global timer unit | |
380 | ||
0b7402dc SH |
381 | config ARM_TIMER_SP804 |
382 | bool "Support for Dual Timer SP804 module" | |
002af195 | 383 | depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP |
0b7402dc | 384 | select CLKSRC_MMIO |
bb0eb050 | 385 | select TIMER_OF if OF |
0b7402dc | 386 | |
c1b40e44 SM |
387 | config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK |
388 | bool | |
389 | depends on ARM_GLOBAL_TIMER | |
390 | default y | |
391 | help | |
392 | Use ARM global timer clock source as sched_clock | |
393 | ||
4958ebb3 | 394 | config ARMV7M_SYSTICK |
e2146d86 | 395 | bool "Support for the ARMv7M system time" if COMPILE_TEST |
bb0eb050 | 396 | select TIMER_OF if OF |
4958ebb3 MC |
397 | select CLKSRC_MMIO |
398 | help | |
399 | This options enables support for the ARMv7M system timer unit | |
400 | ||
b052ff30 | 401 | config ATMEL_PIT |
bb0eb050 | 402 | select TIMER_OF if OF |
b052ff30 MR |
403 | def_bool SOC_AT91SAM9 || SOC_SAMA5 |
404 | ||
b53cdd03 | 405 | config ATMEL_ST |
b988d3f0 | 406 | bool "Atmel ST timer support" if COMPILE_TEST |
bd2746f0 | 407 | depends on HAS_IOMEM |
bb0eb050 | 408 | select TIMER_OF |
7ab7ef74 | 409 | select MFD_SYSCON |
b988d3f0 DL |
410 | help |
411 | Support for the Atmel ST timer. | |
b53cdd03 | 412 | |
6938d75a | 413 | config CLKSRC_EXYNOS_MCT |
39366ef4 | 414 | bool "Exynos multi core timer driver" if COMPILE_TEST |
f1a4c1f3 | 415 | depends on ARM || ARM64 |
6938d75a TA |
416 | help |
417 | Support for Multi Core Timer controller on Exynos SoCs. | |
241a9871 | 418 | |
f1189989 | 419 | config CLKSRC_SAMSUNG_PWM |
de37b0b5 | 420 | bool "PWM timer driver for Samsung S3C, S5P" if COMPILE_TEST |
d7023e62 | 421 | depends on HAS_IOMEM |
f1189989 TF |
422 | help |
423 | This is a new clocksource driver for the PWM timer found in | |
424 | Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver | |
425 | for all devicetree enabled platforms. This driver will be | |
426 | needed only on systems that do not have the Exynos MCT available. | |
c1967249 | 427 | |
2529c3a3 | 428 | config FSL_FTM_TIMER |
ef49336b | 429 | bool "Freescale FlexTimer Module driver" if COMPILE_TEST |
d7023e62 | 430 | depends on HAS_IOMEM |
03724ac3 | 431 | select CLKSRC_MMIO |
2529c3a3 XL |
432 | help |
433 | Support for Freescale FlexTimer Module (FTM) timer. | |
434 | ||
c1967249 JL |
435 | config VF_PIT_TIMER |
436 | bool | |
2be6d9bf | 437 | select CLKSRC_MMIO |
c1967249 JL |
438 | help |
439 | Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. | |
fd3f1270 | 440 | |
89355274 NA |
441 | config OXNAS_RPS_TIMER |
442 | bool "Oxford Semiconductor OXNAS RPS Timers driver" if COMPILE_TEST | |
bb0eb050 | 443 | select TIMER_OF |
89355274 NA |
444 | select CLKSRC_MMIO |
445 | help | |
446 | This enables support for the Oxford Semiconductor OXNAS RPS timers. | |
447 | ||
fd3f1270 MD |
448 | config SYS_SUPPORTS_SH_CMT |
449 | bool | |
450 | ||
ecb3530d | 451 | config MTK_TIMER |
fbca9eab | 452 | bool "Mediatek timer driver" if COMPILE_TEST |
2f8a26c1 | 453 | depends on HAS_IOMEM |
bb0eb050 | 454 | select TIMER_OF |
ecb3530d | 455 | select CLKSRC_MMIO |
fbca9eab DL |
456 | help |
457 | Support for Mediatek timer driver. | |
ecb3530d | 458 | |
067bc914 | 459 | config SPRD_TIMER |
8a1ece26 | 460 | bool "Spreadtrum timer driver" if EXPERT |
067bc914 | 461 | depends on HAS_IOMEM |
8a1ece26 CZ |
462 | depends on (ARCH_SPRD || COMPILE_TEST) |
463 | default ARCH_SPRD | |
067bc914 BW |
464 | select TIMER_OF |
465 | help | |
466 | Enables support for the Spreadtrum timer driver. | |
467 | ||
fd3f1270 MD |
468 | config SYS_SUPPORTS_SH_MTU2 |
469 | bool | |
470 | ||
471 | config SYS_SUPPORTS_SH_TMU | |
472 | bool | |
473 | ||
474 | config SYS_SUPPORTS_EM_STI | |
475 | bool | |
476 | ||
9995f4f1 RF |
477 | config CLKSRC_JCORE_PIT |
478 | bool "J-Core PIT timer driver" if COMPILE_TEST | |
479 | depends on OF | |
9995f4f1 RF |
480 | depends on HAS_IOMEM |
481 | select CLKSRC_MMIO | |
482 | help | |
483 | This enables build of clocksource and clockevent driver for | |
484 | the integrated PIT in the J-Core synthesizable, open source SoC. | |
485 | ||
fd3f1270 MD |
486 | config SH_TIMER_CMT |
487 | bool "Renesas CMT timer driver" if COMPILE_TEST | |
11bc26fe | 488 | depends on HAS_IOMEM |
fd3f1270 MD |
489 | default SYS_SUPPORTS_SH_CMT |
490 | help | |
491 | This enables build of a clocksource and clockevent driver for | |
492 | the Compare Match Timer (CMT) hardware available in 16/32/48-bit | |
493 | variants on a wide range of Mobile and Automotive SoCs from Renesas. | |
494 | ||
495 | config SH_TIMER_MTU2 | |
496 | bool "Renesas MTU2 timer driver" if COMPILE_TEST | |
11bc26fe | 497 | depends on HAS_IOMEM |
fd3f1270 MD |
498 | default SYS_SUPPORTS_SH_MTU2 |
499 | help | |
500 | This enables build of a clockevent driver for the Multi-Function | |
7e139187 | 501 | Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas. |
fd3f1270 MD |
502 | This hardware comes with 16 bit-timer registers. |
503 | ||
fb6002a8 CB |
504 | config RENESAS_OSTM |
505 | bool "Renesas OSTM timer driver" if COMPILE_TEST | |
fb6002a8 CB |
506 | select CLKSRC_MMIO |
507 | help | |
508 | Enables the support for the Renesas OSTM. | |
509 | ||
fd3f1270 MD |
510 | config SH_TIMER_TMU |
511 | bool "Renesas TMU timer driver" if COMPILE_TEST | |
11bc26fe | 512 | depends on HAS_IOMEM |
fd3f1270 MD |
513 | default SYS_SUPPORTS_SH_TMU |
514 | help | |
515 | This enables build of a clocksource and clockevent driver for | |
516 | the 32-bit Timer Unit (TMU) hardware available on a wide range | |
517 | SoCs from Renesas. | |
518 | ||
519 | config EM_TIMER_STI | |
520 | bool "Renesas STI timer driver" if COMPILE_TEST | |
2f8a26c1 | 521 | depends on HAS_IOMEM |
fd3f1270 MD |
522 | default SYS_SUPPORTS_EM_STI |
523 | help | |
524 | This enables build of a clocksource and clockevent driver for | |
525 | the 48-bit System Timer (STI) hardware available on a SoCs | |
526 | such as EMEV2 from former NEC Electronics. | |
dfc25e45 | 527 | |
3f8e8cee | 528 | config CLKSRC_QCOM |
3dc0e9f6 DL |
529 | bool "Qualcomm MSM timer" if COMPILE_TEST |
530 | depends on ARM | |
bb0eb050 | 531 | select TIMER_OF |
3dc0e9f6 DL |
532 | help |
533 | This enables the clocksource and the per CPU clockevent driver for the | |
534 | Qualcomm SoCs. | |
220e2a8d PM |
535 | |
536 | config CLKSRC_VERSATILE | |
5cc87a4d DL |
537 | bool "ARM Versatile (Express) reference platforms clock source" if COMPILE_TEST |
538 | depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET | |
bb0eb050 | 539 | select TIMER_OF |
220e2a8d PM |
540 | default y if MFD_VEXPRESS_SYSREG |
541 | help | |
542 | This option enables clock source based on free running | |
543 | counter available in the "System Registers" block of | |
544 | ARM Versatile, RealView and Versatile Express reference | |
545 | platforms. | |
58394271 | 546 | |
fa5635a2 AB |
547 | config CLKSRC_MIPS_GIC |
548 | bool | |
549 | depends on MIPS_GIC | |
bb0eb050 | 550 | select TIMER_OF |
fa5635a2 | 551 | |
ccd63ce4 | 552 | config CLKSRC_TANGO_XTAL |
5a7351f0 DL |
553 | bool "Clocksource for Tango SoC" if COMPILE_TEST |
554 | depends on ARM | |
bb0eb050 | 555 | select TIMER_OF |
0881841f | 556 | select CLKSRC_MMIO |
5a7351f0 DL |
557 | help |
558 | This enables the clocksource for Tango SoC | |
ccd63ce4 | 559 | |
e074ff86 | 560 | config CLKSRC_PXA |
5ae996cb | 561 | bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST |
d7023e62 | 562 | depends on HAS_IOMEM |
5ae996cb | 563 | select CLKSRC_MMIO |
e074ff86 DB |
564 | help |
565 | This enables OST0 support available on PXA and SA-11x0 | |
566 | platforms. | |
618b902d | 567 | |
97a23beb | 568 | config H8300_TMR8 |
46e7c3c6 | 569 | bool "Clockevent timer for the H8300 platform" if COMPILE_TEST |
2f8a26c1 | 570 | depends on HAS_IOMEM |
46e7c3c6 DL |
571 | help |
572 | This enables the 8 bits timer for the H8300 platform. | |
97a23beb | 573 | |
618b902d | 574 | config H8300_TMR16 |
46e7c3c6 | 575 | bool "Clockevent timer for the H83069 platform" if COMPILE_TEST |
2f8a26c1 | 576 | depends on HAS_IOMEM |
46e7c3c6 DL |
577 | help |
578 | This enables the 16 bits timer for the H8300 platform with the | |
579 | H83069 cpu. | |
618b902d YS |
580 | |
581 | config H8300_TPU | |
46e7c3c6 | 582 | bool "Clocksource for the H8300 platform" if COMPILE_TEST |
2f8a26c1 | 583 | depends on HAS_IOMEM |
46e7c3c6 DL |
584 | help |
585 | This enables the clocksource for the H8300 platform with the | |
586 | H8S2678 cpu. | |
618b902d | 587 | |
bea5af41 SG |
588 | config CLKSRC_IMX_GPT |
589 | bool "Clocksource using i.MX GPT" if COMPILE_TEST | |
df181e38 | 590 | depends on (ARM || ARM64) && CLKDEV_LOOKUP |
bea5af41 SG |
591 | select CLKSRC_MMIO |
592 | ||
059ab7b8 DA |
593 | config CLKSRC_IMX_TPM |
594 | bool "Clocksource using i.MX TPM" if COMPILE_TEST | |
2f8a26c1 | 595 | depends on ARM && CLKDEV_LOOKUP |
059ab7b8 DA |
596 | select CLKSRC_MMIO |
597 | help | |
598 | Enable this option to use IMX Timer/PWM Module (TPM) timer as | |
599 | clocksource. | |
600 | ||
70bef01c | 601 | config CLKSRC_ST_LPC |
baacaf83 | 602 | bool "Low power clocksource found in the LPC" if COMPILE_TEST |
bb0eb050 | 603 | select TIMER_OF if OF |
863ee050 | 604 | depends on HAS_IOMEM |
2be6d9bf | 605 | select CLKSRC_MMIO |
70bef01c LJ |
606 | help |
607 | Enable this option to use the Low Power controller timer | |
608 | as clocksource. | |
609 | ||
35dbb74a RC |
610 | config ATCPIT100_TIMER |
611 | bool "ATCPIT100 timer driver" | |
612 | depends on NDS32 || COMPILE_TEST | |
613 | depends on HAS_IOMEM | |
614 | select TIMER_OF | |
615 | default NDS32 | |
616 | help | |
617 | This option enables support for the Andestech ATCPIT100 timers. | |
618 | ||
62b01943 PD |
619 | config RISCV_TIMER |
620 | bool "Timer for the RISC-V platform" | |
92e0d143 | 621 | depends on GENERIC_SCHED_CLOCK && RISCV |
62b01943 PD |
622 | default y |
623 | select TIMER_PROBE | |
624 | select TIMER_OF | |
625 | help | |
626 | This enables the per-hart timer built into all RISC-V systems, which | |
627 | is accessed via both the SBI and the rdcycle instruction. This is | |
628 | required for all RISC-V systems. | |
629 | ||
a7ad38b0 GR |
630 | config CSKY_MP_TIMER |
631 | bool "SMP Timer for the C-SKY platform" if COMPILE_TEST | |
632 | depends on CSKY | |
633 | select TIMER_OF | |
634 | help | |
635 | Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP | |
636 | system. | |
637 | csky,mptimer is not only used in SMP system, it also could be used | |
638 | single core system. It's not a mmio reg and it use mtcr/mfcr instruction. | |
639 | ||
33745c3c GR |
640 | config GX6605S_TIMER |
641 | bool "Gx6605s SOC system timer driver" if COMPILE_TEST | |
642 | depends on CSKY | |
643 | select CLKSRC_MMIO | |
644 | select TIMER_OF | |
645 | help | |
646 | This option enables support for gx6605s SOC's timer. | |
647 | ||
b58f28f3 ST |
648 | config MILBEAUT_TIMER |
649 | bool "Milbeaut timer driver" if COMPILE_TEST | |
650 | depends on OF | |
651 | depends on ARM | |
652 | select TIMER_OF | |
653 | select CLKSRC_MMIO | |
654 | help | |
655 | Enables the support for Milbeaut timer driver. | |
656 | ||
58394271 | 657 | endmenu |