[mirror_ubuntu-artful-kernel.git] / drivers / clocksource / em_sti.c

/*
 * Emma Mobile Timer Support - STI
 *
 *  Copyright (C) 2012 Magnus Damm
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/slab.h>
#include <linux/module.h>

enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };

struct em_sti_priv {
	void __iomem *base;
	struct clk *clk;
	struct platform_device *pdev;
	unsigned int active[USER_NR];
	unsigned long rate;
	raw_spinlock_t lock;
	struct clock_event_device ced;
	struct clocksource cs;
};

#define STI_CONTROL 0x00
#define STI_COMPA_H 0x10
#define STI_COMPA_L 0x14
#define STI_COMPB_H 0x18
#define STI_COMPB_L 0x1c
#define STI_COUNT_H 0x20
#define STI_COUNT_L 0x24
#define STI_COUNT_RAW_H 0x28
#define STI_COUNT_RAW_L 0x2c
#define STI_SET_H 0x30
#define STI_SET_L 0x34
#define STI_INTSTATUS 0x40
#define STI_INTRAWSTATUS 0x44
#define STI_INTENSET 0x48
#define STI_INTENCLR 0x4c
#define STI_INTFFCLR 0x50

static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
{
	return ioread32(p->base + offs);
}

static inline void em_sti_write(struct em_sti_priv *p, int offs,
				unsigned long value)
{
	iowrite32(value, p->base + offs);
}

static int em_sti_enable(struct em_sti_priv *p)
{
	int ret;

	/* enable clock */
	ret = clk_enable(p->clk);
	if (ret) {
		dev_err(&p->pdev->dev, "cannot enable clock\n");
		return ret;
	}

	/* reset the counter */
	em_sti_write(p, STI_SET_H, 0x40000000);
	em_sti_write(p, STI_SET_L, 0x00000000);

	/* mask and clear pending interrupts */
	em_sti_write(p, STI_INTENCLR, 3);
	em_sti_write(p, STI_INTFFCLR, 3);

	/* enable updates of counter registers */
	em_sti_write(p, STI_CONTROL, 1);

	return 0;
}

static void em_sti_disable(struct em_sti_priv *p)
{
	/* mask interrupts */
	em_sti_write(p, STI_INTENCLR, 3);

	/* stop clock */
	clk_disable(p->clk);
}

static u64 em_sti_count(struct em_sti_priv *p)
{
	u64 ticks;
	unsigned long flags;

	/* the STI hardware buffers the 48-bit count, but to
	 * break it out into two 32-bit access the registers
	 * must be accessed in a certain order.
	 * Always read STI_COUNT_H before STI_COUNT_L.
	 */
	raw_spin_lock_irqsave(&p->lock, flags);
	ticks = (u64)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
	ticks |= em_sti_read(p, STI_COUNT_L);
	raw_spin_unlock_irqrestore(&p->lock, flags);

	return ticks;
}

static u64 em_sti_set_next(struct em_sti_priv *p, u64 next)
{
	unsigned long flags;

	raw_spin_lock_irqsave(&p->lock, flags);

	/* mask compare A interrupt */
	em_sti_write(p, STI_INTENCLR, 1);

	/* update compare A value */
	em_sti_write(p, STI_COMPA_H, next >> 32);
	em_sti_write(p, STI_COMPA_L, next & 0xffffffff);

	/* clear compare A interrupt source */
	em_sti_write(p, STI_INTFFCLR, 1);

	/* unmask compare A interrupt */
	em_sti_write(p, STI_INTENSET, 1);

	raw_spin_unlock_irqrestore(&p->lock, flags);

	return next;
}

static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
{
	struct em_sti_priv *p = dev_id;

	p->ced.event_handler(&p->ced);
	return IRQ_HANDLED;
}

static int em_sti_start(struct em_sti_priv *p, unsigned int user)
{
	unsigned long flags;
	int used_before;
	int ret = 0;

	raw_spin_lock_irqsave(&p->lock, flags);
	used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
	if (!used_before)
		ret = em_sti_enable(p);

	if (!ret)
		p->active[user] = 1;
	raw_spin_unlock_irqrestore(&p->lock, flags);

	return ret;
}

static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
{
	unsigned long flags;
	int used_before, used_after;

	raw_spin_lock_irqsave(&p->lock, flags);
	used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
	p->active[user] = 0;
	used_after = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];

	if (used_before && !used_after)
		em_sti_disable(p);
	raw_spin_unlock_irqrestore(&p->lock, flags);
}

static struct em_sti_priv *cs_to_em_sti(struct clocksource *cs)
{
	return container_of(cs, struct em_sti_priv, cs);
}

static u64 em_sti_clocksource_read(struct clocksource *cs)
{
	return em_sti_count(cs_to_em_sti(cs));
}

static int em_sti_clocksource_enable(struct clocksource *cs)
{
	struct em_sti_priv *p = cs_to_em_sti(cs);

	return em_sti_start(p, USER_CLOCKSOURCE);
}

static void em_sti_clocksource_disable(struct clocksource *cs)
{
	em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
}

static void em_sti_clocksource_resume(struct clocksource *cs)
{
	em_sti_clocksource_enable(cs);
}

static int em_sti_register_clocksource(struct em_sti_priv *p)
{
	struct clocksource *cs = &p->cs;

	cs->name = dev_name(&p->pdev->dev);
	cs->rating = 200;
	cs->read = em_sti_clocksource_read;
	cs->enable = em_sti_clocksource_enable;
	cs->disable = em_sti_clocksource_disable;
	cs->suspend = em_sti_clocksource_disable;
	cs->resume = em_sti_clocksource_resume;
	cs->mask = CLOCKSOURCE_MASK(48);
	cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;

	dev_info(&p->pdev->dev, "used as clock source\n");

	clocksource_register_hz(cs, p->rate);
	return 0;
}

static struct em_sti_priv *ced_to_em_sti(struct clock_event_device *ced)
{
	return container_of(ced, struct em_sti_priv, ced);
}

static int em_sti_clock_event_shutdown(struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);
	em_sti_stop(p, USER_CLOCKEVENT);
	return 0;
}

static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);

	dev_info(&p->pdev->dev, "used for oneshot clock events\n");
	em_sti_start(p, USER_CLOCKEVENT);
	return 0;
}

static int em_sti_clock_event_next(unsigned long delta,
				   struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);
	u64 next;
	int safe;

	next = em_sti_set_next(p, em_sti_count(p) + delta);
	safe = em_sti_count(p) < (next - 1);

	return !safe;
}

static void em_sti_register_clockevent(struct em_sti_priv *p)
{
	struct clock_event_device *ced = &p->ced;

	ced->name = dev_name(&p->pdev->dev);
	ced->features = CLOCK_EVT_FEAT_ONESHOT;
	ced->rating = 200;
	ced->cpumask = cpu_possible_mask;
	ced->set_next_event = em_sti_clock_event_next;
	ced->set_state_shutdown = em_sti_clock_event_shutdown;
	ced->set_state_oneshot = em_sti_clock_event_set_oneshot;

	dev_info(&p->pdev->dev, "used for clock events\n");

	clockevents_config_and_register(ced, p->rate, 2, 0xffffffff);
}

static int em_sti_probe(struct platform_device *pdev)
{
	struct em_sti_priv *p;
	struct resource *res;
	int irq;
	int ret;

	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
	if (p == NULL)
		return -ENOMEM;

	p->pdev = pdev;
	platform_set_drvdata(pdev, p);

	irq = platform_get_irq(pdev, 0);
	if (irq < 0) {
		dev_err(&pdev->dev, "failed to get irq\n");
		return irq;
	}

	/* map memory, let base point to the STI instance */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	p->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(p->base))
		return PTR_ERR(p->base);

	ret = devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
			       IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
			       dev_name(&pdev->dev), p);
	if (ret) {
		dev_err(&pdev->dev, "failed to request low IRQ\n");
		return ret;
	}

	/* get hold of clock */
	p->clk = devm_clk_get(&pdev->dev, "sclk");
	if (IS_ERR(p->clk)) {
		dev_err(&pdev->dev, "cannot get clock\n");
		return PTR_ERR(p->clk);
	}

	ret = clk_prepare(p->clk);
	if (ret < 0) {
		dev_err(&pdev->dev, "cannot prepare clock\n");
		return ret;
	}

	ret = clk_enable(p->clk);
	if (ret < 0) {
		dev_err(&p->pdev->dev, "cannot enable clock\n");
		clk_unprepare(p->clk);
		return ret;
	}
	p->rate = clk_get_rate(p->clk);
	clk_disable(p->clk);

	raw_spin_lock_init(&p->lock);
	em_sti_register_clockevent(p);
	em_sti_register_clocksource(p);
	return 0;
}

static int em_sti_remove(struct platform_device *pdev)
{
	return -EBUSY; /* cannot unregister clockevent and clocksource */
}

static const struct of_device_id em_sti_dt_ids[] = {
	{ .compatible = "renesas,em-sti", },
	{},
};
MODULE_DEVICE_TABLE(of, em_sti_dt_ids);

static struct platform_driver em_sti_device_driver = {
	.probe		= em_sti_probe,
	.remove		= em_sti_remove,
	.driver		= {
		.name	= "em_sti",
		.of_match_table = em_sti_dt_ids,
	}
};

static int __init em_sti_init(void)
{
	return platform_driver_register(&em_sti_device_driver);
}

static void __exit em_sti_exit(void)
{
	platform_driver_unregister(&em_sti_device_driver);
}

subsys_initcall(em_sti_init);
module_exit(em_sti_exit);

MODULE_AUTHOR("Magnus Damm");
MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
b9dbf951 MD	1	/*
	2	* Emma Mobile Timer Support - STI
	3	*
	4	* Copyright (C) 2012 Magnus Damm
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	18	*/
	19
	20	#include <linux/init.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/spinlock.h>
	23	#include <linux/interrupt.h>
	24	#include <linux/ioport.h>
	25	#include <linux/io.h>
	26	#include <linux/clk.h>
	27	#include <linux/irq.h>
	28	#include <linux/err.h>
	29	#include <linux/delay.h>
	30	#include <linux/clocksource.h>
	31	#include <linux/clockchips.h>
	32	#include <linux/slab.h>
	33	#include <linux/module.h>
	34
	35	enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };
	36
	37	struct em_sti_priv {
	38	void __iomem *base;
	39	struct clk *clk;
	40	struct platform_device *pdev;
	41	unsigned int active[USER_NR];
	42	unsigned long rate;
	43	raw_spinlock_t lock;
	44	struct clock_event_device ced;
	45	struct clocksource cs;
	46	};
	47
	48	#define STI_CONTROL 0x00
	49	#define STI_COMPA_H 0x10
	50	#define STI_COMPA_L 0x14
	51	#define STI_COMPB_H 0x18
	52	#define STI_COMPB_L 0x1c
	53	#define STI_COUNT_H 0x20
	54	#define STI_COUNT_L 0x24
	55	#define STI_COUNT_RAW_H 0x28
	56	#define STI_COUNT_RAW_L 0x2c
	57	#define STI_SET_H 0x30
	58	#define STI_SET_L 0x34
	59	#define STI_INTSTATUS 0x40
	60	#define STI_INTRAWSTATUS 0x44
	61	#define STI_INTENSET 0x48
	62	#define STI_INTENCLR 0x4c
	63	#define STI_INTFFCLR 0x50
	64
65	static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
66	{
67	return ioread32(p->base + offs);
68	}
69
70	static inline void em_sti_write(struct em_sti_priv *p, int offs,
71	unsigned long value)
72	{
73	iowrite32(value, p->base + offs);
74	}
75
76	static int em_sti_enable(struct em_sti_priv *p)
77	{
78	int ret;
79
80	/* enable clock */
3814ae09	81	ret = clk_enable(p->clk);
b9dbf951 MD	82	if (ret) {
	83	dev_err(&p->pdev->dev, "cannot enable clock\n");
	84	return ret;
	85	}
	86
b9dbf951 MD	87	/* reset the counter */
	88	em_sti_write(p, STI_SET_H, 0x40000000);
	89	em_sti_write(p, STI_SET_L, 0x00000000);
	90
	91	/* mask and clear pending interrupts */
	92	em_sti_write(p, STI_INTENCLR, 3);
	93	em_sti_write(p, STI_INTFFCLR, 3);
	94
	95	/* enable updates of counter registers */
	96	em_sti_write(p, STI_CONTROL, 1);
	97
	98	return 0;
	99	}
	100
	101	static void em_sti_disable(struct em_sti_priv *p)
	102	{
	103	/* mask interrupts */
	104	em_sti_write(p, STI_INTENCLR, 3);
	105
	106	/* stop clock */
3814ae09	107	clk_disable(p->clk);
b9dbf951 MD	108	}
b9dbf951 MD	109
a5a1d1c2	110	static u64 em_sti_count(struct em_sti_priv *p)
b9dbf951	111	{
a5a1d1c2	112	u64 ticks;
b9dbf951 MD	113	unsigned long flags;
	114
	115	/* the STI hardware buffers the 48-bit count, but to
	116	* break it out into two 32-bit access the registers
	117	* must be accessed in a certain order.
	118	* Always read STI_COUNT_H before STI_COUNT_L.
	119	*/
	120	raw_spin_lock_irqsave(&p->lock, flags);
a5a1d1c2	121	ticks = (u64)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
b9dbf951 MD	122	ticks \|= em_sti_read(p, STI_COUNT_L);
	123	raw_spin_unlock_irqrestore(&p->lock, flags);
	124
	125	return ticks;
	126	}
	127
a5a1d1c2	128	static u64 em_sti_set_next(struct em_sti_priv *p, u64 next)
b9dbf951 MD	129	{
	130	unsigned long flags;
	131
	132	raw_spin_lock_irqsave(&p->lock, flags);
	133
	134	/* mask compare A interrupt */
	135	em_sti_write(p, STI_INTENCLR, 1);
	136
	137	/* update compare A value */
	138	em_sti_write(p, STI_COMPA_H, next >> 32);
	139	em_sti_write(p, STI_COMPA_L, next & 0xffffffff);
	140
	141	/* clear compare A interrupt source */
	142	em_sti_write(p, STI_INTFFCLR, 1);
	143
	144	/* unmask compare A interrupt */
	145	em_sti_write(p, STI_INTENSET, 1);
	146
	147	raw_spin_unlock_irqrestore(&p->lock, flags);
	148
	149	return next;
	150	}
	151
	152	static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
	153	{
	154	struct em_sti_priv *p = dev_id;
	155
	156	p->ced.event_handler(&p->ced);
	157	return IRQ_HANDLED;
	158	}
	159
	160	static int em_sti_start(struct em_sti_priv *p, unsigned int user)
	161	{
	162	unsigned long flags;
	163	int used_before;
	164	int ret = 0;
	165
	166	raw_spin_lock_irqsave(&p->lock, flags);
	167	used_before = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
	168	if (!used_before)
	169	ret = em_sti_enable(p);
	170
	171	if (!ret)
	172	p->active[user] = 1;
	173	raw_spin_unlock_irqrestore(&p->lock, flags);
	174
	175	return ret;
	176	}
	177
	178	static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
	179	{
	180	unsigned long flags;
	181	int used_before, used_after;
	182
	183	raw_spin_lock_irqsave(&p->lock, flags);
	184	used_before = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
	185	p->active[user] = 0;
	186	used_after = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
	187
	188	if (used_before && !used_after)
	189	em_sti_disable(p);
	190	raw_spin_unlock_irqrestore(&p->lock, flags);
	191	}
	192
193	static struct em_sti_priv cs_to_em_sti(struct clocksource cs)
194	{
195	return container_of(cs, struct em_sti_priv, cs);
196	}
197
a5a1d1c2	198	static u64 em_sti_clocksource_read(struct clocksource *cs)
b9dbf951 MD	199	{
	200	return em_sti_count(cs_to_em_sti(cs));
	201	}
	202
	203	static int em_sti_clocksource_enable(struct clocksource *cs)
	204	{
b9dbf951 MD	205	struct em_sti_priv *p = cs_to_em_sti(cs);
b9dbf951 MD	206
4e53aa2f	207	return em_sti_start(p, USER_CLOCKSOURCE);
b9dbf951 MD	208	}
	209
	210	static void em_sti_clocksource_disable(struct clocksource *cs)
	211	{
	212	em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
	213	}
	214
	215	static void em_sti_clocksource_resume(struct clocksource *cs)
	216	{
	217	em_sti_clocksource_enable(cs);
	218	}
	219
	220	static int em_sti_register_clocksource(struct em_sti_priv *p)
	221	{
	222	struct clocksource *cs = &p->cs;
	223
b9dbf951 MD	224	cs->name = dev_name(&p->pdev->dev);
	225	cs->rating = 200;
	226	cs->read = em_sti_clocksource_read;
	227	cs->enable = em_sti_clocksource_enable;
	228	cs->disable = em_sti_clocksource_disable;
	229	cs->suspend = em_sti_clocksource_disable;
	230	cs->resume = em_sti_clocksource_resume;
	231	cs->mask = CLOCKSOURCE_MASK(48);
	232	cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
	233
	234	dev_info(&p->pdev->dev, "used as clock source\n");
	235
4e53aa2f	236	clocksource_register_hz(cs, p->rate);
b9dbf951 MD	237	return 0;
	238	}
	239
	240	static struct em_sti_priv ced_to_em_sti(struct clock_event_device ced)
	241	{
	242	return container_of(ced, struct em_sti_priv, ced);
	243	}
	244
75f94061	245	static int em_sti_clock_event_shutdown(struct clock_event_device *ced)
b9dbf951 MD	246	{
b9dbf951 MD	247	struct em_sti_priv *p = ced_to_em_sti(ced);
75f94061 VK	248	em_sti_stop(p, USER_CLOCKEVENT);
	249	return 0;
	250	}
b9dbf951	251
75f94061 VK	252	static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced)
	253	{
	254	struct em_sti_priv *p = ced_to_em_sti(ced);
b9dbf951	255
75f94061 VK	256	dev_info(&p->pdev->dev, "used for oneshot clock events\n");
75f94061 VK	257	em_sti_start(p, USER_CLOCKEVENT);
75f94061	258	return 0;
b9dbf951 MD	259	}
	260
	261	static int em_sti_clock_event_next(unsigned long delta,
	262	struct clock_event_device *ced)
	263	{
	264	struct em_sti_priv *p = ced_to_em_sti(ced);
a5a1d1c2	265	u64 next;
b9dbf951 MD	266	int safe;
	267
	268	next = em_sti_set_next(p, em_sti_count(p) + delta);
	269	safe = em_sti_count(p) < (next - 1);
	270
	271	return !safe;
	272	}
	273
	274	static void em_sti_register_clockevent(struct em_sti_priv *p)
	275	{
	276	struct clock_event_device *ced = &p->ced;
	277
b9dbf951 MD	278	ced->name = dev_name(&p->pdev->dev);
	279	ced->features = CLOCK_EVT_FEAT_ONESHOT;
	280	ced->rating = 200;
2199a557	281	ced->cpumask = cpu_possible_mask;
b9dbf951	282	ced->set_next_event = em_sti_clock_event_next;
75f94061 VK	283	ced->set_state_shutdown = em_sti_clock_event_shutdown;
75f94061 VK	284	ced->set_state_oneshot = em_sti_clock_event_set_oneshot;
b9dbf951 MD	285
	286	dev_info(&p->pdev->dev, "used for clock events\n");
	287
4e53aa2f	288	clockevents_config_and_register(ced, p->rate, 2, 0xffffffff);
b9dbf951 MD	289	}
b9dbf951 MD	290
1850514b	291	static int em_sti_probe(struct platform_device *pdev)
b9dbf951 MD	292	{
	293	struct em_sti_priv *p;
	294	struct resource *res;
1745e696	295	int irq;
3814ae09	296	int ret;
b9dbf951	297
1745e696	298	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
39dd5677	299	if (p == NULL)
1745e696	300	return -ENOMEM;
b9dbf951 MD	301
	302	p->pdev = pdev;
	303	platform_set_drvdata(pdev, p);
	304
b9dbf951 MD	305	irq = platform_get_irq(pdev, 0);
	306	if (irq < 0) {
	307	dev_err(&pdev->dev, "failed to get irq\n");
5c23a558	308	return irq;
b9dbf951 MD	309	}
	310
	311	/* map memory, let base point to the STI instance */
1745e696 LP	312	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	313	p->base = devm_ioremap_resource(&pdev->dev, res);
	314	if (IS_ERR(p->base))
	315	return PTR_ERR(p->base);
b9dbf951	316
5c23a558 GS	317	ret = devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
	318	IRQF_TIMER \| IRQF_IRQPOLL \| IRQF_NOBALANCING,
	319	dev_name(&pdev->dev), p);
	320	if (ret) {
3814ae09	321	dev_err(&pdev->dev, "failed to request low IRQ\n");
5c23a558	322	return ret;
3814ae09 NS	323	}
3814ae09 NS	324
b9dbf951	325	/* get hold of clock */
1745e696	326	p->clk = devm_clk_get(&pdev->dev, "sclk");
b9dbf951 MD	327	if (IS_ERR(p->clk)) {
b9dbf951 MD	328	dev_err(&pdev->dev, "cannot get clock\n");
1745e696	329	return PTR_ERR(p->clk);
b9dbf951 MD	330	}
b9dbf951 MD	331
3814ae09 NS	332	ret = clk_prepare(p->clk);
	333	if (ret < 0) {
	334	dev_err(&pdev->dev, "cannot prepare clock\n");
	335	return ret;
b9dbf951 MD	336	}
b9dbf951 MD	337
4e53aa2f NS	338	ret = clk_enable(p->clk);
	339	if (ret < 0) {
	340	dev_err(&p->pdev->dev, "cannot enable clock\n");
	341	clk_unprepare(p->clk);
	342	return ret;
	343	}
	344	p->rate = clk_get_rate(p->clk);
	345	clk_disable(p->clk);
	346
b9dbf951 MD	347	raw_spin_lock_init(&p->lock);
	348	em_sti_register_clockevent(p);
	349	em_sti_register_clocksource(p);
	350	return 0;
b9dbf951 MD	351	}
b9dbf951 MD	352
1850514b	353	static int em_sti_remove(struct platform_device *pdev)
b9dbf951 MD	354	{
	355	return -EBUSY; /* cannot unregister clockevent and clocksource */
	356	}
	357
1850514b	358	static const struct of_device_id em_sti_dt_ids[] = {
fc0830fe MD	359	{ .compatible = "renesas,em-sti", },
	360	{},
	361	};
	362	MODULE_DEVICE_TABLE(of, em_sti_dt_ids);
	363
b9dbf951 MD	364	static struct platform_driver em_sti_device_driver = {
b9dbf951 MD	365	.probe = em_sti_probe,
1850514b	366	.remove = em_sti_remove,
b9dbf951 MD	367	.driver = {
b9dbf951 MD	368	.name = "em_sti",
fc0830fe	369	.of_match_table = em_sti_dt_ids,
b9dbf951 MD	370	}
	371	};
	372
09acc3a1 SH	373	static int __init em_sti_init(void)
	374	{
	375	return platform_driver_register(&em_sti_device_driver);
	376	}
	377
	378	static void __exit em_sti_exit(void)
	379	{
	380	platform_driver_unregister(&em_sti_device_driver);
	381	}
	382
	383	subsys_initcall(em_sti_init);
	384	module_exit(em_sti_exit);
b9dbf951 MD	385
	386	MODULE_AUTHOR("Magnus Damm");
	387	MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");
	388	MODULE_LICENSE("GPL v2");