[mirror_ubuntu-artful-kernel.git] / drivers / clocksource / vt8500_timer.c

/*
 *  arch/arm/mach-vt8500/timer.c
 *
 *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
 *  Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

/*
 * This file is copied and modified from the original timer.c provided by
 * Alexey Charkov. Minor changes have been made for Device Tree Support.
 */

#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/delay.h>

#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>

#define VT8500_TIMER_OFFSET	0x0100
#define VT8500_TIMER_HZ		3000000
#define TIMER_MATCH_VAL		0x0000
#define TIMER_COUNT_VAL		0x0010
#define TIMER_STATUS_VAL	0x0014
#define TIMER_IER_VAL		0x001c		/* interrupt enable */
#define TIMER_CTRL_VAL		0x0020
#define TIMER_AS_VAL		0x0024		/* access status */
#define TIMER_COUNT_R_ACTIVE	(1 << 5)	/* not ready for read */
#define TIMER_COUNT_W_ACTIVE	(1 << 4)	/* not ready for write */
#define TIMER_MATCH_W_ACTIVE	(1 << 0)	/* not ready for write */

#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)

#define MIN_OSCR_DELTA		16

static void __iomem *regbase;

static u64 vt8500_timer_read(struct clocksource *cs)
{
	int loops = msecs_to_loops(10);
	writel(3, regbase + TIMER_CTRL_VAL);
	while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
						&& --loops)
		cpu_relax();
	return readl(regbase + TIMER_COUNT_VAL);
}

static struct clocksource clocksource = {
	.name           = "vt8500_timer",
	.rating         = 200,
	.read           = vt8500_timer_read,
	.mask           = CLOCKSOURCE_MASK(32),
	.flags          = CLOCK_SOURCE_IS_CONTINUOUS,
};

static int vt8500_timer_set_next_event(unsigned long cycles,
				    struct clock_event_device *evt)
{
	int loops = msecs_to_loops(10);
	u64 alarm = clocksource.read(&clocksource) + cycles;
	while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
						&& --loops)
		cpu_relax();
	writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);

	if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
		return -ETIME;

	writel(1, regbase + TIMER_IER_VAL);

	return 0;
}

static int vt8500_shutdown(struct clock_event_device *evt)
{
	writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL);
	writel(0, regbase + TIMER_IER_VAL);
	return 0;
}

static struct clock_event_device clockevent = {
	.name			= "vt8500_timer",
	.features		= CLOCK_EVT_FEAT_ONESHOT,
	.rating			= 200,
	.set_next_event		= vt8500_timer_set_next_event,
	.set_state_shutdown	= vt8500_shutdown,
	.set_state_oneshot	= vt8500_shutdown,
};

static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
{
	struct clock_event_device *evt = dev_id;
	writel(0xf, regbase + TIMER_STATUS_VAL);
	evt->event_handler(evt);

	return IRQ_HANDLED;
}

static struct irqaction irq = {
	.name    = "vt8500_timer",
	.flags   = IRQF_TIMER | IRQF_IRQPOLL,
	.handler = vt8500_timer_interrupt,
	.dev_id  = &clockevent,
};

static int __init vt8500_timer_init(struct device_node *np)
{
	int timer_irq, ret;

	regbase = of_iomap(np, 0);
	if (!regbase) {
		pr_err("%s: Missing iobase description in Device Tree\n",
								__func__);
		return -ENXIO;
	}

	timer_irq = irq_of_parse_and_map(np, 0);
	if (!timer_irq) {
		pr_err("%s: Missing irq description in Device Tree\n",
								__func__);
		return -EINVAL;
	}

	writel(1, regbase + TIMER_CTRL_VAL);
	writel(0xf, regbase + TIMER_STATUS_VAL);
	writel(~0, regbase + TIMER_MATCH_VAL);

	ret = clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
	if (ret) {
		pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
		       __func__, clocksource.name);
		return ret;
	}

	clockevent.cpumask = cpumask_of(0);

	ret = setup_irq(timer_irq, &irq);
	if (ret) {
		pr_err("%s: setup_irq failed for %s\n", __func__,
							clockevent.name);
		return ret;
	}

	clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
					MIN_OSCR_DELTA * 2, 0xf0000000);

	return 0;
}

TIMER_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);
Commit	Line	Data
21f47fbc	1	/*
83cc7690	2	* arch/arm/mach-vt8500/timer.c
21f47fbc	3	*
e9a91de7	4	* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
21f47fbc AC	5	* Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
e9a91de7 TP	22	/*
	23	* This file is copied and modified from the original timer.c provided by
	24	* Alexey Charkov. Minor changes have been made for Device Tree Support.
	25	*/
	26
21f47fbc AC	27	#include <linux/io.h>
	28	#include <linux/irq.h>
	29	#include <linux/interrupt.h>
	30	#include <linux/clocksource.h>
	31	#include <linux/clockchips.h>
	32	#include <linux/delay.h>
21f47fbc	33
e9a91de7 TP	34	#include <linux/of.h>
	35	#include <linux/of_address.h>
	36	#include <linux/of_irq.h>
21f47fbc AC	37
21f47fbc AC	38	#define VT8500_TIMER_OFFSET 0x0100
e9a91de7	39	#define VT8500_TIMER_HZ 3000000
21f47fbc AC	40	#define TIMER_MATCH_VAL 0x0000
	41	#define TIMER_COUNT_VAL 0x0010
	42	#define TIMER_STATUS_VAL 0x0014
	43	#define TIMER_IER_VAL 0x001c /* interrupt enable */
	44	#define TIMER_CTRL_VAL 0x0020
	45	#define TIMER_AS_VAL 0x0024 /* access status */
	46	#define TIMER_COUNT_R_ACTIVE (1 << 5) /* not ready for read */
	47	#define TIMER_COUNT_W_ACTIVE (1 << 4) /* not ready for write */
	48	#define TIMER_MATCH_W_ACTIVE (1 << 0) /* not ready for write */
21f47fbc AC	49
	50	#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
	51
f9eccf24 RV	52	#define MIN_OSCR_DELTA 16
f9eccf24 RV	53
21f47fbc AC	54	static void __iomem *regbase;
21f47fbc AC	55
a5a1d1c2	56	static u64 vt8500_timer_read(struct clocksource *cs)
21f47fbc AC	57	{
	58	int loops = msecs_to_loops(10);
	59	writel(3, regbase + TIMER_CTRL_VAL);
	60	while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
	61	&& --loops)
	62	cpu_relax();
	63	return readl(regbase + TIMER_COUNT_VAL);
	64	}
	65
e9a91de7	66	static struct clocksource clocksource = {
21f47fbc AC	67	.name = "vt8500_timer",
	68	.rating = 200,
	69	.read = vt8500_timer_read,
	70	.mask = CLOCKSOURCE_MASK(32),
	71	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
	72	};
	73
	74	static int vt8500_timer_set_next_event(unsigned long cycles,
	75	struct clock_event_device *evt)
	76	{
	77	int loops = msecs_to_loops(10);
a5a1d1c2	78	u64 alarm = clocksource.read(&clocksource) + cycles;
21f47fbc AC	79	while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
	80	&& --loops)
	81	cpu_relax();
	82	writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
	83
f9eccf24	84	if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
21f47fbc AC	85	return -ETIME;
	86
	87	writel(1, regbase + TIMER_IER_VAL);
	88
	89	return 0;
	90	}
	91
214bc755	92	static int vt8500_shutdown(struct clock_event_device *evt)
21f47fbc	93	{
214bc755 VK	94	writel(readl(regbase + TIMER_CTRL_VAL) \| 1, regbase + TIMER_CTRL_VAL);
	95	writel(0, regbase + TIMER_IER_VAL);
	96	return 0;
21f47fbc AC	97	}
21f47fbc AC	98
e9a91de7	99	static struct clock_event_device clockevent = {
214bc755 VK	100	.name = "vt8500_timer",
	101	.features = CLOCK_EVT_FEAT_ONESHOT,
	102	.rating = 200,
	103	.set_next_event = vt8500_timer_set_next_event,
	104	.set_state_shutdown = vt8500_shutdown,
	105	.set_state_oneshot = vt8500_shutdown,
21f47fbc AC	106	};
	107
	108	static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
	109	{
	110	struct clock_event_device *evt = dev_id;
	111	writel(0xf, regbase + TIMER_STATUS_VAL);
	112	evt->event_handler(evt);
	113
	114	return IRQ_HANDLED;
	115	}
	116
e9a91de7	117	static struct irqaction irq = {
21f47fbc	118	.name = "vt8500_timer",
39039eb3	119	.flags = IRQF_TIMER \| IRQF_IRQPOLL,
21f47fbc AC	120	.handler = vt8500_timer_interrupt,
	121	.dev_id = &clockevent,
	122	};
	123
979d7f28	124	static int __init vt8500_timer_init(struct device_node *np)
21f47fbc	125	{
979d7f28	126	int timer_irq, ret;
e9a91de7	127
e9a91de7 TP	128	regbase = of_iomap(np, 0);
	129	if (!regbase) {
	130	pr_err("%s: Missing iobase description in Device Tree\n",
	131	__func__);
979d7f28	132	return -ENXIO;
e9a91de7	133	}
979d7f28	134
e9a91de7 TP	135	timer_irq = irq_of_parse_and_map(np, 0);
	136	if (!timer_irq) {
	137	pr_err("%s: Missing irq description in Device Tree\n",
	138	__func__);
979d7f28	139	return -EINVAL;
e9a91de7	140	}
21f47fbc AC	141
	142	writel(1, regbase + TIMER_CTRL_VAL);
	143	writel(0xf, regbase + TIMER_STATUS_VAL);
	144	writel(~0, regbase + TIMER_MATCH_VAL);
	145
979d7f28 DL	146	ret = clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
979d7f28 DL	147	if (ret) {
e9a91de7	148	pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
979d7f28 DL	149	__func__, clocksource.name);
	150	return ret;
	151	}
21f47fbc	152
21f47fbc AC	153	clockevent.cpumask = cpumask_of(0);
21f47fbc AC	154
979d7f28 DL	155	ret = setup_irq(timer_irq, &irq);
979d7f28 DL	156	if (ret) {
e9a91de7 TP	157	pr_err("%s: setup_irq failed for %s\n", __func__,
e9a91de7 TP	158	clockevent.name);
979d7f28 DL	159	return ret;
	160	}
	161
838a2ae8	162	clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
f9eccf24	163	MIN_OSCR_DELTA * 2, 0xf0000000);
979d7f28 DL	164
979d7f28 DL	165	return 0;
21f47fbc AC	166	}
21f47fbc AC	167
17273395	168	TIMER_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);