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1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
3a58df35 3 * acpi-cpufreq.c - ACPI Processor P-States Driver
1da177e4
LT
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
fe27cb35 8 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
1da177e4
LT
9 */
10
1c5864e2
JP
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
1da177e4
LT
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
fe27cb35
VP
16#include <linux/smp.h>
17#include <linux/sched.h>
1da177e4 18#include <linux/cpufreq.h>
d395bf12 19#include <linux/compiler.h>
8adcc0c6 20#include <linux/dmi.h>
5a0e3ad6 21#include <linux/slab.h>
1da177e4
LT
22
23#include <linux/acpi.h>
3a58df35
DJ
24#include <linux/io.h>
25#include <linux/delay.h>
26#include <linux/uaccess.h>
27
1da177e4 28#include <acpi/processor.h>
3c55e94c 29#include <acpi/cppc_acpi.h>
1da177e4 30
dde9f7ba 31#include <asm/msr.h>
fe27cb35
VP
32#include <asm/processor.h>
33#include <asm/cpufeature.h>
ba5bade4 34#include <asm/cpu_device_id.h>
fe27cb35 35
1da177e4
LT
36MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
37MODULE_DESCRIPTION("ACPI Processor P-States Driver");
38MODULE_LICENSE("GPL");
39
dde9f7ba
VP
40enum {
41 UNDEFINED_CAPABLE = 0,
42 SYSTEM_INTEL_MSR_CAPABLE,
3dc9a633 43 SYSTEM_AMD_MSR_CAPABLE,
dde9f7ba
VP
44 SYSTEM_IO_CAPABLE,
45};
46
47#define INTEL_MSR_RANGE (0xffff)
3dc9a633 48#define AMD_MSR_RANGE (0x7)
cc9690cf 49#define HYGON_MSR_RANGE (0x7)
dde9f7ba 50
615b7300
AP
51#define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
52
fe27cb35 53struct acpi_cpufreq_data {
64be7eed
VP
54 unsigned int resume;
55 unsigned int cpu_feature;
8cfcfd39 56 unsigned int acpi_perf_cpu;
f4fd3797 57 cpumask_var_t freqdomain_cpus;
ed757a2c
RW
58 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
59 u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
1da177e4
LT
60};
61
50109292 62/* acpi_perf_data is a pointer to percpu data. */
3f6c4df7 63static struct acpi_processor_performance __percpu *acpi_perf_data;
1da177e4 64
3427616b
RW
65static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
66{
67 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
68}
69
1da177e4
LT
70static struct cpufreq_driver acpi_cpufreq_driver;
71
d395bf12 72static unsigned int acpi_pstate_strict;
615b7300
AP
73
74static bool boost_state(unsigned int cpu)
75{
76 u32 lo, hi;
77 u64 msr;
78
79 switch (boot_cpu_data.x86_vendor) {
80 case X86_VENDOR_INTEL:
81 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
82 msr = lo | ((u64)hi << 32);
83 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
cc9690cf 84 case X86_VENDOR_HYGON:
615b7300
AP
85 case X86_VENDOR_AMD:
86 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
87 msr = lo | ((u64)hi << 32);
88 return !(msr & MSR_K7_HWCR_CPB_DIS);
89 }
90 return false;
91}
92
a3605c46 93static int boost_set_msr(bool enable)
615b7300 94{
615b7300 95 u32 msr_addr;
a3605c46 96 u64 msr_mask, val;
615b7300
AP
97
98 switch (boot_cpu_data.x86_vendor) {
99 case X86_VENDOR_INTEL:
100 msr_addr = MSR_IA32_MISC_ENABLE;
101 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
102 break;
cc9690cf 103 case X86_VENDOR_HYGON:
615b7300
AP
104 case X86_VENDOR_AMD:
105 msr_addr = MSR_K7_HWCR;
106 msr_mask = MSR_K7_HWCR_CPB_DIS;
107 break;
108 default:
a3605c46 109 return -EINVAL;
615b7300
AP
110 }
111
a3605c46 112 rdmsrl(msr_addr, val);
615b7300 113
a3605c46
SAS
114 if (enable)
115 val &= ~msr_mask;
116 else
117 val |= msr_mask;
615b7300 118
a3605c46
SAS
119 wrmsrl(msr_addr, val);
120 return 0;
121}
122
123static void boost_set_msr_each(void *p_en)
124{
125 bool enable = (bool) p_en;
126
127 boost_set_msr(enable);
615b7300
AP
128}
129
cf6fada7 130static int set_boost(struct cpufreq_policy *policy, int val)
615b7300 131{
cf6fada7
XW
132 on_each_cpu_mask(policy->cpus, boost_set_msr_each,
133 (void *)(long)val, 1);
134 pr_debug("CPU %*pbl: Core Boosting %sabled.\n",
135 cpumask_pr_args(policy->cpus), val ? "en" : "dis");
615b7300 136
cfc9c8ed 137 return 0;
615b7300
AP
138}
139
f4fd3797
LT
140static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
141{
eb0b3e78 142 struct acpi_cpufreq_data *data = policy->driver_data;
f4fd3797 143
e2530367
SP
144 if (unlikely(!data))
145 return -ENODEV;
146
f4fd3797
LT
147 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
148}
149
150cpufreq_freq_attr_ro(freqdomain_cpus);
151
11269ff5 152#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
17135782
RW
153static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
154 size_t count)
cfc9c8ed
LM
155{
156 int ret;
17135782 157 unsigned int val = 0;
cfc9c8ed 158
7a6c79f2 159 if (!acpi_cpufreq_driver.set_boost)
cfc9c8ed
LM
160 return -EINVAL;
161
17135782
RW
162 ret = kstrtouint(buf, 10, &val);
163 if (ret || val > 1)
cfc9c8ed
LM
164 return -EINVAL;
165
cf6fada7
XW
166 get_online_cpus();
167 set_boost(policy, val);
168 put_online_cpus();
cfc9c8ed
LM
169
170 return count;
171}
172
11269ff5
AP
173static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
174{
cfc9c8ed 175 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
11269ff5
AP
176}
177
59027d35 178cpufreq_freq_attr_rw(cpb);
11269ff5
AP
179#endif
180
dde9f7ba
VP
181static int check_est_cpu(unsigned int cpuid)
182{
92cb7612 183 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
dde9f7ba 184
0de51088 185 return cpu_has(cpu, X86_FEATURE_EST);
dde9f7ba
VP
186}
187
3dc9a633
MG
188static int check_amd_hwpstate_cpu(unsigned int cpuid)
189{
190 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
191
192 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
193}
194
8cee1eed 195static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
fe27cb35 196{
8cee1eed 197 struct acpi_cpufreq_data *data = policy->driver_data;
64be7eed
VP
198 struct acpi_processor_performance *perf;
199 int i;
fe27cb35 200
3427616b 201 perf = to_perf_data(data);
fe27cb35 202
3a58df35 203 for (i = 0; i < perf->state_count; i++) {
fe27cb35 204 if (value == perf->states[i].status)
8cee1eed 205 return policy->freq_table[i].frequency;
fe27cb35
VP
206 }
207 return 0;
208}
209
8cee1eed 210static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
dde9f7ba 211{
8cee1eed 212 struct acpi_cpufreq_data *data = policy->driver_data;
041526f9 213 struct cpufreq_frequency_table *pos;
a6f6e6e6 214 struct acpi_processor_performance *perf;
dde9f7ba 215
3dc9a633
MG
216 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
217 msr &= AMD_MSR_RANGE;
cc9690cf
PW
218 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
219 msr &= HYGON_MSR_RANGE;
3dc9a633
MG
220 else
221 msr &= INTEL_MSR_RANGE;
222
3427616b 223 perf = to_perf_data(data);
a6f6e6e6 224
538b0188 225 cpufreq_for_each_entry(pos, policy->freq_table)
041526f9
SK
226 if (msr == perf->states[pos->driver_data].status)
227 return pos->frequency;
538b0188 228 return policy->freq_table[0].frequency;
dde9f7ba
VP
229}
230
8cee1eed 231static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
dde9f7ba 232{
8cee1eed
VK
233 struct acpi_cpufreq_data *data = policy->driver_data;
234
dde9f7ba 235 switch (data->cpu_feature) {
64be7eed 236 case SYSTEM_INTEL_MSR_CAPABLE:
3dc9a633 237 case SYSTEM_AMD_MSR_CAPABLE:
8cee1eed 238 return extract_msr(policy, val);
64be7eed 239 case SYSTEM_IO_CAPABLE:
8cee1eed 240 return extract_io(policy, val);
64be7eed 241 default:
dde9f7ba
VP
242 return 0;
243 }
244}
245
ac13b996 246static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
ed757a2c 247{
e1711f29 248 u32 val, dummy __always_unused;
dde9f7ba 249
ed757a2c
RW
250 rdmsr(MSR_IA32_PERF_CTL, val, dummy);
251 return val;
252}
253
ac13b996 254static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
ed757a2c
RW
255{
256 u32 lo, hi;
257
258 rdmsr(MSR_IA32_PERF_CTL, lo, hi);
259 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
260 wrmsr(MSR_IA32_PERF_CTL, lo, hi);
261}
262
ac13b996 263static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
ed757a2c 264{
e1711f29 265 u32 val, dummy __always_unused;
ed757a2c
RW
266
267 rdmsr(MSR_AMD_PERF_CTL, val, dummy);
268 return val;
269}
270
ac13b996 271static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
ed757a2c
RW
272{
273 wrmsr(MSR_AMD_PERF_CTL, val, 0);
274}
275
ac13b996 276static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
ed757a2c
RW
277{
278 u32 val;
279
280 acpi_os_read_port(reg->address, &val, reg->bit_width);
281 return val;
282}
283
ac13b996 284static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
ed757a2c
RW
285{
286 acpi_os_write_port(reg->address, val, reg->bit_width);
287}
fe27cb35
VP
288
289struct drv_cmd {
ed757a2c 290 struct acpi_pct_register *reg;
fe27cb35 291 u32 val;
ed757a2c
RW
292 union {
293 void (*write)(struct acpi_pct_register *reg, u32 val);
294 u32 (*read)(struct acpi_pct_register *reg);
295 } func;
fe27cb35
VP
296};
297
01599fca
AM
298/* Called via smp_call_function_single(), on the target CPU */
299static void do_drv_read(void *_cmd)
1da177e4 300{
72859081 301 struct drv_cmd *cmd = _cmd;
dde9f7ba 302
ed757a2c 303 cmd->val = cmd->func.read(cmd->reg);
fe27cb35 304}
1da177e4 305
ed757a2c 306static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
fe27cb35 307{
ed757a2c
RW
308 struct acpi_processor_performance *perf = to_perf_data(data);
309 struct drv_cmd cmd = {
310 .reg = &perf->control_register,
311 .func.read = data->cpu_freq_read,
312 };
313 int err;
dde9f7ba 314
ed757a2c
RW
315 err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
316 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
317 return cmd.val;
fe27cb35 318}
1da177e4 319
ed757a2c
RW
320/* Called via smp_call_function_many(), on the target CPUs */
321static void do_drv_write(void *_cmd)
fe27cb35 322{
ed757a2c 323 struct drv_cmd *cmd = _cmd;
fe27cb35 324
ed757a2c 325 cmd->func.write(cmd->reg, cmd->val);
fe27cb35
VP
326}
327
ed757a2c
RW
328static void drv_write(struct acpi_cpufreq_data *data,
329 const struct cpumask *mask, u32 val)
fe27cb35 330{
ed757a2c
RW
331 struct acpi_processor_performance *perf = to_perf_data(data);
332 struct drv_cmd cmd = {
333 .reg = &perf->control_register,
334 .val = val,
335 .func.write = data->cpu_freq_write,
336 };
ea34f43a
LT
337 int this_cpu;
338
339 this_cpu = get_cpu();
ed757a2c
RW
340 if (cpumask_test_cpu(this_cpu, mask))
341 do_drv_write(&cmd);
342
343 smp_call_function_many(mask, do_drv_write, &cmd, 1);
ea34f43a 344 put_cpu();
fe27cb35 345}
1da177e4 346
ed757a2c 347static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
fe27cb35 348{
ed757a2c 349 u32 val;
1da177e4 350
4d8bb537 351 if (unlikely(cpumask_empty(mask)))
fe27cb35 352 return 0;
1da177e4 353
ed757a2c 354 val = drv_read(data, mask);
1da177e4 355
eae2ef0e 356 pr_debug("%s = %u\n", __func__, val);
fe27cb35 357
ed757a2c 358 return val;
fe27cb35 359}
1da177e4 360
fe27cb35
VP
361static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
362{
eb0b3e78
PX
363 struct acpi_cpufreq_data *data;
364 struct cpufreq_policy *policy;
64be7eed 365 unsigned int freq;
e56a727b 366 unsigned int cached_freq;
fe27cb35 367
eae2ef0e 368 pr_debug("%s (%d)\n", __func__, cpu);
fe27cb35 369
1f0bd44e 370 policy = cpufreq_cpu_get_raw(cpu);
eb0b3e78
PX
371 if (unlikely(!policy))
372 return 0;
373
374 data = policy->driver_data;
8cee1eed 375 if (unlikely(!data || !policy->freq_table))
fe27cb35 376 return 0;
1da177e4 377
538b0188 378 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
8cee1eed 379 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
e56a727b
VP
380 if (freq != cached_freq) {
381 /*
382 * The dreaded BIOS frequency change behind our back.
383 * Force set the frequency on next target call.
384 */
385 data->resume = 1;
386 }
387
2d06d8c4 388 pr_debug("cur freq = %u\n", freq);
1da177e4 389
fe27cb35 390 return freq;
1da177e4
LT
391}
392
8cee1eed
VK
393static unsigned int check_freqs(struct cpufreq_policy *policy,
394 const struct cpumask *mask, unsigned int freq)
fe27cb35 395{
8cee1eed 396 struct acpi_cpufreq_data *data = policy->driver_data;
64be7eed
VP
397 unsigned int cur_freq;
398 unsigned int i;
1da177e4 399
3a58df35 400 for (i = 0; i < 100; i++) {
8cee1eed 401 cur_freq = extract_freq(policy, get_cur_val(mask, data));
fe27cb35
VP
402 if (cur_freq == freq)
403 return 1;
404 udelay(10);
405 }
406 return 0;
407}
408
409static int acpi_cpufreq_target(struct cpufreq_policy *policy,
9c0ebcf7 410 unsigned int index)
1da177e4 411{
eb0b3e78 412 struct acpi_cpufreq_data *data = policy->driver_data;
64be7eed 413 struct acpi_processor_performance *perf;
ed757a2c 414 const struct cpumask *mask;
8edc59d9 415 unsigned int next_perf_state = 0; /* Index into perf table */
64be7eed 416 int result = 0;
fe27cb35 417
8cee1eed 418 if (unlikely(!data)) {
fe27cb35
VP
419 return -ENODEV;
420 }
1da177e4 421
3427616b 422 perf = to_perf_data(data);
8cee1eed 423 next_perf_state = policy->freq_table[index].driver_data;
7650b281 424 if (perf->state == next_perf_state) {
fe27cb35 425 if (unlikely(data->resume)) {
2d06d8c4 426 pr_debug("Called after resume, resetting to P%d\n",
64be7eed 427 next_perf_state);
fe27cb35
VP
428 data->resume = 0;
429 } else {
2d06d8c4 430 pr_debug("Already at target state (P%d)\n",
64be7eed 431 next_perf_state);
9a909a14 432 return 0;
fe27cb35 433 }
09b4d1ee
VP
434 }
435
ed757a2c
RW
436 /*
437 * The core won't allow CPUs to go away until the governor has been
438 * stopped, so we can rely on the stability of policy->cpus.
439 */
440 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
441 cpumask_of(policy->cpu) : policy->cpus;
09b4d1ee 442
ed757a2c 443 drv_write(data, mask, perf->states[next_perf_state].control);
09b4d1ee 444
fe27cb35 445 if (acpi_pstate_strict) {
8cee1eed
VK
446 if (!check_freqs(policy, mask,
447 policy->freq_table[index].frequency)) {
eae2ef0e 448 pr_debug("%s (%d)\n", __func__, policy->cpu);
4d8bb537 449 result = -EAGAIN;
09b4d1ee
VP
450 }
451 }
452
e15d8309
VK
453 if (!result)
454 perf->state = next_perf_state;
fe27cb35
VP
455
456 return result;
1da177e4
LT
457}
458
08e9cc40
CIK
459static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
460 unsigned int target_freq)
b7898fda
RW
461{
462 struct acpi_cpufreq_data *data = policy->driver_data;
463 struct acpi_processor_performance *perf;
464 struct cpufreq_frequency_table *entry;
82577360 465 unsigned int next_perf_state, next_freq, index;
b7898fda
RW
466
467 /*
468 * Find the closest frequency above target_freq.
b7898fda 469 */
5b6667c7
SM
470 if (policy->cached_target_freq == target_freq)
471 index = policy->cached_resolved_idx;
472 else
473 index = cpufreq_table_find_index_dl(policy, target_freq);
82577360
VK
474
475 entry = &policy->freq_table[index];
b7898fda
RW
476 next_freq = entry->frequency;
477 next_perf_state = entry->driver_data;
478
479 perf = to_perf_data(data);
480 if (perf->state == next_perf_state) {
481 if (unlikely(data->resume))
482 data->resume = 0;
483 else
484 return next_freq;
485 }
486
487 data->cpu_freq_write(&perf->control_register,
488 perf->states[next_perf_state].control);
489 perf->state = next_perf_state;
490 return next_freq;
491}
492
1da177e4 493static unsigned long
64be7eed 494acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
1da177e4 495{
3427616b 496 struct acpi_processor_performance *perf;
09b4d1ee 497
3427616b 498 perf = to_perf_data(data);
1da177e4
LT
499 if (cpu_khz) {
500 /* search the closest match to cpu_khz */
501 unsigned int i;
502 unsigned long freq;
09b4d1ee 503 unsigned long freqn = perf->states[0].core_frequency * 1000;
1da177e4 504
3a58df35 505 for (i = 0; i < (perf->state_count-1); i++) {
1da177e4 506 freq = freqn;
95dd7227 507 freqn = perf->states[i+1].core_frequency * 1000;
1da177e4 508 if ((2 * cpu_khz) > (freqn + freq)) {
09b4d1ee 509 perf->state = i;
64be7eed 510 return freq;
1da177e4
LT
511 }
512 }
95dd7227 513 perf->state = perf->state_count-1;
64be7eed 514 return freqn;
09b4d1ee 515 } else {
1da177e4 516 /* assume CPU is at P0... */
09b4d1ee
VP
517 perf->state = 0;
518 return perf->states[0].core_frequency * 1000;
519 }
1da177e4
LT
520}
521
2fdf66b4
RR
522static void free_acpi_perf_data(void)
523{
524 unsigned int i;
525
526 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
527 for_each_possible_cpu(i)
528 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
529 ->shared_cpu_map);
530 free_percpu(acpi_perf_data);
531}
532
4d66ddf2 533static int cpufreq_boost_online(unsigned int cpu)
615b7300 534{
615b7300 535 /*
4d66ddf2
SAS
536 * On the CPU_UP path we simply keep the boost-disable flag
537 * in sync with the current global state.
615b7300 538 */
a3605c46 539 return boost_set_msr(acpi_cpufreq_driver.boost_enabled);
4d66ddf2 540}
615b7300 541
4d66ddf2
SAS
542static int cpufreq_boost_down_prep(unsigned int cpu)
543{
4d66ddf2
SAS
544 /*
545 * Clear the boost-disable bit on the CPU_DOWN path so that
546 * this cpu cannot block the remaining ones from boosting.
547 */
a3605c46 548 return boost_set_msr(1);
615b7300
AP
549}
550
09b4d1ee
VP
551/*
552 * acpi_cpufreq_early_init - initialize ACPI P-States library
553 *
554 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
555 * in order to determine correct frequency and voltage pairings. We can
556 * do _PDC and _PSD and find out the processor dependency for the
557 * actual init that will happen later...
558 */
50109292 559static int __init acpi_cpufreq_early_init(void)
09b4d1ee 560{
2fdf66b4 561 unsigned int i;
eae2ef0e 562 pr_debug("%s\n", __func__);
09b4d1ee 563
50109292
FY
564 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
565 if (!acpi_perf_data) {
2d06d8c4 566 pr_debug("Memory allocation error for acpi_perf_data.\n");
50109292 567 return -ENOMEM;
09b4d1ee 568 }
2fdf66b4 569 for_each_possible_cpu(i) {
eaa95840 570 if (!zalloc_cpumask_var_node(
80855f73
MT
571 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
572 GFP_KERNEL, cpu_to_node(i))) {
2fdf66b4
RR
573
574 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
575 free_acpi_perf_data();
576 return -ENOMEM;
577 }
578 }
09b4d1ee
VP
579
580 /* Do initialization in ACPI core */
fe27cb35
VP
581 acpi_processor_preregister_performance(acpi_perf_data);
582 return 0;
09b4d1ee
VP
583}
584
95625b8f 585#ifdef CONFIG_SMP
8adcc0c6
VP
586/*
587 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
588 * or do it in BIOS firmware and won't inform about it to OS. If not
589 * detected, this has a side effect of making CPU run at a different speed
590 * than OS intended it to run at. Detect it and handle it cleanly.
591 */
592static int bios_with_sw_any_bug;
593
1855256c 594static int sw_any_bug_found(const struct dmi_system_id *d)
8adcc0c6
VP
595{
596 bios_with_sw_any_bug = 1;
597 return 0;
598}
599
1855256c 600static const struct dmi_system_id sw_any_bug_dmi_table[] = {
8adcc0c6
VP
601 {
602 .callback = sw_any_bug_found,
603 .ident = "Supermicro Server X6DLP",
604 .matches = {
605 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
606 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
607 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
608 },
609 },
610 { }
611};
1a8e42fa
PB
612
613static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
614{
293afe44 615 /* Intel Xeon Processor 7100 Series Specification Update
8479eb82 616 * https://www.intel.com/Assets/PDF/specupdate/314554.pdf
1a8e42fa
PB
617 * AL30: A Machine Check Exception (MCE) Occurring during an
618 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
293afe44 619 * Both Processor Cores to Lock Up. */
1a8e42fa
PB
620 if (c->x86_vendor == X86_VENDOR_INTEL) {
621 if ((c->x86 == 15) &&
622 (c->x86_model == 6) &&
b399151c 623 (c->x86_stepping == 8)) {
1c5864e2 624 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
1a8e42fa 625 return -ENODEV;
293afe44 626 }
1a8e42fa
PB
627 }
628 return 0;
629}
95625b8f 630#endif
8adcc0c6 631
3c55e94c
RW
632#ifdef CONFIG_ACPI_CPPC_LIB
633static u64 get_max_boost_ratio(unsigned int cpu)
634{
635 struct cppc_perf_caps perf_caps;
636 u64 highest_perf, nominal_perf;
637 int ret;
638
639 if (acpi_pstate_strict)
640 return 0;
641
642 ret = cppc_get_perf_caps(cpu, &perf_caps);
643 if (ret) {
644 pr_debug("CPU%d: Unable to get performance capabilities (%d)\n",
645 cpu, ret);
646 return 0;
647 }
648
3743d55b
HR
649 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
650 highest_perf = amd_get_highest_perf();
651 else
652 highest_perf = perf_caps.highest_perf;
653
3c55e94c
RW
654 nominal_perf = perf_caps.nominal_perf;
655
656 if (!highest_perf || !nominal_perf) {
657 pr_debug("CPU%d: highest or nominal performance missing\n", cpu);
658 return 0;
659 }
660
661 if (highest_perf < nominal_perf) {
662 pr_debug("CPU%d: nominal performance above highest\n", cpu);
663 return 0;
664 }
665
666 return div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf);
667}
668#else
669static inline u64 get_max_boost_ratio(unsigned int cpu) { return 0; }
670#endif
671
64be7eed 672static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
1da177e4 673{
3c55e94c
RW
674 struct cpufreq_frequency_table *freq_table;
675 struct acpi_processor_performance *perf;
64be7eed 676 struct acpi_cpufreq_data *data;
3c55e94c
RW
677 unsigned int cpu = policy->cpu;
678 struct cpuinfo_x86 *c = &cpu_data(cpu);
679 unsigned int valid_states = 0;
64be7eed 680 unsigned int result = 0;
3c55e94c
RW
681 u64 max_boost_ratio;
682 unsigned int i;
293afe44
JV
683#ifdef CONFIG_SMP
684 static int blacklisted;
685#endif
1da177e4 686
eae2ef0e 687 pr_debug("%s\n", __func__);
1da177e4 688
1a8e42fa 689#ifdef CONFIG_SMP
293afe44
JV
690 if (blacklisted)
691 return blacklisted;
692 blacklisted = acpi_cpufreq_blacklist(c);
693 if (blacklisted)
694 return blacklisted;
1a8e42fa
PB
695#endif
696
d5b73cd8 697 data = kzalloc(sizeof(*data), GFP_KERNEL);
1da177e4 698 if (!data)
64be7eed 699 return -ENOMEM;
1da177e4 700
f4fd3797
LT
701 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
702 result = -ENOMEM;
703 goto err_free;
704 }
705
3427616b 706 perf = per_cpu_ptr(acpi_perf_data, cpu);
8cfcfd39 707 data->acpi_perf_cpu = cpu;
eb0b3e78 708 policy->driver_data = data;
1da177e4 709
95dd7227 710 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
fe27cb35 711 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
1da177e4 712
3427616b 713 result = acpi_processor_register_performance(perf, cpu);
1da177e4 714 if (result)
f4fd3797 715 goto err_free_mask;
1da177e4 716
09b4d1ee 717 policy->shared_type = perf->shared_type;
95dd7227 718
46f18e3a 719 /*
95dd7227 720 * Will let policy->cpus know about dependency only when software
46f18e3a
VP
721 * coordination is required.
722 */
723 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
8adcc0c6 724 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
835481d9 725 cpumask_copy(policy->cpus, perf->shared_cpu_map);
8adcc0c6 726 }
f4fd3797 727 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
8adcc0c6
VP
728
729#ifdef CONFIG_SMP
730 dmi_check_system(sw_any_bug_dmi_table);
2624f90c 731 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
8adcc0c6 732 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
3280c3c8 733 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
8adcc0c6 734 }
acd31624 735
5368512a
WH
736 if (check_amd_hwpstate_cpu(cpu) && boot_cpu_data.x86 < 0x19 &&
737 !acpi_pstate_strict) {
acd31624
AP
738 cpumask_clear(policy->cpus);
739 cpumask_set_cpu(cpu, policy->cpus);
3280c3c8
BG
740 cpumask_copy(data->freqdomain_cpus,
741 topology_sibling_cpumask(cpu));
acd31624 742 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
1c5864e2 743 pr_info_once("overriding BIOS provided _PSD data\n");
acd31624 744 }
8adcc0c6 745#endif
09b4d1ee 746
1da177e4 747 /* capability check */
09b4d1ee 748 if (perf->state_count <= 1) {
2d06d8c4 749 pr_debug("No P-States\n");
1da177e4
LT
750 result = -ENODEV;
751 goto err_unreg;
752 }
09b4d1ee 753
fe27cb35
VP
754 if (perf->control_register.space_id != perf->status_register.space_id) {
755 result = -ENODEV;
756 goto err_unreg;
757 }
758
759 switch (perf->control_register.space_id) {
64be7eed 760 case ACPI_ADR_SPACE_SYSTEM_IO:
c40a4518
MG
761 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
762 boot_cpu_data.x86 == 0xf) {
763 pr_debug("AMD K8 systems must use native drivers.\n");
764 result = -ENODEV;
765 goto err_unreg;
766 }
2d06d8c4 767 pr_debug("SYSTEM IO addr space\n");
dde9f7ba 768 data->cpu_feature = SYSTEM_IO_CAPABLE;
ed757a2c
RW
769 data->cpu_freq_read = cpu_freq_read_io;
770 data->cpu_freq_write = cpu_freq_write_io;
dde9f7ba 771 break;
64be7eed 772 case ACPI_ADR_SPACE_FIXED_HARDWARE:
2d06d8c4 773 pr_debug("HARDWARE addr space\n");
3dc9a633
MG
774 if (check_est_cpu(cpu)) {
775 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
ed757a2c
RW
776 data->cpu_freq_read = cpu_freq_read_intel;
777 data->cpu_freq_write = cpu_freq_write_intel;
3dc9a633 778 break;
dde9f7ba 779 }
3dc9a633
MG
780 if (check_amd_hwpstate_cpu(cpu)) {
781 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
ed757a2c
RW
782 data->cpu_freq_read = cpu_freq_read_amd;
783 data->cpu_freq_write = cpu_freq_write_amd;
3dc9a633
MG
784 break;
785 }
786 result = -ENODEV;
787 goto err_unreg;
64be7eed 788 default:
2d06d8c4 789 pr_debug("Unknown addr space %d\n",
64be7eed 790 (u32) (perf->control_register.space_id));
1da177e4
LT
791 result = -ENODEV;
792 goto err_unreg;
793 }
794
538b0188
RW
795 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table),
796 GFP_KERNEL);
8cee1eed 797 if (!freq_table) {
1da177e4
LT
798 result = -ENOMEM;
799 goto err_unreg;
800 }
801
802 /* detect transition latency */
803 policy->cpuinfo.transition_latency = 0;
3a58df35 804 for (i = 0; i < perf->state_count; i++) {
64be7eed
VP
805 if ((perf->states[i].transition_latency * 1000) >
806 policy->cpuinfo.transition_latency)
807 policy->cpuinfo.transition_latency =
808 perf->states[i].transition_latency * 1000;
1da177e4 809 }
1da177e4 810
a59d1637
PV
811 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
812 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
813 policy->cpuinfo.transition_latency > 20 * 1000) {
a59d1637 814 policy->cpuinfo.transition_latency = 20 * 1000;
b49c22a6 815 pr_info_once("P-state transition latency capped at 20 uS\n");
a59d1637
PV
816 }
817
1da177e4 818 /* table init */
3a58df35
DJ
819 for (i = 0; i < perf->state_count; i++) {
820 if (i > 0 && perf->states[i].core_frequency >=
8cee1eed 821 freq_table[valid_states-1].frequency / 1000)
fe27cb35
VP
822 continue;
823
8cee1eed
VK
824 freq_table[valid_states].driver_data = i;
825 freq_table[valid_states].frequency =
64be7eed 826 perf->states[i].core_frequency * 1000;
fe27cb35 827 valid_states++;
1da177e4 828 }
8cee1eed 829 freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
3c55e94c 830
538b0188 831 max_boost_ratio = get_max_boost_ratio(cpu);
3c55e94c 832 if (max_boost_ratio) {
538b0188 833 unsigned int freq = freq_table[0].frequency;
3c55e94c
RW
834
835 /*
836 * Because the loop above sorts the freq_table entries in the
837 * descending order, freq is the maximum frequency in the table.
838 * Assume that it corresponds to the CPPC nominal frequency and
538b0188 839 * use it to set cpuinfo.max_freq.
3c55e94c 840 */
538b0188
RW
841 policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT;
842 } else {
3c55e94c 843 /*
538b0188
RW
844 * If the maximum "boost" frequency is unknown, ask the arch
845 * scale-invariance code to use the "nominal" performance for
846 * CPU utilization scaling so as to prevent the schedutil
847 * governor from selecting inadequate CPU frequencies.
3c55e94c 848 */
538b0188 849 arch_set_max_freq_ratio(true);
3c55e94c
RW
850 }
851
1a186d9e 852 policy->freq_table = freq_table;
8edc59d9 853 perf->state = 0;
1da177e4 854
a507ac4b 855 switch (perf->control_register.space_id) {
64be7eed 856 case ACPI_ADR_SPACE_SYSTEM_IO:
1bab64d5
VK
857 /*
858 * The core will not set policy->cur, because
859 * cpufreq_driver->get is NULL, so we need to set it here.
860 * However, we have to guess it, because the current speed is
861 * unknown and not detectable via IO ports.
862 */
dde9f7ba
VP
863 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
864 break;
64be7eed 865 case ACPI_ADR_SPACE_FIXED_HARDWARE:
7650b281 866 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
dde9f7ba 867 break;
64be7eed 868 default:
dde9f7ba
VP
869 break;
870 }
871
1da177e4
LT
872 /* notify BIOS that we exist */
873 acpi_processor_notify_smm(THIS_MODULE);
874
2d06d8c4 875 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
09b4d1ee 876 for (i = 0; i < perf->state_count; i++)
2d06d8c4 877 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
64be7eed 878 (i == perf->state ? '*' : ' '), i,
09b4d1ee
VP
879 (u32) perf->states[i].core_frequency,
880 (u32) perf->states[i].power,
881 (u32) perf->states[i].transition_latency);
1da177e4 882
4b31e774
DB
883 /*
884 * the first call to ->target() should result in us actually
885 * writing something to the appropriate registers.
886 */
887 data->resume = 1;
64be7eed 888
b7898fda
RW
889 policy->fast_switch_possible = !acpi_pstate_strict &&
890 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
891
fe27cb35 892 return result;
1da177e4 893
95dd7227 894err_unreg:
b2f8dc4c 895 acpi_processor_unregister_performance(cpu);
f4fd3797
LT
896err_free_mask:
897 free_cpumask_var(data->freqdomain_cpus);
95dd7227 898err_free:
1da177e4 899 kfree(data);
eb0b3e78 900 policy->driver_data = NULL;
1da177e4 901
64be7eed 902 return result;
1da177e4
LT
903}
904
64be7eed 905static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
1da177e4 906{
eb0b3e78 907 struct acpi_cpufreq_data *data = policy->driver_data;
1da177e4 908
eae2ef0e 909 pr_debug("%s\n", __func__);
1da177e4 910
9b55f55a
VK
911 policy->fast_switch_possible = false;
912 policy->driver_data = NULL;
913 acpi_processor_unregister_performance(data->acpi_perf_cpu);
914 free_cpumask_var(data->freqdomain_cpus);
8cee1eed 915 kfree(policy->freq_table);
9b55f55a 916 kfree(data);
1da177e4 917
64be7eed 918 return 0;
1da177e4
LT
919}
920
1a186d9e
VK
921static void acpi_cpufreq_cpu_ready(struct cpufreq_policy *policy)
922{
923 struct acpi_processor_performance *perf = per_cpu_ptr(acpi_perf_data,
924 policy->cpu);
538b0188 925 unsigned int freq = policy->freq_table[0].frequency;
1a186d9e 926
3c55e94c 927 if (perf->states[0].core_frequency * 1000 != freq)
1a186d9e
VK
928 pr_warn(FW_WARN "P-state 0 is not max freq\n");
929}
930
64be7eed 931static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
1da177e4 932{
eb0b3e78 933 struct acpi_cpufreq_data *data = policy->driver_data;
1da177e4 934
eae2ef0e 935 pr_debug("%s\n", __func__);
1da177e4
LT
936
937 data->resume = 1;
938
64be7eed 939 return 0;
1da177e4
LT
940}
941
64be7eed 942static struct freq_attr *acpi_cpufreq_attr[] = {
1da177e4 943 &cpufreq_freq_attr_scaling_available_freqs,
f4fd3797 944 &freqdomain_cpus,
f56c50e3
RW
945#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
946 &cpb,
947#endif
1da177e4
LT
948 NULL,
949};
950
951static struct cpufreq_driver acpi_cpufreq_driver = {
db9be219 952 .verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7 953 .target_index = acpi_cpufreq_target,
b7898fda 954 .fast_switch = acpi_cpufreq_fast_switch,
e2f74f35
TR
955 .bios_limit = acpi_processor_get_bios_limit,
956 .init = acpi_cpufreq_cpu_init,
957 .exit = acpi_cpufreq_cpu_exit,
1a186d9e 958 .ready = acpi_cpufreq_cpu_ready,
e2f74f35
TR
959 .resume = acpi_cpufreq_resume,
960 .name = "acpi-cpufreq",
e2f74f35 961 .attr = acpi_cpufreq_attr,
1da177e4
LT
962};
963
4d66ddf2
SAS
964static enum cpuhp_state acpi_cpufreq_online;
965
615b7300
AP
966static void __init acpi_cpufreq_boost_init(void)
967{
4d66ddf2 968 int ret;
615b7300 969
1222d527
EV
970 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) {
971 pr_debug("Boost capabilities not present in the processor\n");
4d66ddf2 972 return;
1222d527 973 }
0197fbd2 974
4d66ddf2
SAS
975 acpi_cpufreq_driver.set_boost = set_boost;
976 acpi_cpufreq_driver.boost_enabled = boost_state(0);
615b7300 977
4d66ddf2
SAS
978 /*
979 * This calls the online callback on all online cpu and forces all
980 * MSRs to the same value.
981 */
982 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online",
983 cpufreq_boost_online, cpufreq_boost_down_prep);
984 if (ret < 0) {
985 pr_err("acpi_cpufreq: failed to register hotplug callbacks\n");
4d66ddf2 986 return;
cfc9c8ed 987 }
4d66ddf2 988 acpi_cpufreq_online = ret;
615b7300
AP
989}
990
eb8c68ef 991static void acpi_cpufreq_boost_exit(void)
615b7300 992{
2a8fa123 993 if (acpi_cpufreq_online > 0)
4d66ddf2 994 cpuhp_remove_state_nocalls(acpi_cpufreq_online);
615b7300
AP
995}
996
64be7eed 997static int __init acpi_cpufreq_init(void)
1da177e4 998{
50109292
FY
999 int ret;
1000
75c07581
RW
1001 if (acpi_disabled)
1002 return -ENODEV;
1003
8a61e12e
YL
1004 /* don't keep reloading if cpufreq_driver exists */
1005 if (cpufreq_get_current_driver())
75c07581 1006 return -EEXIST;
ee297533 1007
eae2ef0e 1008 pr_debug("%s\n", __func__);
1da177e4 1009
50109292
FY
1010 ret = acpi_cpufreq_early_init();
1011 if (ret)
1012 return ret;
09b4d1ee 1013
11269ff5
AP
1014#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
1015 /* this is a sysfs file with a strange name and an even stranger
1016 * semantic - per CPU instantiation, but system global effect.
1017 * Lets enable it only on AMD CPUs for compatibility reasons and
1018 * only if configured. This is considered legacy code, which
1019 * will probably be removed at some point in the future.
1020 */
f56c50e3
RW
1021 if (!check_amd_hwpstate_cpu(0)) {
1022 struct freq_attr **attr;
11269ff5 1023
f56c50e3 1024 pr_debug("CPB unsupported, do not expose it\n");
11269ff5 1025
f56c50e3
RW
1026 for (attr = acpi_cpufreq_attr; *attr; attr++)
1027 if (*attr == &cpb) {
1028 *attr = NULL;
1029 break;
1030 }
11269ff5
AP
1031 }
1032#endif
cfc9c8ed 1033 acpi_cpufreq_boost_init();
11269ff5 1034
847aef6f 1035 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
eb8c68ef 1036 if (ret) {
2fdf66b4 1037 free_acpi_perf_data();
eb8c68ef
KRW
1038 acpi_cpufreq_boost_exit();
1039 }
847aef6f 1040 return ret;
1da177e4
LT
1041}
1042
64be7eed 1043static void __exit acpi_cpufreq_exit(void)
1da177e4 1044{
eae2ef0e 1045 pr_debug("%s\n", __func__);
1da177e4 1046
615b7300
AP
1047 acpi_cpufreq_boost_exit();
1048
1da177e4
LT
1049 cpufreq_unregister_driver(&acpi_cpufreq_driver);
1050
50f4ddd4 1051 free_acpi_perf_data();
1da177e4
LT
1052}
1053
d395bf12 1054module_param(acpi_pstate_strict, uint, 0644);
64be7eed 1055MODULE_PARM_DESC(acpi_pstate_strict,
95dd7227
DJ
1056 "value 0 or non-zero. non-zero -> strict ACPI checks are "
1057 "performed during frequency changes.");
1da177e4
LT
1058
1059late_initcall(acpi_cpufreq_init);
1060module_exit(acpi_cpufreq_exit);
1061
a7b90937 1062static const struct x86_cpu_id __maybe_unused acpi_cpufreq_ids[] = {
b11d77fa
TG
1063 X86_MATCH_FEATURE(X86_FEATURE_ACPI, NULL),
1064 X86_MATCH_FEATURE(X86_FEATURE_HW_PSTATE, NULL),
efa17194
MG
1065 {}
1066};
1067MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1068
a7b90937 1069static const struct acpi_device_id __maybe_unused processor_device_ids[] = {
c655affb
RW
1070 {ACPI_PROCESSOR_OBJECT_HID, },
1071 {ACPI_PROCESSOR_DEVICE_HID, },
1072 {},
1073};
1074MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1075
1da177e4 1076MODULE_ALIAS("acpi");