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cpufreq: make sure frequency transitions are serialized
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CommitLineData
1da177e4 1/*
3a58df35 2 * acpi-cpufreq.c - ACPI Processor P-States Driver
1da177e4
LT
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
fe27cb35 7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
1da177e4
LT
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
1da177e4
LT
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
fe27cb35
VP
31#include <linux/smp.h>
32#include <linux/sched.h>
1da177e4 33#include <linux/cpufreq.h>
d395bf12 34#include <linux/compiler.h>
8adcc0c6 35#include <linux/dmi.h>
5a0e3ad6 36#include <linux/slab.h>
1da177e4
LT
37
38#include <linux/acpi.h>
3a58df35
DJ
39#include <linux/io.h>
40#include <linux/delay.h>
41#include <linux/uaccess.h>
42
1da177e4
LT
43#include <acpi/processor.h>
44
dde9f7ba 45#include <asm/msr.h>
fe27cb35
VP
46#include <asm/processor.h>
47#include <asm/cpufeature.h>
a2fed573 48#include "mperf.h"
fe27cb35 49
1da177e4
LT
50MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
51MODULE_DESCRIPTION("ACPI Processor P-States Driver");
52MODULE_LICENSE("GPL");
53
acd31624
AP
54#define PFX "acpi-cpufreq: "
55
dde9f7ba
VP
56enum {
57 UNDEFINED_CAPABLE = 0,
58 SYSTEM_INTEL_MSR_CAPABLE,
3dc9a633 59 SYSTEM_AMD_MSR_CAPABLE,
dde9f7ba
VP
60 SYSTEM_IO_CAPABLE,
61};
62
63#define INTEL_MSR_RANGE (0xffff)
3dc9a633 64#define AMD_MSR_RANGE (0x7)
dde9f7ba 65
615b7300
AP
66#define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
67
fe27cb35 68struct acpi_cpufreq_data {
64be7eed
VP
69 struct acpi_processor_performance *acpi_data;
70 struct cpufreq_frequency_table *freq_table;
71 unsigned int resume;
72 unsigned int cpu_feature;
1da177e4
LT
73};
74
f1625066 75static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
ea348f3e 76
50109292 77/* acpi_perf_data is a pointer to percpu data. */
3f6c4df7 78static struct acpi_processor_performance __percpu *acpi_perf_data;
1da177e4
LT
79
80static struct cpufreq_driver acpi_cpufreq_driver;
81
d395bf12 82static unsigned int acpi_pstate_strict;
615b7300
AP
83static bool boost_enabled, boost_supported;
84static struct msr __percpu *msrs;
85
86static bool boost_state(unsigned int cpu)
87{
88 u32 lo, hi;
89 u64 msr;
90
91 switch (boot_cpu_data.x86_vendor) {
92 case X86_VENDOR_INTEL:
93 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
94 msr = lo | ((u64)hi << 32);
95 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
96 case X86_VENDOR_AMD:
97 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
98 msr = lo | ((u64)hi << 32);
99 return !(msr & MSR_K7_HWCR_CPB_DIS);
100 }
101 return false;
102}
103
104static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
105{
106 u32 cpu;
107 u32 msr_addr;
108 u64 msr_mask;
109
110 switch (boot_cpu_data.x86_vendor) {
111 case X86_VENDOR_INTEL:
112 msr_addr = MSR_IA32_MISC_ENABLE;
113 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
114 break;
115 case X86_VENDOR_AMD:
116 msr_addr = MSR_K7_HWCR;
117 msr_mask = MSR_K7_HWCR_CPB_DIS;
118 break;
119 default:
120 return;
121 }
122
123 rdmsr_on_cpus(cpumask, msr_addr, msrs);
124
125 for_each_cpu(cpu, cpumask) {
126 struct msr *reg = per_cpu_ptr(msrs, cpu);
127 if (enable)
128 reg->q &= ~msr_mask;
129 else
130 reg->q |= msr_mask;
131 }
132
133 wrmsr_on_cpus(cpumask, msr_addr, msrs);
134}
135
11269ff5 136static ssize_t _store_boost(const char *buf, size_t count)
615b7300
AP
137{
138 int ret;
139 unsigned long val = 0;
140
141 if (!boost_supported)
142 return -EINVAL;
143
144 ret = kstrtoul(buf, 10, &val);
145 if (ret || (val > 1))
146 return -EINVAL;
147
148 if ((val && boost_enabled) || (!val && !boost_enabled))
149 return count;
150
151 get_online_cpus();
152
153 boost_set_msrs(val, cpu_online_mask);
154
155 put_online_cpus();
156
157 boost_enabled = val;
158 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
159
160 return count;
161}
162
11269ff5
AP
163static ssize_t store_global_boost(struct kobject *kobj, struct attribute *attr,
164 const char *buf, size_t count)
165{
166 return _store_boost(buf, count);
167}
168
615b7300
AP
169static ssize_t show_global_boost(struct kobject *kobj,
170 struct attribute *attr, char *buf)
171{
172 return sprintf(buf, "%u\n", boost_enabled);
173}
174
175static struct global_attr global_boost = __ATTR(boost, 0644,
176 show_global_boost,
177 store_global_boost);
d395bf12 178
11269ff5
AP
179#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
180static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
181 size_t count)
182{
183 return _store_boost(buf, count);
184}
185
186static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
187{
188 return sprintf(buf, "%u\n", boost_enabled);
189}
190
191static struct freq_attr cpb = __ATTR(cpb, 0644, show_cpb, store_cpb);
192#endif
193
dde9f7ba
VP
194static int check_est_cpu(unsigned int cpuid)
195{
92cb7612 196 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
dde9f7ba 197
0de51088 198 return cpu_has(cpu, X86_FEATURE_EST);
dde9f7ba
VP
199}
200
3dc9a633
MG
201static int check_amd_hwpstate_cpu(unsigned int cpuid)
202{
203 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
204
205 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
206}
207
dde9f7ba 208static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
fe27cb35 209{
64be7eed
VP
210 struct acpi_processor_performance *perf;
211 int i;
fe27cb35
VP
212
213 perf = data->acpi_data;
214
3a58df35 215 for (i = 0; i < perf->state_count; i++) {
fe27cb35
VP
216 if (value == perf->states[i].status)
217 return data->freq_table[i].frequency;
218 }
219 return 0;
220}
221
dde9f7ba
VP
222static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
223{
224 int i;
a6f6e6e6 225 struct acpi_processor_performance *perf;
dde9f7ba 226
3dc9a633
MG
227 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
228 msr &= AMD_MSR_RANGE;
229 else
230 msr &= INTEL_MSR_RANGE;
231
a6f6e6e6
VP
232 perf = data->acpi_data;
233
3a58df35 234 for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
50701588 235 if (msr == perf->states[data->freq_table[i].driver_data].status)
dde9f7ba
VP
236 return data->freq_table[i].frequency;
237 }
238 return data->freq_table[0].frequency;
239}
240
dde9f7ba
VP
241static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
242{
243 switch (data->cpu_feature) {
64be7eed 244 case SYSTEM_INTEL_MSR_CAPABLE:
3dc9a633 245 case SYSTEM_AMD_MSR_CAPABLE:
dde9f7ba 246 return extract_msr(val, data);
64be7eed 247 case SYSTEM_IO_CAPABLE:
dde9f7ba 248 return extract_io(val, data);
64be7eed 249 default:
dde9f7ba
VP
250 return 0;
251 }
252}
253
dde9f7ba
VP
254struct msr_addr {
255 u32 reg;
256};
257
fe27cb35
VP
258struct io_addr {
259 u16 port;
260 u8 bit_width;
261};
262
263struct drv_cmd {
dde9f7ba 264 unsigned int type;
bfa318ad 265 const struct cpumask *mask;
3a58df35
DJ
266 union {
267 struct msr_addr msr;
268 struct io_addr io;
269 } addr;
fe27cb35
VP
270 u32 val;
271};
272
01599fca
AM
273/* Called via smp_call_function_single(), on the target CPU */
274static void do_drv_read(void *_cmd)
1da177e4 275{
72859081 276 struct drv_cmd *cmd = _cmd;
dde9f7ba
VP
277 u32 h;
278
279 switch (cmd->type) {
64be7eed 280 case SYSTEM_INTEL_MSR_CAPABLE:
3dc9a633 281 case SYSTEM_AMD_MSR_CAPABLE:
dde9f7ba
VP
282 rdmsr(cmd->addr.msr.reg, cmd->val, h);
283 break;
64be7eed 284 case SYSTEM_IO_CAPABLE:
4e581ff1
VP
285 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
286 &cmd->val,
287 (u32)cmd->addr.io.bit_width);
dde9f7ba 288 break;
64be7eed 289 default:
dde9f7ba
VP
290 break;
291 }
fe27cb35 292}
1da177e4 293
01599fca
AM
294/* Called via smp_call_function_many(), on the target CPUs */
295static void do_drv_write(void *_cmd)
fe27cb35 296{
72859081 297 struct drv_cmd *cmd = _cmd;
13424f65 298 u32 lo, hi;
dde9f7ba
VP
299
300 switch (cmd->type) {
64be7eed 301 case SYSTEM_INTEL_MSR_CAPABLE:
13424f65
VP
302 rdmsr(cmd->addr.msr.reg, lo, hi);
303 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
304 wrmsr(cmd->addr.msr.reg, lo, hi);
dde9f7ba 305 break;
3dc9a633
MG
306 case SYSTEM_AMD_MSR_CAPABLE:
307 wrmsr(cmd->addr.msr.reg, cmd->val, 0);
308 break;
64be7eed 309 case SYSTEM_IO_CAPABLE:
4e581ff1
VP
310 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
311 cmd->val,
312 (u32)cmd->addr.io.bit_width);
dde9f7ba 313 break;
64be7eed 314 default:
dde9f7ba
VP
315 break;
316 }
fe27cb35 317}
1da177e4 318
95dd7227 319static void drv_read(struct drv_cmd *cmd)
fe27cb35 320{
4a28395d 321 int err;
fe27cb35
VP
322 cmd->val = 0;
323
4a28395d
AM
324 err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
325 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
fe27cb35
VP
326}
327
328static void drv_write(struct drv_cmd *cmd)
329{
ea34f43a
LT
330 int this_cpu;
331
332 this_cpu = get_cpu();
333 if (cpumask_test_cpu(this_cpu, cmd->mask))
334 do_drv_write(cmd);
01599fca 335 smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
ea34f43a 336 put_cpu();
fe27cb35 337}
1da177e4 338
4d8bb537 339static u32 get_cur_val(const struct cpumask *mask)
fe27cb35 340{
64be7eed
VP
341 struct acpi_processor_performance *perf;
342 struct drv_cmd cmd;
1da177e4 343
4d8bb537 344 if (unlikely(cpumask_empty(mask)))
fe27cb35 345 return 0;
1da177e4 346
f1625066 347 switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
dde9f7ba
VP
348 case SYSTEM_INTEL_MSR_CAPABLE:
349 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
8673b83b 350 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
dde9f7ba 351 break;
3dc9a633
MG
352 case SYSTEM_AMD_MSR_CAPABLE:
353 cmd.type = SYSTEM_AMD_MSR_CAPABLE;
8673b83b 354 cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
3dc9a633 355 break;
dde9f7ba
VP
356 case SYSTEM_IO_CAPABLE:
357 cmd.type = SYSTEM_IO_CAPABLE;
f1625066 358 perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
dde9f7ba
VP
359 cmd.addr.io.port = perf->control_register.address;
360 cmd.addr.io.bit_width = perf->control_register.bit_width;
361 break;
362 default:
363 return 0;
364 }
365
bfa318ad 366 cmd.mask = mask;
fe27cb35 367 drv_read(&cmd);
1da177e4 368
2d06d8c4 369 pr_debug("get_cur_val = %u\n", cmd.val);
fe27cb35
VP
370
371 return cmd.val;
372}
1da177e4 373
fe27cb35
VP
374static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
375{
f1625066 376 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
64be7eed 377 unsigned int freq;
e56a727b 378 unsigned int cached_freq;
fe27cb35 379
2d06d8c4 380 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
fe27cb35
VP
381
382 if (unlikely(data == NULL ||
64be7eed 383 data->acpi_data == NULL || data->freq_table == NULL)) {
fe27cb35 384 return 0;
1da177e4
LT
385 }
386
e56a727b 387 cached_freq = data->freq_table[data->acpi_data->state].frequency;
e39ad415 388 freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
e56a727b
VP
389 if (freq != cached_freq) {
390 /*
391 * The dreaded BIOS frequency change behind our back.
392 * Force set the frequency on next target call.
393 */
394 data->resume = 1;
395 }
396
2d06d8c4 397 pr_debug("cur freq = %u\n", freq);
1da177e4 398
fe27cb35 399 return freq;
1da177e4
LT
400}
401
72859081 402static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
64be7eed 403 struct acpi_cpufreq_data *data)
fe27cb35 404{
64be7eed
VP
405 unsigned int cur_freq;
406 unsigned int i;
1da177e4 407
3a58df35 408 for (i = 0; i < 100; i++) {
fe27cb35
VP
409 cur_freq = extract_freq(get_cur_val(mask), data);
410 if (cur_freq == freq)
411 return 1;
412 udelay(10);
413 }
414 return 0;
415}
416
417static int acpi_cpufreq_target(struct cpufreq_policy *policy,
64be7eed 418 unsigned int target_freq, unsigned int relation)
1da177e4 419{
f1625066 420 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
64be7eed
VP
421 struct acpi_processor_performance *perf;
422 struct cpufreq_freqs freqs;
64be7eed 423 struct drv_cmd cmd;
8edc59d9
VP
424 unsigned int next_state = 0; /* Index into freq_table */
425 unsigned int next_perf_state = 0; /* Index into perf table */
64be7eed 426 int result = 0;
fe27cb35 427
2d06d8c4 428 pr_debug("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
fe27cb35
VP
429
430 if (unlikely(data == NULL ||
95dd7227 431 data->acpi_data == NULL || data->freq_table == NULL)) {
fe27cb35
VP
432 return -ENODEV;
433 }
1da177e4 434
fe27cb35 435 perf = data->acpi_data;
1da177e4 436 result = cpufreq_frequency_table_target(policy,
64be7eed
VP
437 data->freq_table,
438 target_freq,
439 relation, &next_state);
4d8bb537
MT
440 if (unlikely(result)) {
441 result = -ENODEV;
442 goto out;
443 }
1da177e4 444
50701588 445 next_perf_state = data->freq_table[next_state].driver_data;
7650b281 446 if (perf->state == next_perf_state) {
fe27cb35 447 if (unlikely(data->resume)) {
2d06d8c4 448 pr_debug("Called after resume, resetting to P%d\n",
64be7eed 449 next_perf_state);
fe27cb35
VP
450 data->resume = 0;
451 } else {
2d06d8c4 452 pr_debug("Already at target state (P%d)\n",
64be7eed 453 next_perf_state);
4d8bb537 454 goto out;
fe27cb35 455 }
09b4d1ee
VP
456 }
457
64be7eed
VP
458 switch (data->cpu_feature) {
459 case SYSTEM_INTEL_MSR_CAPABLE:
460 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
461 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
13424f65 462 cmd.val = (u32) perf->states[next_perf_state].control;
64be7eed 463 break;
3dc9a633
MG
464 case SYSTEM_AMD_MSR_CAPABLE:
465 cmd.type = SYSTEM_AMD_MSR_CAPABLE;
466 cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
467 cmd.val = (u32) perf->states[next_perf_state].control;
468 break;
64be7eed
VP
469 case SYSTEM_IO_CAPABLE:
470 cmd.type = SYSTEM_IO_CAPABLE;
471 cmd.addr.io.port = perf->control_register.address;
472 cmd.addr.io.bit_width = perf->control_register.bit_width;
473 cmd.val = (u32) perf->states[next_perf_state].control;
474 break;
475 default:
4d8bb537
MT
476 result = -ENODEV;
477 goto out;
64be7eed 478 }
09b4d1ee 479
4d8bb537 480 /* cpufreq holds the hotplug lock, so we are safe from here on */
fe27cb35 481 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
bfa318ad 482 cmd.mask = policy->cpus;
fe27cb35 483 else
bfa318ad 484 cmd.mask = cpumask_of(policy->cpu);
09b4d1ee 485
8edc59d9
VP
486 freqs.old = perf->states[perf->state].core_frequency * 1000;
487 freqs.new = data->freq_table[next_state].frequency;
b43a7ffb 488 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
1da177e4 489
fe27cb35 490 drv_write(&cmd);
09b4d1ee 491
fe27cb35 492 if (acpi_pstate_strict) {
4d8bb537 493 if (!check_freqs(cmd.mask, freqs.new, data)) {
2d06d8c4 494 pr_debug("acpi_cpufreq_target failed (%d)\n",
64be7eed 495 policy->cpu);
4d8bb537 496 result = -EAGAIN;
e15d8309 497 freqs.new = freqs.old;
09b4d1ee
VP
498 }
499 }
500
b43a7ffb 501 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
e15d8309
VK
502
503 if (!result)
504 perf->state = next_perf_state;
fe27cb35 505
4d8bb537 506out:
fe27cb35 507 return result;
1da177e4
LT
508}
509
64be7eed 510static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
1da177e4 511{
f1625066 512 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
1da177e4 513
2d06d8c4 514 pr_debug("acpi_cpufreq_verify\n");
1da177e4 515
fe27cb35 516 return cpufreq_frequency_table_verify(policy, data->freq_table);
1da177e4
LT
517}
518
1da177e4 519static unsigned long
64be7eed 520acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
1da177e4 521{
64be7eed 522 struct acpi_processor_performance *perf = data->acpi_data;
09b4d1ee 523
1da177e4
LT
524 if (cpu_khz) {
525 /* search the closest match to cpu_khz */
526 unsigned int i;
527 unsigned long freq;
09b4d1ee 528 unsigned long freqn = perf->states[0].core_frequency * 1000;
1da177e4 529
3a58df35 530 for (i = 0; i < (perf->state_count-1); i++) {
1da177e4 531 freq = freqn;
95dd7227 532 freqn = perf->states[i+1].core_frequency * 1000;
1da177e4 533 if ((2 * cpu_khz) > (freqn + freq)) {
09b4d1ee 534 perf->state = i;
64be7eed 535 return freq;
1da177e4
LT
536 }
537 }
95dd7227 538 perf->state = perf->state_count-1;
64be7eed 539 return freqn;
09b4d1ee 540 } else {
1da177e4 541 /* assume CPU is at P0... */
09b4d1ee
VP
542 perf->state = 0;
543 return perf->states[0].core_frequency * 1000;
544 }
1da177e4
LT
545}
546
2fdf66b4
RR
547static void free_acpi_perf_data(void)
548{
549 unsigned int i;
550
551 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
552 for_each_possible_cpu(i)
553 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
554 ->shared_cpu_map);
555 free_percpu(acpi_perf_data);
556}
557
615b7300
AP
558static int boost_notify(struct notifier_block *nb, unsigned long action,
559 void *hcpu)
560{
561 unsigned cpu = (long)hcpu;
562 const struct cpumask *cpumask;
563
564 cpumask = get_cpu_mask(cpu);
565
566 /*
567 * Clear the boost-disable bit on the CPU_DOWN path so that
568 * this cpu cannot block the remaining ones from boosting. On
569 * the CPU_UP path we simply keep the boost-disable flag in
570 * sync with the current global state.
571 */
572
573 switch (action) {
574 case CPU_UP_PREPARE:
575 case CPU_UP_PREPARE_FROZEN:
576 boost_set_msrs(boost_enabled, cpumask);
577 break;
578
579 case CPU_DOWN_PREPARE:
580 case CPU_DOWN_PREPARE_FROZEN:
581 boost_set_msrs(1, cpumask);
582 break;
583
584 default:
585 break;
586 }
587
588 return NOTIFY_OK;
589}
590
591
592static struct notifier_block boost_nb = {
593 .notifier_call = boost_notify,
594};
595
09b4d1ee
VP
596/*
597 * acpi_cpufreq_early_init - initialize ACPI P-States library
598 *
599 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
600 * in order to determine correct frequency and voltage pairings. We can
601 * do _PDC and _PSD and find out the processor dependency for the
602 * actual init that will happen later...
603 */
50109292 604static int __init acpi_cpufreq_early_init(void)
09b4d1ee 605{
2fdf66b4 606 unsigned int i;
2d06d8c4 607 pr_debug("acpi_cpufreq_early_init\n");
09b4d1ee 608
50109292
FY
609 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
610 if (!acpi_perf_data) {
2d06d8c4 611 pr_debug("Memory allocation error for acpi_perf_data.\n");
50109292 612 return -ENOMEM;
09b4d1ee 613 }
2fdf66b4 614 for_each_possible_cpu(i) {
eaa95840 615 if (!zalloc_cpumask_var_node(
80855f73
MT
616 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
617 GFP_KERNEL, cpu_to_node(i))) {
2fdf66b4
RR
618
619 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
620 free_acpi_perf_data();
621 return -ENOMEM;
622 }
623 }
09b4d1ee
VP
624
625 /* Do initialization in ACPI core */
fe27cb35
VP
626 acpi_processor_preregister_performance(acpi_perf_data);
627 return 0;
09b4d1ee
VP
628}
629
95625b8f 630#ifdef CONFIG_SMP
8adcc0c6
VP
631/*
632 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
633 * or do it in BIOS firmware and won't inform about it to OS. If not
634 * detected, this has a side effect of making CPU run at a different speed
635 * than OS intended it to run at. Detect it and handle it cleanly.
636 */
637static int bios_with_sw_any_bug;
638
1855256c 639static int sw_any_bug_found(const struct dmi_system_id *d)
8adcc0c6
VP
640{
641 bios_with_sw_any_bug = 1;
642 return 0;
643}
644
1855256c 645static const struct dmi_system_id sw_any_bug_dmi_table[] = {
8adcc0c6
VP
646 {
647 .callback = sw_any_bug_found,
648 .ident = "Supermicro Server X6DLP",
649 .matches = {
650 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
651 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
652 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
653 },
654 },
655 { }
656};
1a8e42fa
PB
657
658static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
659{
293afe44
JV
660 /* Intel Xeon Processor 7100 Series Specification Update
661 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
1a8e42fa
PB
662 * AL30: A Machine Check Exception (MCE) Occurring during an
663 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
293afe44 664 * Both Processor Cores to Lock Up. */
1a8e42fa
PB
665 if (c->x86_vendor == X86_VENDOR_INTEL) {
666 if ((c->x86 == 15) &&
667 (c->x86_model == 6) &&
293afe44
JV
668 (c->x86_mask == 8)) {
669 printk(KERN_INFO "acpi-cpufreq: Intel(R) "
670 "Xeon(R) 7100 Errata AL30, processors may "
671 "lock up on frequency changes: disabling "
672 "acpi-cpufreq.\n");
1a8e42fa 673 return -ENODEV;
293afe44 674 }
1a8e42fa
PB
675 }
676 return 0;
677}
95625b8f 678#endif
8adcc0c6 679
64be7eed 680static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
1da177e4 681{
64be7eed
VP
682 unsigned int i;
683 unsigned int valid_states = 0;
684 unsigned int cpu = policy->cpu;
685 struct acpi_cpufreq_data *data;
64be7eed 686 unsigned int result = 0;
92cb7612 687 struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
64be7eed 688 struct acpi_processor_performance *perf;
293afe44
JV
689#ifdef CONFIG_SMP
690 static int blacklisted;
691#endif
1da177e4 692
2d06d8c4 693 pr_debug("acpi_cpufreq_cpu_init\n");
1da177e4 694
1a8e42fa 695#ifdef CONFIG_SMP
293afe44
JV
696 if (blacklisted)
697 return blacklisted;
698 blacklisted = acpi_cpufreq_blacklist(c);
699 if (blacklisted)
700 return blacklisted;
1a8e42fa
PB
701#endif
702
fe27cb35 703 data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
1da177e4 704 if (!data)
64be7eed 705 return -ENOMEM;
1da177e4 706
b36128c8 707 data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
f1625066 708 per_cpu(acfreq_data, cpu) = data;
1da177e4 709
95dd7227 710 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
fe27cb35 711 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
1da177e4 712
fe27cb35 713 result = acpi_processor_register_performance(data->acpi_data, cpu);
1da177e4
LT
714 if (result)
715 goto err_free;
716
09b4d1ee 717 perf = data->acpi_data;
09b4d1ee 718 policy->shared_type = perf->shared_type;
95dd7227 719
46f18e3a 720 /*
95dd7227 721 * Will let policy->cpus know about dependency only when software
46f18e3a
VP
722 * coordination is required.
723 */
724 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
8adcc0c6 725 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
835481d9 726 cpumask_copy(policy->cpus, perf->shared_cpu_map);
8adcc0c6
VP
727 }
728
729#ifdef CONFIG_SMP
730 dmi_check_system(sw_any_bug_dmi_table);
2624f90c 731 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
8adcc0c6 732 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
835481d9 733 cpumask_copy(policy->cpus, cpu_core_mask(cpu));
8adcc0c6 734 }
acd31624
AP
735
736 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
737 cpumask_clear(policy->cpus);
738 cpumask_set_cpu(cpu, policy->cpus);
acd31624
AP
739 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
740 pr_info_once(PFX "overriding BIOS provided _PSD data\n");
741 }
8adcc0c6 742#endif
09b4d1ee 743
1da177e4 744 /* capability check */
09b4d1ee 745 if (perf->state_count <= 1) {
2d06d8c4 746 pr_debug("No P-States\n");
1da177e4
LT
747 result = -ENODEV;
748 goto err_unreg;
749 }
09b4d1ee 750
fe27cb35
VP
751 if (perf->control_register.space_id != perf->status_register.space_id) {
752 result = -ENODEV;
753 goto err_unreg;
754 }
755
756 switch (perf->control_register.space_id) {
64be7eed 757 case ACPI_ADR_SPACE_SYSTEM_IO:
c40a4518
MG
758 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
759 boot_cpu_data.x86 == 0xf) {
760 pr_debug("AMD K8 systems must use native drivers.\n");
761 result = -ENODEV;
762 goto err_unreg;
763 }
2d06d8c4 764 pr_debug("SYSTEM IO addr space\n");
dde9f7ba
VP
765 data->cpu_feature = SYSTEM_IO_CAPABLE;
766 break;
64be7eed 767 case ACPI_ADR_SPACE_FIXED_HARDWARE:
2d06d8c4 768 pr_debug("HARDWARE addr space\n");
3dc9a633
MG
769 if (check_est_cpu(cpu)) {
770 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
771 break;
dde9f7ba 772 }
3dc9a633
MG
773 if (check_amd_hwpstate_cpu(cpu)) {
774 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
775 break;
776 }
777 result = -ENODEV;
778 goto err_unreg;
64be7eed 779 default:
2d06d8c4 780 pr_debug("Unknown addr space %d\n",
64be7eed 781 (u32) (perf->control_register.space_id));
1da177e4
LT
782 result = -ENODEV;
783 goto err_unreg;
784 }
785
95dd7227
DJ
786 data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
787 (perf->state_count+1), GFP_KERNEL);
1da177e4
LT
788 if (!data->freq_table) {
789 result = -ENOMEM;
790 goto err_unreg;
791 }
792
793 /* detect transition latency */
794 policy->cpuinfo.transition_latency = 0;
3a58df35 795 for (i = 0; i < perf->state_count; i++) {
64be7eed
VP
796 if ((perf->states[i].transition_latency * 1000) >
797 policy->cpuinfo.transition_latency)
798 policy->cpuinfo.transition_latency =
799 perf->states[i].transition_latency * 1000;
1da177e4 800 }
1da177e4 801
a59d1637
PV
802 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
803 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
804 policy->cpuinfo.transition_latency > 20 * 1000) {
a59d1637 805 policy->cpuinfo.transition_latency = 20 * 1000;
61c8c67e
JP
806 printk_once(KERN_INFO
807 "P-state transition latency capped at 20 uS\n");
a59d1637
PV
808 }
809
1da177e4 810 /* table init */
3a58df35
DJ
811 for (i = 0; i < perf->state_count; i++) {
812 if (i > 0 && perf->states[i].core_frequency >=
3cdf552b 813 data->freq_table[valid_states-1].frequency / 1000)
fe27cb35
VP
814 continue;
815
50701588 816 data->freq_table[valid_states].driver_data = i;
fe27cb35 817 data->freq_table[valid_states].frequency =
64be7eed 818 perf->states[i].core_frequency * 1000;
fe27cb35 819 valid_states++;
1da177e4 820 }
3d4a7ef3 821 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
8edc59d9 822 perf->state = 0;
1da177e4
LT
823
824 result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
95dd7227 825 if (result)
1da177e4 826 goto err_freqfree;
1da177e4 827
d876dfbb
TR
828 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
829 printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
830
a507ac4b 831 switch (perf->control_register.space_id) {
64be7eed 832 case ACPI_ADR_SPACE_SYSTEM_IO:
dde9f7ba
VP
833 /* Current speed is unknown and not detectable by IO port */
834 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
835 break;
64be7eed 836 case ACPI_ADR_SPACE_FIXED_HARDWARE:
7650b281 837 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
a507ac4b 838 policy->cur = get_cur_freq_on_cpu(cpu);
dde9f7ba 839 break;
64be7eed 840 default:
dde9f7ba
VP
841 break;
842 }
843
1da177e4
LT
844 /* notify BIOS that we exist */
845 acpi_processor_notify_smm(THIS_MODULE);
846
dfde5d62 847 /* Check for APERF/MPERF support in hardware */
92e03c41 848 if (boot_cpu_has(X86_FEATURE_APERFMPERF))
a2fed573 849 acpi_cpufreq_driver.getavg = cpufreq_get_measured_perf;
dfde5d62 850
2d06d8c4 851 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
09b4d1ee 852 for (i = 0; i < perf->state_count; i++)
2d06d8c4 853 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
64be7eed 854 (i == perf->state ? '*' : ' '), i,
09b4d1ee
VP
855 (u32) perf->states[i].core_frequency,
856 (u32) perf->states[i].power,
857 (u32) perf->states[i].transition_latency);
1da177e4
LT
858
859 cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
64be7eed 860
4b31e774
DB
861 /*
862 * the first call to ->target() should result in us actually
863 * writing something to the appropriate registers.
864 */
865 data->resume = 1;
64be7eed 866
fe27cb35 867 return result;
1da177e4 868
95dd7227 869err_freqfree:
1da177e4 870 kfree(data->freq_table);
95dd7227 871err_unreg:
09b4d1ee 872 acpi_processor_unregister_performance(perf, cpu);
95dd7227 873err_free:
1da177e4 874 kfree(data);
f1625066 875 per_cpu(acfreq_data, cpu) = NULL;
1da177e4 876
64be7eed 877 return result;
1da177e4
LT
878}
879
64be7eed 880static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
1da177e4 881{
f1625066 882 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
1da177e4 883
2d06d8c4 884 pr_debug("acpi_cpufreq_cpu_exit\n");
1da177e4
LT
885
886 if (data) {
887 cpufreq_frequency_table_put_attr(policy->cpu);
f1625066 888 per_cpu(acfreq_data, policy->cpu) = NULL;
64be7eed
VP
889 acpi_processor_unregister_performance(data->acpi_data,
890 policy->cpu);
dab5fff1 891 kfree(data->freq_table);
1da177e4
LT
892 kfree(data);
893 }
894
64be7eed 895 return 0;
1da177e4
LT
896}
897
64be7eed 898static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
1da177e4 899{
f1625066 900 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
1da177e4 901
2d06d8c4 902 pr_debug("acpi_cpufreq_resume\n");
1da177e4
LT
903
904 data->resume = 1;
905
64be7eed 906 return 0;
1da177e4
LT
907}
908
64be7eed 909static struct freq_attr *acpi_cpufreq_attr[] = {
1da177e4 910 &cpufreq_freq_attr_scaling_available_freqs,
11269ff5 911 NULL, /* this is a placeholder for cpb, do not remove */
1da177e4
LT
912 NULL,
913};
914
915static struct cpufreq_driver acpi_cpufreq_driver = {
e2f74f35
TR
916 .verify = acpi_cpufreq_verify,
917 .target = acpi_cpufreq_target,
918 .bios_limit = acpi_processor_get_bios_limit,
919 .init = acpi_cpufreq_cpu_init,
920 .exit = acpi_cpufreq_cpu_exit,
921 .resume = acpi_cpufreq_resume,
922 .name = "acpi-cpufreq",
923 .owner = THIS_MODULE,
924 .attr = acpi_cpufreq_attr,
1da177e4
LT
925};
926
615b7300
AP
927static void __init acpi_cpufreq_boost_init(void)
928{
929 if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
930 msrs = msrs_alloc();
931
932 if (!msrs)
933 return;
934
935 boost_supported = true;
936 boost_enabled = boost_state(0);
937
938 get_online_cpus();
939
940 /* Force all MSRs to the same value */
941 boost_set_msrs(boost_enabled, cpu_online_mask);
942
943 register_cpu_notifier(&boost_nb);
944
945 put_online_cpus();
946 } else
947 global_boost.attr.mode = 0444;
948
949 /* We create the boost file in any case, though for systems without
950 * hardware support it will be read-only and hardwired to return 0.
951 */
2361be23 952 if (cpufreq_sysfs_create_file(&(global_boost.attr)))
615b7300
AP
953 pr_warn(PFX "could not register global boost sysfs file\n");
954 else
955 pr_debug("registered global boost sysfs file\n");
956}
957
958static void __exit acpi_cpufreq_boost_exit(void)
959{
2361be23 960 cpufreq_sysfs_remove_file(&(global_boost.attr));
615b7300
AP
961
962 if (msrs) {
963 unregister_cpu_notifier(&boost_nb);
964
965 msrs_free(msrs);
966 msrs = NULL;
967 }
968}
969
64be7eed 970static int __init acpi_cpufreq_init(void)
1da177e4 971{
50109292
FY
972 int ret;
973
ee297533
YL
974 if (acpi_disabled)
975 return 0;
976
2d06d8c4 977 pr_debug("acpi_cpufreq_init\n");
1da177e4 978
50109292
FY
979 ret = acpi_cpufreq_early_init();
980 if (ret)
981 return ret;
09b4d1ee 982
11269ff5
AP
983#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
984 /* this is a sysfs file with a strange name and an even stranger
985 * semantic - per CPU instantiation, but system global effect.
986 * Lets enable it only on AMD CPUs for compatibility reasons and
987 * only if configured. This is considered legacy code, which
988 * will probably be removed at some point in the future.
989 */
990 if (check_amd_hwpstate_cpu(0)) {
991 struct freq_attr **iter;
992
993 pr_debug("adding sysfs entry for cpb\n");
994
995 for (iter = acpi_cpufreq_attr; *iter != NULL; iter++)
996 ;
997
998 /* make sure there is a terminator behind it */
999 if (iter[1] == NULL)
1000 *iter = &cpb;
1001 }
1002#endif
1003
847aef6f
AM
1004 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
1005 if (ret)
2fdf66b4 1006 free_acpi_perf_data();
615b7300
AP
1007 else
1008 acpi_cpufreq_boost_init();
847aef6f
AM
1009
1010 return ret;
1da177e4
LT
1011}
1012
64be7eed 1013static void __exit acpi_cpufreq_exit(void)
1da177e4 1014{
2d06d8c4 1015 pr_debug("acpi_cpufreq_exit\n");
1da177e4 1016
615b7300
AP
1017 acpi_cpufreq_boost_exit();
1018
1da177e4
LT
1019 cpufreq_unregister_driver(&acpi_cpufreq_driver);
1020
50f4ddd4 1021 free_acpi_perf_data();
1da177e4
LT
1022}
1023
d395bf12 1024module_param(acpi_pstate_strict, uint, 0644);
64be7eed 1025MODULE_PARM_DESC(acpi_pstate_strict,
95dd7227
DJ
1026 "value 0 or non-zero. non-zero -> strict ACPI checks are "
1027 "performed during frequency changes.");
1da177e4
LT
1028
1029late_initcall(acpi_cpufreq_init);
1030module_exit(acpi_cpufreq_exit);
1031
efa17194
MG
1032static const struct x86_cpu_id acpi_cpufreq_ids[] = {
1033 X86_FEATURE_MATCH(X86_FEATURE_ACPI),
1034 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
1035 {}
1036};
1037MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1038
1da177e4 1039MODULE_ALIAS("acpi");