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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 | 2 | /* |
3a58df35 | 3 | * acpi-cpufreq.c - ACPI Processor P-States Driver |
1da177e4 LT |
4 | * |
5 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
6 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
7 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 8 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
9 | */ |
10 | ||
1c5864e2 JP |
11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
12 | ||
1da177e4 LT |
13 | #include <linux/kernel.h> |
14 | #include <linux/module.h> | |
15 | #include <linux/init.h> | |
fe27cb35 VP |
16 | #include <linux/smp.h> |
17 | #include <linux/sched.h> | |
1da177e4 | 18 | #include <linux/cpufreq.h> |
d395bf12 | 19 | #include <linux/compiler.h> |
8adcc0c6 | 20 | #include <linux/dmi.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
1da177e4 LT |
22 | |
23 | #include <linux/acpi.h> | |
3a58df35 DJ |
24 | #include <linux/io.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/uaccess.h> | |
27 | ||
1da177e4 LT |
28 | #include <acpi/processor.h> |
29 | ||
dde9f7ba | 30 | #include <asm/msr.h> |
fe27cb35 VP |
31 | #include <asm/processor.h> |
32 | #include <asm/cpufeature.h> | |
fe27cb35 | 33 | |
1da177e4 LT |
34 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); |
35 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
36 | MODULE_LICENSE("GPL"); | |
37 | ||
dde9f7ba VP |
38 | enum { |
39 | UNDEFINED_CAPABLE = 0, | |
40 | SYSTEM_INTEL_MSR_CAPABLE, | |
3dc9a633 | 41 | SYSTEM_AMD_MSR_CAPABLE, |
dde9f7ba VP |
42 | SYSTEM_IO_CAPABLE, |
43 | }; | |
44 | ||
45 | #define INTEL_MSR_RANGE (0xffff) | |
3dc9a633 | 46 | #define AMD_MSR_RANGE (0x7) |
cc9690cf | 47 | #define HYGON_MSR_RANGE (0x7) |
dde9f7ba | 48 | |
615b7300 AP |
49 | #define MSR_K7_HWCR_CPB_DIS (1ULL << 25) |
50 | ||
fe27cb35 | 51 | struct acpi_cpufreq_data { |
64be7eed VP |
52 | unsigned int resume; |
53 | unsigned int cpu_feature; | |
8cfcfd39 | 54 | unsigned int acpi_perf_cpu; |
f4fd3797 | 55 | cpumask_var_t freqdomain_cpus; |
ed757a2c RW |
56 | void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val); |
57 | u32 (*cpu_freq_read)(struct acpi_pct_register *reg); | |
1da177e4 LT |
58 | }; |
59 | ||
50109292 | 60 | /* acpi_perf_data is a pointer to percpu data. */ |
3f6c4df7 | 61 | static struct acpi_processor_performance __percpu *acpi_perf_data; |
1da177e4 | 62 | |
3427616b RW |
63 | static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data) |
64 | { | |
65 | return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu); | |
66 | } | |
67 | ||
1da177e4 LT |
68 | static struct cpufreq_driver acpi_cpufreq_driver; |
69 | ||
d395bf12 | 70 | static unsigned int acpi_pstate_strict; |
615b7300 AP |
71 | |
72 | static bool boost_state(unsigned int cpu) | |
73 | { | |
74 | u32 lo, hi; | |
75 | u64 msr; | |
76 | ||
77 | switch (boot_cpu_data.x86_vendor) { | |
78 | case X86_VENDOR_INTEL: | |
79 | rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi); | |
80 | msr = lo | ((u64)hi << 32); | |
81 | return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); | |
cc9690cf | 82 | case X86_VENDOR_HYGON: |
615b7300 AP |
83 | case X86_VENDOR_AMD: |
84 | rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); | |
85 | msr = lo | ((u64)hi << 32); | |
86 | return !(msr & MSR_K7_HWCR_CPB_DIS); | |
87 | } | |
88 | return false; | |
89 | } | |
90 | ||
a3605c46 | 91 | static int boost_set_msr(bool enable) |
615b7300 | 92 | { |
615b7300 | 93 | u32 msr_addr; |
a3605c46 | 94 | u64 msr_mask, val; |
615b7300 AP |
95 | |
96 | switch (boot_cpu_data.x86_vendor) { | |
97 | case X86_VENDOR_INTEL: | |
98 | msr_addr = MSR_IA32_MISC_ENABLE; | |
99 | msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE; | |
100 | break; | |
cc9690cf | 101 | case X86_VENDOR_HYGON: |
615b7300 AP |
102 | case X86_VENDOR_AMD: |
103 | msr_addr = MSR_K7_HWCR; | |
104 | msr_mask = MSR_K7_HWCR_CPB_DIS; | |
105 | break; | |
106 | default: | |
a3605c46 | 107 | return -EINVAL; |
615b7300 AP |
108 | } |
109 | ||
a3605c46 | 110 | rdmsrl(msr_addr, val); |
615b7300 | 111 | |
a3605c46 SAS |
112 | if (enable) |
113 | val &= ~msr_mask; | |
114 | else | |
115 | val |= msr_mask; | |
615b7300 | 116 | |
a3605c46 SAS |
117 | wrmsrl(msr_addr, val); |
118 | return 0; | |
119 | } | |
120 | ||
121 | static void boost_set_msr_each(void *p_en) | |
122 | { | |
123 | bool enable = (bool) p_en; | |
124 | ||
125 | boost_set_msr(enable); | |
615b7300 AP |
126 | } |
127 | ||
17135782 | 128 | static int set_boost(int val) |
615b7300 | 129 | { |
615b7300 | 130 | get_online_cpus(); |
a3605c46 | 131 | on_each_cpu(boost_set_msr_each, (void *)(long)val, 1); |
615b7300 | 132 | put_online_cpus(); |
615b7300 AP |
133 | pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis"); |
134 | ||
cfc9c8ed | 135 | return 0; |
615b7300 AP |
136 | } |
137 | ||
f4fd3797 LT |
138 | static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf) |
139 | { | |
eb0b3e78 | 140 | struct acpi_cpufreq_data *data = policy->driver_data; |
f4fd3797 | 141 | |
e2530367 SP |
142 | if (unlikely(!data)) |
143 | return -ENODEV; | |
144 | ||
f4fd3797 LT |
145 | return cpufreq_show_cpus(data->freqdomain_cpus, buf); |
146 | } | |
147 | ||
148 | cpufreq_freq_attr_ro(freqdomain_cpus); | |
149 | ||
11269ff5 | 150 | #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB |
17135782 RW |
151 | static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, |
152 | size_t count) | |
cfc9c8ed LM |
153 | { |
154 | int ret; | |
17135782 | 155 | unsigned int val = 0; |
cfc9c8ed | 156 | |
7a6c79f2 | 157 | if (!acpi_cpufreq_driver.set_boost) |
cfc9c8ed LM |
158 | return -EINVAL; |
159 | ||
17135782 RW |
160 | ret = kstrtouint(buf, 10, &val); |
161 | if (ret || val > 1) | |
cfc9c8ed LM |
162 | return -EINVAL; |
163 | ||
17135782 | 164 | set_boost(val); |
cfc9c8ed LM |
165 | |
166 | return count; | |
167 | } | |
168 | ||
11269ff5 AP |
169 | static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) |
170 | { | |
cfc9c8ed | 171 | return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled); |
11269ff5 AP |
172 | } |
173 | ||
59027d35 | 174 | cpufreq_freq_attr_rw(cpb); |
11269ff5 AP |
175 | #endif |
176 | ||
dde9f7ba VP |
177 | static int check_est_cpu(unsigned int cpuid) |
178 | { | |
92cb7612 | 179 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); |
dde9f7ba | 180 | |
0de51088 | 181 | return cpu_has(cpu, X86_FEATURE_EST); |
dde9f7ba VP |
182 | } |
183 | ||
3dc9a633 MG |
184 | static int check_amd_hwpstate_cpu(unsigned int cpuid) |
185 | { | |
186 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); | |
187 | ||
188 | return cpu_has(cpu, X86_FEATURE_HW_PSTATE); | |
189 | } | |
190 | ||
8cee1eed | 191 | static unsigned extract_io(struct cpufreq_policy *policy, u32 value) |
fe27cb35 | 192 | { |
8cee1eed | 193 | struct acpi_cpufreq_data *data = policy->driver_data; |
64be7eed VP |
194 | struct acpi_processor_performance *perf; |
195 | int i; | |
fe27cb35 | 196 | |
3427616b | 197 | perf = to_perf_data(data); |
fe27cb35 | 198 | |
3a58df35 | 199 | for (i = 0; i < perf->state_count; i++) { |
fe27cb35 | 200 | if (value == perf->states[i].status) |
8cee1eed | 201 | return policy->freq_table[i].frequency; |
fe27cb35 VP |
202 | } |
203 | return 0; | |
204 | } | |
205 | ||
8cee1eed | 206 | static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr) |
dde9f7ba | 207 | { |
8cee1eed | 208 | struct acpi_cpufreq_data *data = policy->driver_data; |
041526f9 | 209 | struct cpufreq_frequency_table *pos; |
a6f6e6e6 | 210 | struct acpi_processor_performance *perf; |
dde9f7ba | 211 | |
3dc9a633 MG |
212 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) |
213 | msr &= AMD_MSR_RANGE; | |
cc9690cf PW |
214 | else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) |
215 | msr &= HYGON_MSR_RANGE; | |
3dc9a633 MG |
216 | else |
217 | msr &= INTEL_MSR_RANGE; | |
218 | ||
3427616b | 219 | perf = to_perf_data(data); |
a6f6e6e6 | 220 | |
8cee1eed | 221 | cpufreq_for_each_entry(pos, policy->freq_table) |
041526f9 SK |
222 | if (msr == perf->states[pos->driver_data].status) |
223 | return pos->frequency; | |
8cee1eed | 224 | return policy->freq_table[0].frequency; |
dde9f7ba VP |
225 | } |
226 | ||
8cee1eed | 227 | static unsigned extract_freq(struct cpufreq_policy *policy, u32 val) |
dde9f7ba | 228 | { |
8cee1eed VK |
229 | struct acpi_cpufreq_data *data = policy->driver_data; |
230 | ||
dde9f7ba | 231 | switch (data->cpu_feature) { |
64be7eed | 232 | case SYSTEM_INTEL_MSR_CAPABLE: |
3dc9a633 | 233 | case SYSTEM_AMD_MSR_CAPABLE: |
8cee1eed | 234 | return extract_msr(policy, val); |
64be7eed | 235 | case SYSTEM_IO_CAPABLE: |
8cee1eed | 236 | return extract_io(policy, val); |
64be7eed | 237 | default: |
dde9f7ba VP |
238 | return 0; |
239 | } | |
240 | } | |
241 | ||
ac13b996 | 242 | static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used) |
ed757a2c RW |
243 | { |
244 | u32 val, dummy; | |
dde9f7ba | 245 | |
ed757a2c RW |
246 | rdmsr(MSR_IA32_PERF_CTL, val, dummy); |
247 | return val; | |
248 | } | |
249 | ||
ac13b996 | 250 | static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val) |
ed757a2c RW |
251 | { |
252 | u32 lo, hi; | |
253 | ||
254 | rdmsr(MSR_IA32_PERF_CTL, lo, hi); | |
255 | lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE); | |
256 | wrmsr(MSR_IA32_PERF_CTL, lo, hi); | |
257 | } | |
258 | ||
ac13b996 | 259 | static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used) |
ed757a2c RW |
260 | { |
261 | u32 val, dummy; | |
262 | ||
263 | rdmsr(MSR_AMD_PERF_CTL, val, dummy); | |
264 | return val; | |
265 | } | |
266 | ||
ac13b996 | 267 | static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val) |
ed757a2c RW |
268 | { |
269 | wrmsr(MSR_AMD_PERF_CTL, val, 0); | |
270 | } | |
271 | ||
ac13b996 | 272 | static u32 cpu_freq_read_io(struct acpi_pct_register *reg) |
ed757a2c RW |
273 | { |
274 | u32 val; | |
275 | ||
276 | acpi_os_read_port(reg->address, &val, reg->bit_width); | |
277 | return val; | |
278 | } | |
279 | ||
ac13b996 | 280 | static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val) |
ed757a2c RW |
281 | { |
282 | acpi_os_write_port(reg->address, val, reg->bit_width); | |
283 | } | |
fe27cb35 VP |
284 | |
285 | struct drv_cmd { | |
ed757a2c | 286 | struct acpi_pct_register *reg; |
fe27cb35 | 287 | u32 val; |
ed757a2c RW |
288 | union { |
289 | void (*write)(struct acpi_pct_register *reg, u32 val); | |
290 | u32 (*read)(struct acpi_pct_register *reg); | |
291 | } func; | |
fe27cb35 VP |
292 | }; |
293 | ||
01599fca AM |
294 | /* Called via smp_call_function_single(), on the target CPU */ |
295 | static void do_drv_read(void *_cmd) | |
1da177e4 | 296 | { |
72859081 | 297 | struct drv_cmd *cmd = _cmd; |
dde9f7ba | 298 | |
ed757a2c | 299 | cmd->val = cmd->func.read(cmd->reg); |
fe27cb35 | 300 | } |
1da177e4 | 301 | |
ed757a2c | 302 | static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask) |
fe27cb35 | 303 | { |
ed757a2c RW |
304 | struct acpi_processor_performance *perf = to_perf_data(data); |
305 | struct drv_cmd cmd = { | |
306 | .reg = &perf->control_register, | |
307 | .func.read = data->cpu_freq_read, | |
308 | }; | |
309 | int err; | |
dde9f7ba | 310 | |
ed757a2c RW |
311 | err = smp_call_function_any(mask, do_drv_read, &cmd, 1); |
312 | WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ | |
313 | return cmd.val; | |
fe27cb35 | 314 | } |
1da177e4 | 315 | |
ed757a2c RW |
316 | /* Called via smp_call_function_many(), on the target CPUs */ |
317 | static void do_drv_write(void *_cmd) | |
fe27cb35 | 318 | { |
ed757a2c | 319 | struct drv_cmd *cmd = _cmd; |
fe27cb35 | 320 | |
ed757a2c | 321 | cmd->func.write(cmd->reg, cmd->val); |
fe27cb35 VP |
322 | } |
323 | ||
ed757a2c RW |
324 | static void drv_write(struct acpi_cpufreq_data *data, |
325 | const struct cpumask *mask, u32 val) | |
fe27cb35 | 326 | { |
ed757a2c RW |
327 | struct acpi_processor_performance *perf = to_perf_data(data); |
328 | struct drv_cmd cmd = { | |
329 | .reg = &perf->control_register, | |
330 | .val = val, | |
331 | .func.write = data->cpu_freq_write, | |
332 | }; | |
ea34f43a LT |
333 | int this_cpu; |
334 | ||
335 | this_cpu = get_cpu(); | |
ed757a2c RW |
336 | if (cpumask_test_cpu(this_cpu, mask)) |
337 | do_drv_write(&cmd); | |
338 | ||
339 | smp_call_function_many(mask, do_drv_write, &cmd, 1); | |
ea34f43a | 340 | put_cpu(); |
fe27cb35 | 341 | } |
1da177e4 | 342 | |
ed757a2c | 343 | static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data) |
fe27cb35 | 344 | { |
ed757a2c | 345 | u32 val; |
1da177e4 | 346 | |
4d8bb537 | 347 | if (unlikely(cpumask_empty(mask))) |
fe27cb35 | 348 | return 0; |
1da177e4 | 349 | |
ed757a2c | 350 | val = drv_read(data, mask); |
1da177e4 | 351 | |
eae2ef0e | 352 | pr_debug("%s = %u\n", __func__, val); |
fe27cb35 | 353 | |
ed757a2c | 354 | return val; |
fe27cb35 | 355 | } |
1da177e4 | 356 | |
fe27cb35 VP |
357 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
358 | { | |
eb0b3e78 PX |
359 | struct acpi_cpufreq_data *data; |
360 | struct cpufreq_policy *policy; | |
64be7eed | 361 | unsigned int freq; |
e56a727b | 362 | unsigned int cached_freq; |
fe27cb35 | 363 | |
eae2ef0e | 364 | pr_debug("%s (%d)\n", __func__, cpu); |
fe27cb35 | 365 | |
1f0bd44e | 366 | policy = cpufreq_cpu_get_raw(cpu); |
eb0b3e78 PX |
367 | if (unlikely(!policy)) |
368 | return 0; | |
369 | ||
370 | data = policy->driver_data; | |
8cee1eed | 371 | if (unlikely(!data || !policy->freq_table)) |
fe27cb35 | 372 | return 0; |
1da177e4 | 373 | |
8cee1eed VK |
374 | cached_freq = policy->freq_table[to_perf_data(data)->state].frequency; |
375 | freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data)); | |
e56a727b VP |
376 | if (freq != cached_freq) { |
377 | /* | |
378 | * The dreaded BIOS frequency change behind our back. | |
379 | * Force set the frequency on next target call. | |
380 | */ | |
381 | data->resume = 1; | |
382 | } | |
383 | ||
2d06d8c4 | 384 | pr_debug("cur freq = %u\n", freq); |
1da177e4 | 385 | |
fe27cb35 | 386 | return freq; |
1da177e4 LT |
387 | } |
388 | ||
8cee1eed VK |
389 | static unsigned int check_freqs(struct cpufreq_policy *policy, |
390 | const struct cpumask *mask, unsigned int freq) | |
fe27cb35 | 391 | { |
8cee1eed | 392 | struct acpi_cpufreq_data *data = policy->driver_data; |
64be7eed VP |
393 | unsigned int cur_freq; |
394 | unsigned int i; | |
1da177e4 | 395 | |
3a58df35 | 396 | for (i = 0; i < 100; i++) { |
8cee1eed | 397 | cur_freq = extract_freq(policy, get_cur_val(mask, data)); |
fe27cb35 VP |
398 | if (cur_freq == freq) |
399 | return 1; | |
400 | udelay(10); | |
401 | } | |
402 | return 0; | |
403 | } | |
404 | ||
405 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
9c0ebcf7 | 406 | unsigned int index) |
1da177e4 | 407 | { |
eb0b3e78 | 408 | struct acpi_cpufreq_data *data = policy->driver_data; |
64be7eed | 409 | struct acpi_processor_performance *perf; |
ed757a2c | 410 | const struct cpumask *mask; |
8edc59d9 | 411 | unsigned int next_perf_state = 0; /* Index into perf table */ |
64be7eed | 412 | int result = 0; |
fe27cb35 | 413 | |
8cee1eed | 414 | if (unlikely(!data)) { |
fe27cb35 VP |
415 | return -ENODEV; |
416 | } | |
1da177e4 | 417 | |
3427616b | 418 | perf = to_perf_data(data); |
8cee1eed | 419 | next_perf_state = policy->freq_table[index].driver_data; |
7650b281 | 420 | if (perf->state == next_perf_state) { |
fe27cb35 | 421 | if (unlikely(data->resume)) { |
2d06d8c4 | 422 | pr_debug("Called after resume, resetting to P%d\n", |
64be7eed | 423 | next_perf_state); |
fe27cb35 VP |
424 | data->resume = 0; |
425 | } else { | |
2d06d8c4 | 426 | pr_debug("Already at target state (P%d)\n", |
64be7eed | 427 | next_perf_state); |
9a909a14 | 428 | return 0; |
fe27cb35 | 429 | } |
09b4d1ee VP |
430 | } |
431 | ||
ed757a2c RW |
432 | /* |
433 | * The core won't allow CPUs to go away until the governor has been | |
434 | * stopped, so we can rely on the stability of policy->cpus. | |
435 | */ | |
436 | mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ? | |
437 | cpumask_of(policy->cpu) : policy->cpus; | |
09b4d1ee | 438 | |
ed757a2c | 439 | drv_write(data, mask, perf->states[next_perf_state].control); |
09b4d1ee | 440 | |
fe27cb35 | 441 | if (acpi_pstate_strict) { |
8cee1eed VK |
442 | if (!check_freqs(policy, mask, |
443 | policy->freq_table[index].frequency)) { | |
eae2ef0e | 444 | pr_debug("%s (%d)\n", __func__, policy->cpu); |
4d8bb537 | 445 | result = -EAGAIN; |
09b4d1ee VP |
446 | } |
447 | } | |
448 | ||
e15d8309 VK |
449 | if (!result) |
450 | perf->state = next_perf_state; | |
fe27cb35 VP |
451 | |
452 | return result; | |
1da177e4 LT |
453 | } |
454 | ||
08e9cc40 CIK |
455 | static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy, |
456 | unsigned int target_freq) | |
b7898fda RW |
457 | { |
458 | struct acpi_cpufreq_data *data = policy->driver_data; | |
459 | struct acpi_processor_performance *perf; | |
460 | struct cpufreq_frequency_table *entry; | |
82577360 | 461 | unsigned int next_perf_state, next_freq, index; |
b7898fda RW |
462 | |
463 | /* | |
464 | * Find the closest frequency above target_freq. | |
b7898fda | 465 | */ |
5b6667c7 SM |
466 | if (policy->cached_target_freq == target_freq) |
467 | index = policy->cached_resolved_idx; | |
468 | else | |
469 | index = cpufreq_table_find_index_dl(policy, target_freq); | |
82577360 VK |
470 | |
471 | entry = &policy->freq_table[index]; | |
b7898fda RW |
472 | next_freq = entry->frequency; |
473 | next_perf_state = entry->driver_data; | |
474 | ||
475 | perf = to_perf_data(data); | |
476 | if (perf->state == next_perf_state) { | |
477 | if (unlikely(data->resume)) | |
478 | data->resume = 0; | |
479 | else | |
480 | return next_freq; | |
481 | } | |
482 | ||
483 | data->cpu_freq_write(&perf->control_register, | |
484 | perf->states[next_perf_state].control); | |
485 | perf->state = next_perf_state; | |
486 | return next_freq; | |
487 | } | |
488 | ||
1da177e4 | 489 | static unsigned long |
64be7eed | 490 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
1da177e4 | 491 | { |
3427616b | 492 | struct acpi_processor_performance *perf; |
09b4d1ee | 493 | |
3427616b | 494 | perf = to_perf_data(data); |
1da177e4 LT |
495 | if (cpu_khz) { |
496 | /* search the closest match to cpu_khz */ | |
497 | unsigned int i; | |
498 | unsigned long freq; | |
09b4d1ee | 499 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 500 | |
3a58df35 | 501 | for (i = 0; i < (perf->state_count-1); i++) { |
1da177e4 | 502 | freq = freqn; |
95dd7227 | 503 | freqn = perf->states[i+1].core_frequency * 1000; |
1da177e4 | 504 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 505 | perf->state = i; |
64be7eed | 506 | return freq; |
1da177e4 LT |
507 | } |
508 | } | |
95dd7227 | 509 | perf->state = perf->state_count-1; |
64be7eed | 510 | return freqn; |
09b4d1ee | 511 | } else { |
1da177e4 | 512 | /* assume CPU is at P0... */ |
09b4d1ee VP |
513 | perf->state = 0; |
514 | return perf->states[0].core_frequency * 1000; | |
515 | } | |
1da177e4 LT |
516 | } |
517 | ||
2fdf66b4 RR |
518 | static void free_acpi_perf_data(void) |
519 | { | |
520 | unsigned int i; | |
521 | ||
522 | /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ | |
523 | for_each_possible_cpu(i) | |
524 | free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) | |
525 | ->shared_cpu_map); | |
526 | free_percpu(acpi_perf_data); | |
527 | } | |
528 | ||
4d66ddf2 | 529 | static int cpufreq_boost_online(unsigned int cpu) |
615b7300 | 530 | { |
615b7300 | 531 | /* |
4d66ddf2 SAS |
532 | * On the CPU_UP path we simply keep the boost-disable flag |
533 | * in sync with the current global state. | |
615b7300 | 534 | */ |
a3605c46 | 535 | return boost_set_msr(acpi_cpufreq_driver.boost_enabled); |
4d66ddf2 | 536 | } |
615b7300 | 537 | |
4d66ddf2 SAS |
538 | static int cpufreq_boost_down_prep(unsigned int cpu) |
539 | { | |
4d66ddf2 SAS |
540 | /* |
541 | * Clear the boost-disable bit on the CPU_DOWN path so that | |
542 | * this cpu cannot block the remaining ones from boosting. | |
543 | */ | |
a3605c46 | 544 | return boost_set_msr(1); |
615b7300 AP |
545 | } |
546 | ||
09b4d1ee VP |
547 | /* |
548 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
549 | * | |
550 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
551 | * in order to determine correct frequency and voltage pairings. We can | |
552 | * do _PDC and _PSD and find out the processor dependency for the | |
553 | * actual init that will happen later... | |
554 | */ | |
50109292 | 555 | static int __init acpi_cpufreq_early_init(void) |
09b4d1ee | 556 | { |
2fdf66b4 | 557 | unsigned int i; |
eae2ef0e | 558 | pr_debug("%s\n", __func__); |
09b4d1ee | 559 | |
50109292 FY |
560 | acpi_perf_data = alloc_percpu(struct acpi_processor_performance); |
561 | if (!acpi_perf_data) { | |
2d06d8c4 | 562 | pr_debug("Memory allocation error for acpi_perf_data.\n"); |
50109292 | 563 | return -ENOMEM; |
09b4d1ee | 564 | } |
2fdf66b4 | 565 | for_each_possible_cpu(i) { |
eaa95840 | 566 | if (!zalloc_cpumask_var_node( |
80855f73 MT |
567 | &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, |
568 | GFP_KERNEL, cpu_to_node(i))) { | |
2fdf66b4 RR |
569 | |
570 | /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ | |
571 | free_acpi_perf_data(); | |
572 | return -ENOMEM; | |
573 | } | |
574 | } | |
09b4d1ee VP |
575 | |
576 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
577 | acpi_processor_preregister_performance(acpi_perf_data); |
578 | return 0; | |
09b4d1ee VP |
579 | } |
580 | ||
95625b8f | 581 | #ifdef CONFIG_SMP |
8adcc0c6 VP |
582 | /* |
583 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
584 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
585 | * detected, this has a side effect of making CPU run at a different speed | |
586 | * than OS intended it to run at. Detect it and handle it cleanly. | |
587 | */ | |
588 | static int bios_with_sw_any_bug; | |
589 | ||
1855256c | 590 | static int sw_any_bug_found(const struct dmi_system_id *d) |
8adcc0c6 VP |
591 | { |
592 | bios_with_sw_any_bug = 1; | |
593 | return 0; | |
594 | } | |
595 | ||
1855256c | 596 | static const struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
597 | { |
598 | .callback = sw_any_bug_found, | |
599 | .ident = "Supermicro Server X6DLP", | |
600 | .matches = { | |
601 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
602 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
603 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
604 | }, | |
605 | }, | |
606 | { } | |
607 | }; | |
1a8e42fa PB |
608 | |
609 | static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) | |
610 | { | |
293afe44 JV |
611 | /* Intel Xeon Processor 7100 Series Specification Update |
612 | * http://www.intel.com/Assets/PDF/specupdate/314554.pdf | |
1a8e42fa PB |
613 | * AL30: A Machine Check Exception (MCE) Occurring during an |
614 | * Enhanced Intel SpeedStep Technology Ratio Change May Cause | |
293afe44 | 615 | * Both Processor Cores to Lock Up. */ |
1a8e42fa PB |
616 | if (c->x86_vendor == X86_VENDOR_INTEL) { |
617 | if ((c->x86 == 15) && | |
618 | (c->x86_model == 6) && | |
b399151c | 619 | (c->x86_stepping == 8)) { |
1c5864e2 | 620 | pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n"); |
1a8e42fa | 621 | return -ENODEV; |
293afe44 | 622 | } |
1a8e42fa PB |
623 | } |
624 | return 0; | |
625 | } | |
95625b8f | 626 | #endif |
8adcc0c6 | 627 | |
64be7eed | 628 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
1da177e4 | 629 | { |
64be7eed VP |
630 | unsigned int i; |
631 | unsigned int valid_states = 0; | |
632 | unsigned int cpu = policy->cpu; | |
633 | struct acpi_cpufreq_data *data; | |
64be7eed | 634 | unsigned int result = 0; |
92cb7612 | 635 | struct cpuinfo_x86 *c = &cpu_data(policy->cpu); |
64be7eed | 636 | struct acpi_processor_performance *perf; |
8cee1eed | 637 | struct cpufreq_frequency_table *freq_table; |
293afe44 JV |
638 | #ifdef CONFIG_SMP |
639 | static int blacklisted; | |
640 | #endif | |
1da177e4 | 641 | |
eae2ef0e | 642 | pr_debug("%s\n", __func__); |
1da177e4 | 643 | |
1a8e42fa | 644 | #ifdef CONFIG_SMP |
293afe44 JV |
645 | if (blacklisted) |
646 | return blacklisted; | |
647 | blacklisted = acpi_cpufreq_blacklist(c); | |
648 | if (blacklisted) | |
649 | return blacklisted; | |
1a8e42fa PB |
650 | #endif |
651 | ||
d5b73cd8 | 652 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
1da177e4 | 653 | if (!data) |
64be7eed | 654 | return -ENOMEM; |
1da177e4 | 655 | |
f4fd3797 LT |
656 | if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) { |
657 | result = -ENOMEM; | |
658 | goto err_free; | |
659 | } | |
660 | ||
3427616b | 661 | perf = per_cpu_ptr(acpi_perf_data, cpu); |
8cfcfd39 | 662 | data->acpi_perf_cpu = cpu; |
eb0b3e78 | 663 | policy->driver_data = data; |
1da177e4 | 664 | |
95dd7227 | 665 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
fe27cb35 | 666 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; |
1da177e4 | 667 | |
3427616b | 668 | result = acpi_processor_register_performance(perf, cpu); |
1da177e4 | 669 | if (result) |
f4fd3797 | 670 | goto err_free_mask; |
1da177e4 | 671 | |
09b4d1ee | 672 | policy->shared_type = perf->shared_type; |
95dd7227 | 673 | |
46f18e3a | 674 | /* |
95dd7227 | 675 | * Will let policy->cpus know about dependency only when software |
46f18e3a VP |
676 | * coordination is required. |
677 | */ | |
678 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 679 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
835481d9 | 680 | cpumask_copy(policy->cpus, perf->shared_cpu_map); |
8adcc0c6 | 681 | } |
f4fd3797 | 682 | cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map); |
8adcc0c6 VP |
683 | |
684 | #ifdef CONFIG_SMP | |
685 | dmi_check_system(sw_any_bug_dmi_table); | |
2624f90c | 686 | if (bios_with_sw_any_bug && !policy_is_shared(policy)) { |
8adcc0c6 | 687 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; |
3280c3c8 | 688 | cpumask_copy(policy->cpus, topology_core_cpumask(cpu)); |
8adcc0c6 | 689 | } |
acd31624 AP |
690 | |
691 | if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) { | |
692 | cpumask_clear(policy->cpus); | |
693 | cpumask_set_cpu(cpu, policy->cpus); | |
3280c3c8 BG |
694 | cpumask_copy(data->freqdomain_cpus, |
695 | topology_sibling_cpumask(cpu)); | |
acd31624 | 696 | policy->shared_type = CPUFREQ_SHARED_TYPE_HW; |
1c5864e2 | 697 | pr_info_once("overriding BIOS provided _PSD data\n"); |
acd31624 | 698 | } |
8adcc0c6 | 699 | #endif |
09b4d1ee | 700 | |
1da177e4 | 701 | /* capability check */ |
09b4d1ee | 702 | if (perf->state_count <= 1) { |
2d06d8c4 | 703 | pr_debug("No P-States\n"); |
1da177e4 LT |
704 | result = -ENODEV; |
705 | goto err_unreg; | |
706 | } | |
09b4d1ee | 707 | |
fe27cb35 VP |
708 | if (perf->control_register.space_id != perf->status_register.space_id) { |
709 | result = -ENODEV; | |
710 | goto err_unreg; | |
711 | } | |
712 | ||
713 | switch (perf->control_register.space_id) { | |
64be7eed | 714 | case ACPI_ADR_SPACE_SYSTEM_IO: |
c40a4518 MG |
715 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && |
716 | boot_cpu_data.x86 == 0xf) { | |
717 | pr_debug("AMD K8 systems must use native drivers.\n"); | |
718 | result = -ENODEV; | |
719 | goto err_unreg; | |
720 | } | |
2d06d8c4 | 721 | pr_debug("SYSTEM IO addr space\n"); |
dde9f7ba | 722 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
ed757a2c RW |
723 | data->cpu_freq_read = cpu_freq_read_io; |
724 | data->cpu_freq_write = cpu_freq_write_io; | |
dde9f7ba | 725 | break; |
64be7eed | 726 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
2d06d8c4 | 727 | pr_debug("HARDWARE addr space\n"); |
3dc9a633 MG |
728 | if (check_est_cpu(cpu)) { |
729 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
ed757a2c RW |
730 | data->cpu_freq_read = cpu_freq_read_intel; |
731 | data->cpu_freq_write = cpu_freq_write_intel; | |
3dc9a633 | 732 | break; |
dde9f7ba | 733 | } |
3dc9a633 MG |
734 | if (check_amd_hwpstate_cpu(cpu)) { |
735 | data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE; | |
ed757a2c RW |
736 | data->cpu_freq_read = cpu_freq_read_amd; |
737 | data->cpu_freq_write = cpu_freq_write_amd; | |
3dc9a633 MG |
738 | break; |
739 | } | |
740 | result = -ENODEV; | |
741 | goto err_unreg; | |
64be7eed | 742 | default: |
2d06d8c4 | 743 | pr_debug("Unknown addr space %d\n", |
64be7eed | 744 | (u32) (perf->control_register.space_id)); |
1da177e4 LT |
745 | result = -ENODEV; |
746 | goto err_unreg; | |
747 | } | |
748 | ||
6396bb22 KC |
749 | freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table), |
750 | GFP_KERNEL); | |
8cee1eed | 751 | if (!freq_table) { |
1da177e4 LT |
752 | result = -ENOMEM; |
753 | goto err_unreg; | |
754 | } | |
755 | ||
756 | /* detect transition latency */ | |
757 | policy->cpuinfo.transition_latency = 0; | |
3a58df35 | 758 | for (i = 0; i < perf->state_count; i++) { |
64be7eed VP |
759 | if ((perf->states[i].transition_latency * 1000) > |
760 | policy->cpuinfo.transition_latency) | |
761 | policy->cpuinfo.transition_latency = | |
762 | perf->states[i].transition_latency * 1000; | |
1da177e4 | 763 | } |
1da177e4 | 764 | |
a59d1637 PV |
765 | /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ |
766 | if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && | |
767 | policy->cpuinfo.transition_latency > 20 * 1000) { | |
a59d1637 | 768 | policy->cpuinfo.transition_latency = 20 * 1000; |
b49c22a6 | 769 | pr_info_once("P-state transition latency capped at 20 uS\n"); |
a59d1637 PV |
770 | } |
771 | ||
1da177e4 | 772 | /* table init */ |
3a58df35 DJ |
773 | for (i = 0; i < perf->state_count; i++) { |
774 | if (i > 0 && perf->states[i].core_frequency >= | |
8cee1eed | 775 | freq_table[valid_states-1].frequency / 1000) |
fe27cb35 VP |
776 | continue; |
777 | ||
8cee1eed VK |
778 | freq_table[valid_states].driver_data = i; |
779 | freq_table[valid_states].frequency = | |
64be7eed | 780 | perf->states[i].core_frequency * 1000; |
fe27cb35 | 781 | valid_states++; |
1da177e4 | 782 | } |
8cee1eed | 783 | freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
1a186d9e | 784 | policy->freq_table = freq_table; |
8edc59d9 | 785 | perf->state = 0; |
1da177e4 | 786 | |
a507ac4b | 787 | switch (perf->control_register.space_id) { |
64be7eed | 788 | case ACPI_ADR_SPACE_SYSTEM_IO: |
1bab64d5 VK |
789 | /* |
790 | * The core will not set policy->cur, because | |
791 | * cpufreq_driver->get is NULL, so we need to set it here. | |
792 | * However, we have to guess it, because the current speed is | |
793 | * unknown and not detectable via IO ports. | |
794 | */ | |
dde9f7ba VP |
795 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); |
796 | break; | |
64be7eed | 797 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
7650b281 | 798 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
dde9f7ba | 799 | break; |
64be7eed | 800 | default: |
dde9f7ba VP |
801 | break; |
802 | } | |
803 | ||
1da177e4 LT |
804 | /* notify BIOS that we exist */ |
805 | acpi_processor_notify_smm(THIS_MODULE); | |
806 | ||
2d06d8c4 | 807 | pr_debug("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 808 | for (i = 0; i < perf->state_count; i++) |
2d06d8c4 | 809 | pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", |
64be7eed | 810 | (i == perf->state ? '*' : ' '), i, |
09b4d1ee VP |
811 | (u32) perf->states[i].core_frequency, |
812 | (u32) perf->states[i].power, | |
813 | (u32) perf->states[i].transition_latency); | |
1da177e4 | 814 | |
4b31e774 DB |
815 | /* |
816 | * the first call to ->target() should result in us actually | |
817 | * writing something to the appropriate registers. | |
818 | */ | |
819 | data->resume = 1; | |
64be7eed | 820 | |
b7898fda RW |
821 | policy->fast_switch_possible = !acpi_pstate_strict && |
822 | !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY); | |
823 | ||
fe27cb35 | 824 | return result; |
1da177e4 | 825 | |
95dd7227 | 826 | err_unreg: |
b2f8dc4c | 827 | acpi_processor_unregister_performance(cpu); |
f4fd3797 LT |
828 | err_free_mask: |
829 | free_cpumask_var(data->freqdomain_cpus); | |
95dd7227 | 830 | err_free: |
1da177e4 | 831 | kfree(data); |
eb0b3e78 | 832 | policy->driver_data = NULL; |
1da177e4 | 833 | |
64be7eed | 834 | return result; |
1da177e4 LT |
835 | } |
836 | ||
64be7eed | 837 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
1da177e4 | 838 | { |
eb0b3e78 | 839 | struct acpi_cpufreq_data *data = policy->driver_data; |
1da177e4 | 840 | |
eae2ef0e | 841 | pr_debug("%s\n", __func__); |
1da177e4 | 842 | |
9b55f55a VK |
843 | policy->fast_switch_possible = false; |
844 | policy->driver_data = NULL; | |
845 | acpi_processor_unregister_performance(data->acpi_perf_cpu); | |
846 | free_cpumask_var(data->freqdomain_cpus); | |
8cee1eed | 847 | kfree(policy->freq_table); |
9b55f55a | 848 | kfree(data); |
1da177e4 | 849 | |
64be7eed | 850 | return 0; |
1da177e4 LT |
851 | } |
852 | ||
1a186d9e VK |
853 | static void acpi_cpufreq_cpu_ready(struct cpufreq_policy *policy) |
854 | { | |
855 | struct acpi_processor_performance *perf = per_cpu_ptr(acpi_perf_data, | |
856 | policy->cpu); | |
857 | ||
858 | if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) | |
859 | pr_warn(FW_WARN "P-state 0 is not max freq\n"); | |
860 | } | |
861 | ||
64be7eed | 862 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
1da177e4 | 863 | { |
eb0b3e78 | 864 | struct acpi_cpufreq_data *data = policy->driver_data; |
1da177e4 | 865 | |
eae2ef0e | 866 | pr_debug("%s\n", __func__); |
1da177e4 LT |
867 | |
868 | data->resume = 1; | |
869 | ||
64be7eed | 870 | return 0; |
1da177e4 LT |
871 | } |
872 | ||
64be7eed | 873 | static struct freq_attr *acpi_cpufreq_attr[] = { |
1da177e4 | 874 | &cpufreq_freq_attr_scaling_available_freqs, |
f4fd3797 | 875 | &freqdomain_cpus, |
f56c50e3 RW |
876 | #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB |
877 | &cpb, | |
878 | #endif | |
1da177e4 LT |
879 | NULL, |
880 | }; | |
881 | ||
882 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
db9be219 | 883 | .verify = cpufreq_generic_frequency_table_verify, |
9c0ebcf7 | 884 | .target_index = acpi_cpufreq_target, |
b7898fda | 885 | .fast_switch = acpi_cpufreq_fast_switch, |
e2f74f35 TR |
886 | .bios_limit = acpi_processor_get_bios_limit, |
887 | .init = acpi_cpufreq_cpu_init, | |
888 | .exit = acpi_cpufreq_cpu_exit, | |
1a186d9e | 889 | .ready = acpi_cpufreq_cpu_ready, |
e2f74f35 TR |
890 | .resume = acpi_cpufreq_resume, |
891 | .name = "acpi-cpufreq", | |
e2f74f35 | 892 | .attr = acpi_cpufreq_attr, |
1da177e4 LT |
893 | }; |
894 | ||
4d66ddf2 SAS |
895 | static enum cpuhp_state acpi_cpufreq_online; |
896 | ||
615b7300 AP |
897 | static void __init acpi_cpufreq_boost_init(void) |
898 | { | |
4d66ddf2 | 899 | int ret; |
615b7300 | 900 | |
1222d527 EV |
901 | if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) { |
902 | pr_debug("Boost capabilities not present in the processor\n"); | |
4d66ddf2 | 903 | return; |
1222d527 | 904 | } |
0197fbd2 | 905 | |
4d66ddf2 SAS |
906 | acpi_cpufreq_driver.set_boost = set_boost; |
907 | acpi_cpufreq_driver.boost_enabled = boost_state(0); | |
615b7300 | 908 | |
4d66ddf2 SAS |
909 | /* |
910 | * This calls the online callback on all online cpu and forces all | |
911 | * MSRs to the same value. | |
912 | */ | |
913 | ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online", | |
914 | cpufreq_boost_online, cpufreq_boost_down_prep); | |
915 | if (ret < 0) { | |
916 | pr_err("acpi_cpufreq: failed to register hotplug callbacks\n"); | |
4d66ddf2 | 917 | return; |
cfc9c8ed | 918 | } |
4d66ddf2 | 919 | acpi_cpufreq_online = ret; |
615b7300 AP |
920 | } |
921 | ||
eb8c68ef | 922 | static void acpi_cpufreq_boost_exit(void) |
615b7300 | 923 | { |
2a8fa123 | 924 | if (acpi_cpufreq_online > 0) |
4d66ddf2 | 925 | cpuhp_remove_state_nocalls(acpi_cpufreq_online); |
615b7300 AP |
926 | } |
927 | ||
64be7eed | 928 | static int __init acpi_cpufreq_init(void) |
1da177e4 | 929 | { |
50109292 FY |
930 | int ret; |
931 | ||
75c07581 RW |
932 | if (acpi_disabled) |
933 | return -ENODEV; | |
934 | ||
8a61e12e YL |
935 | /* don't keep reloading if cpufreq_driver exists */ |
936 | if (cpufreq_get_current_driver()) | |
75c07581 | 937 | return -EEXIST; |
ee297533 | 938 | |
eae2ef0e | 939 | pr_debug("%s\n", __func__); |
1da177e4 | 940 | |
50109292 FY |
941 | ret = acpi_cpufreq_early_init(); |
942 | if (ret) | |
943 | return ret; | |
09b4d1ee | 944 | |
11269ff5 AP |
945 | #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB |
946 | /* this is a sysfs file with a strange name and an even stranger | |
947 | * semantic - per CPU instantiation, but system global effect. | |
948 | * Lets enable it only on AMD CPUs for compatibility reasons and | |
949 | * only if configured. This is considered legacy code, which | |
950 | * will probably be removed at some point in the future. | |
951 | */ | |
f56c50e3 RW |
952 | if (!check_amd_hwpstate_cpu(0)) { |
953 | struct freq_attr **attr; | |
11269ff5 | 954 | |
f56c50e3 | 955 | pr_debug("CPB unsupported, do not expose it\n"); |
11269ff5 | 956 | |
f56c50e3 RW |
957 | for (attr = acpi_cpufreq_attr; *attr; attr++) |
958 | if (*attr == &cpb) { | |
959 | *attr = NULL; | |
960 | break; | |
961 | } | |
11269ff5 AP |
962 | } |
963 | #endif | |
cfc9c8ed | 964 | acpi_cpufreq_boost_init(); |
11269ff5 | 965 | |
847aef6f | 966 | ret = cpufreq_register_driver(&acpi_cpufreq_driver); |
eb8c68ef | 967 | if (ret) { |
2fdf66b4 | 968 | free_acpi_perf_data(); |
eb8c68ef KRW |
969 | acpi_cpufreq_boost_exit(); |
970 | } | |
847aef6f | 971 | return ret; |
1da177e4 LT |
972 | } |
973 | ||
64be7eed | 974 | static void __exit acpi_cpufreq_exit(void) |
1da177e4 | 975 | { |
eae2ef0e | 976 | pr_debug("%s\n", __func__); |
1da177e4 | 977 | |
615b7300 AP |
978 | acpi_cpufreq_boost_exit(); |
979 | ||
1da177e4 LT |
980 | cpufreq_unregister_driver(&acpi_cpufreq_driver); |
981 | ||
50f4ddd4 | 982 | free_acpi_perf_data(); |
1da177e4 LT |
983 | } |
984 | ||
d395bf12 | 985 | module_param(acpi_pstate_strict, uint, 0644); |
64be7eed | 986 | MODULE_PARM_DESC(acpi_pstate_strict, |
95dd7227 DJ |
987 | "value 0 or non-zero. non-zero -> strict ACPI checks are " |
988 | "performed during frequency changes."); | |
1da177e4 LT |
989 | |
990 | late_initcall(acpi_cpufreq_init); | |
991 | module_exit(acpi_cpufreq_exit); | |
992 | ||
efa17194 MG |
993 | static const struct x86_cpu_id acpi_cpufreq_ids[] = { |
994 | X86_FEATURE_MATCH(X86_FEATURE_ACPI), | |
995 | X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE), | |
996 | {} | |
997 | }; | |
998 | MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids); | |
999 | ||
c655affb RW |
1000 | static const struct acpi_device_id processor_device_ids[] = { |
1001 | {ACPI_PROCESSOR_OBJECT_HID, }, | |
1002 | {ACPI_PROCESSOR_DEVICE_HID, }, | |
1003 | {}, | |
1004 | }; | |
1005 | MODULE_DEVICE_TABLE(acpi, processor_device_ids); | |
1006 | ||
1da177e4 | 1007 | MODULE_ALIAS("acpi"); |