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Commit | Line | Data |
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7c1a70e9 | 1 | /* |
7c1a70e9 MP |
2 | * Copyright (C) STMicroelectronics 2009 |
3 | * Copyright (C) ST-Ericsson SA 2010 | |
4 | * | |
5 | * License Terms: GNU General Public License v2 | |
7c1a70e9 MP |
6 | * Author: Sundar Iyer <sundar.iyer@stericsson.com> |
7 | * Author: Martin Persson <martin.persson@stericsson.com> | |
8 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | |
9 | * | |
10 | */ | |
b4689444 | 11 | #include <linux/module.h> |
7c1a70e9 MP |
12 | #include <linux/kernel.h> |
13 | #include <linux/cpufreq.h> | |
14 | #include <linux/delay.h> | |
72b2fd5c | 15 | #include <linux/slab.h> |
b4689444 | 16 | #include <linux/platform_device.h> |
78e30d12 | 17 | #include <linux/clk.h> |
7c1a70e9 | 18 | |
fdb44464 | 19 | static struct cpufreq_frequency_table *freq_table; |
78e30d12 | 20 | static struct clk *armss_clk; |
72b2fd5c LW |
21 | |
22 | static struct freq_attr *db8500_cpufreq_attr[] = { | |
23 | &cpufreq_freq_attr_scaling_available_freqs, | |
24 | NULL, | |
7c1a70e9 MP |
25 | }; |
26 | ||
72b2fd5c | 27 | static int db8500_cpufreq_verify_speed(struct cpufreq_policy *policy) |
7c1a70e9 MP |
28 | { |
29 | return cpufreq_frequency_table_verify(policy, freq_table); | |
30 | } | |
31 | ||
72b2fd5c | 32 | static int db8500_cpufreq_target(struct cpufreq_policy *policy, |
7c1a70e9 MP |
33 | unsigned int target_freq, |
34 | unsigned int relation) | |
35 | { | |
36 | struct cpufreq_freqs freqs; | |
72b2fd5c | 37 | unsigned int idx; |
7c1a70e9 | 38 | |
72b2fd5c | 39 | /* scale the target frequency to one of the extremes supported */ |
7c1a70e9 MP |
40 | if (target_freq < policy->cpuinfo.min_freq) |
41 | target_freq = policy->cpuinfo.min_freq; | |
42 | if (target_freq > policy->cpuinfo.max_freq) | |
43 | target_freq = policy->cpuinfo.max_freq; | |
44 | ||
72b2fd5c LW |
45 | /* Lookup the next frequency */ |
46 | if (cpufreq_frequency_table_target | |
47 | (policy, freq_table, target_freq, relation, &idx)) { | |
48 | return -EINVAL; | |
7c1a70e9 MP |
49 | } |
50 | ||
51 | freqs.old = policy->cur; | |
72b2fd5c | 52 | freqs.new = freq_table[idx].frequency; |
7c1a70e9 | 53 | |
72b2fd5c | 54 | if (freqs.old == freqs.new) |
7c1a70e9 | 55 | return 0; |
7c1a70e9 | 56 | |
72b2fd5c | 57 | /* pre-change notification */ |
8efd072b VG |
58 | for_each_cpu(freqs.cpu, policy->cpus) |
59 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
7c1a70e9 | 60 | |
78e30d12 UH |
61 | /* update armss clk frequency */ |
62 | if (clk_set_rate(armss_clk, freq_table[idx].frequency * 1000)) { | |
63 | pr_err("db8500-cpufreq: Failed to update armss clk\n"); | |
72b2fd5c | 64 | return -EINVAL; |
7c1a70e9 MP |
65 | } |
66 | ||
72b2fd5c | 67 | /* post change notification */ |
8efd072b VG |
68 | for_each_cpu(freqs.cpu, policy->cpus) |
69 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
7c1a70e9 | 70 | |
72b2fd5c | 71 | return 0; |
7c1a70e9 MP |
72 | } |
73 | ||
72b2fd5c | 74 | static unsigned int db8500_cpufreq_getspeed(unsigned int cpu) |
7c1a70e9 | 75 | { |
fdb44464 | 76 | int i = 0; |
78e30d12 | 77 | unsigned long freq = clk_get_rate(armss_clk) / 1000; |
fdb44464 UH |
78 | |
79 | while (freq_table[i].frequency != CPUFREQ_TABLE_END) { | |
78e30d12 | 80 | if (freq <= freq_table[i].frequency) |
fdb44464 UH |
81 | return freq_table[i].frequency; |
82 | i++; | |
83 | } | |
84 | ||
78e30d12 UH |
85 | /* We could not find a corresponding frequency. */ |
86 | pr_err("db8500-cpufreq: Failed to find cpufreq speed\n"); | |
fdb44464 | 87 | return 0; |
7c1a70e9 MP |
88 | } |
89 | ||
72b2fd5c | 90 | static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) |
7c1a70e9 | 91 | { |
fdb44464 UH |
92 | int i = 0; |
93 | int res; | |
c72fe851 | 94 | |
78e30d12 UH |
95 | armss_clk = clk_get(NULL, "armss"); |
96 | if (IS_ERR(armss_clk)) { | |
97 | pr_err("db8500-cpufreq : Failed to get armss clk\n"); | |
98 | return PTR_ERR(armss_clk); | |
99 | } | |
100 | ||
6283e328 | 101 | pr_info("db8500-cpufreq : Available frequencies:\n"); |
fdb44464 | 102 | while (freq_table[i].frequency != CPUFREQ_TABLE_END) { |
eb0b38a5 | 103 | pr_info(" %d Mhz\n", freq_table[i].frequency/1000); |
fdb44464 UH |
104 | i++; |
105 | } | |
7c1a70e9 MP |
106 | |
107 | /* get policy fields based on the table */ | |
108 | res = cpufreq_frequency_table_cpuinfo(policy, freq_table); | |
109 | if (!res) | |
110 | cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | |
111 | else { | |
72b2fd5c | 112 | pr_err("db8500-cpufreq : Failed to read policy table\n"); |
78e30d12 | 113 | clk_put(armss_clk); |
7c1a70e9 MP |
114 | return res; |
115 | } | |
116 | ||
117 | policy->min = policy->cpuinfo.min_freq; | |
118 | policy->max = policy->cpuinfo.max_freq; | |
72b2fd5c | 119 | policy->cur = db8500_cpufreq_getspeed(policy->cpu); |
7c1a70e9 MP |
120 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; |
121 | ||
122 | /* | |
123 | * FIXME : Need to take time measurement across the target() | |
124 | * function with no/some/all drivers in the notification | |
125 | * list. | |
126 | */ | |
72b2fd5c | 127 | policy->cpuinfo.transition_latency = 20 * 1000; /* in ns */ |
7c1a70e9 MP |
128 | |
129 | /* policy sharing between dual CPUs */ | |
88d8cd52 | 130 | cpumask_copy(policy->cpus, cpu_present_mask); |
7c1a70e9 MP |
131 | |
132 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
133 | ||
7c1a70e9 MP |
134 | return 0; |
135 | } | |
136 | ||
72b2fd5c LW |
137 | static struct cpufreq_driver db8500_cpufreq_driver = { |
138 | .flags = CPUFREQ_STICKY, | |
139 | .verify = db8500_cpufreq_verify_speed, | |
140 | .target = db8500_cpufreq_target, | |
141 | .get = db8500_cpufreq_getspeed, | |
142 | .init = db8500_cpufreq_init, | |
143 | .name = "DB8500", | |
144 | .attr = db8500_cpufreq_attr, | |
7c1a70e9 MP |
145 | }; |
146 | ||
b4689444 UH |
147 | static int db8500_cpufreq_probe(struct platform_device *pdev) |
148 | { | |
fdb44464 UH |
149 | freq_table = dev_get_platdata(&pdev->dev); |
150 | ||
151 | if (!freq_table) { | |
152 | pr_err("db8500-cpufreq: Failed to fetch cpufreq table\n"); | |
153 | return -ENODEV; | |
154 | } | |
155 | ||
b4689444 UH |
156 | return cpufreq_register_driver(&db8500_cpufreq_driver); |
157 | } | |
158 | ||
159 | static struct platform_driver db8500_cpufreq_plat_driver = { | |
160 | .driver = { | |
161 | .name = "cpufreq-u8500", | |
162 | .owner = THIS_MODULE, | |
163 | }, | |
164 | .probe = db8500_cpufreq_probe, | |
165 | }; | |
166 | ||
72b2fd5c | 167 | static int __init db8500_cpufreq_register(void) |
7c1a70e9 | 168 | { |
72b2fd5c | 169 | pr_info("cpufreq for DB8500 started\n"); |
b4689444 | 170 | return platform_driver_register(&db8500_cpufreq_plat_driver); |
7c1a70e9 | 171 | } |
72b2fd5c | 172 | device_initcall(db8500_cpufreq_register); |
b4689444 UH |
173 | |
174 | MODULE_LICENSE("GPL v2"); | |
175 | MODULE_DESCRIPTION("cpufreq driver for DB8500"); |