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Commit | Line | Data |
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7c1a70e9 | 1 | /* |
7c1a70e9 | 2 | * Copyright (C) STMicroelectronics 2009 |
0baf066f | 3 | * Copyright (C) ST-Ericsson SA 2010-2012 |
7c1a70e9 MP |
4 | * |
5 | * License Terms: GNU General Public License v2 | |
7c1a70e9 MP |
6 | * Author: Sundar Iyer <sundar.iyer@stericsson.com> |
7 | * Author: Martin Persson <martin.persson@stericsson.com> | |
8 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | |
7c1a70e9 | 9 | */ |
0baf066f | 10 | |
b4689444 | 11 | #include <linux/module.h> |
7c1a70e9 MP |
12 | #include <linux/kernel.h> |
13 | #include <linux/cpufreq.h> | |
14 | #include <linux/delay.h> | |
72b2fd5c | 15 | #include <linux/slab.h> |
b4689444 | 16 | #include <linux/platform_device.h> |
78e30d12 | 17 | #include <linux/clk.h> |
7c1a70e9 | 18 | |
fdb44464 | 19 | static struct cpufreq_frequency_table *freq_table; |
78e30d12 | 20 | static struct clk *armss_clk; |
72b2fd5c | 21 | |
edb10c11 | 22 | static struct freq_attr *dbx500_cpufreq_attr[] = { |
72b2fd5c LW |
23 | &cpufreq_freq_attr_scaling_available_freqs, |
24 | NULL, | |
7c1a70e9 MP |
25 | }; |
26 | ||
edb10c11 | 27 | static int dbx500_cpufreq_verify_speed(struct cpufreq_policy *policy) |
7c1a70e9 MP |
28 | { |
29 | return cpufreq_frequency_table_verify(policy, freq_table); | |
30 | } | |
31 | ||
edb10c11 | 32 | static int dbx500_cpufreq_target(struct cpufreq_policy *policy, |
7c1a70e9 MP |
33 | unsigned int target_freq, |
34 | unsigned int relation) | |
35 | { | |
36 | struct cpufreq_freqs freqs; | |
72b2fd5c | 37 | unsigned int idx; |
9291cf9d | 38 | int ret; |
7c1a70e9 | 39 | |
72b2fd5c | 40 | /* scale the target frequency to one of the extremes supported */ |
7c1a70e9 MP |
41 | if (target_freq < policy->cpuinfo.min_freq) |
42 | target_freq = policy->cpuinfo.min_freq; | |
43 | if (target_freq > policy->cpuinfo.max_freq) | |
44 | target_freq = policy->cpuinfo.max_freq; | |
45 | ||
72b2fd5c | 46 | /* Lookup the next frequency */ |
9291cf9d JA |
47 | if (cpufreq_frequency_table_target(policy, freq_table, target_freq, |
48 | relation, &idx)) | |
72b2fd5c | 49 | return -EINVAL; |
7c1a70e9 MP |
50 | |
51 | freqs.old = policy->cur; | |
72b2fd5c | 52 | freqs.new = freq_table[idx].frequency; |
7c1a70e9 | 53 | |
72b2fd5c | 54 | if (freqs.old == freqs.new) |
7c1a70e9 | 55 | return 0; |
7c1a70e9 | 56 | |
72b2fd5c | 57 | /* pre-change notification */ |
8efd072b VG |
58 | for_each_cpu(freqs.cpu, policy->cpus) |
59 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
7c1a70e9 | 60 | |
78e30d12 | 61 | /* update armss clk frequency */ |
9291cf9d JA |
62 | ret = clk_set_rate(armss_clk, freqs.new * 1000); |
63 | ||
64 | if (ret) { | |
65 | pr_err("dbx500-cpufreq: Failed to set armss_clk to %d Hz: error %d\n", | |
66 | freqs.new * 1000, ret); | |
67 | return ret; | |
7c1a70e9 MP |
68 | } |
69 | ||
72b2fd5c | 70 | /* post change notification */ |
8efd072b VG |
71 | for_each_cpu(freqs.cpu, policy->cpus) |
72 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
7c1a70e9 | 73 | |
72b2fd5c | 74 | return 0; |
7c1a70e9 MP |
75 | } |
76 | ||
edb10c11 | 77 | static unsigned int dbx500_cpufreq_getspeed(unsigned int cpu) |
7c1a70e9 | 78 | { |
fdb44464 | 79 | int i = 0; |
78e30d12 | 80 | unsigned long freq = clk_get_rate(armss_clk) / 1000; |
fdb44464 UH |
81 | |
82 | while (freq_table[i].frequency != CPUFREQ_TABLE_END) { | |
78e30d12 | 83 | if (freq <= freq_table[i].frequency) |
fdb44464 UH |
84 | return freq_table[i].frequency; |
85 | i++; | |
86 | } | |
87 | ||
78e30d12 | 88 | /* We could not find a corresponding frequency. */ |
edb10c11 | 89 | pr_err("dbx500-cpufreq: Failed to find cpufreq speed\n"); |
fdb44464 | 90 | return 0; |
7c1a70e9 MP |
91 | } |
92 | ||
edb10c11 | 93 | static int __cpuinit dbx500_cpufreq_init(struct cpufreq_policy *policy) |
7c1a70e9 | 94 | { |
fdb44464 | 95 | int res; |
c72fe851 | 96 | |
7c1a70e9 MP |
97 | /* get policy fields based on the table */ |
98 | res = cpufreq_frequency_table_cpuinfo(policy, freq_table); | |
99 | if (!res) | |
100 | cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | |
101 | else { | |
9291cf9d | 102 | pr_err("dbx500-cpufreq: Failed to read policy table\n"); |
7c1a70e9 MP |
103 | return res; |
104 | } | |
105 | ||
106 | policy->min = policy->cpuinfo.min_freq; | |
107 | policy->max = policy->cpuinfo.max_freq; | |
edb10c11 | 108 | policy->cur = dbx500_cpufreq_getspeed(policy->cpu); |
7c1a70e9 MP |
109 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; |
110 | ||
111 | /* | |
112 | * FIXME : Need to take time measurement across the target() | |
113 | * function with no/some/all drivers in the notification | |
114 | * list. | |
115 | */ | |
72b2fd5c | 116 | policy->cpuinfo.transition_latency = 20 * 1000; /* in ns */ |
7c1a70e9 MP |
117 | |
118 | /* policy sharing between dual CPUs */ | |
4c738d00 | 119 | cpumask_setall(policy->cpus); |
7c1a70e9 | 120 | |
7c1a70e9 MP |
121 | return 0; |
122 | } | |
123 | ||
edb10c11 | 124 | static struct cpufreq_driver dbx500_cpufreq_driver = { |
ec669123 | 125 | .flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS, |
edb10c11 LJ |
126 | .verify = dbx500_cpufreq_verify_speed, |
127 | .target = dbx500_cpufreq_target, | |
128 | .get = dbx500_cpufreq_getspeed, | |
129 | .init = dbx500_cpufreq_init, | |
130 | .name = "DBX500", | |
131 | .attr = dbx500_cpufreq_attr, | |
7c1a70e9 MP |
132 | }; |
133 | ||
edb10c11 | 134 | static int dbx500_cpufreq_probe(struct platform_device *pdev) |
b4689444 | 135 | { |
3e27996c | 136 | int i = 0; |
fdb44464 | 137 | |
3e27996c | 138 | freq_table = dev_get_platdata(&pdev->dev); |
fdb44464 | 139 | if (!freq_table) { |
edb10c11 | 140 | pr_err("dbx500-cpufreq: Failed to fetch cpufreq table\n"); |
fdb44464 UH |
141 | return -ENODEV; |
142 | } | |
143 | ||
3e27996c UH |
144 | armss_clk = clk_get(&pdev->dev, "armss"); |
145 | if (IS_ERR(armss_clk)) { | |
9291cf9d | 146 | pr_err("dbx500-cpufreq: Failed to get armss clk\n"); |
3e27996c UH |
147 | return PTR_ERR(armss_clk); |
148 | } | |
149 | ||
9291cf9d | 150 | pr_info("dbx500-cpufreq: Available frequencies:\n"); |
3e27996c UH |
151 | while (freq_table[i].frequency != CPUFREQ_TABLE_END) { |
152 | pr_info(" %d Mhz\n", freq_table[i].frequency/1000); | |
153 | i++; | |
154 | } | |
155 | ||
edb10c11 | 156 | return cpufreq_register_driver(&dbx500_cpufreq_driver); |
b4689444 UH |
157 | } |
158 | ||
edb10c11 | 159 | static struct platform_driver dbx500_cpufreq_plat_driver = { |
b4689444 | 160 | .driver = { |
edb10c11 | 161 | .name = "cpufreq-ux500", |
b4689444 UH |
162 | .owner = THIS_MODULE, |
163 | }, | |
edb10c11 | 164 | .probe = dbx500_cpufreq_probe, |
b4689444 UH |
165 | }; |
166 | ||
edb10c11 | 167 | static int __init dbx500_cpufreq_register(void) |
7c1a70e9 | 168 | { |
edb10c11 | 169 | return platform_driver_register(&dbx500_cpufreq_plat_driver); |
7c1a70e9 | 170 | } |
edb10c11 | 171 | device_initcall(dbx500_cpufreq_register); |
b4689444 UH |
172 | |
173 | MODULE_LICENSE("GPL v2"); | |
edb10c11 | 174 | MODULE_DESCRIPTION("cpufreq driver for DBX500"); |