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a125a17f JL |
1 | /* |
2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | |
3 | * http://www.samsung.com | |
4 | * | |
5 | * EXYNOS - CPU frequency scaling support for EXYNOS series | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
a125a17f JL |
12 | #include <linux/kernel.h> |
13 | #include <linux/err.h> | |
14 | #include <linux/clk.h> | |
15 | #include <linux/io.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/regulator/consumer.h> | |
18 | #include <linux/cpufreq.h> | |
19 | #include <linux/suspend.h> | |
a125a17f | 20 | |
6c523c61 | 21 | #include <plat/cpu.h> |
a125a17f | 22 | |
c4aaa295 KK |
23 | #include "exynos-cpufreq.h" |
24 | ||
a125a17f JL |
25 | static struct exynos_dvfs_info *exynos_info; |
26 | ||
27 | static struct regulator *arm_regulator; | |
28 | static struct cpufreq_freqs freqs; | |
29 | ||
30 | static unsigned int locking_frequency; | |
31 | static bool frequency_locked; | |
32 | static DEFINE_MUTEX(cpufreq_lock); | |
33 | ||
5542721a | 34 | static int exynos_verify_speed(struct cpufreq_policy *policy) |
a125a17f JL |
35 | { |
36 | return cpufreq_frequency_table_verify(policy, | |
37 | exynos_info->freq_table); | |
38 | } | |
39 | ||
5542721a | 40 | static unsigned int exynos_getspeed(unsigned int cpu) |
a125a17f JL |
41 | { |
42 | return clk_get_rate(exynos_info->cpu_clk) / 1000; | |
43 | } | |
44 | ||
0e0e425f JC |
45 | static int exynos_cpufreq_get_index(unsigned int freq) |
46 | { | |
47 | struct cpufreq_frequency_table *freq_table = exynos_info->freq_table; | |
48 | int index; | |
49 | ||
50 | for (index = 0; | |
51 | freq_table[index].frequency != CPUFREQ_TABLE_END; index++) | |
52 | if (freq_table[index].frequency == freq) | |
53 | break; | |
54 | ||
55 | if (freq_table[index].frequency == CPUFREQ_TABLE_END) | |
56 | return -EINVAL; | |
57 | ||
58 | return index; | |
59 | } | |
60 | ||
61 | static int exynos_cpufreq_scale(unsigned int target_freq) | |
a125a17f | 62 | { |
a125a17f JL |
63 | struct cpufreq_frequency_table *freq_table = exynos_info->freq_table; |
64 | unsigned int *volt_table = exynos_info->volt_table; | |
0e0e425f JC |
65 | struct cpufreq_policy *policy = cpufreq_cpu_get(0); |
66 | unsigned int arm_volt, safe_arm_volt = 0; | |
a125a17f | 67 | unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz; |
d271d077 | 68 | int index, old_index; |
0e0e425f | 69 | int ret = 0; |
a125a17f JL |
70 | |
71 | freqs.old = policy->cur; | |
c098ea74 | 72 | freqs.new = target_freq; |
a125a17f | 73 | |
c098ea74 | 74 | if (freqs.new == freqs.old) |
a125a17f | 75 | goto out; |
a125a17f | 76 | |
53df1ad5 JL |
77 | /* |
78 | * The policy max have been changed so that we cannot get proper | |
79 | * old_index with cpufreq_frequency_table_target(). Thus, ignore | |
80 | * policy and get the index from the raw freqeuncy table. | |
81 | */ | |
0e0e425f JC |
82 | old_index = exynos_cpufreq_get_index(freqs.old); |
83 | if (old_index < 0) { | |
84 | ret = old_index; | |
a125a17f JL |
85 | goto out; |
86 | } | |
87 | ||
0e0e425f JC |
88 | index = exynos_cpufreq_get_index(target_freq); |
89 | if (index < 0) { | |
90 | ret = index; | |
a125a17f JL |
91 | goto out; |
92 | } | |
93 | ||
a125a17f JL |
94 | /* |
95 | * ARM clock source will be changed APLL to MPLL temporary | |
96 | * To support this level, need to control regulator for | |
97 | * required voltage level | |
98 | */ | |
99 | if (exynos_info->need_apll_change != NULL) { | |
100 | if (exynos_info->need_apll_change(old_index, index) && | |
101 | (freq_table[index].frequency < mpll_freq_khz) && | |
102 | (freq_table[old_index].frequency < mpll_freq_khz)) | |
103 | safe_arm_volt = volt_table[exynos_info->pll_safe_idx]; | |
104 | } | |
105 | arm_volt = volt_table[index]; | |
106 | ||
b43a7ffb | 107 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
a125a17f JL |
108 | |
109 | /* When the new frequency is higher than current frequency */ | |
110 | if ((freqs.new > freqs.old) && !safe_arm_volt) { | |
111 | /* Firstly, voltage up to increase frequency */ | |
0e0e425f JC |
112 | ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt); |
113 | if (ret) { | |
114 | pr_err("%s: failed to set cpu voltage to %d\n", | |
115 | __func__, arm_volt); | |
c3aca6b1 VK |
116 | freqs.new = freqs.old; |
117 | goto post_notify; | |
0e0e425f | 118 | } |
a125a17f JL |
119 | } |
120 | ||
0e0e425f JC |
121 | if (safe_arm_volt) { |
122 | ret = regulator_set_voltage(arm_regulator, safe_arm_volt, | |
a125a17f | 123 | safe_arm_volt); |
0e0e425f JC |
124 | if (ret) { |
125 | pr_err("%s: failed to set cpu voltage to %d\n", | |
126 | __func__, safe_arm_volt); | |
c3aca6b1 VK |
127 | freqs.new = freqs.old; |
128 | goto post_notify; | |
0e0e425f JC |
129 | } |
130 | } | |
857d90f7 JC |
131 | |
132 | exynos_info->set_freq(old_index, index); | |
a125a17f | 133 | |
c3aca6b1 | 134 | post_notify: |
b43a7ffb | 135 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
a125a17f | 136 | |
c3aca6b1 VK |
137 | if (ret) |
138 | goto out; | |
139 | ||
a125a17f JL |
140 | /* When the new frequency is lower than current frequency */ |
141 | if ((freqs.new < freqs.old) || | |
142 | ((freqs.new > freqs.old) && safe_arm_volt)) { | |
143 | /* down the voltage after frequency change */ | |
144 | regulator_set_voltage(arm_regulator, arm_volt, | |
145 | arm_volt); | |
0e0e425f JC |
146 | if (ret) { |
147 | pr_err("%s: failed to set cpu voltage to %d\n", | |
148 | __func__, arm_volt); | |
149 | goto out; | |
150 | } | |
a125a17f JL |
151 | } |
152 | ||
0e0e425f JC |
153 | out: |
154 | ||
155 | cpufreq_cpu_put(policy); | |
156 | ||
157 | return ret; | |
158 | } | |
159 | ||
160 | static int exynos_target(struct cpufreq_policy *policy, | |
161 | unsigned int target_freq, | |
162 | unsigned int relation) | |
163 | { | |
164 | struct cpufreq_frequency_table *freq_table = exynos_info->freq_table; | |
165 | unsigned int index; | |
c098ea74 | 166 | unsigned int new_freq; |
229b21e2 | 167 | int ret = 0; |
0e0e425f JC |
168 | |
169 | mutex_lock(&cpufreq_lock); | |
170 | ||
171 | if (frequency_locked) | |
172 | goto out; | |
173 | ||
174 | if (cpufreq_frequency_table_target(policy, freq_table, | |
175 | target_freq, relation, &index)) { | |
176 | ret = -EINVAL; | |
177 | goto out; | |
a125a17f JL |
178 | } |
179 | ||
c098ea74 | 180 | new_freq = freq_table[index].frequency; |
0e0e425f | 181 | |
c098ea74 | 182 | ret = exynos_cpufreq_scale(new_freq); |
0e0e425f | 183 | |
a125a17f JL |
184 | out: |
185 | mutex_unlock(&cpufreq_lock); | |
186 | ||
187 | return ret; | |
188 | } | |
189 | ||
190 | #ifdef CONFIG_PM | |
191 | static int exynos_cpufreq_suspend(struct cpufreq_policy *policy) | |
192 | { | |
193 | return 0; | |
194 | } | |
195 | ||
196 | static int exynos_cpufreq_resume(struct cpufreq_policy *policy) | |
197 | { | |
198 | return 0; | |
199 | } | |
200 | #endif | |
201 | ||
202 | /** | |
203 | * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume | |
204 | * context | |
205 | * @notifier | |
206 | * @pm_event | |
207 | * @v | |
208 | * | |
209 | * While frequency_locked == true, target() ignores every frequency but | |
210 | * locking_frequency. The locking_frequency value is the initial frequency, | |
211 | * which is set by the bootloader. In order to eliminate possible | |
212 | * inconsistency in clock values, we save and restore frequencies during | |
213 | * suspend and resume and block CPUFREQ activities. Note that the standard | |
214 | * suspend/resume cannot be used as they are too deep (syscore_ops) for | |
215 | * regulator actions. | |
216 | */ | |
217 | static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier, | |
218 | unsigned long pm_event, void *v) | |
219 | { | |
0e0e425f | 220 | int ret; |
a125a17f | 221 | |
a125a17f JL |
222 | switch (pm_event) { |
223 | case PM_SUSPEND_PREPARE: | |
0e0e425f | 224 | mutex_lock(&cpufreq_lock); |
a125a17f | 225 | frequency_locked = true; |
0e0e425f | 226 | mutex_unlock(&cpufreq_lock); |
a125a17f | 227 | |
0e0e425f JC |
228 | ret = exynos_cpufreq_scale(locking_frequency); |
229 | if (ret < 0) | |
230 | return NOTIFY_BAD; | |
a125a17f | 231 | |
a125a17f JL |
232 | break; |
233 | ||
234 | case PM_POST_SUSPEND: | |
0e0e425f | 235 | mutex_lock(&cpufreq_lock); |
a125a17f | 236 | frequency_locked = false; |
0e0e425f | 237 | mutex_unlock(&cpufreq_lock); |
a125a17f JL |
238 | break; |
239 | } | |
a125a17f JL |
240 | |
241 | return NOTIFY_OK; | |
242 | } | |
243 | ||
244 | static struct notifier_block exynos_cpufreq_nb = { | |
245 | .notifier_call = exynos_cpufreq_pm_notifier, | |
246 | }; | |
247 | ||
248 | static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy) | |
249 | { | |
250 | policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu); | |
251 | ||
a125a17f JL |
252 | /* set the transition latency value */ |
253 | policy->cpuinfo.transition_latency = 100000; | |
254 | ||
6ca939b3 | 255 | cpumask_setall(policy->cpus); |
a125a17f | 256 | |
bc574ce9 | 257 | return cpufreq_table_validate_and_show(policy, exynos_info->freq_table); |
a125a17f JL |
258 | } |
259 | ||
1298271b IS |
260 | static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
261 | { | |
262 | cpufreq_frequency_table_put_attr(policy->cpu); | |
263 | return 0; | |
264 | } | |
265 | ||
266 | static struct freq_attr *exynos_cpufreq_attr[] = { | |
267 | &cpufreq_freq_attr_scaling_available_freqs, | |
268 | NULL, | |
269 | }; | |
270 | ||
a125a17f JL |
271 | static struct cpufreq_driver exynos_driver = { |
272 | .flags = CPUFREQ_STICKY, | |
273 | .verify = exynos_verify_speed, | |
274 | .target = exynos_target, | |
275 | .get = exynos_getspeed, | |
276 | .init = exynos_cpufreq_cpu_init, | |
1298271b | 277 | .exit = exynos_cpufreq_cpu_exit, |
a125a17f | 278 | .name = "exynos_cpufreq", |
1298271b | 279 | .attr = exynos_cpufreq_attr, |
a125a17f JL |
280 | #ifdef CONFIG_PM |
281 | .suspend = exynos_cpufreq_suspend, | |
282 | .resume = exynos_cpufreq_resume, | |
283 | #endif | |
284 | }; | |
285 | ||
286 | static int __init exynos_cpufreq_init(void) | |
287 | { | |
288 | int ret = -EINVAL; | |
289 | ||
d5b73cd8 | 290 | exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL); |
a125a17f JL |
291 | if (!exynos_info) |
292 | return -ENOMEM; | |
293 | ||
294 | if (soc_is_exynos4210()) | |
295 | ret = exynos4210_cpufreq_init(exynos_info); | |
a35c5051 JL |
296 | else if (soc_is_exynos4212() || soc_is_exynos4412()) |
297 | ret = exynos4x12_cpufreq_init(exynos_info); | |
562a6cbe JL |
298 | else if (soc_is_exynos5250()) |
299 | ret = exynos5250_cpufreq_init(exynos_info); | |
a125a17f | 300 | else |
c1585207 | 301 | return 0; |
a125a17f JL |
302 | |
303 | if (ret) | |
304 | goto err_vdd_arm; | |
305 | ||
306 | if (exynos_info->set_freq == NULL) { | |
307 | pr_err("%s: No set_freq function (ERR)\n", __func__); | |
308 | goto err_vdd_arm; | |
309 | } | |
310 | ||
311 | arm_regulator = regulator_get(NULL, "vdd_arm"); | |
312 | if (IS_ERR(arm_regulator)) { | |
313 | pr_err("%s: failed to get resource vdd_arm\n", __func__); | |
314 | goto err_vdd_arm; | |
315 | } | |
316 | ||
6e45eb12 JC |
317 | locking_frequency = exynos_getspeed(0); |
318 | ||
a125a17f JL |
319 | register_pm_notifier(&exynos_cpufreq_nb); |
320 | ||
321 | if (cpufreq_register_driver(&exynos_driver)) { | |
322 | pr_err("%s: failed to register cpufreq driver\n", __func__); | |
323 | goto err_cpufreq; | |
324 | } | |
325 | ||
326 | return 0; | |
327 | err_cpufreq: | |
328 | unregister_pm_notifier(&exynos_cpufreq_nb); | |
329 | ||
184cddd1 | 330 | regulator_put(arm_regulator); |
a125a17f JL |
331 | err_vdd_arm: |
332 | kfree(exynos_info); | |
a125a17f JL |
333 | return -EINVAL; |
334 | } | |
335 | late_initcall(exynos_cpufreq_init); |