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93f0822d 1/*
d1b68485 2 * intel_pstate.c: Native P state management for Intel processors
93f0822d
DB
3 *
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/kernel.h>
14#include <linux/kernel_stat.h>
15#include <linux/module.h>
16#include <linux/ktime.h>
17#include <linux/hrtimer.h>
18#include <linux/tick.h>
19#include <linux/slab.h>
20#include <linux/sched.h>
21#include <linux/list.h>
22#include <linux/cpu.h>
23#include <linux/cpufreq.h>
24#include <linux/sysfs.h>
25#include <linux/types.h>
26#include <linux/fs.h>
27#include <linux/debugfs.h>
28#include <trace/events/power.h>
29
30#include <asm/div64.h>
31#include <asm/msr.h>
32#include <asm/cpu_device_id.h>
33
34#define SAMPLE_COUNT 3
35
36#define FRAC_BITS 8
37#define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
38#define fp_toint(X) ((X) >> FRAC_BITS)
39
40static inline int32_t mul_fp(int32_t x, int32_t y)
41{
42 return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
43}
44
45static inline int32_t div_fp(int32_t x, int32_t y)
46{
47 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
48}
49
50struct sample {
93f0822d 51 int core_pct_busy;
93f0822d
DB
52 u64 aperf;
53 u64 mperf;
54 int freq;
55};
56
57struct pstate_data {
58 int current_pstate;
59 int min_pstate;
60 int max_pstate;
61 int turbo_pstate;
62};
63
64struct _pid {
65 int setpoint;
66 int32_t integral;
67 int32_t p_gain;
68 int32_t i_gain;
69 int32_t d_gain;
70 int deadband;
71 int last_err;
72};
73
74struct cpudata {
75 int cpu;
76
77 char name[64];
78
79 struct timer_list timer;
80
81 struct pstate_adjust_policy *pstate_policy;
82 struct pstate_data pstate;
83 struct _pid pid;
93f0822d
DB
84
85 int min_pstate_count;
93f0822d 86
93f0822d
DB
87 u64 prev_aperf;
88 u64 prev_mperf;
89 int sample_ptr;
90 struct sample samples[SAMPLE_COUNT];
91};
92
93static struct cpudata **all_cpu_data;
94struct pstate_adjust_policy {
95 int sample_rate_ms;
96 int deadband;
97 int setpoint;
98 int p_gain_pct;
99 int d_gain_pct;
100 int i_gain_pct;
101};
102
103static struct pstate_adjust_policy default_policy = {
104 .sample_rate_ms = 10,
105 .deadband = 0,
2134ed4d
DB
106 .setpoint = 97,
107 .p_gain_pct = 20,
93f0822d 108 .d_gain_pct = 0,
2134ed4d 109 .i_gain_pct = 0,
93f0822d
DB
110};
111
112struct perf_limits {
113 int no_turbo;
114 int max_perf_pct;
115 int min_perf_pct;
116 int32_t max_perf;
117 int32_t min_perf;
d8f469e9
DB
118 int max_policy_pct;
119 int max_sysfs_pct;
93f0822d
DB
120};
121
122static struct perf_limits limits = {
123 .no_turbo = 0,
124 .max_perf_pct = 100,
125 .max_perf = int_tofp(1),
126 .min_perf_pct = 0,
127 .min_perf = 0,
d8f469e9
DB
128 .max_policy_pct = 100,
129 .max_sysfs_pct = 100,
93f0822d
DB
130};
131
132static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
133 int deadband, int integral) {
134 pid->setpoint = setpoint;
135 pid->deadband = deadband;
136 pid->integral = int_tofp(integral);
137 pid->last_err = setpoint - busy;
138}
139
140static inline void pid_p_gain_set(struct _pid *pid, int percent)
141{
142 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
143}
144
145static inline void pid_i_gain_set(struct _pid *pid, int percent)
146{
147 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
148}
149
150static inline void pid_d_gain_set(struct _pid *pid, int percent)
151{
152
153 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
154}
155
156static signed int pid_calc(struct _pid *pid, int busy)
157{
158 signed int err, result;
159 int32_t pterm, dterm, fp_error;
160 int32_t integral_limit;
161
162 err = pid->setpoint - busy;
163 fp_error = int_tofp(err);
164
165 if (abs(err) <= pid->deadband)
166 return 0;
167
168 pterm = mul_fp(pid->p_gain, fp_error);
169
170 pid->integral += fp_error;
171
172 /* limit the integral term */
173 integral_limit = int_tofp(30);
174 if (pid->integral > integral_limit)
175 pid->integral = integral_limit;
176 if (pid->integral < -integral_limit)
177 pid->integral = -integral_limit;
178
179 dterm = mul_fp(pid->d_gain, (err - pid->last_err));
180 pid->last_err = err;
181
182 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
183
184 return (signed int)fp_toint(result);
185}
186
187static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
188{
189 pid_p_gain_set(&cpu->pid, cpu->pstate_policy->p_gain_pct);
190 pid_d_gain_set(&cpu->pid, cpu->pstate_policy->d_gain_pct);
191 pid_i_gain_set(&cpu->pid, cpu->pstate_policy->i_gain_pct);
192
193 pid_reset(&cpu->pid,
194 cpu->pstate_policy->setpoint,
195 100,
196 cpu->pstate_policy->deadband,
197 0);
198}
199
93f0822d
DB
200static inline void intel_pstate_reset_all_pid(void)
201{
202 unsigned int cpu;
203 for_each_online_cpu(cpu) {
204 if (all_cpu_data[cpu])
205 intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
206 }
207}
208
209/************************** debugfs begin ************************/
210static int pid_param_set(void *data, u64 val)
211{
212 *(u32 *)data = val;
213 intel_pstate_reset_all_pid();
214 return 0;
215}
216static int pid_param_get(void *data, u64 *val)
217{
218 *val = *(u32 *)data;
219 return 0;
220}
221DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
222 pid_param_set, "%llu\n");
223
224struct pid_param {
225 char *name;
226 void *value;
227};
228
229static struct pid_param pid_files[] = {
230 {"sample_rate_ms", &default_policy.sample_rate_ms},
231 {"d_gain_pct", &default_policy.d_gain_pct},
232 {"i_gain_pct", &default_policy.i_gain_pct},
233 {"deadband", &default_policy.deadband},
234 {"setpoint", &default_policy.setpoint},
235 {"p_gain_pct", &default_policy.p_gain_pct},
236 {NULL, NULL}
237};
238
239static struct dentry *debugfs_parent;
240static void intel_pstate_debug_expose_params(void)
241{
242 int i = 0;
243
244 debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
245 if (IS_ERR_OR_NULL(debugfs_parent))
246 return;
247 while (pid_files[i].name) {
248 debugfs_create_file(pid_files[i].name, 0660,
249 debugfs_parent, pid_files[i].value,
250 &fops_pid_param);
251 i++;
252 }
253}
254
255/************************** debugfs end ************************/
256
257/************************** sysfs begin ************************/
258#define show_one(file_name, object) \
259 static ssize_t show_##file_name \
260 (struct kobject *kobj, struct attribute *attr, char *buf) \
261 { \
262 return sprintf(buf, "%u\n", limits.object); \
263 }
264
265static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
266 const char *buf, size_t count)
267{
268 unsigned int input;
269 int ret;
270 ret = sscanf(buf, "%u", &input);
271 if (ret != 1)
272 return -EINVAL;
273 limits.no_turbo = clamp_t(int, input, 0 , 1);
274
275 return count;
276}
277
278static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
279 const char *buf, size_t count)
280{
281 unsigned int input;
282 int ret;
283 ret = sscanf(buf, "%u", &input);
284 if (ret != 1)
285 return -EINVAL;
286
d8f469e9
DB
287 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
288 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
93f0822d
DB
289 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
290 return count;
291}
292
293static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
294 const char *buf, size_t count)
295{
296 unsigned int input;
297 int ret;
298 ret = sscanf(buf, "%u", &input);
299 if (ret != 1)
300 return -EINVAL;
301 limits.min_perf_pct = clamp_t(int, input, 0 , 100);
302 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
303
304 return count;
305}
306
307show_one(no_turbo, no_turbo);
308show_one(max_perf_pct, max_perf_pct);
309show_one(min_perf_pct, min_perf_pct);
310
311define_one_global_rw(no_turbo);
312define_one_global_rw(max_perf_pct);
313define_one_global_rw(min_perf_pct);
314
315static struct attribute *intel_pstate_attributes[] = {
316 &no_turbo.attr,
317 &max_perf_pct.attr,
318 &min_perf_pct.attr,
319 NULL
320};
321
322static struct attribute_group intel_pstate_attr_group = {
323 .attrs = intel_pstate_attributes,
324};
325static struct kobject *intel_pstate_kobject;
326
327static void intel_pstate_sysfs_expose_params(void)
328{
329 int rc;
330
331 intel_pstate_kobject = kobject_create_and_add("intel_pstate",
332 &cpu_subsys.dev_root->kobj);
333 BUG_ON(!intel_pstate_kobject);
334 rc = sysfs_create_group(intel_pstate_kobject,
335 &intel_pstate_attr_group);
336 BUG_ON(rc);
337}
338
339/************************** sysfs end ************************/
340
341static int intel_pstate_min_pstate(void)
342{
343 u64 value;
05e99c8c 344 rdmsrl(MSR_PLATFORM_INFO, value);
93f0822d
DB
345 return (value >> 40) & 0xFF;
346}
347
348static int intel_pstate_max_pstate(void)
349{
350 u64 value;
05e99c8c 351 rdmsrl(MSR_PLATFORM_INFO, value);
93f0822d
DB
352 return (value >> 8) & 0xFF;
353}
354
355static int intel_pstate_turbo_pstate(void)
356{
357 u64 value;
358 int nont, ret;
05e99c8c 359 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
93f0822d
DB
360 nont = intel_pstate_max_pstate();
361 ret = ((value) & 255);
362 if (ret <= nont)
363 ret = nont;
364 return ret;
365}
366
367static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
368{
369 int max_perf = cpu->pstate.turbo_pstate;
370 int min_perf;
371 if (limits.no_turbo)
372 max_perf = cpu->pstate.max_pstate;
373
374 max_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
375 *max = clamp_t(int, max_perf,
376 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
377
378 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
379 *min = clamp_t(int, min_perf,
380 cpu->pstate.min_pstate, max_perf);
381}
382
383static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
384{
385 int max_perf, min_perf;
386
387 intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
388
389 pstate = clamp_t(int, pstate, min_perf, max_perf);
390
391 if (pstate == cpu->pstate.current_pstate)
392 return;
393
93f0822d 394 trace_cpu_frequency(pstate * 100000, cpu->cpu);
35363e94 395
93f0822d 396 cpu->pstate.current_pstate = pstate;
1ccf7a1c
SP
397 if (limits.no_turbo)
398 wrmsrl(MSR_IA32_PERF_CTL, BIT(32) | (pstate << 8));
399 else
400 wrmsrl(MSR_IA32_PERF_CTL, pstate << 8);
93f0822d
DB
401
402}
403
404static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
405{
406 int target;
407 target = cpu->pstate.current_pstate + steps;
408
409 intel_pstate_set_pstate(cpu, target);
410}
411
412static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
413{
414 int target;
415 target = cpu->pstate.current_pstate - steps;
416 intel_pstate_set_pstate(cpu, target);
417}
418
419static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
420{
421 sprintf(cpu->name, "Intel 2nd generation core");
422
423 cpu->pstate.min_pstate = intel_pstate_min_pstate();
424 cpu->pstate.max_pstate = intel_pstate_max_pstate();
425 cpu->pstate.turbo_pstate = intel_pstate_turbo_pstate();
426
427 /*
428 * goto max pstate so we don't slow up boot if we are built-in if we are
429 * a module we will take care of it during normal operation
430 */
431 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
432}
433
434static inline void intel_pstate_calc_busy(struct cpudata *cpu,
435 struct sample *sample)
436{
437 u64 core_pct;
93f0822d 438 core_pct = div64_u64(sample->aperf * 100, sample->mperf);
e6f3eb29 439 sample->freq = cpu->pstate.max_pstate * core_pct * 1000;
93f0822d 440
1abc4b20 441 sample->core_pct_busy = core_pct;
93f0822d
DB
442}
443
444static inline void intel_pstate_sample(struct cpudata *cpu)
445{
93f0822d
DB
446 u64 aperf, mperf;
447
93f0822d
DB
448 rdmsrl(MSR_IA32_APERF, aperf);
449 rdmsrl(MSR_IA32_MPERF, mperf);
1abc4b20
DB
450 cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
451 cpu->samples[cpu->sample_ptr].aperf = aperf;
452 cpu->samples[cpu->sample_ptr].mperf = mperf;
453 cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
454 cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
455
456 intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
93f0822d 457
93f0822d
DB
458 cpu->prev_aperf = aperf;
459 cpu->prev_mperf = mperf;
460}
461
462static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
463{
464 int sample_time, delay;
465
466 sample_time = cpu->pstate_policy->sample_rate_ms;
467 delay = msecs_to_jiffies(sample_time);
93f0822d
DB
468 mod_timer_pinned(&cpu->timer, jiffies + delay);
469}
470
93f0822d
DB
471static inline int intel_pstate_get_scaled_busy(struct cpudata *cpu)
472{
473 int32_t busy_scaled;
2134ed4d 474 int32_t core_busy, max_pstate, current_pstate;
93f0822d
DB
475
476 core_busy = int_tofp(cpu->samples[cpu->sample_ptr].core_pct_busy);
2134ed4d 477 max_pstate = int_tofp(cpu->pstate.max_pstate);
93f0822d 478 current_pstate = int_tofp(cpu->pstate.current_pstate);
2134ed4d 479 busy_scaled = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
93f0822d
DB
480
481 return fp_toint(busy_scaled);
482}
483
484static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
485{
486 int busy_scaled;
487 struct _pid *pid;
488 signed int ctl = 0;
489 int steps;
490
491 pid = &cpu->pid;
492 busy_scaled = intel_pstate_get_scaled_busy(cpu);
493
494 ctl = pid_calc(pid, busy_scaled);
495
496 steps = abs(ctl);
497 if (ctl < 0)
498 intel_pstate_pstate_increase(cpu, steps);
499 else
500 intel_pstate_pstate_decrease(cpu, steps);
501}
502
93f0822d
DB
503static void intel_pstate_timer_func(unsigned long __data)
504{
505 struct cpudata *cpu = (struct cpudata *) __data;
506
507 intel_pstate_sample(cpu);
ca182aee 508 intel_pstate_adjust_busy_pstate(cpu);
93f0822d 509
93f0822d
DB
510 if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) {
511 cpu->min_pstate_count++;
512 if (!(cpu->min_pstate_count % 5)) {
513 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
93f0822d
DB
514 }
515 } else
516 cpu->min_pstate_count = 0;
ca182aee 517
93f0822d
DB
518 intel_pstate_set_sample_time(cpu);
519}
520
521#define ICPU(model, policy) \
522 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&policy }
523
524static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
525 ICPU(0x2a, default_policy),
526 ICPU(0x2d, default_policy),
c96d53d6 527 ICPU(0x3a, default_policy),
6cdcdb79
NH
528 ICPU(0x3c, default_policy),
529 ICPU(0x3e, default_policy),
530 ICPU(0x3f, default_policy),
531 ICPU(0x45, default_policy),
532 ICPU(0x46, default_policy),
93f0822d
DB
533 {}
534};
535MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
536
537static int intel_pstate_init_cpu(unsigned int cpunum)
538{
539
540 const struct x86_cpu_id *id;
541 struct cpudata *cpu;
542
543 id = x86_match_cpu(intel_pstate_cpu_ids);
544 if (!id)
545 return -ENODEV;
546
547 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
548 if (!all_cpu_data[cpunum])
549 return -ENOMEM;
550
551 cpu = all_cpu_data[cpunum];
552
553 intel_pstate_get_cpu_pstates(cpu);
554
555 cpu->cpu = cpunum;
556 cpu->pstate_policy =
557 (struct pstate_adjust_policy *)id->driver_data;
558 init_timer_deferrable(&cpu->timer);
559 cpu->timer.function = intel_pstate_timer_func;
560 cpu->timer.data =
561 (unsigned long)cpu;
562 cpu->timer.expires = jiffies + HZ/100;
563 intel_pstate_busy_pid_reset(cpu);
93f0822d
DB
564 intel_pstate_sample(cpu);
565 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
566
567 add_timer_on(&cpu->timer, cpunum);
568
569 pr_info("Intel pstate controlling: cpu %d\n", cpunum);
570
571 return 0;
572}
573
574static unsigned int intel_pstate_get(unsigned int cpu_num)
575{
576 struct sample *sample;
577 struct cpudata *cpu;
578
579 cpu = all_cpu_data[cpu_num];
580 if (!cpu)
581 return 0;
582 sample = &cpu->samples[cpu->sample_ptr];
583 return sample->freq;
584}
585
586static int intel_pstate_set_policy(struct cpufreq_policy *policy)
587{
588 struct cpudata *cpu;
93f0822d
DB
589
590 cpu = all_cpu_data[policy->cpu];
591
d3929b83
DB
592 if (!policy->cpuinfo.max_freq)
593 return -ENODEV;
594
93f0822d
DB
595 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
596 limits.min_perf_pct = 100;
597 limits.min_perf = int_tofp(1);
598 limits.max_perf_pct = 100;
599 limits.max_perf = int_tofp(1);
600 limits.no_turbo = 0;
d1b68485 601 return 0;
93f0822d 602 }
d1b68485
SP
603 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
604 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
605 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
606
d8f469e9
DB
607 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
608 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
609 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
d1b68485 610 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
93f0822d
DB
611
612 return 0;
613}
614
615static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
616{
617 cpufreq_verify_within_limits(policy,
618 policy->cpuinfo.min_freq,
619 policy->cpuinfo.max_freq);
620
621 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
622 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
623 return -EINVAL;
624
625 return 0;
626}
627
2760984f 628static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
93f0822d
DB
629{
630 int cpu = policy->cpu;
631
632 del_timer(&all_cpu_data[cpu]->timer);
633 kfree(all_cpu_data[cpu]);
634 all_cpu_data[cpu] = NULL;
635 return 0;
636}
637
2760984f 638static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
93f0822d
DB
639{
640 int rc, min_pstate, max_pstate;
641 struct cpudata *cpu;
642
643 rc = intel_pstate_init_cpu(policy->cpu);
644 if (rc)
645 return rc;
646
647 cpu = all_cpu_data[policy->cpu];
648
649 if (!limits.no_turbo &&
650 limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
651 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
652 else
653 policy->policy = CPUFREQ_POLICY_POWERSAVE;
654
655 intel_pstate_get_min_max(cpu, &min_pstate, &max_pstate);
656 policy->min = min_pstate * 100000;
657 policy->max = max_pstate * 100000;
658
659 /* cpuinfo and default policy values */
660 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
661 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
662 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
663 cpumask_set_cpu(policy->cpu, policy->cpus);
664
665 return 0;
666}
667
668static struct cpufreq_driver intel_pstate_driver = {
669 .flags = CPUFREQ_CONST_LOOPS,
670 .verify = intel_pstate_verify_policy,
671 .setpolicy = intel_pstate_set_policy,
672 .get = intel_pstate_get,
673 .init = intel_pstate_cpu_init,
674 .exit = intel_pstate_cpu_exit,
675 .name = "intel_pstate",
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676};
677
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678static int __initdata no_load;
679
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680static int intel_pstate_msrs_not_valid(void)
681{
682 /* Check that all the msr's we are using are valid. */
683 u64 aperf, mperf, tmp;
684
685 rdmsrl(MSR_IA32_APERF, aperf);
686 rdmsrl(MSR_IA32_MPERF, mperf);
687
688 if (!intel_pstate_min_pstate() ||
689 !intel_pstate_max_pstate() ||
690 !intel_pstate_turbo_pstate())
691 return -ENODEV;
692
693 rdmsrl(MSR_IA32_APERF, tmp);
694 if (!(tmp - aperf))
695 return -ENODEV;
696
697 rdmsrl(MSR_IA32_MPERF, tmp);
698 if (!(tmp - mperf))
699 return -ENODEV;
700
701 return 0;
702}
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703static int __init intel_pstate_init(void)
704{
907cc908 705 int cpu, rc = 0;
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706 const struct x86_cpu_id *id;
707
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708 if (no_load)
709 return -ENODEV;
710
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711 id = x86_match_cpu(intel_pstate_cpu_ids);
712 if (!id)
713 return -ENODEV;
714
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715 if (intel_pstate_msrs_not_valid())
716 return -ENODEV;
717
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718 pr_info("Intel P-state driver initializing.\n");
719
b57ffac5 720 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
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721 if (!all_cpu_data)
722 return -ENOMEM;
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723
724 rc = cpufreq_register_driver(&intel_pstate_driver);
725 if (rc)
726 goto out;
727
728 intel_pstate_debug_expose_params();
729 intel_pstate_sysfs_expose_params();
730 return rc;
731out:
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732 get_online_cpus();
733 for_each_online_cpu(cpu) {
734 if (all_cpu_data[cpu]) {
735 del_timer_sync(&all_cpu_data[cpu]->timer);
736 kfree(all_cpu_data[cpu]);
737 }
738 }
739
740 put_online_cpus();
741 vfree(all_cpu_data);
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742 return -ENODEV;
743}
744device_initcall(intel_pstate_init);
745
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746static int __init intel_pstate_setup(char *str)
747{
748 if (!str)
749 return -EINVAL;
750
751 if (!strcmp(str, "disable"))
752 no_load = 1;
753 return 0;
754}
755early_param("intel_pstate", intel_pstate_setup);
756
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757MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
758MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
759MODULE_LICENSE("GPL");